diff --git a/patch/u-boot/v2022.10/board_odroidn2/0001-mmc-meson_gx_mmc-limit-f_max-to-24-MHz.patch b/patch/u-boot/v2022.10/board_odroidn2/0001-mmc-meson_gx_mmc-limit-f_max-to-24-MHz.patch
new file mode 100644
index 000000000..555048034
--- /dev/null
+++ b/patch/u-boot/v2022.10/board_odroidn2/0001-mmc-meson_gx_mmc-limit-f_max-to-24-MHz.patch
@@ -0,0 +1,42 @@
+From dc847a8091517dea6b4c07f7ed3b11cb8123b726 Mon Sep 17 00:00:00 2001
+From: Martin Pietryka <martin@pietryka.at>
+Date: Fri, 26 Apr 2024 15:43:21 +0200
+Subject: [PATCH] mmc: meson_gx_mmc: limit f_max to 24 MHz
+
+This fixes issues on the Odroid N2+ where reading from the eMMC is
+unreliable in U-Boot and probably being temperature dependent.
+
+Changing the clock phase to CLK_CO_PHASE_270 also improved stability, but
+a mailing-list post indicates that this could lead to other instabilities
+with other eMMC cards, see:
+ - https://lists.denx.de/pipermail/u-boot/2020-December/434954.html
+
+Signed-off-by: Martin Pietryka <martin@pietryka.at>
+---
+ drivers/mmc/meson_gx_mmc.c | 10 +++++++++-
+ 1 file changed, 9 insertions(+), 1 deletion(-)
+
+diff --git a/drivers/mmc/meson_gx_mmc.c b/drivers/mmc/meson_gx_mmc.c
+index fcf4f03d1e..9ecffccee4 100644
+--- a/drivers/mmc/meson_gx_mmc.c
++++ b/drivers/mmc/meson_gx_mmc.c
+@@ -279,7 +279,15 @@ static int meson_mmc_probe(struct udevice *dev)
+ 	cfg->host_caps = MMC_MODE_8BIT | MMC_MODE_4BIT |
+ 			MMC_MODE_HS_52MHz | MMC_MODE_HS;
+ 	cfg->f_min = DIV_ROUND_UP(SD_EMMC_CLKSRC_24M, CLK_MAX_DIV);
+-	cfg->f_max = 100000000; /* 100 MHz */
++
++	/*
++	 * Some SoCs have issues with higher frequencies and combinations
++	 * of CLK_CO_PHASE_* values. So limit it to 24 MHz, which according
++	 * to a mailing list post seems to be more stable:
++	 * - https://lists.denx.de/pipermail/u-boot/2020-December/434954.html
++	 */
++	cfg->f_max = 24000000; /* 24 MHz */
++
+ 	cfg->b_max = 511; /* max 512 - 1 blocks */
+ 	cfg->name = dev->name;
+ 
+-- 
+2.44.0
+