diff --git a/config/boards/orangepi5pro.csc b/config/boards/orangepi5pro.csc index 95f939a2f..34bdb62e1 100644 --- a/config/boards/orangepi5pro.csc +++ b/config/boards/orangepi5pro.csc @@ -54,8 +54,8 @@ function post_family_config_branch_edge__orangepi5pro_use_mainline_uboot() { declare -g BOOTCONFIG="orangepi-5-pro-rk3588s_defconfig" declare -g BOOTDELAY=1 declare -g BOOTSOURCE="https://github.com/u-boot/u-boot.git" - declare -g BOOTBRANCH="tag:v2024.04" - declare -g BOOTPATCHDIR="v2024.04" + declare -g BOOTBRANCH="tag:v2025.07" + declare -g BOOTPATCHDIR="v2025.07" declare -g BOOTDIR="u-boot-${BOARD}" declare -g UBOOT_TARGET_MAP="BL31=${RKBIN_DIR}/${BL31_BLOB} ROCKCHIP_TPL=${RKBIN_DIR}/${DDR_BLOB};;u-boot-rockchip.bin u-boot-rockchip-spi.bin" declare -g INSTALL_HEADERS="yes" diff --git a/patch/kernel/archive/rockchip64-6.16/dt/rk3588s-orangepi-5-pro.dts b/patch/kernel/archive/rockchip64-6.16/dt/rk3588s-orangepi-5-pro.dts index 06c854fae..bbdd6f8da 100644 --- a/patch/kernel/archive/rockchip64-6.16/dt/rk3588s-orangepi-5-pro.dts +++ b/patch/kernel/archive/rockchip64-6.16/dt/rk3588s-orangepi-5-pro.dts @@ -8,6 +8,26 @@ model = "Xunlong Orange Pi 5 Pro"; compatible = "xunlong,orangepi-5-pro", "rockchip,rk3588s"; + /delete-node/ chosen; + chosen { + stdout-path = "serial2:1500000n8"; + entropy-source = <&rng>; + }; + + aliases { + mmc0 = &sdhci; + mmc1 = &sdmmc; + }; + + /delete-node/ rng; + rng: rng@fe378000 { + compatible = "rockchip,rk3588-rng"; + reg = <0x0 0xfe378000 0x0 0x200>; + interrupts = ; + clocks = <&scmi_clk SCMI_HCLK_SECURE_NS>; + resets = <&scmi_reset 48>; + }; + vcc3v3_pcie_eth: vcc3v3-pcie-eth { compatible = "regulator-fixed"; regulator-name = "vcc3v3_pcie_eth"; @@ -34,12 +54,10 @@ regulator-always-on; }; + /delete-node/ vcc_3v3_sd_s0; + sdio_pwrseq: sdio-pwrseq { compatible = "mmc-pwrseq-simple"; - clocks = <&hym8563>; - clock-names = "ext_clock"; - pinctrl-names = "default"; - pinctrl-0 = <&wifi_enable_h>; post-power-on-delay-ms = <200>; reset-gpios = <&gpio0 RK_PD0 GPIO_ACTIVE_LOW>; }; @@ -95,6 +113,7 @@ }; /delete-node/ regulator-vcc-3v3-sd-s0; + /delete-node/ vbus_typec; /delete-node/ analog-sound; headphone_amp: headphones-audio-amplifier { @@ -206,10 +225,6 @@ status = "okay"; }; -&sfc { - status = "okay"; -}; - &gmac1 { status = "disabled"; }; @@ -223,6 +238,7 @@ cap-sd-highspeed; cap-sdio-irq; keep-power-in-suspend; + vmmc-supply = <&vcc_3v3_s3>; mmc-pwrseq = <&sdio_pwrseq>; non-removable; pinctrl-names = "default"; @@ -243,6 +259,12 @@ &sdhci { status = "okay"; + vmmc-supply = <&vcc_3v3_s3>; +}; + +&sdmmc { + status = "okay"; + vmmc-supply = <&vcc_3v3_s3>; }; &uart9 { @@ -261,7 +283,7 @@ shutdown-gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; max-speed = <1500000>; pinctrl-names = "default"; - pinctrl-0 = <&bt_reg_on &bt_wake_host &host_wake_bt>; + pinctrl-0 = <&bt_wake_host &host_wake_bt>; vbat-supply = <&vcc_3v3_s3>; vddio-supply = <&vcc_1v8_s3>; }; @@ -272,6 +294,8 @@ }; &pwm2 { + pinctrl-0 = <&pwm2m1_pins>; + pinctrl-names = "default"; status = "okay"; }; @@ -287,11 +311,6 @@ status = "okay"; }; -&sdmmc { - /delete-property/ vmmc-supply; - /delete-property/ vqmmc-supply; -}; - // Bluetooth i2S &i2s0_8ch { status = "okay"; @@ -335,6 +354,7 @@ &i2c6 { /delete-node/ es8388; + /delete-node/ usbc0; }; &hdmi0_sound { @@ -384,14 +404,6 @@ snps,parkmode-disable-ss-quirk; }; -&hym8563 { - status = "okay"; -}; - -&hym8563_int { - rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; -}; - /* The DP0 controller lacks driver support. &vp1 { vp1_out_dp0: endpoint@ROCKCHIP_VOP2_EP_DP0 { @@ -399,4 +411,8 @@ remote-endpoint = <&dp0_in_vp1>; }; }; -*/ \ No newline at end of file +*/ + +&tsadc { + rockchip,grf = <&sys_grf>; +}; diff --git a/patch/u-boot/v2024.04/board_orangepi5pro/0001-add-orangepi5-pro-support.patch b/patch/u-boot/v2024.04/board_orangepi5pro/0001-add-orangepi5-pro-support.patch deleted file mode 100644 index 0cdbab23e..000000000 --- a/patch/u-boot/v2024.04/board_orangepi5pro/0001-add-orangepi5-pro-support.patch +++ /dev/null @@ -1,822 +0,0 @@ -From d23622e93923850cae54c407f7a96aeb732e3520 Mon Sep 17 00:00:00 2001 -From: c127dev -Date: Fri, 27 Jun 2025 13:29:50 -0500 -Subject: [PATCH] board: rockchip: Initial support for Orange Pi 5 Pro for - v2024.04 - ---- - arch/arm/dts/Makefile | 1 + - arch/arm/dts/rk3588s-orangepi-5-pro.dts | 667 +++++++++++++++++++++++ - configs/orangepi-5-pro-rk3588s_defconfig | 101 ++++ - doc/board/rockchip/rockchip.rst | 1 + - 4 files changed, 770 insertions(+) - create mode 100644 arch/arm/dts/rk3588s-orangepi-5-pro.dts - create mode 100644 configs/orangepi-5-pro-rk3588s_defconfig - -diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile -index b102ffb5f68..9e6d6cc2e88 100644 ---- a/arch/arm/dts/Makefile -+++ b/arch/arm/dts/Makefile -@@ -196,6 +196,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3588) += \ - rk3588-evb1-v10.dtb \ - rk3588-nanopc-t6.dtb \ - rk3588s-orangepi-5.dtb \ -+ rk3588s-orangepi-5-pro.dtb \ - rk3588-orangepi-5-plus.dtb \ - rk3588-quartzpro64.dtb \ - rk3588-turing-rk1.dtb \ -diff --git a/arch/arm/dts/rk3588s-orangepi-5-pro.dts b/arch/arm/dts/rk3588s-orangepi-5-pro.dts -new file mode 100644 -index 00000000000..544272dfb61 ---- /dev/null -+++ b/arch/arm/dts/rk3588s-orangepi-5-pro.dts -@@ -0,0 +1,667 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+ -+/dts-v1/; -+ -+#include -+#include -+#include -+#include -+#include "rk3588s.dtsi" -+ -+/ { -+ model = "Xunlong Orange Pi 5 Pro"; -+ compatible = "xunlong,orangepi-5-pro", "rockchip,rk3588s"; -+ -+ aliases { -+ ethernet0 = &gmac1; -+ mmc0 = &sdmmc; -+ }; -+ -+ chosen { -+ stdout-path = "serial2:1500000n8"; -+ }; -+ -+ adc-keys { -+ compatible = "adc-keys"; -+ io-channels = <&saradc 1>; -+ io-channel-names = "buttons"; -+ keyup-threshold-microvolt = <1800000>; -+ poll-interval = <100>; -+ -+ button-recovery { -+ label = "Recovery"; -+ linux,code = ; -+ press-threshold-microvolt = <1800>; -+ }; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&leds_gpio>; -+ -+ led-1 { -+ gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>; -+ label = "status_led"; -+ linux,default-trigger = "heartbeat"; -+ }; -+ }; -+ -+ vbus_typec: vbus-typec-regulator { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&typec5v_pwren>; -+ regulator-name = "vbus_typec"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ vin-supply = <&vcc5v0_sys>; -+ }; -+ -+ vcc5v0_sys: vcc5v0-sys-regulator { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc5v0_sys"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ }; -+ -+ vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator { -+ compatible = "regulator-fixed"; -+ enable-active-low; -+ gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_LOW>; -+ regulator-name = "vcc_3v3_sd_s0"; -+ regulator-boot-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ vin-supply = <&vcc_3v3_s3>; -+ }; -+ -+ vcc3v3_pcie20: vcc3v3-pcie20-regulator { -+ compatible = "regulator-fixed"; -+ enable-active-high; -+ gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; -+ regulator-name = "vcc3v3_pcie20"; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ startup-delay-us = <50000>; -+ vin-supply = <&vcc5v0_sys>; -+ }; -+}; -+ -+&combphy0_ps { -+ status = "okay"; -+}; -+ -+&combphy2_psu { -+ status = "okay"; -+}; -+ -+&cpu_b0 { -+ cpu-supply = <&vdd_cpu_big0_s0>; -+}; -+ -+&cpu_b1 { -+ cpu-supply = <&vdd_cpu_big0_s0>; -+}; -+ -+&cpu_b2 { -+ cpu-supply = <&vdd_cpu_big1_s0>; -+}; -+ -+&cpu_b3 { -+ cpu-supply = <&vdd_cpu_big1_s0>; -+}; -+ -+&cpu_l0 { -+ cpu-supply = <&vdd_cpu_lit_s0>; -+}; -+ -+&cpu_l1 { -+ cpu-supply = <&vdd_cpu_lit_s0>; -+}; -+ -+&cpu_l2 { -+ cpu-supply = <&vdd_cpu_lit_s0>; -+}; -+ -+&cpu_l3 { -+ cpu-supply = <&vdd_cpu_lit_s0>; -+}; -+ -+&gmac1 { -+ clock_in_out = "output"; -+ phy-handle = <&rgmii_phy1>; -+ phy-mode = "rgmii-rxid"; -+ pinctrl-0 = <&gmac1_miim -+ &gmac1_tx_bus2 -+ &gmac1_rx_bus2 -+ &gmac1_rgmii_clk -+ &gmac1_rgmii_bus>; -+ pinctrl-names = "default"; -+ tx_delay = <0x42>; -+ status = "okay"; -+}; -+ -+&i2c0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c0m2_xfer>; -+ status = "okay"; -+ -+ vdd_cpu_big0_s0: regulator@42 { -+ compatible = "rockchip,rk8602"; -+ reg = <0x42>; -+ fcs,suspend-voltage-selector = <1>; -+ regulator-name = "vdd_cpu_big0_s0"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <550000>; -+ regulator-max-microvolt = <1050000>; -+ regulator-ramp-delay = <2300>; -+ vin-supply = <&vcc5v0_sys>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vdd_cpu_big1_s0: regulator@43 { -+ compatible = "rockchip,rk8603", "rockchip,rk8602"; -+ reg = <0x43>; -+ fcs,suspend-voltage-selector = <1>; -+ regulator-name = "vdd_cpu_big1_s0"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <550000>; -+ regulator-max-microvolt = <1050000>; -+ regulator-ramp-delay = <2300>; -+ vin-supply = <&vcc5v0_sys>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+}; -+ -+&i2c2 { -+ status = "okay"; -+ -+ vdd_npu_s0: regulator@42 { -+ compatible = "rockchip,rk8602"; -+ reg = <0x42>; -+ fcs,suspend-voltage-selector = <1>; -+ regulator-name = "vdd_npu_s0"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <550000>; -+ regulator-max-microvolt = <950000>; -+ regulator-ramp-delay = <2300>; -+ vin-supply = <&vcc5v0_sys>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+}; -+ -+&i2c6 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&i2c6m3_xfer>; -+ status = "okay"; -+ -+ hym8563: rtc@51 { -+ compatible = "haoyu,hym8563"; -+ reg = <0x51>; -+ #clock-cells = <0>; -+ clock-output-names = "hym8563"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&hym8563_int>; -+ interrupt-parent = <&gpio0>; -+ interrupts = ; -+ wakeup-source; -+ }; -+}; -+ -+&mdio1 { -+ rgmii_phy1: ethernet-phy@1 { -+ compatible = "ethernet-phy-ieee802.3-c22"; -+ reg = <0x1>; -+ reset-assert-us = <20000>; -+ reset-deassert-us = <100000>; -+ reset-gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>; -+ }; -+}; -+ -+&pcie2x1l2 { -+ reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>; -+ vpcie3v3-supply = <&vcc3v3_pcie20>; -+ status = "okay"; -+}; -+ -+&pinctrl { -+ gpio-func { -+ leds_gpio: leds-gpio { -+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ hym8563 { -+ hym8563_int: hym8563-int { -+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ usb-typec { -+ usbc0_int: usbc0-int { -+ rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ -+ typec5v_pwren: typec5v-pwren { -+ rockchip,pins = <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+}; -+ -+&saradc { -+ vref-supply = <&avcc_1v8_s0>; -+ status = "okay"; -+}; -+ -+&sdmmc { -+ bus-width = <4>; -+ cap-sd-highspeed; -+ disable-wp; -+ max-frequency = <150000000>; -+ no-mmc; -+ no-sdio; -+ sd-uhs-sdr104; -+ vmmc-supply = <&vcc_3v3_sd_s0>; -+ vqmmc-supply = <&vccio_sd_s0>; -+ status = "okay"; -+}; -+ -+&sfc { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&fspim0_pins>; -+ status = "okay"; -+ -+ flash@0 { -+ compatible = "jedec,spi-nor"; -+ reg = <0x0>; -+ spi-max-frequency = <100000000>; -+ spi-rx-bus-width = <4>; -+ spi-tx-bus-width = <1>; -+ }; -+}; -+ -+&spi2 { -+ status = "okay"; -+ assigned-clocks = <&cru CLK_SPI2>; -+ assigned-clock-rates = <200000000>; -+ num-cs = <1>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; -+ -+ pmic@0 { -+ compatible = "rockchip,rk806"; -+ reg = <0x0>; -+ interrupt-parent = <&gpio0>; -+ interrupts = <7 IRQ_TYPE_LEVEL_LOW>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, -+ <&rk806_dvs2_null>, <&rk806_dvs3_null>; -+ spi-max-frequency = <1000000>; -+ system-power-controller; -+ -+ vcc1-supply = <&vcc5v0_sys>; -+ vcc2-supply = <&vcc5v0_sys>; -+ vcc3-supply = <&vcc5v0_sys>; -+ vcc4-supply = <&vcc5v0_sys>; -+ vcc5-supply = <&vcc5v0_sys>; -+ vcc6-supply = <&vcc5v0_sys>; -+ vcc7-supply = <&vcc5v0_sys>; -+ vcc8-supply = <&vcc5v0_sys>; -+ vcc9-supply = <&vcc5v0_sys>; -+ vcc10-supply = <&vcc5v0_sys>; -+ vcc11-supply = <&vcc_2v0_pldo_s3>; -+ vcc12-supply = <&vcc5v0_sys>; -+ vcc13-supply = <&vcc_1v1_nldo_s3>; -+ vcc14-supply = <&vcc_1v1_nldo_s3>; -+ vcca-supply = <&vcc5v0_sys>; -+ -+ gpio-controller; -+ #gpio-cells = <2>; -+ -+ rk806_dvs1_null: dvs1-null-pins { -+ pins = "gpio_pwrctrl2"; -+ function = "pin_fun0"; -+ }; -+ -+ rk806_dvs2_null: dvs2-null-pins { -+ pins = "gpio_pwrctrl2"; -+ function = "pin_fun0"; -+ }; -+ -+ rk806_dvs3_null: dvs3-null-pins { -+ pins = "gpio_pwrctrl3"; -+ function = "pin_fun0"; -+ }; -+ -+ regulators { -+ vdd_gpu_s0: dcdc-reg1 { -+ regulator-name = "vdd_gpu_s0"; -+ regulator-boot-on; -+ regulator-min-microvolt = <550000>; -+ regulator-max-microvolt = <950000>; -+ regulator-ramp-delay = <12500>; -+ regulator-enable-ramp-delay = <400>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vdd_cpu_lit_s0: dcdc-reg2 { -+ regulator-name = "vdd_cpu_lit_s0"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <550000>; -+ regulator-max-microvolt = <950000>; -+ regulator-ramp-delay = <12500>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vdd_log_s0: dcdc-reg3 { -+ regulator-name = "vdd_log_s0"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <675000>; -+ regulator-max-microvolt = <750000>; -+ regulator-ramp-delay = <12500>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ regulator-suspend-microvolt = <750000>; -+ }; -+ }; -+ -+ vdd_vdenc_s0: dcdc-reg4 { -+ regulator-name = "vdd_vdenc_s0"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <550000>; -+ regulator-max-microvolt = <950000>; -+ regulator-ramp-delay = <12500>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vdd_ddr_s0: dcdc-reg5 { -+ regulator-name = "vdd_ddr_s0"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <675000>; -+ regulator-max-microvolt = <900000>; -+ regulator-ramp-delay = <12500>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ regulator-suspend-microvolt = <850000>; -+ }; -+ }; -+ -+ vcc_1v1_nldo_s3: vdd2_ddr_s3: dcdc-reg6 { -+ regulator-name = "vdd2_ddr_s3"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-max-microvolt = <1100000>; -+ regulator-min-microvolt = <1100000>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ -+ vcc_2v0_pldo_s3: dcdc-reg7 { -+ regulator-name = "vdd_2v0_pldo_s3"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <2000000>; -+ regulator-max-microvolt = <2000000>; -+ regulator-ramp-delay = <12500>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <2000000>; -+ }; -+ }; -+ -+ vcc_3v3_s3: dcdc-reg8 { -+ regulator-name = "vcc_3v3_s3"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <3300000>; -+ }; -+ }; -+ -+ vddq_ddr_s0: dcdc-reg9 { -+ regulator-name = "vddq_ddr_s0"; -+ regulator-always-on; -+ regulator-boot-on; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vcc_1v8_s3: dcdc-reg10 { -+ regulator-name = "vcc_1v8_s3"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ avcc_1v8_s0: pldo-reg1 { -+ regulator-name = "avcc_1v8_s0"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vcc_1v8_s0: pldo-reg2 { -+ regulator-name = "vcc_1v8_s0"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ avdd_1v2_s0: pldo-reg3 { -+ regulator-name = "avdd_1v2_s0"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1200000>; -+ regulator-max-microvolt = <1200000>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vcc_3v3_s0: pldo-reg4 { -+ regulator-name = "vcc_3v3_s0"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-ramp-delay = <12500>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vccio_sd_s0: pldo-reg5 { -+ regulator-name = "vccio_sd_s0"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-ramp-delay = <12500>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ pldo6_s3: pldo-reg6 { -+ regulator-name = "pldo6_s3"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vdd_0v75_s3: nldo-reg1 { -+ regulator-name = "vdd_0v75_s3"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <750000>; -+ regulator-max-microvolt = <750000>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <750000>; -+ }; -+ }; -+ -+ vdd_ddr_pll_s0: nldo-reg2 { -+ regulator-name = "vdd_ddr_pll_s0"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <850000>; -+ regulator-max-microvolt = <850000>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ regulator-suspend-microvolt = <850000>; -+ }; -+ }; -+ -+ avdd_0v75_s0: nldo-reg3 { -+ regulator-name = "avdd_0v75_s0"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <750000>; -+ regulator-max-microvolt = <750000>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vdd_0v85_s0: nldo-reg4 { -+ regulator-name = "vdd_0v85_s0"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <850000>; -+ regulator-max-microvolt = <850000>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vdd_0v75_s0: nldo-reg5 { -+ regulator-name = "vdd_0v75_s0"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <750000>; -+ regulator-max-microvolt = <750000>; -+ -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ }; -+ }; -+}; -+ -+&tsadc { -+ status = "okay"; -+}; -+ -+&u2phy2 { -+ status = "okay"; -+}; -+ -+&u2phy2_host { -+ status = "okay"; -+}; -+ -+&u2phy3 { -+ status = "okay"; -+}; -+ -+&u2phy3_host { -+ status = "okay"; -+}; -+ -+&uart2 { -+ pinctrl-0 = <&uart2m0_xfer>; -+ status = "okay"; -+}; -+ -+&usb_host0_ehci { -+ status = "okay"; -+}; -+ -+&usb_host0_ohci { -+ status = "okay"; -+}; -+ -+&usb_host1_ehci { -+ status = "okay"; -+}; -+ -+&usb_host1_ohci { -+ status = "okay"; -+}; -+ -+&usb_host2_xhci { -+ status = "okay"; -+}; -diff --git a/configs/orangepi-5-pro-rk3588s_defconfig b/configs/orangepi-5-pro-rk3588s_defconfig -new file mode 100644 -index 00000000000..010660707fe ---- /dev/null -+++ b/configs/orangepi-5-pro-rk3588s_defconfig -@@ -0,0 +1,101 @@ -+CONFIG_ARM=y -+CONFIG_SKIP_LOWLEVEL_INIT=y -+CONFIG_COUNTER_FREQUENCY=24000000 -+CONFIG_ARCH_ROCKCHIP=y -+CONFIG_TEXT_BASE=0x00a00000 -+CONFIG_SPL_LIBCOMMON_SUPPORT=y -+CONFIG_SPL_LIBGENERIC_SUPPORT=y -+CONFIG_NR_DRAM_BANKS=2 -+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 -+CONFIG_SF_DEFAULT_SPEED=24000000 -+CONFIG_SF_DEFAULT_MODE=0x2000 -+CONFIG_DEFAULT_DEVICE_TREE="rk3588s-orangepi-5-pro" -+CONFIG_ROCKCHIP_RK3588=y -+CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y -+CONFIG_ROCKCHIP_SPI_IMAGE=y -+CONFIG_SPL_SERIAL=y -+CONFIG_SPL_STACK_R_ADDR=0x600000 -+CONFIG_TARGET_EVB_RK3588=y -+CONFIG_SPL_STACK=0x400000 -+CONFIG_DEBUG_UART_BASE=0xFEB50000 -+CONFIG_DEBUG_UART_CLOCK=24000000 -+CONFIG_SPL_SPI_FLASH_SUPPORT=y -+CONFIG_SPL_SPI=y -+CONFIG_SYS_LOAD_ADDR=0xc00800 -+CONFIG_PCI=y -+CONFIG_DEBUG_UART=y -+CONFIG_AHCI=y -+CONFIG_FIT=y -+CONFIG_FIT_VERBOSE=y -+CONFIG_SPL_FIT_SIGNATURE=y -+CONFIG_SPL_LOAD_FIT=y -+CONFIG_LEGACY_IMAGE_FORMAT=y -+CONFIG_OF_BOARD_SETUP=y -+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-orangepi-5-pro.dtb" -+# CONFIG_DISPLAY_CPUINFO is not set -+CONFIG_DISPLAY_BOARDINFO_LATE=y -+CONFIG_SPL_MAX_SIZE=0x40000 -+CONFIG_SPL_PAD_TO=0x7f8000 -+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -+CONFIG_SPL_BSS_START_ADDR=0x4000000 -+CONFIG_SPL_BSS_MAX_SIZE=0x4000 -+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -+CONFIG_SPL_STACK_R=y -+CONFIG_SPL_SPI_LOAD=y -+CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000 -+CONFIG_SPL_ATF=y -+CONFIG_CMD_GPIO=y -+CONFIG_CMD_GPT=y -+CONFIG_CMD_I2C=y -+CONFIG_CMD_MMC=y -+CONFIG_CMD_PCI=y -+CONFIG_CMD_USB=y -+# CONFIG_CMD_SETEXPR is not set -+CONFIG_CMD_REGULATOR=y -+# CONFIG_SPL_DOS_PARTITION is not set -+CONFIG_SPL_OF_CONTROL=y -+CONFIG_OF_LIVE=y -+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" -+CONFIG_SPL_DM_SEQ_ALIAS=y -+CONFIG_SPL_REGMAP=y -+CONFIG_SPL_SYSCON=y -+CONFIG_AHCI_PCI=y -+CONFIG_DWC_AHCI=y -+CONFIG_SPL_CLK=y -+CONFIG_ROCKCHIP_GPIO=y -+CONFIG_SYS_I2C_ROCKCHIP=y -+CONFIG_MISC=y -+CONFIG_SUPPORT_EMMC_RPMB=y -+CONFIG_MMC_DW=y -+CONFIG_MMC_DW_ROCKCHIP=y -+CONFIG_SF_DEFAULT_BUS=5 -+CONFIG_SPI_FLASH_SFDP_SUPPORT=y -+CONFIG_SPI_FLASH_XMC=y -+CONFIG_PHY_MOTORCOMM=y -+CONFIG_DWC_ETH_QOS=y -+CONFIG_DWC_ETH_QOS_ROCKCHIP=y -+CONFIG_NVME_PCI=y -+CONFIG_PCIE_DW_ROCKCHIP=y -+CONFIG_PHY_ROCKCHIP_INNO_USB2=y -+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y -+CONFIG_PHY_ROCKCHIP_USBDP=y -+CONFIG_SPL_PINCTRL=y -+CONFIG_PWM_ROCKCHIP=y -+CONFIG_SPL_RAM=y -+CONFIG_SCSI=y -+CONFIG_BAUDRATE=1500000 -+CONFIG_DEBUG_UART_SHIFT=2 -+CONFIG_SYS_NS16550_MEM32=y -+CONFIG_ROCKCHIP_SFC=y -+CONFIG_SYSRESET=y -+CONFIG_USB=y -+CONFIG_USB_XHCI_HCD=y -+CONFIG_USB_EHCI_HCD=y -+CONFIG_USB_EHCI_GENERIC=y -+CONFIG_USB_OHCI_HCD=y -+CONFIG_USB_OHCI_GENERIC=y -+CONFIG_USB_DWC3=y -+CONFIG_USB_DWC3_GENERIC=y -+CONFIG_ERRNO_STR=y -diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst -index e23ca4231cc..df237da2dfa 100644 ---- a/doc/board/rockchip/rockchip.rst -+++ b/doc/board/rockchip/rockchip.rst -@@ -121,6 +121,7 @@ List of mainline supported Rockchip boards: - - Radxa ROCK 5A (rock5a-rk3588s) - - Radxa ROCK 5B (rock5b-rk3588) - - Xunlong Orange Pi 5 (orangepi-5-rk3588s) -+ - Xunlong Orange Pi 5 Pro (orangepi-5-pro-rk3588s) - - Xunlong Orange Pi 5 Plus (orangepi-5-plus-rk3588) - - * rv1108 --- -2.50.0 - diff --git a/patch/u-boot/v2025.07/board_orangepi5pro/0001-add-orangepi5-pro-support.patch b/patch/u-boot/v2025.07/board_orangepi5pro/0001-add-orangepi5-pro-support.patch new file mode 100644 index 000000000..efc11c9c3 --- /dev/null +++ b/patch/u-boot/v2025.07/board_orangepi5pro/0001-add-orangepi5-pro-support.patch @@ -0,0 +1,597 @@ +From 9fb8c2b3c787869d835ec11d47d045cd76a9ddf5 Mon Sep 17 00:00:00 2001 +From: c127dev +Date: Tue, 22 Jul 2025 19:51:44 -0500 +Subject: [PATCH 1/2] arm: dts: rockchip: Add initial support for Orange Pi 5 + Pro + +This patch introduces the necessary files to support the Orange Pi 5 Pro +single-board computer, which is based on the Rockchip RK3588S SoC. + +The following features are enabled by this initial support: +- Booting from eMMC and SD card. +- Basic peripherals via Device Tree: USB, SD/MMC, and Ethernet. +- PWM control for the fan and status LEDs. +- Audio support via the ES8388 codec on the I2C bus. +- Wireless functionality (WiFi/BT) via the AP6256 module. +- Video from HDMI 2.1. +- USB 3.0 Port. +--- + configs/orangepi-5-pro-rk3588s_defconfig | 88 ++++ + doc/board/rockchip/rockchip.rst | 1 + + dts/upstream/Bindings/arm/rockchip.yaml | 1 + + .../arm64/rockchip/rk3588s-orangepi-5-pro.dts | 416 ++++++++++++++++++ + 4 files changed, 506 insertions(+) + create mode 100644 configs/orangepi-5-pro-rk3588s_defconfig + create mode 100644 dts/upstream/src/arm64/rockchip/rk3588s-orangepi-5-pro.dts + +diff --git a/configs/orangepi-5-pro-rk3588s_defconfig b/configs/orangepi-5-pro-rk3588s_defconfig +new file mode 100644 +index 00000000000..45370df68cf +--- /dev/null ++++ b/configs/orangepi-5-pro-rk3588s_defconfig +@@ -0,0 +1,88 @@ ++CONFIG_ARM=y ++CONFIG_SKIP_LOWLEVEL_INIT=y ++CONFIG_COUNTER_FREQUENCY=24000000 ++CONFIG_ARCH_ROCKCHIP=y ++CONFIG_SF_DEFAULT_SPEED=24000000 ++CONFIG_SF_DEFAULT_MODE=0x2000 ++CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588s-orangepi-5-pro" ++CONFIG_ROCKCHIP_RK3588=y ++CONFIG_ROCKCHIP_SPI_IMAGE=y ++CONFIG_SPL_SERIAL=y ++CONFIG_TARGET_EVB_RK3588=y ++CONFIG_SYS_LOAD_ADDR=0xc00800 ++CONFIG_SF_DEFAULT_BUS=5 ++CONFIG_DEBUG_UART_BASE=0xFEB50000 ++CONFIG_DEBUG_UART_CLOCK=24000000 ++CONFIG_SPL_SPI_FLASH_SUPPORT=y ++CONFIG_SPL_SPI=y ++CONFIG_PCI=y ++CONFIG_DEBUG_UART=y ++CONFIG_AHCI=y ++CONFIG_FIT=y ++CONFIG_FIT_VERBOSE=y ++CONFIG_SPL_FIT_SIGNATURE=y ++CONFIG_SPL_LOAD_FIT=y ++CONFIG_LEGACY_IMAGE_FORMAT=y ++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-orangepi-5-pro.dtb" ++# CONFIG_DISPLAY_CPUINFO is not set ++CONFIG_DISPLAY_BOARDINFO_LATE=y ++CONFIG_SPL_MAX_SIZE=0x40000 ++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set ++CONFIG_SPL_SPI_LOAD=y ++CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000 ++CONFIG_SPL_ATF=y ++CONFIG_CMD_GPIO=y ++CONFIG_CMD_GPT=y ++CONFIG_CMD_I2C=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_PCI=y ++CONFIG_CMD_USB=y ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_REGULATOR=y ++# CONFIG_SPL_DOS_PARTITION is not set ++CONFIG_SPL_OF_CONTROL=y ++CONFIG_OF_LIVE=y ++CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" ++CONFIG_SPL_DM_SEQ_ALIAS=y ++CONFIG_SPL_REGMAP=y ++CONFIG_SPL_SYSCON=y ++CONFIG_AHCI_PCI=y ++CONFIG_DWC_AHCI=y ++CONFIG_SPL_CLK=y ++CONFIG_ROCKCHIP_GPIO=y ++CONFIG_SYS_I2C_ROCKCHIP=y ++CONFIG_MISC=y ++CONFIG_SUPPORT_EMMC_RPMB=y ++CONFIG_MMC_DW=y ++CONFIG_MMC_DW_ROCKCHIP=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_SDMA=y ++CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_SPI_FLASH_SFDP_SUPPORT=y ++CONFIG_SPI_FLASH_XMC=y ++CONFIG_PHY_MOTORCOMM=y ++CONFIG_DWC_ETH_QOS=y ++CONFIG_DWC_ETH_QOS_ROCKCHIP=y ++CONFIG_NVME_PCI=y ++CONFIG_PCIE_DW_ROCKCHIP=y ++CONFIG_PHY_ROCKCHIP_INNO_USB2=y ++CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y ++CONFIG_PHY_ROCKCHIP_USBDP=y ++CONFIG_SPL_PINCTRL=y ++CONFIG_PWM_ROCKCHIP=y ++CONFIG_SPL_RAM=y ++CONFIG_SCSI=y ++CONFIG_BAUDRATE=1500000 ++CONFIG_DEBUG_UART_SHIFT=2 ++CONFIG_SYS_NS16550_MEM32=y ++CONFIG_ROCKCHIP_SFC=y ++CONFIG_SYSRESET=y ++CONFIG_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_EHCI_GENERIC=y ++CONFIG_USB_OHCI_HCD=y ++CONFIG_USB_OHCI_GENERIC=y ++CONFIG_USB_DWC3=y ++CONFIG_USB_DWC3_GENERIC=y ++CONFIG_ERRNO_STR=y +diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst +index b88299cbba2..c181eb9cb79 100644 +--- a/doc/board/rockchip/rockchip.rst ++++ b/doc/board/rockchip/rockchip.rst +@@ -159,6 +159,7 @@ List of mainline supported Rockchip boards: + - Theobroma Systems SOM-RK3588-Q7 - Tiger (tiger-rk3588) + - Turing Machines RK1 (turing-rk1-rk3588) + - Xunlong Orange Pi 5 (orangepi-5-rk3588s) ++ - Xunlong Orange Pi 5 Pro (orangepi-5-pro-rk3588s) + - Xunlong Orange Pi 5 Max (orangepi-5-max-rk3588) + - Xunlong Orange Pi 5 Plus (orangepi-5-plus-rk3588) + - Yanyi Tech CoolPi 4 Model B (coolpi-4b-rk3588s) +diff --git a/dts/upstream/Bindings/arm/rockchip.yaml b/dts/upstream/Bindings/arm/rockchip.yaml +index 0f4ca08d9ae..804108fe0fe 100644 +--- a/dts/upstream/Bindings/arm/rockchip.yaml ++++ b/dts/upstream/Bindings/arm/rockchip.yaml +@@ -1160,6 +1160,7 @@ properties: + - enum: + - xunlong,orangepi-5 + - xunlong,orangepi-5b ++ - xunlong,orangepi-5-pro + - const: rockchip,rk3588s + + - description: Zkmagic A95X Z2 +diff --git a/dts/upstream/src/arm64/rockchip/rk3588s-orangepi-5-pro.dts b/dts/upstream/src/arm64/rockchip/rk3588s-orangepi-5-pro.dts +new file mode 100644 +index 00000000000..0141453ede3 +--- /dev/null ++++ b/dts/upstream/src/arm64/rockchip/rk3588s-orangepi-5-pro.dts +@@ -0,0 +1,416 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++ ++/dts-v1/; ++ ++#include "rk3588s-orangepi-5.dtsi" ++ ++/ { ++ model = "Xunlong Orange Pi 5 Pro"; ++ compatible = "xunlong,orangepi-5-pro", "rockchip,rk3588s"; ++ ++ /delete-node/ chosen; ++ chosen { ++ stdout-path = "serial2:1500000n8"; ++ entropy-source = <&rng>; ++ }; ++ ++ aliases { ++ mmc0 = &sdhci; ++ mmc1 = &sdmmc; ++ }; ++ ++ /delete-node/ rng; ++ rng: rng@fe378000 { ++ compatible = "rockchip,rk3588-rng"; ++ reg = <0x0 0xfe378000 0x0 0x200>; ++ interrupts = ; ++ clocks = <&scmi_clk SCMI_HCLK_SECURE_NS>; ++ resets = <&scmi_reset 48>; ++ }; ++ ++ vcc3v3_pcie_eth: vcc3v3-pcie-eth { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_pcie_eth"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-boot-on; ++ regulator-always-on; ++ enable-active-high; ++ gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; ++ vin-supply = <&vcc_3v3_s3>; ++ }; ++ ++ vcc5v0_otg: vcc5v0-otg { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_otg"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ enable-active-high; ++ gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vcc5v0_otg_en>; ++ vin-supply = <&vcc5v0_sys>; ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ /delete-node/ vcc_3v3_sd_s0; ++ ++ sdio_pwrseq: sdio-pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ post-power-on-delay-ms = <200>; ++ reset-gpios = <&gpio0 RK_PD0 GPIO_ACTIVE_LOW>; ++ }; ++ ++ /* The DP0 controller lacks driver support. ++ dp_en: dp-en { ++ compatible = "regulator-fixed"; ++ regulator-name = "dp_en"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ enable-active-high; ++ regulator-boot-on; ++ regulator-always-on; ++ gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>; ++ vin-supply = <&vcc_3v3_s3>; ++ }; ++ */ ++ ++ /delete-node/ pwm-leds; ++ pwm-leds { ++ compatible = "pwm-leds"; ++ ++ led-g { ++ color = ; ++ function = LED_FUNCTION_STATUS; ++ linux,default-trigger = "heartbeat"; ++ max-brightness = <255>; ++ pwms = <&pwm3 0 25000 0>; ++ }; ++ ++ led-b { ++ color = ; ++ function = LED_FUNCTION_STATUS; ++ linux,default-trigger = "none"; ++ max-brightness = <0>; // Desync compared with Green LED ++ pwms = <&pwm15 0 25000 0>; ++ }; ++ }; ++ ++ fan: pwm-fan { ++ compatible = "pwm-fan"; ++ #cooling-cells = <2>; ++ pwms = <&pwm2 0 20000000 0>; ++ cooling-levels = <0 50 100 150 200 255>; ++ rockchip,temp-trips = < ++ 50000 1 ++ 55000 2 ++ 60000 3 ++ 65000 4 ++ 70000 5 ++ >; ++ status = "okay"; ++ }; ++ ++ /delete-node/ regulator-vcc-3v3-sd-s0; ++ /delete-node/ vbus_typec; ++ /delete-node/ analog-sound; ++ ++ headphone_amp: headphones-audio-amplifier { ++ compatible = "simple-audio-amplifier"; ++ sound-name-prefix = "Headphones Amp"; ++ enable-gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>; ++ }; ++ ++ es8388-sound { ++ compatible = "simple-audio-card"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&hp_detect>; ++ simple-audio-card,name = "rockchip,es8388"; ++ simple-audio-card,bitclock-master = <&daicpu>; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,frame-master = <&daicpu>; ++ simple-audio-card,aux-devs = <&headphone_amp>; ++ simple-audio-card,hp-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>; ++ simple-audio-card,mclk-fs = <256>; ++ simple-audio-card,pin-switches = "Headphones"; ++ simple-audio-card,routing = ++ "Headphones", "LOUT1", ++ "Headphones", "ROUT1", ++ ++ "Headphones", "Headphones Amp OUTL", ++ "Headphones", "Headphones Amp OUTR", ++ "Headphones Amp INL", "LOUT1", ++ "Headphones Amp INR", "ROUT1", ++ ++ "LINPUT1", "Microphone Jack", ++ "RINPUT1", "Microphone Jack", ++ "LINPUT2", "Onboard Microphone", ++ "RINPUT2", "Onboard Microphone"; ++ simple-audio-card,widgets = ++ "Microphone", "Microphone Jack", ++ "Microphone", "Onboard Microphone", ++ "Headphone", "Headphones"; ++ ++ daicpu: simple-audio-card,cpu { ++ sound-dai = <&i2s2_2ch>; ++ system-clock-frequency = <12288000>; ++ }; ++ ++ masterdai: simple-audio-card,codec { ++ sound-dai = <&es8388_sound>; ++ system-clock-frequency = <12288000>; ++ }; ++ }; ++}; ++ ++&pinctrl { ++ sdio-pwrseq { ++ wifi_enable_h: wifi-enable-h { ++ rockchip,pins = <0 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ wireless-bluetooth { ++ bt_reg_on: bt-reset-gpio { // BT_REG_ON_H ++ rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ host_wake_bt: bt-wake-gpio { // HOST_WAKE_BT_H ++ rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ bt_wake_host: bt-irq-gpio { // BT_WAKE_HOST_H ++ rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++ ++ wireless-wlan { ++ wifi_host_wake_irq: wifi-host-wake-irq { ++ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++ ++ usb { ++ vcc5v0_otg_en: vcc5v0-otg-en { ++ rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ dp0 { ++ dp0_hpd: dp0-hpd { ++ rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ i2s2 { ++ /omit-if-no-ref/ ++ i2s2m1_idle: i2s2m1-idle { ++ rockchip,pins = ++ /* i2s2m1_lrck_gpio */ ++ <3 RK_PB6 0 &pcfg_pull_none>, ++ /* i2s2m1_sclk_gpio */ ++ <3 RK_PB5 0 &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++&pcie2x1l1 { ++ reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++}; ++ ++&pcie2x1l2 { ++ reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++}; ++ ++&gmac1 { ++ status = "disabled"; ++}; ++ ++&sdio { ++ max-frequency = <150000000>; ++ no-sd; ++ no-mmc; ++ bus-width = <4>; ++ disable-wp; ++ cap-sd-highspeed; ++ cap-sdio-irq; ++ keep-power-in-suspend; ++ mmc-pwrseq = <&sdio_pwrseq>; ++ non-removable; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdiom1_pins>; ++ sd-uhs-sdr104; ++ status = "okay"; ++ ++ ap6256: wifi@1 { ++ compatible = "brcm,bcm43456-fmac", "brcm,bcm4329-fmac"; ++ reg = <1>; ++ interrupt-parent = <&gpio0>; ++ interrupts = ; ++ interrupt-names = "host-wake"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wifi_host_wake_irq>; ++ }; ++}; ++ ++&sdhci { ++ status = "okay"; ++ vmmc-supply = <&vcc_3v3_s3>; ++}; ++ ++&sdmmc { ++ status = "okay"; ++ vmmc-supply = <&vcc_3v3_s3>; ++}; ++ ++&vdd2_ddr_s3 { ++ regulator-min-microvolt = <1050000>; ++ regulator-max-microvolt = <1050000>; ++}; ++ ++&uart9 { ++ status = "okay"; ++ uart-has-rtscts; ++ pinctrl-0 = <&uart9m2_xfer &uart9m2_ctsn>; ++ ++ bluetooth { ++ compatible = "brcm,bcm4345c5"; ++ clocks = <&hym8563>; ++ clock-names = "lpo"; ++ interrupt-parent = <&gpio0>; ++ interrupts = ; ++ interrupt-names = "host-wakeup"; ++ device-wakeup-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; ++ shutdown-gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; ++ max-speed = <1500000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&bt_wake_host &host_wake_bt>; ++ vbat-supply = <&vcc_3v3_s3>; ++ vddio-supply = <&vcc_1v8_s3>; ++ }; ++}; ++ ++&pwm0 { ++ status = "disabled"; ++}; ++ ++&pwm2 { ++ pinctrl-0 = <&pwm2m1_pins>; ++ pinctrl-names = "default"; ++ status = "okay"; ++}; ++ ++&pwm3 { ++ pinctrl-0 = <&pwm3m2_pins>; ++ pinctrl-names = "default"; ++ status = "okay"; ++}; ++ ++&pwm15 { ++ pinctrl-0 = <&pwm15m2_pins>; ++ pinctrl-names = "default"; ++ status = "okay"; ++}; ++ ++// Bluetooth i2S ++&i2s0_8ch { ++ status = "okay"; ++}; ++ ++&i2s1_8ch { ++ status = "disabled"; ++}; ++ ++&i2s2_2ch { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s2m1_lrck ++ &i2s2m1_mclk ++ &i2s2m1_sclk ++ &i2s2m1_sdi ++ &i2s2m1_sdo>; ++ status = "okay"; ++}; ++ ++&i2c2 { ++ status = "okay"; ++}; ++ ++&i2c3 { ++ status = "okay"; ++ ++ es8388_sound: audio-codec@11 { ++ compatible = "everest,es8388", "everest,es8328"; ++ reg = <0x11>; ++ clocks = <&cru I2S2_2CH_MCLKOUT>; ++ AVDD-supply = <&vcc_3v3_s0>; ++ DVDD-supply = <&vcc_1v8_s0>; ++ HPVDD-supply = <&vcc_3v3_s0>; ++ PVDD-supply = <&vcc_1v8_s0>; ++ assigned-clocks = <&cru I2S2_2CH_MCLKOUT>; ++ assigned-clock-rates = <12288000>; ++ #sound-dai-cells = <0>; ++ status = "okay"; ++ }; ++}; ++ ++&i2c6 { ++ /delete-node/ es8388; ++ /delete-node/ usbc0; ++}; ++ ++&usbc0 { ++ status = "disabled"; ++}; ++ ++&usb_host0_xhci { ++ /delete-property/ usb-role-switch; ++ dr_mode = "host"; ++ vbus-supply = <&vcc5v0_otg>; ++ ++ snps,parkmode-disable-hs-quirk; ++ snps,parkmode-disable-ss-quirk; ++ quirk-skip-phy-init; ++ ++ /delete-node/ port; ++}; ++ ++&usb_con { ++ /delete-node/ ports; ++}; ++ ++&usbdp_phy0 { ++ /delete-property/ sbu1-dc-gpios; ++ /delete-property/ sbu2-dc-gpios; ++ /delete-property/ mode-switch; ++ /delete-property/ orientation-switch; ++ rockchip,dp-lane-mux = <0 1>; ++}; ++ ++&usbdp_phy0_typec_ss { ++ /delete-property/ remote-endpoint; ++}; ++ ++&usbdp_phy0_typec_sbu { ++ /delete-property/ remote-endpoint; ++}; ++ ++&usb_host2_xhci { ++ snps,parkmode-disable-hs-quirk; ++ snps,parkmode-disable-ss-quirk; ++}; ++ ++/* The DP0 controller lacks driver support. ++&vp1 { ++ vp1_out_dp0: endpoint@ROCKCHIP_VOP2_EP_DP0 { ++ reg = ; ++ remote-endpoint = <&dp0_in_vp1>; ++ }; ++}; ++*/ ++ ++&tsadc { ++ rockchip,grf = <&sysgrf>; ++}; +-- +2.50.1 + + +From 84df1c83bde54e23b5bacb7497ae419697b4e004 Mon Sep 17 00:00:00 2001 +From: c127dev +Date: Tue, 29 Jul 2025 12:23:43 -0500 +Subject: [PATCH 2/2] orangepi5pro: dts: Fix incorrect GRF node name + +The GRF node was misspelled as 'sysgrf' instead +of the correct 'sys_grf'. + +This commit corrects the phandle to the proper value. +--- + dts/upstream/src/arm64/rockchip/rk3588s-orangepi-5-pro.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/dts/upstream/src/arm64/rockchip/rk3588s-orangepi-5-pro.dts b/dts/upstream/src/arm64/rockchip/rk3588s-orangepi-5-pro.dts +index 0141453ede3..51bbad086d4 100644 +--- a/dts/upstream/src/arm64/rockchip/rk3588s-orangepi-5-pro.dts ++++ b/dts/upstream/src/arm64/rockchip/rk3588s-orangepi-5-pro.dts +@@ -412,5 +412,5 @@ + */ + + &tsadc { +- rockchip,grf = <&sysgrf>; ++ rockchip,grf = <&sys_grf>; + }; +-- +2.50.1 +