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rockchip64: cleanup rk3318-box hdmi patches

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* remove phy functions to avoid future clashes
 * use existing phy .configure function
This commit is contained in:
Paolo Sabatino
2024-04-24 19:14:23 +02:00
committed by Igor
parent f413800cd8
commit 3c649d2e9d
4 changed files with 78 additions and 107 deletions
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71
patch/u-boot/v2024.01/board_rk3318-box/general-add-inno-hdmi-phy.patch
View File

@@ -44,10 +44,10 @@ index a236877234b..800d5c61ef2 100644
obj-$(CONFIG_PHY_ROCKCHIP_PCIE) += phy-rockchip-pcie.o obj-$(CONFIG_PHY_ROCKCHIP_PCIE) += phy-rockchip-pcie.o
diff --git a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c diff --git a/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
new file mode 100644 new file mode 100644
index 00000000000..f9f54c5ff82 index 0000000000..99cf174214
--- /dev/null --- /dev/null
+++ b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c +++ b/drivers/phy/rockchip/phy-rockchip-inno-hdmi.c
@@ -0,0 +1,734 @@ @@ -0,0 +1,759 @@
+// SPDX-License-Identifier: GPL-2.0+ +// SPDX-License-Identifier: GPL-2.0+
+/* +/*
+ * Rockchip Innosilicon HDMI PHY + * Rockchip Innosilicon HDMI PHY
@@ -62,6 +62,7 @@ index 00000000000..f9f54c5ff82
+#include <generic-phy.h> +#include <generic-phy.h>
+#include <asm/io.h> +#include <asm/io.h>
+#include <linux/delay.h> +#include <linux/delay.h>
+#include <inno/phy-inno-hdmi.h>
+ +
+#define INNO_HDMI_PHY_TIMEOUT_LOOP_COUNT 1000 +#define INNO_HDMI_PHY_TIMEOUT_LOOP_COUNT 1000
+#define UPDATE(x, h, l) (((x) << (l)) & GENMASK((h), (l))) +#define UPDATE(x, h, l) (((x) << (l)) & GENMASK((h), (l)))
@@ -732,12 +733,36 @@ index 00000000000..f9f54c5ff82
+ return cfg->pixclock; + return cfg->pixclock;
+} +}
+ +
+static int
+inno_hdmi_phy_configure(struct phy *phy, void *params)
+{
+ struct phy_configure_opts_inno_hdmi *config = params;
+ int ret;
+ unsigned long rate;
+
+ rate = inno_hdmi_phy_clk_round_rate(phy, config->pixel_clock);
+ if (rate < 0) {
+ printf("failed phy round rate (pixel_clok=%d, rate=%ld)\n",
+ config->pixel_clock, rate);
+ return ret;
+ }
+
+ inno_hdmi_phy_set_bus_width(phy, config->bus_width);
+
+ ret = inno_hdmi_phy_set_pll(phy, rate);
+ if (ret) {
+ printf("failed set phy pll (ret=%d)\n", ret);
+ return ret;
+ }
+
+ return 0;
+
+}
+
+static struct phy_ops inno_hdmi_phy_ops = { +static struct phy_ops inno_hdmi_phy_ops = {
+ .power_on = inno_hdmi_phy_power_on, + .power_on = inno_hdmi_phy_power_on,
+ .power_off = inno_hdmi_phy_power_off, + .power_off = inno_hdmi_phy_power_off,
+ .set_pll = inno_hdmi_phy_set_pll, + .configure = inno_hdmi_phy_configure,
+ .set_bus_width = inno_hdmi_phy_set_bus_width,
+ .round_rate = inno_hdmi_phy_clk_round_rate,
+}; +};
+ +
+static int inno_hdmi_phy_probe(struct udevice *dev) +static int inno_hdmi_phy_probe(struct udevice *dev)
@@ -782,3 +807,39 @@ index 00000000000..f9f54c5ff82
+ .probe = inno_hdmi_phy_probe, + .probe = inno_hdmi_phy_probe,
+ .priv_auto = sizeof(struct inno_hdmi_phy), + .priv_auto = sizeof(struct inno_hdmi_phy),
+}; +};
diff --git a/include/inno/phy-inno-hdmi.h b/include/inno/phy-inno-hdmi.h
new file mode 100644
index 0000000000..a73712c921
--- /dev/null
+++ b/include/inno/phy-inno-hdmi.h
@@ -0,0 +1,30 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+#ifndef __PHY_INNO_HDMI_H_
+#define __PHY_INNO_HDMI_H_
+
+/**
+ * struct phy_configure_opts_inno_hdmi - INNO HDMI configuration set
+ *
+ * This structure is used to represent the configuration state of a
+ * INNO HDMI phy.
+ */
+struct phy_configure_opts_inno_hdmi {
+ /**
+ * @pixel_clock:
+ *
+ * pixel clock rate in Hertz
+ *
+ */
+ unsigned int pixel_clock;
+
+ /**
+ * @bus_width:
+ *
+ * bus width to assign
+ */
+ unsigned int bus_width;
+
+};
+
+#endif /* __PHY_INNO_HDMI_H_ */

87
patch/u-boot/v2024.01/board_rk3318-box/general-add-phy-ops.patch
View File

@@ -1,87 +0,0 @@
diff --git a/include/generic-phy.h b/include/generic-phy.h
index eaab749166..d4dac4975c 100644
--- a/include/generic-phy.h
+++ b/include/generic-phy.h
@@ -185,6 +185,10 @@ struct phy_ops {
* Return: 0 if OK, or a negative error code
*/
int (*set_speed)(struct phy *phy, int speed);
+
+ unsigned long (*set_pll)(struct phy *phy, unsigned long rate);
+ int (*set_bus_width)(struct phy *phy, u32 bus_width);
+ long (*round_rate)(struct phy *phy, unsigned long rate);
};
/**
@@ -429,6 +433,12 @@ int generic_setup_phy(struct udevice *dev, struct phy *phy, int index);
*/
int generic_shutdown_phy(struct phy *phy);
+unsigned long generic_phy_set_pll(struct phy *phy, unsigned long rate);
+
+int generic_phy_set_bus_width(struct phy *phy, u32 bus_width);
+
+long generic_phy_round_rate(struct phy *phy, unsigned long rate);
+
#else /* CONFIG_PHY */
static inline int generic_phy_init(struct phy *phy)
diff --git a/drivers/phy/phy-uclass.c b/drivers/phy/phy-uclass.c
index 0dcfe258bc..e824ff7b9e 100644
--- a/drivers/phy/phy-uclass.c
+++ b/drivers/phy/phy-uclass.c
@@ -225,6 +225,54 @@ int generic_phy_get_by_name(struct udevice *dev, const char *phy_name,
return generic_phy_get_by_index(dev, index, phy);
}
+unsigned long generic_phy_set_pll(struct phy *phy, unsigned long rate)
+{
+ struct phy_ops const *ops;
+ int ret;
+
+ if (!generic_phy_valid(phy))
+ return 0;
+ ops = phy_dev_ops(phy->dev);
+ if (!ops->set_pll)
+ return 0;
+ ret = ops->set_pll(phy, rate);
+ if (ret)
+ dev_err(phy->dev, "PHY: Failed to set_pll %s: %d.\n",
+ phy->dev->name, ret);
+
+ return ret;
+}
+
+int generic_phy_set_bus_width(struct phy *phy, u32 bus_width)
+{
+ struct phy_ops const *ops;
+ int ret;
+
+ if (!generic_phy_valid(phy))
+ return 0;
+ ops = phy_dev_ops(phy->dev);
+ if (!ops->set_bus_width)
+ return 0;
+ ret = ops->set_bus_width(phy, bus_width);
+ if (ret)
+ dev_err(phy->dev, "PHY: Failed to set_bus_width %s: %d.\n",
+ phy->dev->name, ret);
+
+ return ret;
+}
+
+long generic_phy_round_rate(struct phy *phy, unsigned long rate)
+{
+ struct phy_ops const *ops;
+
+ if (!generic_phy_valid(phy))
+ return 0;
+ ops = phy_dev_ops(phy->dev);
+ if (!ops->round_rate)
+ return 0;
+ return ops->round_rate(phy, rate);
+}
+
int generic_phy_init(struct phy *phy)
{
struct phy_counts *counts;

25
patch/u-boot/v2024.01/board_rk3318-box/rk3328-hdmi-driver.patch
View File

@@ -25,10 +25,10 @@ index 2a23a1a447f..ad954240afa 100644
obj-mipi-$(CONFIG_ROCKCHIP_RK3288) += rk3288_mipi.o obj-mipi-$(CONFIG_ROCKCHIP_RK3288) += rk3288_mipi.o
diff --git a/drivers/video/rockchip/rk3328_hdmi.c b/drivers/video/rockchip/rk3328_hdmi.c diff --git a/drivers/video/rockchip/rk3328_hdmi.c b/drivers/video/rockchip/rk3328_hdmi.c
new file mode 100644 new file mode 100644
index 0000000000..8643800f72 index 0000000000..6f562d0ed8
--- /dev/null --- /dev/null
+++ b/drivers/video/rockchip/rk3328_hdmi.c +++ b/drivers/video/rockchip/rk3328_hdmi.c
@@ -0,0 +1,161 @@ @@ -0,0 +1,158 @@
+// SPDX-License-Identifier: GPL-2.0+ +// SPDX-License-Identifier: GPL-2.0+
+/* +/*
+ * Copyright (c) 2023 Edgeble AI Technologies Pvt. Ltd. + * Copyright (c) 2023 Edgeble AI Technologies Pvt. Ltd.
@@ -41,6 +41,7 @@ index 0000000000..8643800f72
+#include <dw_hdmi.h> +#include <dw_hdmi.h>
+#include <asm/io.h> +#include <asm/io.h>
+#include <asm/arch-rockchip/grf_rk3328.h> +#include <asm/arch-rockchip/grf_rk3328.h>
+#include <inno/phy-inno-hdmi.h>
+#include "rk_hdmi.h" +#include "rk_hdmi.h"
+ +
+#define RK3328_IO_3V_DOMAIN (7 << (9 + 16)) +#define RK3328_IO_3V_DOMAIN (7 << (9 + 16))
@@ -59,26 +60,22 @@ index 0000000000..8643800f72
+static int rk3328_dw_hdmi_phy_cfg(struct dw_hdmi *hdmi, uint pixclock) +static int rk3328_dw_hdmi_phy_cfg(struct dw_hdmi *hdmi, uint pixclock)
+{ +{
+ struct rk_hdmi_priv *priv = container_of(hdmi, struct rk_hdmi_priv, hdmi); + struct rk_hdmi_priv *priv = container_of(hdmi, struct rk_hdmi_priv, hdmi);
+ unsigned long rate; + struct phy_configure_opts_inno_hdmi params;
+ int ret; + int ret;
+ +
+ rate = generic_phy_round_rate(&priv->phy, pixclock); + params.pixel_clock = pixclock;
+ if (rate < 0) { + params.bus_width = 8;
+ printf("failed phy round rate (rate=%ld)\n", rate);
+ return ret;
+ }
+ +
+ generic_phy_set_bus_width(&priv->phy, 8); + ret = generic_phy_configure(&priv->phy, &params);
+ + if (ret < 0) {
+ ret = generic_phy_set_pll(&priv->phy, rate); + printf("failed to configure phy (pixel_clock=%d, bus_width=%d)\n",
+ if (ret) { + params.pixel_clock, params.bus_width);
+ printf("failed set phy pll (ret=%d)\n", ret);
+ return ret; + return ret;
+ } + }
+ +
+ ret = generic_phy_power_on(&priv->phy); + ret = generic_phy_power_on(&priv->phy);
+ if (ret) { + if (ret) {
+ printf("failed to on hdmi phy (ret=%d)\n", ret); + printf("failed to power on hdmi phy (ret=%d)\n", ret);
+ return ret; + return ret;
+ } + }
+ +

2
patch/u-boot/v2024.01/board_rk3318-box/rk3328-vop-driver.patch
View File

@@ -167,7 +167,7 @@ index d4a7540a92c..bd6702dedc7 100644
}; };
+ +
+&vop { +&vop {
+ u-boot,dm-pre-reloc; + bootph-all;
+}; +};
From ac6442b276b1aef478e1b701e3f4754d98ca61ab Mon Sep 17 00:00:00 2001 From ac6442b276b1aef478e1b701e3f4754d98ca61ab Mon Sep 17 00:00:00 2001
From: Jagan Teki <jagan@amarulasolutions.com> From: Jagan Teki <jagan@amarulasolutions.com>