mekotronics: u-boot: join rockchip-rk3588's default u-boot-radxa-rk35xx scheme

- rebased 2 patches
- moved null patches for dts & defconfigs to `dt` / `defconfig` dirs
- rename defconfigs since we're at it; use board-specific only
- defconfigs re-saved
This commit is contained in:
Ricardo Pardini
2024-07-07 23:07:36 +02:00
committed by Igor
parent c84703d3b4
commit 37279605ac
19 changed files with 658 additions and 791 deletions

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board_mekotronics-r58x-pro

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board_mekotronics-r58x-pro

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board_mekotronics-r58x-pro

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From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Ricardo Pardini <ricardo@pardini.net>
Date: Fri, 30 Jun 2023 17:30:37 +0200
Subject: use serial# as base for MAC address; find serial# first, then
ethaddr; add a lot of debugging
---
arch/arm/mach-rockchip/board.c | 72 +++++++++-
1 file changed, 67 insertions(+), 5 deletions(-)
diff --git a/arch/arm/mach-rockchip/board.c b/arch/arm/mach-rockchip/board.c
index 111111111111..222222222222 100644
--- a/arch/arm/mach-rockchip/board.c
+++ b/arch/arm/mach-rockchip/board.c
@@ -113,15 +113,55 @@ static int rockchip_set_ethaddr(void)
char buf[ARP_HLEN_ASCII + 1], mac[16];
u8 ethaddr[ARP_HLEN * MAX_ETHERNET] = {0};
int i, ret = -EINVAL;
+ u8 serial_checksum[ARP_HLEN] = {0};
+
+ printf("%s: starting ethernet MAC set\n", __func__);
+
+ char *serial;
+ serial = env_get("serial#");
+ if (serial) {
+ printf("%s: serial# for eth base is %s\n", __func__, serial);
+ // checksum the serial# and obtain 6 bytes from it (ARP_HLEN)
+ // Initialize checksum bytes to zero
+ for (int i = 0; i < 6; i++) {
+ serial_checksum[i] = 0;
+ }
+ // Iterate over each character in the serial array
+ for (int i = 0; serial[i] != '\0'; i++) {
+ printf("%s: checksumming serial digit %d\n", __func__, i);
+ int index = i % 6; // Calculate the appropriate index in the checksum array
+ serial_checksum[index] ^= serial[i]; // Perform XOR operation
+ }
+ serial_checksum[0] &= 0xfe; /* clear multicast bit */
+ serial_checksum[0] |= 0x02; /* set local assignment bit (IEEE802) */
+ } else {
+ printf("%s: serial# for eth base not available\n", __func__);
+ }
+
#ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
+ printf("%s: going for vendor_storage_read\n", __func__);
ret = vendor_storage_read(LAN_MAC_ID, ethaddr, sizeof(ethaddr));
+ printf("%s: vendor_storage_read returned %d\n", __func__, ret);
+
#endif
for (i = 0; i < MAX_ETHERNET; i++) {
+ printf("%s: looping... %d and ret %d\n", __func__, i, ret);
if (ret <= 0 || !is_valid_ethaddr(&ethaddr[i * ARP_HLEN])) {
if (!randomed) {
- net_random_ethaddr(&ethaddr[i * ARP_HLEN]);
+ if (serial) {
+ // copy the checksum bytes into the ethaddr array
+ printf("%s: using SERIAL as base for MAC\n", __func__);
+ memcpy(&ethaddr[i * ARP_HLEN], serial_checksum, ARP_HLEN);
+ printf("%s: used SERIAL as base for MAC\n", __func__);
+ } else {
+ printf("%s: generating RANDOM MAC\n", __func__);
+ net_random_ethaddr(&ethaddr[i * ARP_HLEN]);
+ }
randomed = true;
+ printf
+ ("%s: looping... generated SERIAL or RANDOMED... %d and ret %d\n",
+ __func__, i, ret);
} else {
if (i > 0) {
memcpy(&ethaddr[i * ARP_HLEN],
@@ -132,6 +172,7 @@ static int rockchip_set_ethaddr(void)
}
}
+ printf("%s: setting need_write true\n", __func__);
need_write = true;
}
@@ -141,14 +182,18 @@ static int rockchip_set_ethaddr(void)
memcpy(mac, "ethaddr", sizeof("ethaddr"));
else
sprintf(mac, "eth%daddr", i);
+ printf("%s: setting in env\n", __func__);
env_set(mac, buf);
}
}
#ifdef CONFIG_ROCKCHIP_VENDOR_PARTITION
if (need_write) {
+ printf("%s: gonna do vendor_storage_write\n", __func__);
ret = vendor_storage_write(LAN_MAC_ID,
ethaddr, sizeof(ethaddr));
+ printf("%s: did vendor_storage_write returned %d\n", __func__,
+ ret);
if (ret < 0)
printf("%s: vendor_storage_write failed %d\n",
__func__, ret);
@@ -166,6 +211,7 @@ static int rockchip_set_serialno(void)
char serialno_str[VENDOR_SN_MAX];
int ret = 0, i;
u64 serialno;
+ printf("%s: starting serial number code\n", __func__);
/* Read serial number from vendor storage part */
memset(serialno_str, 0, VENDOR_SN_MAX);
@@ -175,6 +221,7 @@ static int rockchip_set_serialno(void)
ret = vendor_storage_read(SN_ID, serialno_str, (VENDOR_SN_MAX-1));
if (ret > 0) {
+ printf("%s: got serial from vendor_storage_read\n", __func__);
j = strlen(serialno_str);
for (i = 0; i < j; i++) {
if ((serialno_str[i] >= 'a' && serialno_str[i] <= 'z') ||
@@ -192,11 +239,16 @@ static int rockchip_set_serialno(void)
if (i > 0) {
serialno_str[i + 1] = 0x0;
env_set("serial#", serialno_str);
+ printf("%s: set in the env from vendor_storage_read\n",
+ __func__);
}
}
#endif
if (!env_get("serial#")) {
+ printf("%s: serial NOT in the env\n", __func__);
+
#if defined(CONFIG_ROCKCHIP_EFUSE) || defined(CONFIG_ROCKCHIP_OTP)
+ printf("%s: serial gonna try in OTP\n", __func__);
struct udevice *dev;
/* retrieve the device */
@@ -210,10 +262,13 @@ static int rockchip_set_serialno(void)
&dev);
if (ret) {
- printf("%s: could not find efuse/otp device\n", __func__);
+ printf("%s: could not find efuse/otp device\n",
+ __func__);
return ret;
}
+ printf("%s: serial gonna try read fuses\n", __func__);
+
/* read the cpu_id range from the efuses */
ret = misc_read(dev, CFG_CPUID_OFFSET, &cpuid, sizeof(cpuid));
if (ret) {
@@ -221,12 +276,18 @@ static int rockchip_set_serialno(void)
__func__, ret);
return ret;
}
+ printf("%s: serial read fuse looks like worked\n", __func__);
+
#else
+ printf("%s: serial generate RANDOM\n", __func__);
/* generate random cpuid */
for (i = 0; i < CPUID_LEN; i++)
cpuid[i] = (u8)(rand());
#endif
/* Generate the serial number based on CPU ID */
+ printf
+ ("%s: serial Generate the serial number based on CPU ID\n",
+ __func__);
for (i = 0; i < 8; i++) {
low[i] = cpuid[1 + (i << 1)];
high[i] = cpuid[i << 1];
@@ -237,6 +298,7 @@ static int rockchip_set_serialno(void)
snprintf(serialno_str, sizeof(serialno_str), "%llx", serialno);
env_set("serial#", serialno_str);
+ printf("%s: stored serial num in env\n", __func__);
}
return ret;
@@ -454,11 +516,11 @@ static void scan_run_cmd(void)
int board_late_init(void)
{
-#ifdef CONFIG_ROCKCHIP_SET_ETHADDR
- rockchip_set_ethaddr();
-#endif
#ifdef CONFIG_ROCKCHIP_SET_SN
rockchip_set_serialno();
+#endif
+#ifdef CONFIG_ROCKCHIP_SET_ETHADDR
+ rockchip_set_ethaddr();
#endif
setup_download_mode();
scan_run_cmd();
--
Armbian

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@@ -0,0 +1,50 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Ricardo Pardini <ricardo@pardini.net>
Date: Sun, 18 Feb 2024 14:33:37 +0100
Subject: boot_rkimg: don't try rockchip_u2phy_vbus_detect when RECOVERY button
pressed
- boot_rkimg: add debugs for download button not working
---
arch/arm/mach-rockchip/boot_rkimg.c | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-rockchip/boot_rkimg.c b/arch/arm/mach-rockchip/boot_rkimg.c
index 111111111111..222222222222 100644
--- a/arch/arm/mach-rockchip/boot_rkimg.c
+++ b/arch/arm/mach-rockchip/boot_rkimg.c
@@ -331,6 +331,9 @@ void setup_download_mode(void)
boot_devtype_init();
+ printf("setup_download_mode checking if download %skey pressed...\n",
+ is_hotkey(HK_ROCKUSB_DNL) ? "is HOT YES" : "is NOT HOT");
+
if (rockchip_dnl_key_pressed() || is_hotkey(HK_ROCKUSB_DNL)) {
printf("download %skey pressed... ",
is_hotkey(HK_ROCKUSB_DNL) ? "hot" : "");
@@ -341,10 +344,10 @@ void setup_download_mode(void)
}
#ifdef CONFIG_CMD_ROCKUSB
- vbus = rockchip_u2phy_vbus_detect();
+ // vbus = rockchip_u2phy_vbus_detect(); // rpardini: don't do this, it fails with -19
#endif
if (vbus > 0) {
- printf("%sentering download mode...\n",
+ printf("%sentering download mode vbus > 0...\n",
IS_ENABLED(CONFIG_CMD_ROCKUSB) ?
"" : "no rockusb, ");
@@ -354,7 +357,7 @@ void setup_download_mode(void)
if ((fdt_node_offset_by_compatible(blob, -1, "radxa,rockpie")) >= 0) {
run_command("download", 0);
}
- printf("entering recovery mode!\n");
+ printf("entering recovery mode vbus not > 0!\n");
env_set("reboot_mode", "recovery-key");
}
} else if (is_hotkey(HK_FASTBOOT)) {
--
Armbian

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CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x80000
CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.sh"
CONFIG_ROCKCHIP_RK3588=y
CONFIG_ROCKCHIP_FIT_IMAGE=y
CONFIG_ROCKCHIP_HWID_DTB=y
CONFIG_ROCKCHIP_VENDOR_PARTITION=y
CONFIG_USING_KERNEL_DTB_V2=y
CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
CONFIG_ROCKCHIP_NEW_IDB=y
CONFIG_PSTORE=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_TARGET_EVB_RK3588=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="rk3588-evb"
CONFIG_DEBUG_UART=y
CONFIG_LOCALVERSION="-armbian"
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_FIT=y
CONFIG_FIT_IMAGE_POST_PROCESS=y
CONFIG_FIT_HW_CRYPTO=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
CONFIG_SPL_FIT_HW_CRYPTO=y
# CONFIG_SPL_SYS_DCACHE_OFF is not set
CONFIG_BOOTDELAY=1
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_ANDROID_BOOTLOADER=y
CONFIG_ANDROID_AVB=y
CONFIG_ANDROID_BOOT_IMAGE_HASH=y
CONFIG_SPL_BOARD_INIT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x1
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_ATF=y
CONFIG_SPL_AB=y
CONFIG_FASTBOOT_BUF_ADDR=0xc00800
CONFIG_FASTBOOT_BUF_SIZE=0x07000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_DTIMG=y
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_LZMADEC is not set
# CONFIG_CMD_UNZIP is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPT=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_BOOT_ANDROID=y
CONFIG_CMD_MMC=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TFTP_BOOTM=y
CONFIG_CMD_TFTP_FLASH=y
# CONFIG_CMD_MISC is not set
CONFIG_CMD_MTD_BLK=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_ISO_PARTITION is not set
CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
CONFIG_SPL_OF_CONTROL=y
CONFIG_SPL_DTB_MINIMUM=y
CONFIG_OF_LIVE=y
CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_OF_U_BOOT_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
# CONFIG_NET_TFTP_VARS is not set
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
# CONFIG_SARADC_ROCKCHIP is not set
CONFIG_SARADC_ROCKCHIP_V2=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_CLK_SCMI=y
CONFIG_SPL_CLK_SCMI=y
CONFIG_DM_CRYPTO=y
CONFIG_SPL_DM_CRYPTO=y
CONFIG_ROCKCHIP_CRYPTO_V2=y
CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y
CONFIG_DM_RNG=y
CONFIG_RNG_ROCKCHIP=y
CONFIG_SCMI_FIRMWARE=y
CONFIG_SPL_SCMI_FIRMWARE=y
CONFIG_GPIO_HOG=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_ROCKCHIP_GPIO_V2=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_I2C_MUX=y
CONFIG_DM_KEY=y
CONFIG_RK8XX_PWRKEY=y
CONFIG_ADC_KEY=y
CONFIG_MISC=y
CONFIG_SPL_MISC=y
CONFIG_MISC_DECOMPRESS=y
CONFIG_SPL_MISC_DECOMPRESS=y
CONFIG_ROCKCHIP_OTP=y
CONFIG_ROCKCHIP_HW_DECOMPRESS=y
CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS=y
CONFIG_SPL_ROCKCHIP_SECURE_OTP=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
CONFIG_MTD=y
CONFIG_MTD_BLK=y
CONFIG_MTD_DEVICE=y
CONFIG_NAND=y
CONFIG_MTD_SPI_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_SPEED=80000000
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SST=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SPI_FLASH_XMC=y
CONFIG_SPI_FLASH_XTX=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_DM_ETH=y
CONFIG_DM_ETH_PHY=y
CONFIG_DWC_ETH_QOS=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX=y
CONFIG_PHY_ROCKCHIP_USBDP=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_DM_FUEL_GAUGE=y
CONFIG_POWER_FG_CW201X=y
CONFIG_POWER_FG_CW221X=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_SPI_RK8XX=y
CONFIG_DM_POWER_DELIVERY=y
CONFIG_TYPEC_TCPM=y
CONFIG_TYPEC_TCPCI=y
CONFIG_TYPEC_HUSB311=y
CONFIG_TYPEC_FUSB302=y
CONFIG_REGULATOR_PWM=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_REGULATOR_RK860X=y
CONFIG_CHARGER_BQ25700=y
CONFIG_CHARGER_BQ25890=y
CONFIG_CHARGER_SC8551=y
CONFIG_CHARGER_SGM41542=y
CONFIG_DM_CHARGE_DISPLAY=y
CONFIG_CHARGE_ANIMATION=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_RAM=y
CONFIG_SPL_RAM=y
CONFIG_TPL_RAM=y
CONFIG_DM_RAMDISK=y
CONFIG_RAMDISK_RO=y
CONFIG_DM_RESET=y
CONFIG_SPL_DM_RESET=y
CONFIG_SPL_RESET_ROCKCHIP=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_BASE=0xFEB50000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_ROCKCHIP_SPI=y
CONFIG_ROCKCHIP_SFC=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
CONFIG_USB_GADGET_VENDOR_NUM=0x2207
CONFIG_USB_GADGET_PRODUCT_NUM=0x350a
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_DM_VIDEO=y
CONFIG_DISPLAY=y
CONFIG_DRM_ROCKCHIP=y
CONFIG_DRM_MAXIM_MAX96745=y
CONFIG_DRM_MAXIM_MAX96755F=y
CONFIG_DRM_ROHM_BU18XL82=y
CONFIG_DRM_ROCKCHIP_DW_HDMI_QP=y
CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI2=y
CONFIG_DRM_ROCKCHIP_DW_DP=y
CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
CONFIG_DRM_ROCKCHIP_SAMSUNG_MIPI_DCPHY=y
CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX_HDMI=y
CONFIG_USE_TINY_PRINTF=y
CONFIG_LIB_RAND=y
CONFIG_SPL_TINY_MEMSET=y
CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_RSA_N_SIZE=0x200
CONFIG_RSA_E_SIZE=0x10
CONFIG_RSA_C_SIZE=0x20
CONFIG_XBC=y
CONFIG_LZ4=y
CONFIG_LZMA=y
# CONFIG_EFI_LOADER is not set
CONFIG_AVB_LIBAVB=y
CONFIG_AVB_LIBAVB_AB=y
CONFIG_AVB_LIBAVB_ATX=y
CONFIG_AVB_LIBAVB_USER=y
CONFIG_RK_AVB_LIBAVB_USER=y

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@@ -0,0 +1,240 @@
CONFIG_ARM=y
CONFIG_ARCH_ROCKCHIP=y
CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x80000
CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.sh"
CONFIG_ROCKCHIP_RK3588=y
CONFIG_ROCKCHIP_FIT_IMAGE=y
CONFIG_ROCKCHIP_HWID_DTB=y
CONFIG_ROCKCHIP_VENDOR_PARTITION=y
CONFIG_USING_KERNEL_DTB_V2=y
CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y
CONFIG_ROCKCHIP_NEW_IDB=y
CONFIG_PSTORE=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
CONFIG_TARGET_EVB_RK3588=y
CONFIG_SPL_LIBDISK_SUPPORT=y
CONFIG_SPL_SPI_FLASH_SUPPORT=y
CONFIG_SPL_SPI_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="rk3588-blueberry-edge-v12"
CONFIG_DEBUG_UART=y
CONFIG_LOCALVERSION="-armbian"
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_FIT=y
CONFIG_FIT_IMAGE_POST_PROCESS=y
CONFIG_FIT_HW_CRYPTO=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
CONFIG_SPL_FIT_HW_CRYPTO=y
# CONFIG_SPL_SYS_DCACHE_OFF is not set
CONFIG_BOOTDELAY=1
CONFIG_SYS_CONSOLE_INFO_QUIET=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_ANDROID_BOOTLOADER=y
CONFIG_ANDROID_AVB=y
CONFIG_ANDROID_BOOT_IMAGE_HASH=y
CONFIG_SPL_BOARD_INIT=y
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
CONFIG_SPL_SEPARATE_BSS=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x1
CONFIG_SPL_MTD_SUPPORT=y
CONFIG_SPL_ATF=y
CONFIG_SPL_AB=y
CONFIG_FASTBOOT_BUF_ADDR=0xc00800
CONFIG_FASTBOOT_BUF_SIZE=0x07000000
CONFIG_FASTBOOT_FLASH=y
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_DTIMG=y
# CONFIG_CMD_ELF is not set
# CONFIG_CMD_IMI is not set
# CONFIG_CMD_IMLS is not set
# CONFIG_CMD_XIMG is not set
# CONFIG_CMD_LZMADEC is not set
# CONFIG_CMD_UNZIP is not set
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_FPGA is not set
CONFIG_CMD_GPT=y
# CONFIG_CMD_LOADB is not set
# CONFIG_CMD_LOADS is not set
CONFIG_CMD_BOOT_ANDROID=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
CONFIG_CMD_SF=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
# CONFIG_CMD_ITEST is not set
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_TFTP_BOOTM=y
CONFIG_CMD_TFTP_FLASH=y
# CONFIG_CMD_MISC is not set
CONFIG_CMD_MTD_BLK=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_ISO_PARTITION is not set
CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
CONFIG_SPL_OF_CONTROL=y
CONFIG_SPL_DTB_MINIMUM=y
CONFIG_OF_LIVE=y
CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
CONFIG_OF_U_BOOT_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
# CONFIG_NET_TFTP_VARS is not set
CONFIG_REGMAP=y
CONFIG_SPL_REGMAP=y
CONFIG_SYSCON=y
CONFIG_SPL_SYSCON=y
# CONFIG_SARADC_ROCKCHIP is not set
CONFIG_SARADC_ROCKCHIP_V2=y
CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_CLK_SCMI=y
CONFIG_SPL_CLK_SCMI=y
CONFIG_DM_CRYPTO=y
CONFIG_SPL_DM_CRYPTO=y
CONFIG_ROCKCHIP_CRYPTO_V2=y
CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y
CONFIG_DM_RNG=y
CONFIG_RNG_ROCKCHIP=y
CONFIG_SCMI_FIRMWARE=y
CONFIG_SPL_SCMI_FIRMWARE=y
CONFIG_GPIO_HOG=y
CONFIG_ROCKCHIP_GPIO=y
CONFIG_ROCKCHIP_GPIO_V2=y
CONFIG_SYS_I2C_ROCKCHIP=y
CONFIG_I2C_MUX=y
CONFIG_DM_KEY=y
CONFIG_RK8XX_PWRKEY=y
CONFIG_ADC_KEY=y
CONFIG_MISC=y
CONFIG_SPL_MISC=y
CONFIG_MISC_DECOMPRESS=y
CONFIG_SPL_MISC_DECOMPRESS=y
CONFIG_ROCKCHIP_OTP=y
CONFIG_ROCKCHIP_HW_DECOMPRESS=y
CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS=y
CONFIG_SPL_ROCKCHIP_SECURE_OTP=y
CONFIG_MMC_DW=y
CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_SDMA=y
CONFIG_MMC_SDHCI_ROCKCHIP=y
CONFIG_MTD=y
CONFIG_MTD_BLK=y
CONFIG_MTD_DEVICE=y
CONFIG_NAND=y
CONFIG_MTD_SPI_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_SPEED=80000000
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SST=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_SPI_FLASH_XMC=y
CONFIG_SPI_FLASH_XTX=y
CONFIG_SPI_FLASH_MTD=y
CONFIG_DM_ETH=y
CONFIG_DM_ETH_PHY=y
CONFIG_DWC_ETH_QOS=y
CONFIG_RGMII=y
CONFIG_GMAC_ROCKCHIP=y
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_DM_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_DW_ROCKCHIP=y
CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
CONFIG_PHY_ROCKCHIP_NANENG_USB2=y
CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX=y
CONFIG_PHY_ROCKCHIP_SNPS_PCIE3=y
CONFIG_PHY_ROCKCHIP_TYPEC=y
CONFIG_PINCTRL=y
CONFIG_SPL_PINCTRL=y
CONFIG_DM_FUEL_GAUGE=y
CONFIG_POWER_FG_CW201X=y
CONFIG_POWER_FG_CW221X=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_SPI_RK8XX=y
CONFIG_DM_POWER_DELIVERY=y
CONFIG_TYPEC_TCPM=y
CONFIG_TYPEC_TCPCI=y
CONFIG_TYPEC_HUSB311=y
CONFIG_TYPEC_FUSB302=y
CONFIG_REGULATOR_PWM=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_REGULATOR_RK860X=y
CONFIG_CHARGER_BQ25700=y
CONFIG_CHARGER_BQ25890=y
CONFIG_CHARGER_SC8551=y
CONFIG_CHARGER_SGM41542=y
CONFIG_DM_CHARGE_DISPLAY=y
CONFIG_CHARGE_ANIMATION=y
CONFIG_PWM_ROCKCHIP=y
CONFIG_RAM=y
CONFIG_SPL_RAM=y
CONFIG_TPL_RAM=y
CONFIG_DM_RAMDISK=y
CONFIG_RAMDISK_RO=y
CONFIG_DM_RESET=y
CONFIG_SPL_DM_RESET=y
CONFIG_SPL_RESET_ROCKCHIP=y
CONFIG_BAUDRATE=1500000
CONFIG_DEBUG_UART_BASE=0xFEB50000
CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_ROCKCHIP_SPI=y
CONFIG_ROCKCHIP_SFC=y
CONFIG_SYSRESET=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_XHCI_PCI=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_GENERIC=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_GENERIC=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_GADGET=y
CONFIG_USB_DWC3_GENERIC=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_MANUFACTURER="Rockchip"
CONFIG_USB_GADGET_VENDOR_NUM=0x2207
CONFIG_USB_GADGET_PRODUCT_NUM=0x350a
CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_DM_VIDEO=y
CONFIG_DISPLAY=y
CONFIG_DRM_ROCKCHIP=y
CONFIG_DRM_MAXIM_MAX96745=y
CONFIG_DRM_MAXIM_MAX96755F=y
CONFIG_DRM_ROHM_BU18XL82=y
CONFIG_DRM_ROCKCHIP_DW_HDMI_QP=y
CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI2=y
CONFIG_DRM_ROCKCHIP_DW_DP=y
CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y
CONFIG_DRM_ROCKCHIP_SAMSUNG_MIPI_DCPHY=y
CONFIG_PHY_ROCKCHIP_SAMSUNG_HDPTX_HDMI=y
CONFIG_USE_TINY_PRINTF=y
CONFIG_LIB_RAND=y
CONFIG_SPL_TINY_MEMSET=y
CONFIG_RSA=y
CONFIG_SPL_RSA=y
CONFIG_RSA_N_SIZE=0x200
CONFIG_RSA_E_SIZE=0x10
CONFIG_RSA_C_SIZE=0x20
CONFIG_XBC=y
CONFIG_LZ4=y
CONFIG_LZMA=y
# CONFIG_EFI_LOADER is not set
CONFIG_AVB_LIBAVB=y
CONFIG_AVB_LIBAVB_AB=y
CONFIG_AVB_LIBAVB_ATX=y
CONFIG_AVB_LIBAVB_USER=y
CONFIG_RK_AVB_LIBAVB_USER=y

View File

@@ -0,0 +1,159 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2021 Rockchip Electronics Co., Ltd
*
*/
/dts-v1/;
#include "rk3588.dtsi"
#include "rk3588-u-boot.dtsi"
#include <dt-bindings/input/input.h>
/ {
model = "Mekotronics R58X-4G (RK3588 EDGE LP4x V1.2 BlueBerry Board)";
compatible = "rockchip,rk3588-blueberry-edge-v12-linux", "rockchip,rk3588";
// This is needed for the RECOVERY button to actually trigger LOADER mode when pressed during boot
adc-keys {
compatible = "adc-keys";
io-channels = <&saradc 1>;
io-channel-names = "buttons";
keyup-threshold-microvolt = <1800000>;
u-boot,dm-pre-reloc;
status = "okay";
volumeup-key {
u-boot,dm-pre-reloc;
linux,code = <KEY_VOLUMEUP>;
label = "volume up";
press-threshold-microvolt = <1750>;
};
};
vcc12v_dcin: vcc12v-dcin {
u-boot,dm-pre-reloc;
compatible = "regulator-fixed";
regulator-name = "vcc12v_dcin";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
};
vcc5v0_sys: vcc5v0-sys {
u-boot,dm-pre-reloc;
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc12v_dcin>;
};
vcc5v0_host: vcc5v0-host-regulator {
u-boot,dm-pre-reloc;
compatible = "regulator-fixed";
regulator-name = "vcc5v0_host";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_host_en>;
vin-supply = <&vcc5v0_sys>;
};
vcc3v3_pcie30: vcc3v3-pcie30 {
u-boot,dm-pre-reloc;
compatible = "regulator-fixed";
regulator-name = "vcc3v3_pcie30";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; //hugsun gpio1_c4
regulator-boot-on;
regulator-always-on;
startup-delay-us = <10000>;
pinctrl-names = "default";
pinctrl-0 = <&vcc3v3_pcie30_en>;
vin-supply = <&vcc12v_dcin>;
};
/* work led is actually blue "PWR" LED and the powerbutton backlight LED */
led_work: led_work {
u-boot,dm-pre-reloc;
compatible = "regulator-fixed";
regulator-name = "led_work";
enable-active-high;
gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>; // Turn on work led
regulator-boot-on;
regulator-always-on;
vin-supply = <&vcc5v0_sys>;
};
};
&pcie3x4 {
u-boot,dm-pre-reloc;
vpcie3v3-supply = <&vcc3v3_pcie30>;
reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&pcie30phy {
u-boot,dm-pre-reloc;
status = "okay";
};
&combphy0_ps {
u-boot,dm-pre-reloc;
status = "okay";
};
&combphy1_ps {
u-boot,dm-pre-reloc;
status = "okay";
};
&combphy2_psu {
u-boot,dm-pre-reloc;
status = "okay";
};
/* related to usbhost_dwc3_0 */
&usbhost3_0 {
u-boot,dm-pre-reloc;
status = "okay";
maximum-speed = "super-speed";
};
/* related to usbhost3_0 */
&usbhost_dwc3_0 {
u-boot,dm-pre-reloc;
dr_mode = "host";
status = "okay";
maximum-speed = "super-speed";
};
&pinctrl {
usb {
u-boot,dm-pre-reloc;
vcc5v0_host_en: vcc5v0-host-en {
u-boot,dm-pre-reloc;
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pcie {
u-boot,dm-spl;
vcc3v3_pcie30_en: vcc3v3-pcie30-en {
u-boot,dm-spl;
rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};

View File

@@ -2,6 +2,7 @@ From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Piotr Szczepanik <piter75@gmail.com>
Date: Mon, 6 Dec 2021 22:36:12 +0100
Subject: Add SoC based image name (rk3566) to rk35xx u-boot
---
tools/rkcommon.c | 1 +
1 file changed, 1 insertion(+)