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patch: kernel: allwinner: add patches for 6.4 kernel

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This commit is contained in:
Gunjan Gupta
2023-06-30 01:27:04 +05:30
committed by Igor
parent 173ed85da3
commit 35dddeab31
651 changed files with 552125 additions and 0 deletions
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1551
patch/kernel/archive/sunxi-6.4/patches.armbian/Add-dump_reg-and-sunxi-sysinfo-drivers.patch Normal file
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File diff suppressed because it is too large Load Diff

611
patch/kernel/archive/sunxi-6.4/patches.armbian/Add-sunxi-addr-driver-Used-to-fix-uwe5622-bluetooth-MAC-address.patch Normal file
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@@ -0,0 +1,611 @@
From 04b13d9bc720de2ed1a18202cbc80078769fd11d Mon Sep 17 00:00:00 2001
From: afaulkner420 <afaulkner420@gmail.com>
Date: Fri, 25 Mar 2022 20:18:18 +0000
Subject: [PATCH] Add sunxi-addr driver - Used to fix uwe5622 bluetooth MAC
addresses
---
drivers/misc/Kconfig | 1 +
drivers/misc/Makefile | 1 +
drivers/misc/sunxi-addr/Kconfig | 6 +
drivers/misc/sunxi-addr/Makefile | 5 +
drivers/misc/sunxi-addr/sha256.c | 178 +++++++++++++
drivers/misc/sunxi-addr/sunxi-addr.c | 357 +++++++++++++++++++++++++++
6 files changed, 548 insertions(+)
create mode 100644 drivers/misc/sunxi-addr/Kconfig
create mode 100644 drivers/misc/sunxi-addr/Makefile
create mode 100644 drivers/misc/sunxi-addr/sha256.c
create mode 100644 drivers/misc/sunxi-addr/sunxi-addr.c
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 45b005f50..2bbf4483d 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -569,4 +569,5 @@ source "drivers/misc/cardreader/Kconfig"
source "drivers/misc/uacce/Kconfig"
source "drivers/misc/pvpanic/Kconfig"
source "drivers/misc/mchp_pci1xxxx/Kconfig"
+source "drivers/misc/sunxi-addr/Kconfig"
endmenu
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index d342afc4d..695fb7af8 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -67,3 +67,4 @@ obj-$(CONFIG_VCPU_STALL_DETECTOR) += vcpu_stall_detector.o
obj-$(CONFIG_TMR_MANAGER) += xilinx_tmr_manager.o
obj-$(CONFIG_TMR_INJECT) += xilinx_tmr_inject.o
obj-$(CONFIG_MODEM_POWER) += modem-power.o
+obj-$(CONFIG_SUNXI_ADDR_MGT) += sunxi-addr/
diff --git a/drivers/misc/sunxi-addr/Kconfig b/drivers/misc/sunxi-addr/Kconfig
new file mode 100644
index 000000000..801dd2c02
--- /dev/null
+++ b/drivers/misc/sunxi-addr/Kconfig
@@ -0,0 +1,6 @@
+config SUNXI_ADDR_MGT
+ tristate "Allwinner Network MAC Addess Manager"
+ depends on BT || ETHERNET || WLAN
+ depends on NVMEM_SUNXI_SID
+ help
+ allwinner network mac address management
diff --git a/drivers/misc/sunxi-addr/Makefile b/drivers/misc/sunxi-addr/Makefile
new file mode 100644
index 000000000..f01fd4783
--- /dev/null
+++ b/drivers/misc/sunxi-addr/Makefile
@@ -0,0 +1,5 @@
+#
+# Makefile for wifi mac addr manager drivers
+#
+sunxi_addr-objs := sunxi-addr.o sha256.o
+obj-$(CONFIG_SUNXI_ADDR_MGT) += sunxi_addr.o
diff --git a/drivers/misc/sunxi-addr/sha256.c b/drivers/misc/sunxi-addr/sha256.c
new file mode 100644
index 000000000..78825810c
--- /dev/null
+++ b/drivers/misc/sunxi-addr/sha256.c
@@ -0,0 +1,178 @@
+/*
+ * Local implement of sha256.
+ *
+ * Copyright (C) 2013 Allwinner.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+#include <linux/kernel.h>
+#include <linux/string.h>
+
+/****************************** MACROS ******************************/
+#define ROTRIGHT(a, b) (((a) >> (b)) | ((a) << (32 - (b))))
+#define CH(x, y, z) (((x) & (y)) ^ (~(x) & (z)))
+#define MAJ(x, y, z) (((x) & (y)) ^ ((x) & (z)) ^ ((y) & (z)))
+#define EP0(x) (ROTRIGHT(x, 2) ^ ROTRIGHT(x, 13) ^ ROTRIGHT(x, 22))
+#define EP1(x) (ROTRIGHT(x, 6) ^ ROTRIGHT(x, 11) ^ ROTRIGHT(x, 25))
+#define SIG0(x) (ROTRIGHT(x, 7) ^ ROTRIGHT(x, 18) ^ ((x) >> 3))
+#define SIG1(x) (ROTRIGHT(x, 17) ^ ROTRIGHT(x, 19) ^ ((x) >> 10))
+
+/**************************** VARIABLES *****************************/
+static const uint32_t k[64] = {
+ 0x428a2f98, 0x71374491, 0xb5c0fbcf, 0xe9b5dba5,
+ 0x3956c25b, 0x59f111f1, 0x923f82a4, 0xab1c5ed5,
+ 0xd807aa98, 0x12835b01, 0x243185be, 0x550c7dc3,
+ 0x72be5d74, 0x80deb1fe, 0x9bdc06a7, 0xc19bf174,
+ 0xe49b69c1, 0xefbe4786, 0x0fc19dc6, 0x240ca1cc,
+ 0x2de92c6f, 0x4a7484aa, 0x5cb0a9dc, 0x76f988da,
+ 0x983e5152, 0xa831c66d, 0xb00327c8, 0xbf597fc7,
+ 0xc6e00bf3, 0xd5a79147, 0x06ca6351, 0x14292967,
+ 0x27b70a85, 0x2e1b2138, 0x4d2c6dfc, 0x53380d13,
+ 0x650a7354, 0x766a0abb, 0x81c2c92e, 0x92722c85,
+ 0xa2bfe8a1, 0xa81a664b, 0xc24b8b70, 0xc76c51a3,
+ 0xd192e819, 0xd6990624, 0xf40e3585, 0x106aa070,
+ 0x19a4c116, 0x1e376c08, 0x2748774c, 0x34b0bcb5,
+ 0x391c0cb3, 0x4ed8aa4a, 0x5b9cca4f, 0x682e6ff3,
+ 0x748f82ee, 0x78a5636f, 0x84c87814, 0x8cc70208,
+ 0x90befffa, 0xa4506ceb, 0xbef9a3f7, 0xc67178f2
+};
+
+struct sha256_ctx {
+ uint8_t data[64]; /* current 512-bit chunk of message data, just like a buffer */
+ uint32_t datalen; /* sign the data length of current chunk */
+ uint64_t bitlen; /* the bit length of the total message */
+ uint32_t state[8]; /* store the middle state of hash abstract */
+};
+
+/*********************** FUNCTION DEFINITIONS ***********************/
+static void sha256_transform(struct sha256_ctx *ctx, const uint8_t *data)
+{
+ uint32_t a, b, c, d, e, f, g, h, i, j, t1, t2, m[64];
+
+ /* initialization */
+ for (i = 0, j = 0; i < 16; ++i, j += 4)
+ m[i] = (data[j] << 24) | (data[j + 1] << 16) |
+ (data[j + 2] << 8) | (data[j + 3]);
+ for ( ; i < 64; ++i)
+ m[i] = SIG1(m[i - 2]) + m[i - 7] + SIG0(m[i - 15]) + m[i - 16];
+
+ a = ctx->state[0];
+ b = ctx->state[1];
+ c = ctx->state[2];
+ d = ctx->state[3];
+ e = ctx->state[4];
+ f = ctx->state[5];
+ g = ctx->state[6];
+ h = ctx->state[7];
+
+ for (i = 0; i < 64; ++i) {
+ t1 = h + EP1(e) + CH(e, f, g) + k[i] + m[i];
+ t2 = EP0(a) + MAJ(a, b, c);
+ h = g;
+ g = f;
+ f = e;
+ e = d + t1;
+ d = c;
+ c = b;
+ b = a;
+ a = t1 + t2;
+ }
+
+ ctx->state[0] += a;
+ ctx->state[1] += b;
+ ctx->state[2] += c;
+ ctx->state[3] += d;
+ ctx->state[4] += e;
+ ctx->state[5] += f;
+ ctx->state[6] += g;
+ ctx->state[7] += h;
+}
+
+static void sha256_init(struct sha256_ctx *ctx)
+{
+ ctx->datalen = 0;
+ ctx->bitlen = 0;
+ ctx->state[0] = 0x6a09e667;
+ ctx->state[1] = 0xbb67ae85;
+ ctx->state[2] = 0x3c6ef372;
+ ctx->state[3] = 0xa54ff53a;
+ ctx->state[4] = 0x510e527f;
+ ctx->state[5] = 0x9b05688c;
+ ctx->state[6] = 0x1f83d9ab;
+ ctx->state[7] = 0x5be0cd19;
+}
+
+static void sha256_update(struct sha256_ctx *ctx, const uint8_t *data, size_t len)
+{
+ uint32_t i;
+
+ for (i = 0; i < len; ++i) {
+ ctx->data[ctx->datalen] = data[i];
+ ctx->datalen++;
+ if (ctx->datalen == 64) {
+ /* 64 byte = 512 bit means the buffer ctx->data has
+ * fully stored one chunk of message,
+ * so do the sha256 hash map for the current chunk.
+ */
+ sha256_transform(ctx, ctx->data);
+ ctx->bitlen += 512;
+ ctx->datalen = 0;
+ }
+ }
+}
+
+static void sha256_final(struct sha256_ctx *ctx, uint8_t *hash)
+{
+ uint32_t i;
+
+ i = ctx->datalen;
+
+ /* Pad whatever data is left in the buffer. */
+ if (ctx->datalen < 56) {
+ ctx->data[i++] = 0x80; /* pad 10000000 = 0x80 */
+ while (i < 56)
+ ctx->data[i++] = 0x00;
+ } else {
+ ctx->data[i++] = 0x80;
+ while (i < 64)
+ ctx->data[i++] = 0x00;
+ sha256_transform(ctx, ctx->data);
+ memset(ctx->data, 0, 56);
+ }
+
+ /* Append to the padding the total message's length in bits and transform. */
+ ctx->bitlen += ctx->datalen * 8;
+ ctx->data[63] = ctx->bitlen;
+ ctx->data[62] = ctx->bitlen >> 8;
+ ctx->data[61] = ctx->bitlen >> 16;
+ ctx->data[60] = ctx->bitlen >> 24;
+ ctx->data[59] = ctx->bitlen >> 32;
+ ctx->data[58] = ctx->bitlen >> 40;
+ ctx->data[57] = ctx->bitlen >> 48;
+ ctx->data[56] = ctx->bitlen >> 56;
+ sha256_transform(ctx, ctx->data);
+
+ /* copying the final state to the output hash(use big endian). */
+ for (i = 0; i < 4; ++i) {
+ hash[i] = (ctx->state[0] >> (24 - i * 8)) & 0x000000ff;
+ hash[i + 4] = (ctx->state[1] >> (24 - i * 8)) & 0x000000ff;
+ hash[i + 8] = (ctx->state[2] >> (24 - i * 8)) & 0x000000ff;
+ hash[i + 12] = (ctx->state[3] >> (24 - i * 8)) & 0x000000ff;
+ hash[i + 16] = (ctx->state[4] >> (24 - i * 8)) & 0x000000ff;
+ hash[i + 20] = (ctx->state[5] >> (24 - i * 8)) & 0x000000ff;
+ hash[i + 24] = (ctx->state[6] >> (24 - i * 8)) & 0x000000ff;
+ hash[i + 28] = (ctx->state[7] >> (24 - i * 8)) & 0x000000ff;
+ }
+}
+
+int hmac_sha256(const uint8_t *plaintext, ssize_t psize, uint8_t *output)
+{
+ struct sha256_ctx ctx;
+
+ sha256_init(&ctx);
+ sha256_update(&ctx, plaintext, psize);
+ sha256_final(&ctx, output);
+ return 0;
+}
diff --git a/drivers/misc/sunxi-addr/sunxi-addr.c b/drivers/misc/sunxi-addr/sunxi-addr.c
new file mode 100644
index 000000000..a812e4e82
--- /dev/null
+++ b/drivers/misc/sunxi-addr/sunxi-addr.c
@@ -0,0 +1,357 @@
+/*
+ * The driver of SUNXI NET MAC ADDR Manager.
+ *
+ * Copyright (C) 2013 Allwinner.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+#define DEBUG
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/miscdevice.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+
+#define ADDR_MGT_DBG(fmt, arg...) printk(KERN_DEBUG "[ADDR_MGT] %s: " fmt "\n",\
+ __func__, ## arg)
+#define ADDR_MGT_ERR(fmt, arg...) printk(KERN_ERR "[ADDR_MGT] %s: " fmt "\n",\
+ __func__, ## arg)
+
+#define MODULE_CUR_VERSION "v1.0.9"
+
+#define MATCH_STR_LEN 20
+#define ADDR_VAL_LEN 6
+#define ADDR_STR_LEN 18
+#define ID_LEN 16
+#define HASH_LEN 32
+
+#define TYPE_ANY 0
+#define TYPE_BURN 1
+#define TYPE_IDGEN 2
+#define TYPE_USER 3
+#define TYPE_RAND 4
+
+#define ADDR_FMT_STR 0
+#define ADDR_FMT_VAL 1
+
+#define IS_TYPE_INVALID(x) ((x < TYPE_ANY) || (x > TYPE_RAND))
+
+#define ADDR_CLASS_ATTR_ADD(name) \
+static ssize_t addr_##name##_show(const struct class *class, \
+ const struct class_attribute *attr, char *buffer) \
+{ \
+ char addr[ADDR_STR_LEN]; \
+ if (IS_TYPE_INVALID(get_addr_by_name(ADDR_FMT_STR, addr, #name))) \
+ return 0; \
+ return sprintf(buffer, "%.17s\n", addr); \
+} \
+static ssize_t addr_##name##_store(const struct class *class, \
+ const struct class_attribute *attr, \
+ const char *buffer, size_t count) \
+{ \
+ if (count != ADDR_STR_LEN) { \
+ ADDR_MGT_ERR("Length wrong."); \
+ return -EINVAL; \
+ } \
+ set_addr_by_name(TYPE_USER, ADDR_FMT_STR, buffer, #name); \
+ return count; \
+} \
+static CLASS_ATTR_RW(addr_##name);
+
+struct addr_mgt_info {
+ unsigned int type_def;
+ unsigned int type_cur;
+ unsigned int flag;
+ char *addr;
+ char *name;
+};
+
+static struct addr_mgt_info info[] = {
+ {TYPE_ANY, TYPE_ANY, 1, NULL, "wifi"},
+ {TYPE_ANY, TYPE_ANY, 0, NULL, "bt" },
+ {TYPE_ANY, TYPE_ANY, 1, NULL, "eth" },
+};
+
+extern int hmac_sha256(const uint8_t *plaintext, ssize_t psize, uint8_t *output);
+extern int sunxi_get_soc_chipid(unsigned char *chipid);
+
+static int addr_parse(int fmt, const char *addr, int check)
+{
+ char val_buf[ADDR_VAL_LEN];
+ char cmp_buf[ADDR_VAL_LEN];
+ int ret = ADDR_VAL_LEN;
+
+ if (fmt == ADDR_FMT_STR)
+ ret = sscanf(addr, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
+ &val_buf[0], &val_buf[1], &val_buf[2],
+ &val_buf[3], &val_buf[4], &val_buf[5]);
+ else
+ memcpy(val_buf, addr, ADDR_VAL_LEN);
+
+ if (ret != ADDR_VAL_LEN)
+ return -1;
+
+ if (check && (val_buf[0] & 0x3))
+ return -1;
+
+ memset(cmp_buf, 0x00, ADDR_VAL_LEN);
+ if (memcmp(val_buf, cmp_buf, ADDR_VAL_LEN) == 0)
+ return -1;
+
+ memset(cmp_buf, 0xFF, ADDR_VAL_LEN);
+ if (memcmp(val_buf, cmp_buf, ADDR_VAL_LEN) == 0)
+ return -1;
+
+ return 0;
+}
+
+static struct addr_mgt_info *addr_find_by_name(char *name)
+{
+ int i = 0;
+ for (i = 0; i < ARRAY_SIZE(info); i++) {
+ if (strcmp(info[i].name, name) == 0)
+ return &info[i];
+ }
+ return NULL;
+}
+
+static int get_addr_by_name(int fmt, char *addr, char *name)
+{
+ struct addr_mgt_info *t;
+
+ t = addr_find_by_name(name);
+ if (t == NULL) {
+ ADDR_MGT_ERR("can't find addr named: %s", name);
+ return -1;
+ }
+
+ if (IS_TYPE_INVALID(t->type_cur)) {
+ ADDR_MGT_ERR("addr type invalid");
+ return -1;
+ }
+
+ if (addr_parse(ADDR_FMT_VAL, t->addr, t->flag)) {
+ ADDR_MGT_ERR("addr parse fail(%s)", t->addr);
+ return -1;
+ }
+
+ if (fmt == ADDR_FMT_STR)
+ sprintf(addr, "%02X:%02X:%02X:%02X:%02X:%02X",
+ t->addr[0], t->addr[1], t->addr[2],
+ t->addr[3], t->addr[4], t->addr[5]);
+ else
+ memcpy(addr, t->addr, ADDR_VAL_LEN);
+
+ return t->type_cur;
+}
+
+static int set_addr_by_name(int type, int fmt, const char *addr, char *name)
+{
+ struct addr_mgt_info *t;
+
+ t = addr_find_by_name(name);
+ if (t == NULL) {
+ ADDR_MGT_ERR("can't find addr named: %s", name);
+ return -1;
+ }
+
+ if (addr_parse(fmt, addr, t->flag)) {
+ ADDR_MGT_ERR("addr parse fail(%s)", addr);
+ return -1;
+ }
+
+ t->type_cur = type;
+ if (fmt == ADDR_FMT_STR)
+ sscanf(addr, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
+ &t->addr[0], &t->addr[1], &t->addr[2],
+ &t->addr[3], &t->addr[4], &t->addr[5]);
+ else
+ memcpy(t->addr, addr, ADDR_VAL_LEN);
+
+ return 0;
+}
+
+int get_custom_mac_address(int fmt, char *name, char *addr)
+{
+ return get_addr_by_name(fmt, addr, name);
+}
+EXPORT_SYMBOL_GPL(get_custom_mac_address);
+
+static int addr_factory(struct device_node *np,
+ int idx, int type, char *mac, char *name)
+{
+ int ret, i;
+ char match[MATCH_STR_LEN];
+ const char *p;
+ char id[ID_LEN], hash[HASH_LEN], cmp_buf[ID_LEN];
+ struct timespec64 curtime;
+
+ switch (type) {
+ case TYPE_BURN:
+ sprintf(match, "addr_%s", name);
+ ret = of_property_read_string_index(np, match, 0, &p);
+ if (ret)
+ return -1;
+
+ ret = sscanf(p, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
+ &mac[0], &mac[1], &mac[2],
+ &mac[3], &mac[4], &mac[5]);
+
+ if (ret != ADDR_VAL_LEN)
+ return -1;
+ break;
+ case TYPE_IDGEN:
+ if (idx > HASH_LEN / ADDR_VAL_LEN - 1)
+ return -1;
+ if (sunxi_get_soc_chipid(id))
+ return -1;
+ memset(cmp_buf, 0x00, ID_LEN);
+ if (memcmp(id, cmp_buf, ID_LEN) == 0)
+ return -1;
+ if (hmac_sha256(id, ID_LEN, hash))
+ return -1;
+ memcpy(mac, &hash[idx * ADDR_VAL_LEN], ADDR_VAL_LEN);
+ break;
+ case TYPE_RAND:
+ for (i = 0; i < ADDR_VAL_LEN; i++) {
+ ktime_get_real_ts64(&curtime);
+ mac[i] = (char)curtime.tv_nsec;
+ }
+ break;
+ default:
+ ADDR_MGT_ERR("unsupport type: %d", type);
+ return -1;
+ }
+ return 0;
+}
+
+static int addr_init(struct platform_device *pdev)
+{
+ struct device_node *np = pdev->dev.of_node;
+ int type, i, j;
+ char match[MATCH_STR_LEN];
+ char addr[ADDR_VAL_LEN];
+ int type_tab[] = {TYPE_BURN, TYPE_IDGEN, TYPE_RAND};
+
+ /* init addr type and value */
+ for (i = 0; i < ARRAY_SIZE(info); i++) {
+ sprintf(match, "type_addr_%s", info[i].name);
+ if (of_property_read_u32(np, match, &type)) {
+ ADDR_MGT_DBG("Failed to get type_def_%s, use default: %d",
+ info[i].name, info[i].type_def);
+ } else {
+ info[i].type_def = type;
+ info[i].type_cur = type;
+ }
+
+ if (IS_TYPE_INVALID(info[i].type_def))
+ return -1;
+ if (info[i].type_def != TYPE_ANY) {
+ if (addr_factory(np, i, info[i].type_def, addr, info[i].name))
+ return -1;
+ } else {
+ for (j = 0; j < ARRAY_SIZE(type_tab); j++) {
+ if (!addr_factory(np, i, type_tab[j], addr, info[i].name)) {
+ info[i].type_cur = type_tab[j];
+ break;
+ }
+ }
+ }
+
+ if (info[i].flag)
+ addr[0] &= 0xFC;
+
+ if (addr_parse(ADDR_FMT_VAL, addr, info[i].flag))
+ return -1;
+ else {
+ info[i].addr = devm_kzalloc(&pdev->dev, ADDR_VAL_LEN, GFP_KERNEL);
+ memcpy(info[i].addr, addr, ADDR_VAL_LEN);
+ }
+ }
+ return 0;
+}
+
+static ssize_t summary_show(const struct class *class,
+ const struct class_attribute *attr, char *buffer)
+{
+ int i = 0, ret = 0;
+
+ ret += sprintf(&buffer[ret], "name cfg cur address\n");
+ for (i = 0; i < ARRAY_SIZE(info); i++) {
+ ret += sprintf(&buffer[ret],
+ "%4s %d %d %02X:%02X:%02X:%02X:%02X:%02X\n",
+ info[i].name, info[i].type_def, info[i].type_cur,
+ info[i].addr[0], info[i].addr[1], info[i].addr[2],
+ info[i].addr[3], info[i].addr[4], info[i].addr[5]);
+ }
+ return ret;
+}
+static CLASS_ATTR_RO(summary);
+
+ADDR_CLASS_ATTR_ADD(wifi);
+ADDR_CLASS_ATTR_ADD(bt);
+ADDR_CLASS_ATTR_ADD(eth);
+
+static struct attribute *addr_class_attrs[] = {
+ &class_attr_summary.attr,
+ &class_attr_addr_wifi.attr,
+ &class_attr_addr_bt.attr,
+ &class_attr_addr_eth.attr,
+ NULL
+};
+ATTRIBUTE_GROUPS(addr_class);
+
+static struct class addr_class = {
+ .name = "addr_mgt",
+ .class_groups = addr_class_groups,
+};
+
+static const struct of_device_id addr_mgt_ids[] = {
+ { .compatible = "allwinner,sunxi-addr_mgt" },
+ { /* Sentinel */ }
+};
+
+static int addr_mgt_probe(struct platform_device *pdev)
+{
+ int status;
+
+ ADDR_MGT_DBG("module version: %s", MODULE_CUR_VERSION);
+ status = class_register(&addr_class);
+ if (status < 0) {
+ ADDR_MGT_ERR("class register error, status: %d.", status);
+ return -1;
+ }
+
+ if (addr_init(pdev)) {
+ ADDR_MGT_ERR("failed to init addr.");
+ class_unregister(&addr_class);
+ return -1;
+ }
+ ADDR_MGT_DBG("success.");
+ return 0;
+}
+
+static int addr_mgt_remove(struct platform_device *pdev)
+{
+ class_unregister(&addr_class);
+ return 0;
+}
+
+static struct platform_driver addr_mgt_driver = {
+ .probe = addr_mgt_probe,
+ .remove = addr_mgt_remove,
+ .driver = {
+ .owner = THIS_MODULE,
+ .name = "sunxi-addr-mgt",
+ .of_match_table = addr_mgt_ids,
+ },
+};
+
+module_platform_driver_probe(addr_mgt_driver, addr_mgt_probe);
+
+MODULE_AUTHOR("Allwinnertech");
+MODULE_DESCRIPTION("Network MAC Addess Manager");
+MODULE_LICENSE("GPL");
--
2.34.1

72
patch/kernel/archive/sunxi-6.4/patches.armbian/Bananapro-add-AXP209-regulators.patch Normal file
View File

@@ -0,0 +1,72 @@
From 6587b78573f0d6ad63586ae964c0882acb3c391f Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Tue, 12 Apr 2022 21:14:36 +0300
Subject: [PATCH 069/153] Bananapro add AXP209 regulators
Author: Heiko Jehmlich <hje@jecons.de>
Signed-off-by: Heiko Jehmlich <hje@jecons.de>
---
arch/arm/boot/dts/sun7i-a20-bananapro.dts | 50 +++++++++++++++++++++++
1 file changed, 50 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20-bananapro.dts b/arch/arm/boot/dts/sun7i-a20-bananapro.dts
index 3a34fb39a..d5bc59060 100644
--- a/arch/arm/boot/dts/sun7i-a20-bananapro.dts
+++ b/arch/arm/boot/dts/sun7i-a20-bananapro.dts
@@ -257,3 +257,53 @@ &usbphy {
&reg_ahci_5v {
status = "okay";
};
+
+#include "axp209.dtsi"
+
+&ac_power_supply {
+ status = "okay";
+};
+
+&battery_power_supply {
+ status = "okay";
+};
+
+&reg_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1450000>;
+ regulator-name = "vdd-cpu";
+};
+
+&reg_dcdc3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-name = "vdd-int-dll";
+};
+
+&reg_ldo1 {
+ regulator-name = "vdd-rtc";
+};
+
+&reg_ldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-name = "avcc";
+};
+
+&reg_ldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-name = "vddio-csi0";
+ regulator-ramp-delay = <1600>;
+};
+
+&reg_ldo4 {
+ regulator-always-on; /* required for SATA */
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-name = "vddio-csi1";
+};
--
2.35.3

24
patch/kernel/archive/sunxi-6.4/patches.armbian/Compile-the-pwm-overlay.patch Normal file
View File

@@ -0,0 +1,24 @@
From 2c31f82c392f07ebf32916c54dee6bffdcb3b3d7 Mon Sep 17 00:00:00 2001
From: afaulkner420 <afaulkner420@gmail.com>
Date: Fri, 25 Mar 2022 19:26:16 +0000
Subject: [PATCH 116/153] Compile the pwm overlay
---
arch/arm64/boot/dts/allwinner/overlay/Makefile | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/allwinner/overlay/Makefile b/arch/arm64/boot/dts/allwinner/overlay/Makefile
index 87f5addec..7cabe8f42 100644
--- a/arch/arm64/boot/dts/allwinner/overlay/Makefile
+++ b/arch/arm64/boot/dts/allwinner/overlay/Makefile
@@ -38,6 +38,7 @@ dtbo-$(CONFIG_ARCH_SUNXI) += \
sun50i-h6-i2c0.dtbo \
sun50i-h6-i2c1.dtbo \
sun50i-h6-i2c2.dtbo \
+ sun50i-h6-pwm.dtbo \
sun50i-h6-ruart.dtbo \
sun50i-h6-spi-add-cs1.dtbo \
sun50i-h6-spi-jedec-nor.dtbo \
--
2.35.3

64
patch/kernel/archive/sunxi-6.4/patches.armbian/Doc-dt-bindings-usb-add-binding-for-DWC3-controller-on-Allwinne.patch Normal file
View File

@@ -0,0 +1,64 @@
From 7b6f3bd96b2507e209847d06ece1ecdb21f9abf7 Mon Sep 17 00:00:00 2001
From: Icenowy Zheng <icenowy@aosc.io>
Date: Mon, 25 Dec 2017 12:08:01 +0800
Subject: [PATCH 003/153] Doc:dt-bindings:usb: add binding for DWC3 controller
on Allwinner SoC
The Allwinner H6 SoC uses DWC3 controller for USB3.
Add its device tree binding document.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
.../bindings/usb/allwinner,dwc3.txt | 39 +++++++++++++++++++
1 file changed, 39 insertions(+)
create mode 100644 Documentation/devicetree/bindings/usb/allwinner,dwc3.txt
diff --git a/Documentation/devicetree/bindings/usb/allwinner,dwc3.txt b/Documentation/devicetree/bindings/usb/allwinner,dwc3.txt
new file mode 100644
index 000000000..3f7714636
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/allwinner,dwc3.txt
@@ -0,0 +1,39 @@
+Allwinner SuperSpeed DWC3 USB SoC controller
+
+Required properties:
+- compatible: should contain "allwinner,sun50i-h6-dwc3" for H6 SoC
+- clocks: A list of phandle + clock-specifier pairs for the
+ clocks listed in clock-names
+- clock-names: Should contain the following:
+ "bus" The bus clock of the DWC3 part
+- resets: A list of phandle + reset-specifier pairs for the
+ resets listed in reset-names
+- reset-names: Should contain the following:
+ "bus" The bus reset of the DWC3 part
+
+Required child node:
+A child node must exist to represent the core DWC3 IP block. The name of
+the node is not important. The content of the node is defined in dwc3.txt.
+
+Phy documentation is provided in the following places:
+Documentation/devicetree/bindings/phy/sun50i-usb3-phy.txt
+
+Example device nodes:
+ usb3: usb@5200000 {
+ compatible = "allwinner,sun50i-h6-dwc3";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ clocks = <&ccu CLK_BUS_XHCI>;
+ clock-names = "bus";
+ resets = <&ccu RST_BUS_XHCI>;
+ reset-names = "bus";
+
+ dwc3: dwc3 {
+ compatible = "snps,dwc3";
+ reg = <0x5200000 0x10000>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ phys = <&usb3phy>;
+ phy-names = "usb3-phy";
+ };
+ };
--
2.35.3

68
patch/kernel/archive/sunxi-6.4/patches.armbian/Fix-compile-error-node-not-found.patch Normal file
View File

@@ -0,0 +1,68 @@
From 8655074e6ee44514de32f3721d8c6479ae6c2991 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Thu, 3 Feb 2022 21:22:16 +0300
Subject: [PATCH 135/153] Fix compile error node not found
Error: arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts:47.1-4 Label or path de not found
Error: arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts:70.1-6 Label or path hdmi not found
Error: arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts:75.1-10 Label or path hdmi_out not found
FATAL ERROR: Syntax error parsing input tree
make[2]: *** [scripts/Makefile.lib:365: arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dtb] Error 1
---
.../dts/allwinner/sun50i-h616-x96-mate.dts | 26 -------------------
1 file changed, 26 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts
index f4a8241db..31c8bf0e1 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts
@@ -23,17 +23,6 @@ chosen {
stdout-path = "serial0:115200n8";
};
- connector {
- compatible = "hdmi-connector";
- type = "a";
-
- port {
- hdmi_con_in: endpoint {
- remote-endpoint = <&hdmi_out_con>;
- };
- };
- };
-
reg_vcc5v: vcc5v {
/* board wide 5V supply directly from the DC input */
compatible = "regulator-fixed";
@@ -44,10 +33,6 @@ reg_vcc5v: vcc5v {
};
};
-&de {
- status = "okay";
-};
-
&ehci0 {
status = "okay";
};
@@ -67,17 +52,6 @@ &emac1 {
status = "okay";
};
-&hdmi {
- hvcc-supply = <&reg_bldo1>;
- status = "okay";
-};
-
-&hdmi_out {
- hdmi_out_con: endpoint {
- remote-endpoint = <&hdmi_con_in>;
- };
-};
-
&ir {
status = "okay";
};
--
2.35.3

26
patch/kernel/archive/sunxi-6.4/patches.armbian/Fix-include-uapi-spi-spidev-module.patch Normal file
View File

@@ -0,0 +1,26 @@
From 99c48fe621d0154952cbf76ede528ef93c1fa1d9 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Thu, 28 Apr 2022 15:45:14 +0300
Subject: [PATCH 140/153] Fix include uapi spi spidev module
---
drivers/spi/spidev.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/spi/spidev.c b/drivers/spi/spidev.c
index 0f85ef9b9..7a6109908 100644
--- a/drivers/spi/spidev.c
+++ b/drivers/spi/spidev.c
@@ -21,8 +21,7 @@
#include <linux/slab.h>
#include <linux/compat.h>
-#include <linux/spi/spi.h>
-#include <linux/spi/spidev.h>
+#include <uapi/linux/spi/spidev.h>
#include <linux/uaccess.h>
--
2.35.3

37
patch/kernel/archive/sunxi-6.4/patches.armbian/HACK-media-uapi-hevc-tiles-and-num_slices.patch Normal file
View File

@@ -0,0 +1,37 @@
From a0336ec2aa6ea38d4b2c9a2100b67fd6d09005cd Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sat, 23 May 2020 15:07:15 +0000
Subject: [PATCH 038/170] HACK: media: uapi: hevc: tiles and num_slices
---
include/media/hevc-ctrls.h | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/include/media/hevc-ctrls.h b/include/media/hevc-ctrls.h
index a536dab3f..c8618dc68 100644
--- a/include/media/hevc-ctrls.h
+++ b/include/media/hevc-ctrls.h
@@ -83,7 +83,8 @@ struct v4l2_ctrl_hevc_sps {
__u8 chroma_format_idc;
__u8 sps_max_sub_layers_minus1;
- __u8 padding[6];
+ __u8 num_slices;
+ __u8 padding[5];
__u64 flags;
};
@@ -208,7 +209,9 @@ struct v4l2_ctrl_hevc_slice_params {
__u16 short_term_ref_pic_set_size;
__u16 long_term_ref_pic_set_size;
- __u8 padding[4];
+ __u32 num_entry_point_offsets;
+ __u32 entry_point_offset_minus1[256];
+ __u8 padding[8];
/* ISO/IEC 23008-2, ITU-T Rec. H.265: Weighted prediction parameter */
struct v4l2_hevc_pred_weight_table pred_weight_table;
--
2.35.3

27
patch/kernel/archive/sunxi-6.4/patches.armbian/Makefile-CONFIG_SHELL-fix-for-builddeb-packaging.patch Normal file
View File

@@ -0,0 +1,27 @@
From ff17e34683a9e98f80365fe5995ebfdc3d6aac0b Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Wed, 2 Feb 2022 11:28:14 +0300
Subject: [PATCH 108/153] Makefile: CONFIG_SHELL fix for builddeb packaging
---
Makefile | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/Makefile b/Makefile
index f26824f36..9d16e7725 100644
--- a/Makefile
+++ b/Makefile
@@ -440,7 +440,9 @@ KCONFIG_CONFIG ?= .config
export KCONFIG_CONFIG
# SHELL used by kbuild
-CONFIG_SHELL := sh
+CONFIG_SHELL := $(shell if [ -x "$$BASH" ]; then echo $$BASH; \
+ else if [ -x /bin/bash ]; then echo /bin/bash; \
+ else echo sh; fi ; fi)
HOST_LFS_CFLAGS := $(shell getconf LFS_CFLAGS 2>/dev/null)
HOST_LFS_LDFLAGS := $(shell getconf LFS_LDFLAGS 2>/dev/null)
--
2.35.3

70
patch/kernel/archive/sunxi-6.4/patches.armbian/Move-sun50i-h6-pwm-settings-to-its-own-overlay.patch Normal file
View File

@@ -0,0 +1,70 @@
From eaf1fe09892c1ba3e6d8dae8cf06c8c3ddacd06a Mon Sep 17 00:00:00 2001
From: afaulkner420 <afaulkner420@gmail.com>
Date: Fri, 25 Mar 2022 19:23:56 +0000
Subject: [PATCH 115/153] Move sun50i-h6-pwm settings to its own overlay
---
.../allwinner/overlay/sun50i-h6-fixup.scr-cmd | 14 -----------
.../dts/allwinner/overlay/sun50i-h6-pwm.dts | 25 +++++++++++++++++++
2 files changed, 25 insertions(+), 14 deletions(-)
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-pwm.dts
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-fixup.scr-cmd b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-fixup.scr-cmd
index d8e79ba45..f757db7aa 100644
--- a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-fixup.scr-cmd
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-fixup.scr-cmd
@@ -54,20 +54,6 @@ if test "${param_pps_falling_edge}" = "1"; then
fdt set /pps@0 assert-falling-edge
fi
-for f in ${overlays}; do
- if test "${f}" = "pwm"; then
- setenv bootargs_new ""
- for arg in ${bootargs}; do
- if test "${arg}" = "console=ttyS0,115200"; then
- echo "Warning: Disabling ttyS0 console due to enabled PWM overlay"
- else
- setenv bootargs_new "${bootargs_new} ${arg}"
- fi
- done
- setenv bootargs "${bootargs_new}"
- fi
-done
-
if test -n "${param_w1_pin}"; then
setenv tmp_bank "${param_w1_pin}"
setenv tmp_pin "${param_w1_pin}"
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-pwm.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-pwm.dts
new file mode 100644
index 000000000..a8aa74ed1
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-pwm.dts
@@ -0,0 +1,25 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h6-pwm";
+
+ fragment@0 {
+ target = <&pio>;
+ __overlay__ {
+ pwm_pin: pwm-pin {
+ pins = "PD22";
+ function = "pwm";
+ };
+ };
+ };
+
+ fragment@1 {
+ target = <&pwm>;
+ __overlay__ {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm_pin>;
+ status = "okay";
+ };
+ };
+};
--
2.35.3

287
patch/kernel/archive/sunxi-6.4/patches.armbian/Revert-net-Remove-net-ipx.h-and-uapi-linux-ipx.h-header-files.patch Normal file
View File

@@ -0,0 +1,287 @@
From c236bce6061008d751231fbb0c4cb1af949a48ca Mon Sep 17 00:00:00 2001
From: Igor Pecovnik <igor.pecovnik@gmail.com>
Date: Sat, 6 Nov 2021 19:15:23 +0100
Subject: [PATCH 002/153] Revert "net: Remove net/ipx.h and uapi/linux/ipx.h
header files"
This reverts commit 6c9b40844751ea30c72f7a2f92f4d704bc6b2927.
---
include/net/ipx.h | 171 +++++++++++++++++++++++++++++++++++++++
include/uapi/linux/ipx.h | 87 ++++++++++++++++++++
2 files changed, 258 insertions(+)
create mode 100644 include/net/ipx.h
create mode 100644 include/uapi/linux/ipx.h
diff --git a/include/net/ipx.h b/include/net/ipx.h
new file mode 100644
index 000000000..9d1342807
--- /dev/null
+++ b/include/net/ipx.h
@@ -0,0 +1,171 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _NET_INET_IPX_H_
+#define _NET_INET_IPX_H_
+/*
+ * The following information is in its entirety obtained from:
+ *
+ * Novell 'IPX Router Specification' Version 1.10
+ * Part No. 107-000029-001
+ *
+ * Which is available from ftp.novell.com
+ */
+
+#include <linux/netdevice.h>
+#include <net/datalink.h>
+#include <linux/ipx.h>
+#include <linux/list.h>
+#include <linux/slab.h>
+#include <linux/refcount.h>
+
+struct ipx_address {
+ __be32 net;
+ __u8 node[IPX_NODE_LEN];
+ __be16 sock;
+};
+
+#define ipx_broadcast_node "\377\377\377\377\377\377"
+#define ipx_this_node "\0\0\0\0\0\0"
+
+#define IPX_MAX_PPROP_HOPS 8
+
+struct ipxhdr {
+ __be16 ipx_checksum __packed;
+#define IPX_NO_CHECKSUM cpu_to_be16(0xFFFF)
+ __be16 ipx_pktsize __packed;
+ __u8 ipx_tctrl;
+ __u8 ipx_type;
+#define IPX_TYPE_UNKNOWN 0x00
+#define IPX_TYPE_RIP 0x01 /* may also be 0 */
+#define IPX_TYPE_SAP 0x04 /* may also be 0 */
+#define IPX_TYPE_SPX 0x05 /* SPX protocol */
+#define IPX_TYPE_NCP 0x11 /* $lots for docs on this (SPIT) */
+#define IPX_TYPE_PPROP 0x14 /* complicated flood fill brdcast */
+ struct ipx_address ipx_dest __packed;
+ struct ipx_address ipx_source __packed;
+};
+
+/* From af_ipx.c */
+extern int sysctl_ipx_pprop_broadcasting;
+
+struct ipx_interface {
+ /* IPX address */
+ __be32 if_netnum;
+ unsigned char if_node[IPX_NODE_LEN];
+ refcount_t refcnt;
+
+ /* physical device info */
+ struct net_device *if_dev;
+ struct datalink_proto *if_dlink;
+ __be16 if_dlink_type;
+
+ /* socket support */
+ unsigned short if_sknum;
+ struct hlist_head if_sklist;
+ spinlock_t if_sklist_lock;
+
+ /* administrative overhead */
+ int if_ipx_offset;
+ unsigned char if_internal;
+ unsigned char if_primary;
+
+ struct list_head node; /* node in ipx_interfaces list */
+};
+
+struct ipx_route {
+ __be32 ir_net;
+ struct ipx_interface *ir_intrfc;
+ unsigned char ir_routed;
+ unsigned char ir_router_node[IPX_NODE_LEN];
+ struct list_head node; /* node in ipx_routes list */
+ refcount_t refcnt;
+};
+
+struct ipx_cb {
+ u8 ipx_tctrl;
+ __be32 ipx_dest_net;
+ __be32 ipx_source_net;
+ struct {
+ __be32 netnum;
+ int index;
+ } last_hop;
+};
+
+#include <net/sock.h>
+
+struct ipx_sock {
+ /* struct sock has to be the first member of ipx_sock */
+ struct sock sk;
+ struct ipx_address dest_addr;
+ struct ipx_interface *intrfc;
+ __be16 port;
+#ifdef CONFIG_IPX_INTERN
+ unsigned char node[IPX_NODE_LEN];
+#endif
+ unsigned short type;
+ /*
+ * To handle special ncp connection-handling sockets for mars_nwe,
+ * the connection number must be stored in the socket.
+ */
+ unsigned short ipx_ncp_conn;
+};
+
+static inline struct ipx_sock *ipx_sk(struct sock *sk)
+{
+ return (struct ipx_sock *)sk;
+}
+
+#define IPX_SKB_CB(__skb) ((struct ipx_cb *)&((__skb)->cb[0]))
+
+#define IPX_MIN_EPHEMERAL_SOCKET 0x4000
+#define IPX_MAX_EPHEMERAL_SOCKET 0x7fff
+
+extern struct list_head ipx_routes;
+extern rwlock_t ipx_routes_lock;
+
+extern struct list_head ipx_interfaces;
+struct ipx_interface *ipx_interfaces_head(void);
+extern spinlock_t ipx_interfaces_lock;
+
+extern struct ipx_interface *ipx_primary_net;
+
+int ipx_proc_init(void);
+void ipx_proc_exit(void);
+
+const char *ipx_frame_name(__be16);
+const char *ipx_device_name(struct ipx_interface *intrfc);
+
+static __inline__ void ipxitf_hold(struct ipx_interface *intrfc)
+{
+ refcount_inc(&intrfc->refcnt);
+}
+
+void ipxitf_down(struct ipx_interface *intrfc);
+struct ipx_interface *ipxitf_find_using_net(__be32 net);
+int ipxitf_send(struct ipx_interface *intrfc, struct sk_buff *skb, char *node);
+__be16 ipx_cksum(struct ipxhdr *packet, int length);
+int ipxrtr_add_route(__be32 network, struct ipx_interface *intrfc,
+ unsigned char *node);
+void ipxrtr_del_routes(struct ipx_interface *intrfc);
+int ipxrtr_route_packet(struct sock *sk, struct sockaddr_ipx *usipx,
+ struct msghdr *msg, size_t len, int noblock);
+int ipxrtr_route_skb(struct sk_buff *skb);
+struct ipx_route *ipxrtr_lookup(__be32 net);
+int ipxrtr_ioctl(unsigned int cmd, void __user *arg);
+
+static __inline__ void ipxitf_put(struct ipx_interface *intrfc)
+{
+ if (refcount_dec_and_test(&intrfc->refcnt))
+ ipxitf_down(intrfc);
+}
+
+static __inline__ void ipxrtr_hold(struct ipx_route *rt)
+{
+ refcount_inc(&rt->refcnt);
+}
+
+static __inline__ void ipxrtr_put(struct ipx_route *rt)
+{
+ if (refcount_dec_and_test(&rt->refcnt))
+ kfree(rt);
+}
+#endif /* _NET_INET_IPX_H_ */
diff --git a/include/uapi/linux/ipx.h b/include/uapi/linux/ipx.h
new file mode 100644
index 000000000..3168137ad
--- /dev/null
+++ b/include/uapi/linux/ipx.h
@@ -0,0 +1,87 @@
+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
+#ifndef _IPX_H_
+#define _IPX_H_
+#include <linux/libc-compat.h> /* for compatibility with glibc netipx/ipx.h */
+#include <linux/types.h>
+#include <linux/sockios.h>
+#include <linux/socket.h>
+#define IPX_NODE_LEN 6
+#define IPX_MTU 576
+
+#if __UAPI_DEF_SOCKADDR_IPX
+struct sockaddr_ipx {
+ __kernel_sa_family_t sipx_family;
+ __be16 sipx_port;
+ __be32 sipx_network;
+ unsigned char sipx_node[IPX_NODE_LEN];
+ __u8 sipx_type;
+ unsigned char sipx_zero; /* 16 byte fill */
+};
+#endif /* __UAPI_DEF_SOCKADDR_IPX */
+
+/*
+ * So we can fit the extra info for SIOCSIFADDR into the address nicely
+ */
+#define sipx_special sipx_port
+#define sipx_action sipx_zero
+#define IPX_DLTITF 0
+#define IPX_CRTITF 1
+
+#if __UAPI_DEF_IPX_ROUTE_DEFINITION
+struct ipx_route_definition {
+ __be32 ipx_network;
+ __be32 ipx_router_network;
+ unsigned char ipx_router_node[IPX_NODE_LEN];
+};
+#endif /* __UAPI_DEF_IPX_ROUTE_DEFINITION */
+
+#if __UAPI_DEF_IPX_INTERFACE_DEFINITION
+struct ipx_interface_definition {
+ __be32 ipx_network;
+ unsigned char ipx_device[16];
+ unsigned char ipx_dlink_type;
+#define IPX_FRAME_NONE 0
+#define IPX_FRAME_SNAP 1
+#define IPX_FRAME_8022 2
+#define IPX_FRAME_ETHERII 3
+#define IPX_FRAME_8023 4
+#define IPX_FRAME_TR_8022 5 /* obsolete */
+ unsigned char ipx_special;
+#define IPX_SPECIAL_NONE 0
+#define IPX_PRIMARY 1
+#define IPX_INTERNAL 2
+ unsigned char ipx_node[IPX_NODE_LEN];
+};
+#endif /* __UAPI_DEF_IPX_INTERFACE_DEFINITION */
+
+#if __UAPI_DEF_IPX_CONFIG_DATA
+struct ipx_config_data {
+ unsigned char ipxcfg_auto_select_primary;
+ unsigned char ipxcfg_auto_create_interfaces;
+};
+#endif /* __UAPI_DEF_IPX_CONFIG_DATA */
+
+/*
+ * OLD Route Definition for backward compatibility.
+ */
+
+#if __UAPI_DEF_IPX_ROUTE_DEF
+struct ipx_route_def {
+ __be32 ipx_network;
+ __be32 ipx_router_network;
+#define IPX_ROUTE_NO_ROUTER 0
+ unsigned char ipx_router_node[IPX_NODE_LEN];
+ unsigned char ipx_device[16];
+ unsigned short ipx_flags;
+#define IPX_RT_SNAP 8
+#define IPX_RT_8022 4
+#define IPX_RT_BLUEBOOK 2
+#define IPX_RT_ROUTED 1
+};
+#endif /* __UAPI_DEF_IPX_ROUTE_DEF */
+
+#define SIOCAIPXITFCRT (SIOCPROTOPRIVATE)
+#define SIOCAIPXPRISLT (SIOCPROTOPRIVATE + 1)
+#define SIOCIPXCFGDATA (SIOCPROTOPRIVATE + 2)
+#define SIOCIPXNCPCONN (SIOCPROTOPRIVATE + 3)
+#endif /* _IPX_H_ */
--
2.35.3

32
patch/kernel/archive/sunxi-6.4/patches.armbian/Rollback-r_rsb-to-r_i2c.patch Normal file
View File

@@ -0,0 +1,32 @@
From 6bdb276a08c82541b6c408b9b3cdf432ed8bb3de Mon Sep 17 00:00:00 2001
From: Ukhellfire <afaulkner420@gmail.com>
Date: Fri, 1 Apr 2022 09:44:19 +0100
Subject: [PATCH 149/153] Rollback r_rsb to r_i2c
---
arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts
index cc5a73026..0b07f8ca2 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts
@@ -208,12 +208,12 @@ &pio {
vcc-pg-supply = <&reg_vcc_wifi_io>;
};
-&r_rsb {
+&r_i2c {
status = "okay";
- axp805: pmic@745 {
+ axp805: pmic@36 {
compatible = "x-powers,axp805", "x-powers,axp806";
- reg = <0x745>;
+ reg = <0x36>;
interrupt-parent = <&r_intc>;
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
--
2.35.3

66
patch/kernel/archive/sunxi-6.4/patches.armbian/WIP-media-uapi-hevc-add-fields-needed-for-rkvdec.patch Normal file
View File

@@ -0,0 +1,66 @@
From 4ca80443bbab08aede430ab4f13e2818836f19b5 Mon Sep 17 00:00:00 2001
From: Jonas Karlman <jonas@kwiboo.se>
Date: Sat, 23 May 2020 15:03:46 +0000
Subject: [PATCH 037/170] WIP: media: uapi: hevc: add fields needed for rkvdec
NOTE: these fields are used by rkvdec hevc backend
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
include/media/hevc-ctrls.h | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/include/media/hevc-ctrls.h b/include/media/hevc-ctrls.h
index 01ccda48d..a536dab3f 100644
--- a/include/media/hevc-ctrls.h
+++ b/include/media/hevc-ctrls.h
@@ -58,6 +58,8 @@ enum v4l2_mpeg_video_hevc_start_code {
/* The controls are not stable at the moment and will likely be reworked. */
struct v4l2_ctrl_hevc_sps {
/* ISO/IEC 23008-2, ITU-T Rec. H.265: Sequence parameter set */
+ __u8 video_parameter_set_id;
+ __u8 seq_parameter_set_id;
__u16 pic_width_in_luma_samples;
__u16 pic_height_in_luma_samples;
__u8 bit_depth_luma_minus8;
@@ -81,6 +83,8 @@ struct v4l2_ctrl_hevc_sps {
__u8 chroma_format_idc;
__u8 sps_max_sub_layers_minus1;
+ __u8 padding[6];
+
__u64 flags;
};
@@ -108,6 +112,7 @@ struct v4l2_ctrl_hevc_sps {
struct v4l2_ctrl_hevc_pps {
/* ISO/IEC 23008-2, ITU-T Rec. H.265: Picture parameter set */
+ __u8 pic_parameter_set_id;
__u8 num_extra_slice_header_bits;
__u8 num_ref_idx_l0_default_active_minus1;
__u8 num_ref_idx_l1_default_active_minus1;
@@ -123,7 +128,7 @@ struct v4l2_ctrl_hevc_pps {
__s8 pps_tc_offset_div2;
__u8 log2_parallel_merge_level_minus2;
- __u8 padding[4];
+ __u8 padding;
__u64 flags;
};
@@ -200,7 +205,10 @@ struct v4l2_ctrl_hevc_slice_params {
__u8 ref_idx_l0[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
__u8 ref_idx_l1[V4L2_HEVC_DPB_ENTRIES_NUM_MAX];
- __u8 padding;
+ __u16 short_term_ref_pic_set_size;
+ __u16 long_term_ref_pic_set_size;
+
+ __u8 padding[4];
/* ISO/IEC 23008-2, ITU-T Rec. H.265: Weighted prediction parameter */
struct v4l2_hevc_pred_weight_table pred_weight_table;
--
2.35.3

610
patch/kernel/archive/sunxi-6.4/patches.armbian/add-initial-support-for-orangepi3-lts.patch Normal file
View File

@@ -0,0 +1,610 @@
From c697fff6d002b50d264dc9d1b3c2731cf991e854 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Sat, 16 Apr 2022 11:51:35 +0300
Subject: [PATCH 146/153] add initial support for orangepi3-lts
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../allwinner/sun50i-h6-orangepi-3-lts.dts | 398 ++++++++++++++++++
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 101 ++++-
3 files changed, 487 insertions(+), 13 deletions(-)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index ea455f120..92a30f72f 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -42,6 +42,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-beelink-gs1.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-3.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-3-lts.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-lite2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-orangepi-one-plus.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-pine-h64.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts
new file mode 100644
index 000000000..cc5a73026
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3-lts.dts
@@ -0,0 +1,398 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2019 Ondřej Jirman <megous@megous.com>
+
+/dts-v1/;
+
+#include "sun50i-h6.dtsi"
+#include "sun50i-h6-cpu-opp.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "OrangePi 3 LTS";
+ compatible = "xunlong,orangepi-3-lts", "allwinner,sun50i-h6";
+
+ aliases {
+ serial0 = &uart0;
+ serial1 = &uart1;
+ serial9 = &r_uart;
+ ethernet0 = &emac;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ connector {
+ compatible = "hdmi-connector";
+ ddc-en-gpios = <&pio 7 2 GPIO_ACTIVE_HIGH>; /* PH2 */
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ ext_osc32k: ext_osc32k_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ clock-output-names = "ext_osc32k";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ status {
+ label = "green-led";
+ gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
+ default-state = "on";
+ };
+
+ power {
+ label = "red-led";
+ gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
+ };
+ };
+
+ reg_vcc5v: vcc5v {
+ /* board wide 5V supply directly from the DC jack */
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-5v";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
+
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-gmac-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100000>;
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ reg_vcc33_wifi: vcc33-wifi {
+ /* Always on 3.3V regulator for WiFi and BT */
+ compatible = "regulator-fixed";
+ regulator-name = "vcc33-wifi";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ enable-active-high;
+ gpio = <&pio 7 7 GPIO_ACTIVE_HIGH>; /* PH7 */
+ };
+
+ reg_vcc_wifi_io: vcc-wifi-io {
+ /* Always on 1.8V/300mA regulator for WiFi and BT IO */
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-wifi-io";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ vin-supply = <&reg_vcc33_wifi>;
+ };
+
+ wifi_pwrseq: wifi-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = <&rtc 1>;
+ clock-names = "ext_clock";
+ reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */
+ post-power-on-delay-ms = <200>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&reg_dcdca>;
+};
+
+&de {
+ status = "okay";
+};
+
+&dwc3 {
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&gpu {
+ mali-supply = <&reg_dcdcc>;
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ext_rgmii_pins>;
+ phy-mode = "rgmii-id";
+ phy-handle = <&ext_rgmii_phy>;
+ phy-supply = <&reg_gmac_3v3>;
+ allwinner,rx-delay-ps = <200>;
+ allwinner,tx-delay-ps = <300>;
+ status = "okay";
+};
+
+&mdio {
+ ext_rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+
+ reset-gpios = <&pio 3 14 GPIO_ACTIVE_LOW>; /* PD14 */
+ reset-assert-us = <15000>;
+ reset-deassert-us = <40000>;
+ };
+};
+
+&i2s1 {
+ status = "okay";
+};
+
+&mmc0 {
+ vmmc-supply = <&reg_cldo1>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ bus-width = <4>;
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <&reg_vcc33_wifi>;
+ vqmmc-supply = <&reg_vcc_wifi_io>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_pins>;
+ vmmc-supply = <&reg_cldo1>;
+ vqmmc-supply = <&reg_bldo2>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ mmc-hs200-1_8v;
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&pio {
+ vcc-pc-supply = <&reg_bldo2>;
+ vcc-pd-supply = <&reg_cldo1>;
+ vcc-pg-supply = <&reg_vcc_wifi_io>;
+};
+
+&r_rsb {
+ status = "okay";
+
+ axp805: pmic@745 {
+ compatible = "x-powers,axp805", "x-powers,axp806";
+ reg = <0x745>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ x-powers,self-working-mode;
+ vina-supply = <&reg_vcc5v>;
+ vinb-supply = <&reg_vcc5v>;
+ vinc-supply = <&reg_vcc5v>;
+ vind-supply = <&reg_vcc5v>;
+ vine-supply = <&reg_vcc5v>;
+ aldoin-supply = <&reg_vcc5v>;
+ bldoin-supply = <&reg_vcc5v>;
+ cldoin-supply = <&reg_vcc5v>;
+
+ regulators {
+ reg_aldo1: aldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-pl-led-ir";
+ };
+
+ reg_aldo2: aldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc33-audio-tv-ephy-mac";
+ regulator-enable-ramp-delay = <100000>;
+ };
+
+ /* ALDO3 is shorted to CLDO1 */
+ reg_aldo3: aldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc33-io-pd-emmc-sd-usb-uart-1";
+ };
+
+ reg_bldo1: bldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc18-dram-bias-pll";
+ };
+
+ reg_bldo2: bldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-efuse-pcie-hdmi-pc";
+ };
+
+ reg_blod3: bldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi-io-pm-pg";
+ };
+
+ bldo4 {
+ /* unused */
+ };
+
+ reg_cldo1: cldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc33-io-pd-emmc-sd-usb-uart-2";
+ };
+
+ cldo2 {
+ /* unused */
+ };
+
+ cldo3 {
+ /* unused */
+ };
+
+ reg_dcdca: dcdca {
+ regulator-always-on;
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1160000>;
+ regulator-ramp-delay = <2500>;
+ regulator-name = "vdd-cpu";
+ };
+
+ reg_dcdcc: dcdcc {
+ regulator-enable-ramp-delay = <32000>;
+ regulator-min-microvolt = <810000>;
+ regulator-max-microvolt = <1080000>;
+ regulator-ramp-delay = <2500>;
+ regulator-name = "vdd-gpu";
+ };
+
+ reg_dcdcd: dcdcd {
+ regulator-always-on;
+ regulator-min-microvolt = <960000>;
+ regulator-max-microvolt = <960000>;
+ regulator-name = "vdd-sys";
+ };
+
+ reg_dcdce: dcdce {
+ regulator-always-on;
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "vcc-dram";
+ };
+
+ sw {
+ /* unused */
+ };
+ };
+ };
+};
+
+&pwm {
+ status = "okay";
+};
+
+&ac200_pwm_clk {
+ status = "okay";
+};
+
+&i2s3 {
+ status = "okay";
+};
+
+&i2c3 {
+ status = "okay";
+};
+
+&r_ir {
+ status = "okay";
+};
+
+&rtc {
+ clocks = <&ext_osc32k>;
+};
+
+&sound_hdmi {
+ status = "okay";
+};
+
+&sound_ac200 {
+ status = "okay";
+};
+
+/delete-node/ &spi0;
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_ph_pins>;
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+ uart-has-rtscts;
+ status = "disabled";
+};
+
+&usb2otg {
+ /*
+ * This board doesn't have a controllable VBUS even though it
+ * does have an ID pin. Using it as anything but a USB host is
+ * unsafe.
+ */
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usb2phy {
+ usb0_id_det-gpios = <&pio 2 15 GPIO_ACTIVE_HIGH>; /* PC15 */
+ usb0_vbus-supply = <&reg_vcc5v>;
+ usb3_vbus-supply = <&reg_vcc5v>;
+ status = "okay";
+};
+
+&usb3phy {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index e6fd95b6f..ed54c2c11 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -92,6 +92,13 @@ osc24M: osc24M_clk {
clock-output-names = "osc24M";
};
+ ext_osc32k: ext_osc32k_clk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ clock-output-names = "ext_osc32k";
+ };
+
pmu {
compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
@@ -127,6 +134,28 @@ cpu {
};
};
+ sound_ac200: sound_ac200 {
+ status = "disabled";
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,frame-master = <&i2s3_master>;
+ simple-audio-card,bitclock-master = <&i2s3_master>;
+ simple-audio-card,name = "allwinner,ac200-codec";
+ simple-audio-card,mclk-fs = <512>;
+ i2s3_master: simple-audio-card,cpu {
+ sound-dai = <&i2s3>;
+ system-clock-frequency = <22579200>;
+ dai-tdm-slot-num = <2>;
+ dai-tdm-slot-width = <32>;
+ };
+ simple-audio-card,codec {
+ sound-dai = <&ac200_codec>;
+ system-clock-frequency = <22579200>;
+ dai-tdm-slot-num = <2>;
+ dai-tdm-slot-width = <32>;
+ };
+ };
+
timer {
compatible = "arm,armv8-timer";
arm,no-tick-in-suspend;
@@ -383,7 +412,6 @@ pwm: pwm@300a000 {
pio: pinctrl@300b000 {
compatible = "allwinner,sun50i-h6-pinctrl";
reg = <0x0300b000 0x400>;
- interrupt-parent = <&r_intc>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
@@ -533,6 +561,11 @@ uart3_rts_cts_pins: uart3-rts-cts-pins {
pins = "PD25", "PD26";
function = "uart3";
};
+
+ i2s3_pins: i2s3-pins {
+ pins = "PB12", "PB13", "PB14", "PB15", "PB16";
+ function = "i2s3";
+ };
};
iommu: iommu@30f0000 {
@@ -731,6 +764,7 @@ i2c3: i2c@5002c00 {
ac200: mfd@10 {
compatible = "x-powers,ac200";
reg = <0x10>;
+ clocks = <&ac200_pwm_clk>;
interrupt-parent = <&pio>;
interrupts = <1 20 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
@@ -738,11 +772,16 @@ ac200: mfd@10 {
ac200_ephy: phy {
compatible = "x-powers,ac200-ephy";
- clocks = <&ac200_pwm_clk>;
nvmem-cells = <&ephy_calibration>;
nvmem-cell-names = "calibration";
status = "disabled";
};
+
+ ac200_codec: codec {
+ #sound-dai-cells = <0>;
+ compatible = "x-powers,ac200-codec";
+ status = "okay";
+ };
};
};
@@ -779,6 +818,21 @@ i2s1: i2s@5091000 {
status = "disabled";
};
+ i2s3: i2s@508f000 {
+ #sound-dai-cells = <0>;
+ compatible = "allwinner,sun50i-h6-i2s";
+ reg = <0x0508f000 0x1000>;
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2S3>, <&ccu CLK_I2S3>;
+ clock-names = "apb", "mod";
+ dmas = <&dma 6>, <&dma 6>;
+ resets = <&ccu RST_BUS_I2S3>;
+ dma-names = "rx", "tx";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2s3_pins>;
+ status = "disabled";
+ };
+
spdif: spdif@5093000 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun50i-h6-spdif";
@@ -1074,6 +1128,7 @@ rtc: rtc@7000000 {
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
clock-output-names = "osc32k", "osc32k-out", "iosc";
+ clocks = <&ext_osc32k>;
#clock-cells = <1>;
};
@@ -1140,17 +1195,18 @@ r_uart_pins: r-uart-pins {
};
r_ir: ir@7040000 {
- compatible = "allwinner,sun50i-h6-ir",
- "allwinner,sun6i-a31-ir";
- reg = <0x07040000 0x400>;
- interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&r_ccu CLK_R_APB1_IR>,
- <&r_ccu CLK_IR>;
- clock-names = "apb", "ir";
- resets = <&r_ccu RST_R_APB1_IR>;
- pinctrl-names = "default";
- pinctrl-0 = <&r_ir_rx_pin>;
- status = "disabled";
+ compatible = "allwinner,sun50i-h6-ir",
+ "allwinner,sun6i-a31-ir";
+ reg = <0x07040000 0x400>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&r_ccu CLK_R_APB1_IR>,
+ <&r_ccu CLK_IR>;
+ clock-names = "apb", "ir";
+ resets = <&r_ccu RST_R_APB1_IR>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_ir_rx_pin>;
+ status = "disabled";
};
r_i2c: i2c@7081400 {
@@ -1192,6 +1248,25 @@ ths: thermal-sensor@5070400 {
nvmem-cell-names = "calibration";
#thermal-sensor-cells = <1>;
};
+
+ sunxi-info {
+ compatible = "allwinner,sun50i-h6-sys-info";
+ status = "okay";
+ };
+
+ addr_mgt: addr-mgt {
+ compatible = "allwinner,sunxi-addr_mgt";
+ type_addr_wifi = <0x2>;
+ type_addr_bt = <0x2>;
+ type_addr_eth = <0x2>;
+ status = "okay";
+ };
+
+ dump_reg: dump_reg@20000 {
+ compatible = "allwinner,sunxi-dump-reg";
+ reg = <0x0 0x03001000 0x0 0x0f20>;
+ status = "okay";
+ };
};
thermal-zones {
--
2.35.3

1875
patch/kernel/archive/sunxi-6.4/patches.armbian/allwinner-h6-Support-ac200-audio-codec.patch Normal file
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79
patch/kernel/archive/sunxi-6.4/patches.armbian/arm-arm64-dts-Add-leds-axp20x-charger.patch Normal file
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@@ -0,0 +1,79 @@
From 6c096e1d9a48522613f55eafb0a001cf2bdfda34 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Sun, 23 Jan 2022 16:43:53 +0300
Subject: [PATCH 051/153] arm:arm64:dts: Add leds axp20x charger
---
arch/arm/boot/dts/axp209.dtsi | 5 +++++
arch/arm/boot/dts/axp22x.dtsi | 5 +++++
arch/arm/boot/dts/axp81x.dtsi | 5 +++++
arch/arm64/boot/dts/allwinner/axp803.dtsi | 5 +++++
4 files changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/axp209.dtsi b/arch/arm/boot/dts/axp209.dtsi
index ca240cd6f..85000fdb4 100644
--- a/arch/arm/boot/dts/axp209.dtsi
+++ b/arch/arm/boot/dts/axp209.dtsi
@@ -69,6 +69,11 @@ axp_gpio: gpio {
#gpio-cells = <2>;
};
+ axp_led: led {
+ compatible = "x-powers,axp20x-led";
+ status = "disabled";
+ };
+
battery_power_supply: battery-power {
compatible = "x-powers,axp209-battery-power-supply";
status = "disabled";
diff --git a/arch/arm/boot/dts/axp22x.dtsi b/arch/arm/boot/dts/axp22x.dtsi
index f79650afd..91c66b245 100644
--- a/arch/arm/boot/dts/axp22x.dtsi
+++ b/arch/arm/boot/dts/axp22x.dtsi
@@ -62,6 +62,11 @@ axp_adc: adc {
#io-channel-cells = <1>;
};
+ axp_led: led {
+ compatible = "x-powers,axp20x-led";
+ status = "disabled";
+ };
+
battery_power_supply: battery-power {
compatible = "x-powers,axp221-battery-power-supply";
status = "disabled";
diff --git a/arch/arm/boot/dts/axp81x.dtsi b/arch/arm/boot/dts/axp81x.dtsi
index a4b1be159..9a432a0dc 100644
--- a/arch/arm/boot/dts/axp81x.dtsi
+++ b/arch/arm/boot/dts/axp81x.dtsi
@@ -64,6 +64,11 @@ axp_gpio: gpio {
#gpio-cells = <2>;
};
+ axp_led: led {
+ compatible = "x-powers,axp20x-led";
+ status = "disabled";
+ };
+
battery_power_supply: battery-power {
compatible = "x-powers,axp813-battery-power-supply";
status = "disabled";
diff --git a/arch/arm64/boot/dts/allwinner/axp803.dtsi b/arch/arm64/boot/dts/allwinner/axp803.dtsi
index 422be59f5..3ad8967a1 100644
--- a/arch/arm64/boot/dts/allwinner/axp803.dtsi
+++ b/arch/arm64/boot/dts/allwinner/axp803.dtsi
@@ -28,6 +28,11 @@ axp_gpio: gpio {
#gpio-cells = <2>;
};
+ axp_led: led {
+ compatible = "x-powers,axp20x-led";
+ status = "disabled";
+ };
+
battery_power_supply: battery-power {
compatible = "x-powers,axp803-battery-power-supply",
"x-powers,axp813-battery-power-supply";
--
2.35.3

196
patch/kernel/archive/sunxi-6.4/patches.armbian/arm-dts-Add-sun8i-h2-plus-nanopi-duo-device.patch Normal file
View File

@@ -0,0 +1,196 @@
From aa17c952e04aeb40a32cc9250daaedc4fcbddcda Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 15:00:36 +0300
Subject: [PATCH 058/153] arm:dts: Add sun8i-h2-plus-nanopi-duo device
---
arch/arm/boot/dts/Makefile | 1 +
.../arm/boot/dts/sun8i-h2-plus-nanopi-duo.dts | 164 ++++++++++++++++++
2 files changed, 165 insertions(+)
create mode 100644 arch/arm/boot/dts/sun8i-h2-plus-nanopi-duo.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 0ce63f500..942e3c739 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1357,6 +1357,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
sun8i-a83t-tbs-a711.dtb \
sun8i-h2-plus-bananapi-m2-zero.dtb \
sun8i-h2-plus-libretech-all-h3-cc.dtb \
+ sun8i-h2-plus-nanopi-duo.dtb \
sun8i-h2-plus-orangepi-r1.dtb \
sun8i-h2-plus-orangepi-zero.dtb \
sun8i-h3-bananapi-m2-plus.dtb \
diff --git a/arch/arm/boot/dts/sun8i-h2-plus-nanopi-duo.dts b/arch/arm/boot/dts/sun8i-h2-plus-nanopi-duo.dts
new file mode 100644
index 000000000..2b31b8fdd
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-h2-plus-nanopi-duo.dts
@@ -0,0 +1,164 @@
+/*
+ * adapted by karabek, 2018 , based on
+ * Copyright (C) 2016 James Pettigrew <james@innovum.com.au>
+ * Copyright (C) 2016 Milo Kim <woogyom.kim@gmail.com>
+ *
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun8i-h3-nanopi.dtsi"
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "FriendlyARM NanoPi DUO";
+ compatible = "friendlyarm,nanopi-duo", "allwinner,sun8i-h3";
+
+ aliases {
+ ethernet0 = &emac;
+ ethernet1 = &xr819;
+ };
+
+ reg_sy8113b: gpio-regulator {
+ compatible = "regulator-gpio";
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>; // 50=4ms check
+
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; // PL6 check
+ enable-active-high;
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1300000 0x1>;
+ };
+
+ reg_vcc_wifi: reg_vcc_wifi {
+ compatible = "regulator-fixed";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-wifi";
+ gpio = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; // PL7 WIFI_POWER_EN
+ startup-delay-us = <70000>;
+ enable-active-high;
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_en_npi>;
+ reset-gpios = <&pio 6 13 GPIO_ACTIVE_LOW>; // PG13 WL_RESTN
+ post-power-on-delay-ms = <200>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&reg_sy8113b>;
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&emac {
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+ status = "okay";
+};
+
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins>;
+ vqmmc-supply = <&reg_vcc_wifi>;
+ vmmc-supply = <&reg_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ xr819: sdio_wifi@1 {
+ reg = <1>;
+ compatible = "xradio,xr819";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_wake>;
+ interrupt-parent = <&pio>;
+ interrupts = <6 10 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "host-wake";
+ };
+};
+
+&mmc1_pins {
+ bias-pull-up;
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&pio {
+ wifi_en_npi: wifi_en_pin {
+ pins = "PG13";
+ function = "gpio_out";
+ };
+ wifi_wake: wifi_wake@0 {
+ pins = "PG10";
+ function = "irq";
+ pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+};
+
+&usb_otg {
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
+&usbphy {
+ /*
+ * USB Type-A port VBUS is always on. However, MicroUSB VBUS can only
+ * power up the board; when it's used as OTG port, this VBUS is
+ * always off even if the board is powered via GPIO pins.
+ */
+ status = "okay";
+ usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+};
--
2.35.3

257
patch/kernel/archive/sunxi-6.4/patches.armbian/arm-dts-Add-sun8i-h2-plus-sunvell-r69-device.patch Normal file
View File

@@ -0,0 +1,257 @@
From 588df001525f2abbb5dc693c91978ca4448df32c Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 15:23:33 +0300
Subject: [PATCH 059/153] arm:dts: Add sun8i-h2-plus-sunvell-r69 device
---
arch/arm/boot/dts/Makefile | 1 +
.../boot/dts/sun8i-h2-plus-sunvell-r69.dts | 225 ++++++++++++++++++
2 files changed, 226 insertions(+)
create mode 100644 arch/arm/boot/dts/sun8i-h2-plus-sunvell-r69.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 942e3c739..32710062a 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1360,6 +1360,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
sun8i-h2-plus-nanopi-duo.dtb \
sun8i-h2-plus-orangepi-r1.dtb \
sun8i-h2-plus-orangepi-zero.dtb \
+ sun8i-h2-plus-sunvell-r69.dtb \
sun8i-h3-bananapi-m2-plus.dtb \
sun8i-h3-bananapi-m2-plus-v1.2.dtb \
sun8i-h3-beelink-x2.dtb \
diff --git a/arch/arm/boot/dts/sun8i-h2-plus-sunvell-r69.dts b/arch/arm/boot/dts/sun8i-h2-plus-sunvell-r69.dts
new file mode 100644
index 000000000..bb0c2f72b
--- /dev/null
+++ b/arch/arm/boot/dts/sun8i-h2-plus-sunvell-r69.dts
@@ -0,0 +1,225 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/*
+ * Based original Sunvell R69 FEX file (2019 karabek)
+ */
+
+/dts-v1/;
+#include "sun8i-h3.dtsi"
+#include "sunxi-common-regulators.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "Sunvell R69";
+ compatible = "sunvell,sunvell-r69", "allwinner,sun8i-h2-plus";
+
+ aliases {
+ ethernet0 = &emac;
+ ethernet1 = &xr819;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&leds_opc>, <&leds_r_opc>;
+
+ pwr_led {
+ label = "sunvell-r69:red:pwr";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
+ };
+
+ status_led {
+ label = "sunvell-r69:blue:status";
+ gpios = <&pio 0 15 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ reg_vdd_cpux: vdd-cpux-regulator {
+ compatible = "regulator-gpio";
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ enable-active-high;
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1300000 0x1>;
+ };
+
+ reg_vcc_wifi: reg_vcc_wifi {
+ compatible = "regulator-fixed";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi";
+ gpio = <&r_pio 0 7 GPIO_ACTIVE_HIGH>;
+ startup-delay-us = <70000>;
+ enable-active-high;
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 0 GPIO_ACTIVE_LOW>;
+ post-power-on-delay-ms = <200>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&reg_vdd_cpux>;
+};
+
+&de {
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&emac {
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+&ir {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_ir_rx_pin>; /* <&r_ir_rx_pin> */
+ status = "okay";
+};
+
+&mmc0 {
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <&reg_vcc_wifi>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ xr819: sdio_wifi@1 {
+ reg = <1>;
+ compatible = "xradio,xr819";
+ interrupt-parent = <&pio>;
+ interrupts = <0 11 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "host-wake";
+ };
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
+
+&mmc2_8bit_pins {
+ /* Increase current from 30mA to 40mA for DDR eMMC */
+ allwinner,drive = <SUN4I_PINCTRL_40_MA>;
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&pio {
+ leds_opc: led_pins {
+ pins = "PA15";
+ function = "gpio_out";
+ };
+};
+
+&r_pio {
+ leds_r_opc: led_pins {
+ pins = "PL10";
+ function = "gpio_out";
+ };
+};
+
+&reg_usb0_vbus {
+ gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>;
+ status = "disabled";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>;
+ status = "disabled";
+};
+
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart3_pins>;
+ status = "disabled";
+};
+
+&usb_otg {
+ dr_mode = "host";
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+};
--
2.35.3

39
patch/kernel/archive/sunxi-6.4/patches.armbian/arm-dts-a10-cubiebord-a20-cubietruck-green-LED-mmc0-default-tri.patch Normal file
View File

@@ -0,0 +1,39 @@
From 4d62c12a6d7fac8c7f40010628f411c928597d51 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 14:46:11 +0300
Subject: [PATCH 057/153] arm:dts: a10-cubiebord a20-cubietruck green LED mmc0
default-trigger
---
arch/arm/boot/dts/sun4i-a10-cubieboard.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
index 0645d6064..f97b53c44 100644
--- a/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
+++ b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
@@ -83,7 +83,7 @@ led-0 {
led-1 {
label = "cubieboard:green:usr";
gpios = <&pio 7 20 GPIO_ACTIVE_HIGH>; /* LED2 */
- linux,default-trigger = "heartbeat";
+ linux,default-trigger = "mmc0";
};
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
index 525cb7fcc..df428f29b 100644
--- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
+++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
@@ -93,6 +93,7 @@ led-2 {
led-3 {
label = "cubietruck:green:usr";
gpios = <&pio 7 7 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "mmc0";
};
};
--
2.35.3

86
patch/kernel/archive/sunxi-6.4/patches.armbian/arm-dts-a20-orangepi-and-mini-fix-phy-mode-hdmi.patch Normal file
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@@ -0,0 +1,86 @@
From d0563a95220f0afeb0c85b79bc831e874d1452d9 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 13:18:28 +0300
Subject: [PATCH 055/153] arm:dts: a20-orangepi and mini fix phy-mode, hdmi
---
arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-orangepi.dts | 31 ++++++++++++++++++-
2 files changed, 31 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts b/arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts
index 84efa01e7..fc87309ae 100644
--- a/arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts
+++ b/arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts
@@ -121,7 +121,7 @@ &gmac {
pinctrl-names = "default";
pinctrl-0 = <&gmac_rgmii_pins>;
phy-handle = <&phy1>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
phy-supply = <&reg_gmac_3v3>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/sun7i-a20-orangepi.dts b/arch/arm/boot/dts/sun7i-a20-orangepi.dts
index 5d77f1d98..0c760b0a5 100644
--- a/arch/arm/boot/dts/sun7i-a20-orangepi.dts
+++ b/arch/arm/boot/dts/sun7i-a20-orangepi.dts
@@ -61,6 +61,17 @@ chosen {
stdout-path = "serial0:115200n8";
};
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
leds {
compatible = "gpio-leds";
@@ -85,6 +96,14 @@ &ahci {
status = "okay";
};
+&codec {
+ status = "okay";
+};
+
+&de {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
@@ -97,11 +116,21 @@ &gmac {
pinctrl-names = "default";
pinctrl-0 = <&gmac_rgmii_pins>;
phy-handle = <&phy1>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
phy-supply = <&reg_gmac_3v3>;
status = "okay";
};
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&i2c0 {
status = "okay";
--
2.35.3

80
patch/kernel/archive/sunxi-6.4/patches.armbian/arm-dts-h3-nanopi-neo-Add-regulator-leds-mmc2.patch Normal file
View File

@@ -0,0 +1,80 @@
From 0fd48415d94e247abbd9cc0854af6ae38afcd667 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 15:34:01 +0300
Subject: [PATCH 060/153] arm:dts: h3-nanopi-neo Add regulator, leds, mmc2
---
arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 57 +++++++++++++++++++++++
1 file changed, 57 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
index df71fab3c..032849663 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
@@ -49,6 +49,63 @@ / {
aliases {
ethernet0 = &emac;
};
+
+ /* Warning: sunxi-5.18:
+ * The leds node is present in the sun8i-h3-nanopi.dtsi file
+ * You will have to fix this situation yourself
+ */
+ leds {
+ compatible = "gpio-leds";
+
+ pwr {
+ label = "nanopi:red:pwr";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
+ linux,default-trigger = "default-on";
+ };
+
+ status {
+ label = "nanopi:green:status";
+ gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ vdd_cpux: gpio-regulator {
+ compatible = "regulator-gpio";
+ pinctrl-names = "default";
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1300000 0x1>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_cpux>;
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
+
+&mmc2_8bit_pins {
+ /* Increase drive strength for DDR modes */
+ drive-strength = <40>;
+ /* eMMC is missing pull-ups */
+ bias-pull-up;
};
&ehci0 {
--
2.35.3

197
patch/kernel/archive/sunxi-6.4/patches.armbian/arm-dts-h3-nanopi-neo-air-Add-regulator-camera-wifi-bluetooth-o.patch Normal file
View File

@@ -0,0 +1,197 @@
From 1efe0eecf0919bfb33af8430521991c57b5b35ef Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 15:45:43 +0300
Subject: [PATCH 061/153] arm:dts: h3-nanopi-neo-air Add regulator camera wifi
bluetooth otg
---
arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts | 153 ++++++++++++++++++
1 file changed, 153 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts
index 9e1a33f94..bff96ae65 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts
@@ -70,12 +70,92 @@ led-0 {
led-1 {
label = "nanopi:blue:status";
gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
+ linux,default-trigger = "heartbeat";
};
};
+ vdd_cpux: gpio-regulator {
+ compatible = "regulator-gpio";
+ pinctrl-names = "default";
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1300000 0x1>;
+ };
+
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_en_npi>;
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+ post-power-on-delay-ms = <200>;
+ };
+
+ rfkill_bt {
+ compatible = "rfkill-gpio";
+ pinctrl-names = "default";
+ pinctrl-0 = <&bt_pwr_pin>;
+ reset-gpios = <&pio 6 13 GPIO_ACTIVE_HIGH>; /* PG13 */
+ clocks = <&osc32k>;
+ clock-frequency = <32768>;
+ rfkill-name = "sunxi-bt";
+ rfkill-type = "bluetooth";
+ };
+
+ cam_xclk: cam-xclk {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <24000000>;
+ clock-output-names = "cam-xclk";
+ };
+
+ reg_cam_avdd: cam-avdd {
+ compatible = "regulator-fixed";
+ regulator-name = "cam500b-avdd";
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ vin-supply = <&reg_vcc3v3>;
+ };
+
+ reg_cam_dovdd: cam-dovdd {
+ compatible = "regulator-fixed";
+ regulator-name = "cam500b-dovdd";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&reg_vcc3v3>;
+ };
+
+ reg_cam_dvdd: cam-dvdd {
+ compatible = "regulator-fixed";
+ regulator-name = "cam500b-dvdd";
+ regulator-min-microvolt = <1500000>;
+ regulator-max-microvolt = <1500000>;
+ vin-supply = <&reg_vcc3v3>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_cpux>;
+};
+
+&pio {
+ bt_pwr_pin: bt_pwr_pin@0 {
+ pins = "PG13";
+ function = "gpio_out";
+ };
+};
+
+&r_pio {
+ wifi_en_npi: wifi_en_pin {
+ pins = "PL7";
+ function = "gpio_out";
};
};
@@ -110,6 +190,74 @@ &mmc2 {
vqmmc-supply = <&reg_vcc3v3>;
bus-width = <8>;
non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
+
+&mmc2_8bit_pins {
+ /* Increase drive strength for DDR modes */
+ drive-strength = <40>;
+ /* eMMC is missing pull-ups */
+ bias-pull-up;
+};
+
+&csi {
+ status = "okay";
+
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ /* Parallel bus endpoint */
+ csi_from_ov5640: endpoint {
+ remote-endpoint = <&ov5640_to_csi>;
+ bus-width = <8>;
+ data-shift = <2>;
+ hsync-active = <1>; /* Active high */
+ vsync-active = <0>; /* Active low */
+ data-active = <1>; /* Active high */
+ pclk-sample = <1>; /* Rising */
+ };
+ };
+};
+
+&i2c2 {
+ status = "okay";
+ ov5640: camera@3c {
+ compatible = "ovti,ov5640";
+ reg = <0x3c>;
+ clocks = <&cam_xclk>;
+ clock-names = "xclk";
+
+ reset-gpios = <&pio 4 14 GPIO_ACTIVE_LOW>;
+ powerdown-gpios = <&pio 4 15 GPIO_ACTIVE_HIGH>;
+ AVDD-supply = <&reg_cam_avdd>;
+ DOVDD-supply = <&reg_cam_dovdd>;
+ DVDD-supply = <&reg_cam_dvdd>;
+
+ port {
+ ov5640_to_csi: endpoint {
+ remote-endpoint = <&csi_from_ov5640>;
+ bus-width = <8>;
+ data-shift = <2>;
+ hsync-active = <1>; /* Active high */
+ vsync-active = <0>; /* Active low */
+ data-active = <1>; /* Active high */
+ pclk-sample = <1>; /* Rising */
+ };
+ };
+ };
+};
+
+&i2c2_pins {
+ bias-pull-up;
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ohci0 {
status = "okay";
};
@@ -137,6 +285,11 @@ bluetooth {
};
};
+&usb_otg {
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
&usbphy {
/* USB VBUS is always on */
status = "okay";
--
2.35.3

59
patch/kernel/archive/sunxi-6.4/patches.armbian/arm-dts-h3-orangepi-2-Add-regulator-vdd-cpu.patch Normal file
View File

@@ -0,0 +1,59 @@
From 922aa8247f8cbdcb08ec78c65cee0959870d84f5 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 18:23:18 +0300
Subject: [PATCH 062/153] arm:dts: h3-orangepi-2 Add regulator vdd cpu
---
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 29 +++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
index 2b5890327..bc20c44d1 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
@@ -124,6 +124,10 @@ &de {
status = "okay";
};
+&cpu0 {
+ cpu-supply = <&reg_vdd_cpux>;
+};
+
&ehci1 {
status = "okay";
};
@@ -178,6 +182,31 @@ rtl8189: sdio_wifi@1 {
};
};
+&r_i2c {
+ status = "okay";
+
+ reg_vdd_cpux: regulator@65 {
+ compatible = "silergy,sy8106a";
+ reg = <0x65>;
+ regulator-name = "vdd-cpux";
+ silergy,fixed-microvolt = <1200000>;
+ /*
+ * The datasheet uses 1.1V as the minimum value of VDD-CPUX,
+ * however both the Armbian DVFS table and the official one
+ * have operating points with voltage under 1.1V, and both
+ * DVFS table are known to work properly at the lowest
+ * operating point.
+ *
+ * Use 1.0V as the minimum voltage instead.
+ */
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-ramp-delay = <200>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+};
+
&reg_usb1_vbus {
gpio = <&pio 6 13 GPIO_ACTIVE_HIGH>;
status = "okay";
--
2.35.3

4964
patch/kernel/archive/sunxi-6.4/patches.armbian/arm-dts-overlay-Add-Overlays-for-sunxi.patch Normal file
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File diff suppressed because it is too large Load Diff

209
patch/kernel/archive/sunxi-6.4/patches.armbian/arm-dts-overlay-sun8i-h3-cpu-clock-add-overclock.patch Normal file
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@@ -0,0 +1,209 @@
From d27eca2a3c40f3f477cfb8848f0daf59ef2b8056 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Wed, 2 Feb 2022 21:29:16 +0300
Subject: [PATCH 112/153] arm:dts:overlay: sun8i-h3-cpu-clock add overclock
---
arch/arm/boot/dts/overlay/Makefile | 3 +
.../sun8i-h3-cpu-clock-1.2GHz-1.3v.dts | 31 +++++++++
.../sun8i-h3-cpu-clock-1.368GHz-1.3v.dts | 67 +++++++++++++++++++
.../sun8i-h3-cpu-clock-1.3GHz-1.3v.dts | 61 +++++++++++++++++
4 files changed, 162 insertions(+)
create mode 100644 arch/arm/boot/dts/overlay/sun8i-h3-cpu-clock-1.2GHz-1.3v.dts
create mode 100644 arch/arm/boot/dts/overlay/sun8i-h3-cpu-clock-1.368GHz-1.3v.dts
create mode 100644 arch/arm/boot/dts/overlay/sun8i-h3-cpu-clock-1.3GHz-1.3v.dts
diff --git a/arch/arm/boot/dts/overlay/Makefile b/arch/arm/boot/dts/overlay/Makefile
index d2e94f6b7..23f8c2048 100644
--- a/arch/arm/boot/dts/overlay/Makefile
+++ b/arch/arm/boot/dts/overlay/Makefile
@@ -60,6 +60,9 @@ dtbo-$(CONFIG_MACH_SUN7I) += \
dtbo-$(CONFIG_MACH_SUN8I) += \
sun8i-h3-analog-codec.dtbo \
sun8i-h3-cir.dtbo \
+ sun8i-h3-cpu-clock-1.2GHz-1.3v.dtbo \
+ sun8i-h3-cpu-clock-1.368GHz-1.3v.dtbo \
+ sun8i-h3-cpu-clock-1.3GHz-1.3v.dtbo \
sun8i-h3-i2c0.dtbo \
sun8i-h3-i2c1.dtbo \
sun8i-h3-i2c2.dtbo \
diff --git a/arch/arm/boot/dts/overlay/sun8i-h3-cpu-clock-1.2GHz-1.3v.dts b/arch/arm/boot/dts/overlay/sun8i-h3-cpu-clock-1.2GHz-1.3v.dts
new file mode 100644
index 000000000..b07e694c7
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/sun8i-h3-cpu-clock-1.2GHz-1.3v.dts
@@ -0,0 +1,31 @@
+// DT overlay for CPU frequency operating points to up to 1.2GHz at a maximum CPU voltage of 1.3v
+
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target = <&cpu0_opp_table>;
+
+ __overlay__ {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ // in order to match the existing DT cooling-maps, update the existing OP table in-place
+ // with the new voltages
+
+ opp-1104000000 {
+ opp-hz = /bits/ 64 <1104000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+ };
+ };
+};
+
diff --git a/arch/arm/boot/dts/overlay/sun8i-h3-cpu-clock-1.368GHz-1.3v.dts b/arch/arm/boot/dts/overlay/sun8i-h3-cpu-clock-1.368GHz-1.3v.dts
new file mode 100644
index 000000000..e3fd7e5c8
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/sun8i-h3-cpu-clock-1.368GHz-1.3v.dts
@@ -0,0 +1,67 @@
+// DT overlay for CPU frequency operating points to 1.3GHz at a maximum CPU voltage of 1.3v
+
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target = <&cpu0_opp_table>;
+
+ __overlay__ {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ // in order to match the DT cooling-maps, update the existing OP table in-place
+ // with the new voltages
+
+ opp-1056000000 {
+ opp-hz = /bits/ 64 <1056000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1104000000 {
+ opp-hz = /bits/ 64 <1104000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1152000000 {
+ opp-hz = /bits/ 64 <1152000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1224000000 {
+ opp-hz = /bits/ 64 <1224000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1248000000 {
+ opp-hz = /bits/ 64 <1248000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1296000000 {
+ opp-hz = /bits/ 64 <1296000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1368000000 {
+ opp-hz = /bits/ 64 <1368000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+ };
+ };
+};
+
diff --git a/arch/arm/boot/dts/overlay/sun8i-h3-cpu-clock-1.3GHz-1.3v.dts b/arch/arm/boot/dts/overlay/sun8i-h3-cpu-clock-1.3GHz-1.3v.dts
new file mode 100644
index 000000000..413222831
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/sun8i-h3-cpu-clock-1.3GHz-1.3v.dts
@@ -0,0 +1,61 @@
+// DT overlay for CPU frequency operating points to 1.3GHz at a maximum CPU voltage of 1.3v
+
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target = <&cpu0_opp_table>;
+
+ __overlay__ {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ // in order to match the DT cooling-maps, update the existing OP table in-place
+ // with the new voltages
+
+ opp-1056000000 {
+ opp-hz = /bits/ 64 <1056000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1104000000 {
+ opp-hz = /bits/ 64 <1104000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1152000000 {
+ opp-hz = /bits/ 64 <1152000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1224000000 {
+ opp-hz = /bits/ 64 <1224000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1248000000 {
+ opp-hz = /bits/ 64 <1248000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1296000000 {
+ opp-hz = /bits/ 64 <1296000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+ };
+ };
+};
+
--
2.35.3

133
patch/kernel/archive/sunxi-6.4/patches.armbian/arm-dts-sun5i-a13-olinuxino-Add-panel-lcd-olinuxino-4.3-needed-.patch Normal file
View File

@@ -0,0 +1,133 @@
From 38c6adabf81eaa1e2c2687591d98fb987f6be080 Mon Sep 17 00:00:00 2001
From: hehopmajieh <hehopmajieh@debian.bg>
Date: Thu, 19 Mar 2020 10:40:44 +0200
Subject: [PATCH 119/153] arm:dts:sun5i-a13-olinuxino Add panel
lcd-olinuxino-4.3 needed to fix overlay tests
---
arch/arm/boot/dts/sun5i-a13-olinuxino.dts | 79 +++++++++++++----------
1 file changed, 44 insertions(+), 35 deletions(-)
diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
index fadeae3cd..d015a24c6 100644
--- a/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
+++ b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
@@ -48,6 +48,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
+#include <dt-bindings/pwm/pwm.h>
/ {
model = "Olimex A13-Olinuxino";
@@ -72,40 +73,28 @@ led {
};
};
- bridge {
- compatible = "dumb-vga-dac";
+ lcd_backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
+ brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
+ default-brightness-level = <8>;
+ };
+
+ panel: panel {
+ compatible = "olimex,lcd-olinuxino-4.3";
+ backlight = <&lcd_backlight>;
+ enable-gpios = <&axp_gpio 0 GPIO_ACTIVE_HIGH>; /* AXP GPIO0 */
+ pinctrl-names = "default";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port {
+ panel_input: endpoint {
+ remote-endpoint = <&tcon0_out_lcd>;
+ };
+ };
+
+ };
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- port@0 {
- reg = <0>;
-
- vga_bridge_in: endpoint {
- remote-endpoint = <&tcon0_out_vga>;
- };
- };
-
- port@1 {
- reg = <1>;
-
- vga_bridge_out: endpoint {
- remote-endpoint = <&vga_con_in>;
- };
- };
- };
- };
-
- vga {
- compatible = "vga-connector";
-
- port {
- vga_con_in: endpoint {
- remote-endpoint = <&vga_bridge_out>;
- };
- };
- };
};
&be0 {
@@ -130,6 +119,11 @@ axp209: pmic@34 {
interrupt-controller;
#interrupt-cells = <1>;
+ axp_gpio:gpio{
+ compatible = "x-powers,axp209-gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
};
};
@@ -221,12 +215,18 @@ &tcon0 {
};
&tcon0_out {
- tcon0_out_vga: endpoint@0 {
+ tcon0_out_lcd: endpoint@0 {
reg = <0>;
- remote-endpoint = <&vga_bridge_in>;
+ remote-endpoint = <&panel_input>;
};
};
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm0_pin>;
+ status = "okay";
+};
+
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pg_pins>;
@@ -245,3 +245,12 @@ &usbphy {
usb1_vbus-supply = <&reg_usb1_vbus>;
status = "okay";
};
+
+&rtp {
+ allwinner,ts-attached;
+ #thermal-sensor-cells = <0>;
+ /* sensitive/noisy touch panel */
+ touchscreen-inverted-x;
+ allwinner,tp-sensitive-adjust = <0>;
+ allwinner,filter-type = <3>;
+};
--
2.35.3

107
patch/kernel/archive/sunxi-6.4/patches.armbian/arm-dts-sun5i-a13-olinuxino-micro-add-panel-lcd-olinuxino-4.3.patch Normal file
View File

@@ -0,0 +1,107 @@
From e164959b426df800902fa268d6e59b08ccf897e0 Mon Sep 17 00:00:00 2001
From: Mitko Gamishev <hehopmajieh@debian.bg>
Date: Wed, 5 Feb 2020 15:00:25 +0200
Subject: [PATCH 118/153] arm:dts:sun5i-a13-olinuxino-micro add panel
lcd-olinuxino-4.3
---
.../boot/dts/sun5i-a13-olinuxino-micro.dts | 62 ++++++++++++++++++-
1 file changed, 60 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts
index bfe1075e6..32874f6a5 100644
--- a/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts
+++ b/arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts
@@ -44,7 +44,7 @@
/dts-v1/;
#include "sun5i-a13.dtsi"
#include "sunxi-common-regulators.dtsi"
-
+#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/gpio/gpio.h>
/ {
@@ -70,6 +70,40 @@ led {
default-state = "on";
};
};
+
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&pwm 0 50000 PWM_POLARITY_INVERTED>;
+ brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>;
+ default-brightness-level = <8>;
+
+ };
+
+ panel: panel {
+ compatible = "olimex,lcd-olinuxino-4.3";
+ backlight = <&backlight>;
+ enable-gpios = <&pio 1 10 GPIO_ACTIVE_HIGH>; /* PB10 */
+ pinctrl-names = "default";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port {
+ panel_input: endpoint {
+ remote-endpoint = <&tcon0_out_lcd>;
+ };
+ };
+
+ };
+
+ };
+
+
+
+&be0 {
+ status = "okay";
+};
+
+&codec {
+ status = "okay";
};
&ehci0 {
@@ -117,10 +151,28 @@ &reg_usb0_vbus {
};
&reg_usb1_vbus {
- gpio = <&pio 6 11 GPIO_ACTIVE_HIGH>;
+ gpio = <&pio 2 19 GPIO_ACTIVE_HIGH>;
status = "okay";
};
+&tcon0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&lcd_rgb666_pins>;
+ status = "okay";
+};
+&tcon0_out {
+ tcon0_out_lcd: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&panel_input>;
+ };
+};
+
+&pwm {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm0_pin>;
+ status = "okay";
+};
+
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pg_pins>;
@@ -139,3 +191,9 @@ &usbphy {
usb1_vbus-supply = <&reg_usb1_vbus>;
status = "okay";
};
+
+&rtp {
+ allwinner,ts-attached;
+ touchscreen-inverted-x;
+};
+
--
2.35.3

99
patch/kernel/archive/sunxi-6.4/patches.armbian/arm-dts-sun7i-a20-Disable-OOB-IRQ-for-brcm-wifi-on-Cubietruck-a.patch Normal file
View File

@@ -0,0 +1,99 @@
From f95af1ad0a757b083d0aab1a1b4f90c966e1656c Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Sun, 23 Jan 2022 22:32:07 +0300
Subject: [PATCH 054/153] arm:dts:sun7i-a20 Disable OOB IRQ for brcm-wifi on
Cubietruck and Banana-Pro
While doing some brcmfmac driver work I needed to test this also on some
devicetree based boards. So I fired up the good old Cubietruck and when
that would not work a Banana Pro.
With an unmodified 4.17 kernel both boards intermittently would come up
with non working wifi with the following errors:
brcmfmac: brcmf_sdio_bus_rxctl: resumed on timeout
brcmfmac: brcmf_bus_started: failed: -110
brcmfmac: brcmf_attach: dongle is not responding: err=-110
brcmfmac: brcmf_sdio_firmware_callback: brcmf_attach failed
They would come up this way more often then with actual working wifi,
once this problem happens it seems to require a power-cycle to fix.
Once things work one can safely reboot without hitting the issue.
I've found that disabling OOB interrupts fixes this. This really is more
of a workaround then a proper fix, but it makes the wifi reliable again
and it does not have much of a downside.
Using an OOB IRQ instead of the sdio-IRQ mechanism is mostly important to
allow the MMC controller to go into runtime-suspend which is not really an
issue on these boards since they are (usually) not battery powered.
I've looked at recent brcmfmac and mmc-core changes which may explain this
and I've not found anything. So the most likely culprit is the A20 external
interrupt handling e.g. perhaps it is set to edge instead of level? Either
way I do not have time to further investigate this.
BugLink: https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=908438
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
---
arch/arm/boot/dts/sun7i-a20-bananapro.dts | 16 +++++++++++++---
arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 16 +++++++++++++---
2 files changed, 26 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/sun7i-a20-bananapro.dts b/arch/arm/boot/dts/sun7i-a20-bananapro.dts
index e22f0e8bb..e68748076 100644
--- a/arch/arm/boot/dts/sun7i-a20-bananapro.dts
+++ b/arch/arm/boot/dts/sun7i-a20-bananapro.dts
@@ -162,9 +162,19 @@ &mmc3 {
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
- interrupt-parent = <&pio>;
- interrupts = <7 15 IRQ_TYPE_LEVEL_LOW>;
- interrupt-names = "host-wake";
+ /*
+ * OOB interrupt support is broken ATM, often the first irq
+ * does not get seen resulting in the drv probe failing with:
+ *
+ * brcmfmac: brcmf_sdio_bus_rxctl: resumed on timeout
+ * brcmfmac: brcmf_bus_started: failed: -110
+ * brcmfmac: brcmf_attach: dongle is not responding: err=-110
+ * brcmfmac: brcmf_sdio_firmware_callback: brcmf_attach failed
+ *
+ * interrupt-parent = <&pio>;
+ * interrupts = <7 15 IRQ_TYPE_LEVEL_LOW>;
+ * interrupt-names = "host-wake";
+ */
};
};
diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
index 52160e368..525cb7fcc 100644
--- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
+++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
@@ -213,9 +213,19 @@ &mmc3 {
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
- interrupt-parent = <&pio>;
- interrupts = <7 10 IRQ_TYPE_LEVEL_LOW>; /* PH10 / EINT10 */
- interrupt-names = "host-wake";
+ /*
+ * OOB interrupt support is broken ATM, often the first irq
+ * does not get seen resulting in the drv probe failing with:
+ *
+ * brcmfmac: brcmf_sdio_bus_rxctl: resumed on timeout
+ * brcmfmac: brcmf_bus_started: failed: -110
+ * brcmfmac: brcmf_attach: dongle is not responding: err=-110
+ * brcmfmac: brcmf_sdio_firmware_callback: brcmf_attach failed
+ *
+ * interrupt-parent = <&pio>;
+ * interrupts = <7 10 IRQ_TYPE_LEVEL_LOW>;
+ * interrupt-names = "host-wake";
+ */
};
};
--
2.35.3

78
patch/kernel/archive/sunxi-6.4/patches.armbian/arm-dts-sun7i-a20-bananapro-add-hdmi-connector-de.patch Normal file
View File

@@ -0,0 +1,78 @@
From c48132e824d80c1f1660921965dddc7b14fd8c1a Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Fri, 28 Jan 2022 15:15:19 +0300
Subject: [PATCH 068/153] arm:dts: sun7i-a20-bananapro add hdmi-connector, de
---
arch/arm/boot/dts/sun7i-a20-bananapro.dts | 30 +++++++++++++++++++++++
1 file changed, 30 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20-bananapro.dts b/arch/arm/boot/dts/sun7i-a20-bananapro.dts
index e68748076..3a34fb39a 100644
--- a/arch/arm/boot/dts/sun7i-a20-bananapro.dts
+++ b/arch/arm/boot/dts/sun7i-a20-bananapro.dts
@@ -60,6 +60,17 @@ chosen {
stdout-path = "serial0:115200n8";
};
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
leds {
compatible = "gpio-leds";
@@ -91,6 +102,7 @@ reg_gmac_3v3: gmac-3v3 {
};
&ahci {
+ target-supply = <&reg_ahci_5v>;
status = "okay";
};
@@ -98,6 +110,10 @@ &codec {
status = "okay";
};
+&de {
+ status = "okay";
+};
+
&ehci0 {
status = "okay";
};
@@ -115,6 +131,16 @@ &gmac {
status = "okay";
};
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
&i2c0 {
status = "okay";
@@ -227,3 +253,7 @@ &usbphy {
usb2_vbus-supply = <&reg_usb2_vbus>;
status = "okay";
};
+
+&reg_ahci_5v {
+ status = "okay";
+};
--
2.35.3

24
patch/kernel/archive/sunxi-6.4/patches.armbian/arm-dts-sun7i-a20-cubietruck-add-alias-uart2.patch Normal file
View File

@@ -0,0 +1,24 @@
From ff06f7672c6bbbcfa786bc71f97f79610d891291 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Fri, 28 Jan 2022 11:38:08 +0300
Subject: [PATCH 064/153] arm:dts: sun7i-a20-cubietruck add alias uart2
---
arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
index df428f29b..a3d169c43 100644
--- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
+++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
@@ -55,6 +55,7 @@ / {
aliases {
serial0 = &uart0;
+ serial2 = &uart2;
};
chosen {
--
2.35.3

55
patch/kernel/archive/sunxi-6.4/patches.armbian/arm-dts-sun7i-a20-olimex-som-204-evb-olinuxino-micro-decrease-d.patch Normal file
View File

@@ -0,0 +1,55 @@
From 126800dd0f2a76dd7aeeb74e0cf43c39264344b0 Mon Sep 17 00:00:00 2001
From: Stefan Saraev <stefan@saraev.ca>
Date: Wed, 24 Jun 2020 20:53:36 +0300
Subject: [PATCH 123/153] arm:dts:sun7i-a20:
olimex-som(204)-evb,olinuxino-micro decrease dcdc2 min voltage
fixes some kernel crashes
---
arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-olimex-som204-evb.dts | 2 +-
arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts b/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
index f05ee32bc..e1867190c 100644
--- a/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
@@ -247,7 +247,7 @@ &reg_ahci_5v {
&reg_dcdc2 {
regulator-always-on;
- regulator-min-microvolt = <1000000>;
+ regulator-min-microvolt = <1300000>;
regulator-max-microvolt = <1400000>;
regulator-name = "vdd-cpu";
};
diff --git a/arch/arm/boot/dts/sun7i-a20-olimex-som204-evb.dts b/arch/arm/boot/dts/sun7i-a20-olimex-som204-evb.dts
index 54af6c180..ae3aa1055 100644
--- a/arch/arm/boot/dts/sun7i-a20-olimex-som204-evb.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olimex-som204-evb.dts
@@ -218,7 +218,7 @@ &reg_ahci_5v {
&reg_dcdc2 {
regulator-always-on;
- regulator-min-microvolt = <1000000>;
+ regulator-min-microvolt = <1300000>;
regulator-max-microvolt = <1400000>;
regulator-name = "vdd-cpu";
};
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
index a1b89b2a2..7077ceea7 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
@@ -268,7 +268,7 @@ &battery_power_supply {
&reg_dcdc2 {
regulator-always-on;
- regulator-min-microvolt = <1000000>;
+ regulator-min-microvolt = <1300000>;
regulator-max-microvolt = <1400000>;
regulator-name = "vdd-cpu";
};
--
2.35.3

27
patch/kernel/archive/sunxi-6.4/patches.armbian/arm-dts-sun7i-a20-olinuxino-lime2-enable-audio-codec.patch Normal file
View File

@@ -0,0 +1,27 @@
From 706175bff4614f00b725ee3d4a0c6dda86b8a8ff Mon Sep 17 00:00:00 2001
From: Stefan Saraev <stefan@saraev.ca>
Date: Wed, 3 Jun 2020 13:49:44 +0300
Subject: [PATCH 121/153] arm:dts:sun7i-a20-olinuxino-lime2 enable audio codec
---
arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
index ecb91fb89..e0174ca48 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
@@ -96,6 +96,10 @@ &ahci {
status = "okay";
};
+&codec {
+ status = "okay";
+};
+
&de {
status = "okay";
};
--
2.35.3

29
patch/kernel/archive/sunxi-6.4/patches.armbian/arm-dts-sun7i-a20-olinuxino-lime2-enable-ldo3-always-on.patch Normal file
View File

@@ -0,0 +1,29 @@
From f18352399fc8730cb93459fc20ffd5a2b0741537 Mon Sep 17 00:00:00 2001
From: hehopmajieh <hehopmajieh@debian.bg>
Date: Tue, 16 Jun 2020 15:40:59 +0300
Subject: [PATCH 122/153] arm:dts:sun7i-a20-olinuxino-lime2 enable ldo3
always-on
---
arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
index e0174ca48..ae710f785 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
@@ -237,10 +237,10 @@ &reg_ldo2 {
};
&reg_ldo3 {
+ regulator-always-on;
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-name = "vddio-csi0";
- regulator-soft-start;
regulator-ramp-delay = <1600>;
};
--
2.35.3

24
patch/kernel/archive/sunxi-6.4/patches.armbian/arm-dts-sun7i-a20-olinuxino-micro-emmc-Add-vqmmc-node.patch Normal file
View File

@@ -0,0 +1,24 @@
From 9be4cefbbac2c5917094399daaf7606aa643dde8 Mon Sep 17 00:00:00 2001
From: hehopmajieh <hehopmajieh@debian.bg>
Date: Tue, 14 Apr 2020 10:28:16 +0300
Subject: [PATCH 120/153] arm:dts:sun7i-a20-olinuxino-micro-emmc Add vqmmc node
---
arch/arm/boot/dts/sun7i-a20-olinuxino-micro-emmc.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro-emmc.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro-emmc.dts
index 2337b44a8..c79e9ad02 100644
--- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro-emmc.dts
+++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro-emmc.dts
@@ -55,6 +55,7 @@ mmc2_pwrseq: pwrseq {
&mmc2 {
vmmc-supply = <&reg_vcc3v3>;
+ vqmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
non-removable;
mmc-pwrseq = <&mmc2_pwrseq>;
--
2.35.3

36
patch/kernel/archive/sunxi-6.4/patches.armbian/arm-dts-sun8i-h2-plus-orangepi-zero-fix-xradio-interrupt.patch Normal file
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@@ -0,0 +1,36 @@
From 447f5e3777943f70586637d1e95b37d81e28a37c Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 7 Feb 2022 19:15:17 +0300
Subject: [PATCH 139/153] arm:dts: sun8i-h2-plus-orangepi-zero fix xradio
interrupt
---
arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
index 3706216ff..7b42ab8b5 100644
--- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
+++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
@@ -49,6 +49,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Xunlong Orange Pi Zero";
@@ -151,6 +152,10 @@ &mmc1 {
*/
xr819: sdio_wifi@1 {
reg = <1>;
+ compatible = "xradio,xr819";
+ interrupt-parent = <&pio>;
+ interrupts = <6 10 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "host-wake";
};
};
--
2.35.3

104
patch/kernel/archive/sunxi-6.4/patches.armbian/arm-dts-sun8i-h3-add-thermal-zones.patch Normal file
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@@ -0,0 +1,104 @@
From f2834595e9b8c624079e1d3c6af878795592991c Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Wed, 2 Feb 2022 21:34:48 +0300
Subject: [PATCH 124/153] arm:dts:sun8i-h3 add thermal zones
---
arch/arm/boot/dts/sun8i-h3.dtsi | 68 ++++++++++++++++++++++++++-------
1 file changed, 55 insertions(+), 13 deletions(-)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 30d72d3b6..1b02a4c3f 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -297,32 +297,74 @@ ths: thermal-sensor@1c25000 {
};
thermal-zones {
- cpu_thermal: cpu-thermal {
- polling-delay-passive = <0>;
- polling-delay = <0>;
+ cpu_thermal {
+ /* milliseconds */
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
thermal-sensors = <&ths>;
trips {
- cpu_hot_trip: cpu-hot {
+ cpu_warm: cpu_warm {
+ temperature = <75000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_hot_pre: cpu_hot_pre {
temperature = <80000>;
hysteresis = <2000>;
type = "passive";
};
- cpu_very_hot_trip: cpu-very-hot {
- temperature = <100000>;
- hysteresis = <0>;
+ cpu_hot: cpu_hot {
+ temperature = <85000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_very_hot_pre: cpu_very_hot_pre {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_very_hot: cpu_very_hot {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_crit: cpu_crit {
+ temperature = <105000>;
+ hysteresis = <2000>;
type = "critical";
};
};
cooling-maps {
- cpu-hot-limit {
- trip = <&cpu_hot_trip>;
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ cpu_warm_limit_cpu {
+ trip = <&cpu_warm>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT 2>;
+ };
+
+ cpu_hot_pre_limit_cpu {
+ trip = <&cpu_hot_pre>;
+ cooling-device = <&cpu0 2 3>;
+ };
+
+ cpu_hot_limit_cpu {
+ trip = <&cpu_hot>;
+ cooling-device = <&cpu0 3 4>;
+ };
+
+ cpu_very_hot_pre_limit_cpu {
+ trip = <&cpu_very_hot_pre>;
+ cooling-device = <&cpu0 5 6>;
+ };
+
+ cpu_very_hot_limit_cpu {
+ trip = <&cpu_very_hot>;
+ cooling-device = <&cpu0 7 THERMAL_NO_LIMIT>;
};
};
};
--
2.35.3

25
patch/kernel/archive/sunxi-6.4/patches.armbian/arm-dts-sun8i-h3-bananapi-m2-plus-add-wifi_pwrseq.patch Normal file
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@@ -0,0 +1,25 @@
From b6ab70e11937660ba3420f6418c9c9ca93de7c88 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Fri, 28 Jan 2022 15:06:34 +0300
Subject: [PATCH 067/153] arm:dts:sun8i-h3-bananapi-m2-plus add wifi_pwrseq
---
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
index 195a75da1..f3f324e66 100644
--- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
@@ -48,3 +48,8 @@ / {
model = "Banana Pi BPI-M2-Plus H3";
compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3";
};
+
+&wifi_pwrseq {
+ clocks = <&rtc 1>;
+ clock-names = "ext_clock";
+};
--
2.35.3

60
patch/kernel/archive/sunxi-6.4/patches.armbian/arm-dts-sun8i-h3-nanopi-add-leds-pio-pins.patch Normal file
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@@ -0,0 +1,60 @@
From 7f770fb3fa862d2a54a4ae42dda6a3889cea67d3 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 14:14:41 +0300
Subject: [PATCH 056/153] arm:dts: sun8i-h3-nanopi add leds pio pins
---
arch/arm/boot/dts/sun8i-h3-nanopi.dtsi | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi b/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi
index cf8413fba..57d5f7513 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi
@@ -59,6 +59,8 @@ chosen {
leds {
compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&leds_npi>, <&leds_r_npi>;
led-0 {
label = "nanopi:blue:status";
@@ -75,6 +77,8 @@ led-1 {
gpio-keys {
compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&sw_r_npi>;
key-0 {
label = "k1";
@@ -100,6 +104,25 @@ &ohci3 {
status = "okay";
};
+&pio {
+ leds_npi: led_pins {
+ pins = "PA10";
+ function = "gpio_out";
+ };
+};
+
+&r_pio {
+ leds_r_npi: led_pins {
+ pins = "PL10";
+ function = "gpio_out";
+ };
+
+ sw_r_npi: key_pins {
+ pins = "PL3";
+ function = "gpio_in";
+ };
+};
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pa_pins>;
--
2.35.3

63
patch/kernel/archive/sunxi-6.4/patches.armbian/arm-dts-sun8i-h3-nanopi-duo2-enable-powerbutton-and-ethernet.patch Normal file
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@@ -0,0 +1,63 @@
From f6f0b76bcfcb1163e304c262207aeb714d16307b Mon Sep 17 00:00:00 2001
From: Gunjan Gupta <viraniac@gmail.com>
Date: Mon, 26 Jun 2023 13:29:46 +0000
Subject: [PATCH 1/2] ARM: dts: sun8i: nanopiduo2: Use key-0 as power button
The onboard button key-0 was not marked as power button. This meant
that once the board was suspended, there was no way to bring it back
to life. Mark key-0 as power button so that it can be used to bring
the board back to life
---
arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts
index 343b02b97..4878d27ba 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts
@@ -42,8 +42,9 @@ gpio-keys {
key-0 {
label = "k1";
- linux,code = <BTN_0>;
+ linux,code = <KEY_POWER>;
gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; /* PL3 */
+ wakeup-source;
};
};
--
2.34.1
From 51af316406c82571be4a30665fbf93cab9caf080 Mon Sep 17 00:00:00 2001
From: Gunjan Gupta <viraniac@gmail.com>
Date: Mon, 26 Jun 2023 13:53:14 +0000
Subject: [PATCH 2/2] ARM: dts: sun8i: nanopiduo2: enable ethernet
NanoPi Duo2 has pinout for ethernet. Lets enable the same in dts
---
arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts
index 4878d27ba..8669fd087 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts
@@ -105,6 +105,13 @@ &ehci0 {
status = "okay";
};
+&emac {
+ phy-handle = <&int_mii_phy>;
+ phy-mode = "mii";
+ allwinner,leds-active-low;
+ status = "okay";
+};
+
&mmc0 {
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
--
2.34.1

33
patch/kernel/archive/sunxi-6.4/patches.armbian/arm-dts-sun8i-h3-orangepi-pc-plus-add-wifi_pwrseq.patch Normal file
View File

@@ -0,0 +1,33 @@
From dd1fd9fa33d92210223176a83f1a4d4b3ac27ec2 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 7 Feb 2022 19:01:59 +0300
Subject: [PATCH 137/153] arm:dts: sun8i-h3-orangepi-pc-plus add wifi_pwrseq
---
arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
index babf4cf1b..e1efbf1b1 100644
--- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
@@ -51,10 +51,16 @@ aliases {
/* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */
ethernet1 = &rtl8189ftv;
};
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 WIFI_EN */
+ };
};
&mmc1 {
vmmc-supply = <&reg_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
--
2.35.3

40
patch/kernel/archive/sunxi-6.4/patches.armbian/arm-dts-sun8i-r40-add-clk_out_a-fix-bananam2ultra.patch Normal file
View File

@@ -0,0 +1,40 @@
From d4670809cffff7aa7fdbeacc707a52cf792cbd5e Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Fri, 28 Jan 2022 15:01:30 +0300
Subject: [PATCH 066/153] arm:dts: sun8i-r40 add clk_out_a fix bananam2ultra
---
arch/arm/boot/dts/sun8i-r40.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
index 83562328b..74c20d840 100644
--- a/arch/arm/boot/dts/sun8i-r40.dtsi
+++ b/arch/arm/boot/dts/sun8i-r40.dtsi
@@ -75,6 +75,23 @@ osc32k: osc32k {
clock-accuracy = <20000>;
clock-output-names = "ext-osc32k";
};
+
+ osc24M_32k: clk@1 {
+ #clock-cells = <0>;
+ compatible = "fixed-factor-clock";
+ clock-div = <732>;
+ clock-mult = <1>;
+ clocks = <&osc24M>;
+ clock-output-names = "osc24M_32k";
+ };
+
+ clk_out_a: clk@01c201f0 {
+ #clock-cells = <0>;
+ compatible = "allwinner,sun7i-a20-out-clk";
+ reg = <0x01c201f0 0x4>;
+ clocks = <&osc24M_32k>, <&osc32k>, <&osc24M>;
+ clock-output-names = "clk_out_a";
+ };
};
cpus {
--
2.35.3

63
patch/kernel/archive/sunxi-6.4/patches.armbian/arm-dts-sun8i-r40-bananapi-m2-ultra-add-codec-analog.patch Normal file
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@@ -0,0 +1,63 @@
From 53633e58bb88c21117a0c18d009af3607a8dc340 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Tue, 25 Jan 2022 21:18:21 +0300
Subject: [PATCH 063/153] arm:dts: sun8i-r40 bananapi-m2-ultra add codec analog
---
.../boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 10 ++++++++++
arch/arm/boot/dts/sun8i-r40.dtsi | 18 ++++++++++++++++++
2 files changed, 28 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
index 3508633a8..ebb2bd322 100644
--- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
+++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
@@ -118,6 +118,16 @@ &cpu0 {
cpu-supply = <&reg_dcdc2>;
};
+&codec {
+ allwinner,audio-routing =
+ "Headphone", "HP",
+ "Headphone", "HPCOM",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ allwinner,codec-analog-controls = <&codec_analog>;
+ status = "okay";
+};
+
&de {
status = "okay";
};
diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
index f4c8e442a..83562328b 100644
--- a/arch/arm/boot/dts/sun8i-r40.dtsi
+++ b/arch/arm/boot/dts/sun8i-r40.dtsi
@@ -837,6 +837,24 @@ i2s2: i2s@1c22800 {
dma-names = "rx", "tx";
};
+ codec: codec@1c22c00 {
+ #sound-dai-cells = <1>;
+ compatible = "allwinner,sun8i-h3-codec";
+ reg = <0x01c22c00 0x300>;
+ interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_CODEC>;
+ clock-names = "apb", "codec";
+ resets = <&ccu RST_BUS_CODEC>;
+ dmas = <&dma 19>, <&dma 19>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
+ codec_analog: codec-analog@1c22f00 {
+ compatible = "allwinner,sun8i-a23-codec-analog";
+ reg = <0x01c22f00 0x4>;
+ };
+
ths: thermal-sensor@1c24c00 {
compatible = "allwinner,sun8i-r40-ths";
reg = <0x01c24c00 0x100>;
--
2.35.3

63
patch/kernel/archive/sunxi-6.4/patches.armbian/arm-dts-sun8i-v3s-s3-pinecube-enable-sound-codec.patch Normal file
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@@ -0,0 +1,63 @@
From 58a85447b472993ee155f2fc88c9914434c3ef42 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Fri, 28 Jan 2022 12:58:57 +0300
Subject: [PATCH 065/153] arm:dts: sun8i-v3s/s3-pinecube enable sound codec
---
arch/arm/boot/dts/sun8i-s3-pinecube.dts | 14 ++++++++++++++
arch/arm/boot/dts/sun8i-v3s.dtsi | 14 ++++++++++++++
2 files changed, 28 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-s3-pinecube.dts b/arch/arm/boot/dts/sun8i-s3-pinecube.dts
index 20966e954..773ad0503 100644
--- a/arch/arm/boot/dts/sun8i-s3-pinecube.dts
+++ b/arch/arm/boot/dts/sun8i-s3-pinecube.dts
@@ -58,6 +58,20 @@ wifi_pwrseq: wifi_pwrseq {
};
};
+
+&i2s0 {
+ status = "okay";
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Speaker", "LINEOUT",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ allwinner,pa-gpios = <&pio 6 6 GPIO_ACTIVE_HIGH>; /* PG6 */
+ status = "okay";
+};
+
&csi1 {
pinctrl-names = "default";
pinctrl-0 = <&csi1_8bit_pins>;
diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index db194c606..ede2203c9 100644
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
@@ -471,6 +471,20 @@ codec_analog: codec-analog@1c23000 {
reg = <0x01c23000 0x4>;
};
+
+ i2s0: i2s@1c22000 {
+ #sound-dai-cells = <0>;
+ compatible = "allwinner,sun8i-h3-i2s";
+ reg = <0x01c22000 0x400>;
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2S0>, <&ccu CLK_I2S0>;
+ clock-names = "apb", "mod";
+ dmas = <&dma 3>, <&dma 3>;
+ resets = <&ccu RST_BUS_I2S0>; /* TODO: Areset/sun8i-v3s-ccu says this isn't available on V3s */
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
uart0: serial@1c28000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28000 0x400>;
--
2.35.3

41
patch/kernel/archive/sunxi-6.4/patches.armbian/arm-dts-sun9i-a80-add-thermal-sensor.patch Normal file
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@@ -0,0 +1,41 @@
From 814789fb76bd21f25d0323dd08d253fa57de9367 Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Sat, 27 Jan 2018 21:30:16 +0100
Subject: [PATCH 052/153] arm:dts: sun9i-a80 add thermal sensor
As we have gained the support for the thermal sensor in A80,
we can now add its device nodes to the device tree.
The clocks and the resets are shared between the GPADC and the THS
sensor.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
arch/arm/boot/dts/sun9i-a80.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
index 7d3f3300f..14c68bdd1 100644
--- a/arch/arm/boot/dts/sun9i-a80.dtsi
+++ b/arch/arm/boot/dts/sun9i-a80.dtsi
@@ -941,6 +941,17 @@ ccu: clock@6000000 {
#reset-cells = <1>;
};
+ ths: thermal-sensor@6004C00 {
+ compatible = "allwinner,sun9i-a80-ths";
+ reg = <0x06004C00 0x100>;
+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_GPADC>, <&ccu CLK_GPADC>;
+ clock-names = "bus", "mod";
+ resets = <&ccu RST_BUS_GPADC>;
+ #thermal-sensor-cells = <1>;
+ #io-channel-cells = <0>;
+ };
+
timer@6000c00 {
compatible = "allwinner,sun4i-a10-timer";
reg = <0x06000c00 0xa0>;
--
2.35.3

54
patch/kernel/archive/sunxi-6.4/patches.armbian/arm-dts-sun9i-a80-add-thermal-zone.patch Normal file
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@@ -0,0 +1,54 @@
From 3683f0071790fbdef59a28d224fdf37a5f456bf5 Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Sat, 27 Jan 2018 21:39:09 +0100
Subject: [PATCH 053/153] arm:dts: sun9i-a80 add thermal zone
This patch adds the thermal zones to the A80.
Sensor 0 is located besides the big CPU, sensor 1 is located besides the
DRAM, sensor 2 is located besides the GPU and sensor 3 is located besides
the small CPU.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
arch/arm/boot/dts/sun9i-a80.dtsi | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
index 14c68bdd1..7b7260f0c 100644
--- a/arch/arm/boot/dts/sun9i-a80.dtsi
+++ b/arch/arm/boot/dts/sun9i-a80.dtsi
@@ -1261,4 +1261,30 @@ r_rsb: rsb@8003400 {
#size-cells = <0>;
};
};
+
+ thermal-zones {
+ cpu0_thermal: cpu0-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+ thermal-sensors = <&ths 0>;
+ };
+
+ dram_thermal: dram-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+ thermal-sensors = <&ths 1>;
+ };
+
+ gpu_thermal: gpu-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+ thermal-sensors = <&ths 2>;
+ };
+
+ cpu2_thermal: cpu2-thermal {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+ thermal-sensors = <&ths 3>;
+ };
+ };
};
--
2.35.3

33
patch/kernel/archive/sunxi-6.4/patches.armbian/arm-dts-sunxi-h3-h5.dtsi-add-i2s0-i2s1-pins.patch Normal file
View File

@@ -0,0 +1,33 @@
From 9c674891827958c0c164dab3d91b296010e0ca0a Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Tue, 1 Feb 2022 19:43:08 +0300
Subject: [PATCH 117/153] arm:dts:sunxi-h3-h5.dtsi add i2s0 i2s1 pins
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index 5e0b09df9..eb2cf602e 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -464,6 +464,16 @@ i2c2_pins: i2c2-pins {
function = "i2c2";
};
+ i2s0_pins: i2s0-pins {
+ pins = "PA18", "PA19", "PA20", "PA21";
+ function = "i2s0";
+ };
+
+ i2s1_pins: i2s1-pins {
+ pins = "PG10", "PG11", "PG12", "PG13";
+ function = "i2s1";
+ };
+
mmc0_pins: mmc0-pins {
pins = "PF0", "PF1", "PF2", "PF3",
"PF4", "PF5";
--
2.35.3

24
patch/kernel/archive/sunxi-6.4/patches.armbian/arm-dts-sunxi-h3-h5.dtsi-force-mmc0-bus-width.patch Normal file
View File

@@ -0,0 +1,24 @@
From bddb274d7e7c642c2e98420e5f8486c313411fa3 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Fri, 28 Jan 2022 16:12:37 +0300
Subject: [PATCH 070/153] arm:dts: sunxi-h3-h5.dtsi force mmc0 bus-width
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index d8692f16f..5e0b09df9 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -221,6 +221,7 @@ mmc0: mmc@1c0f000 {
resets = <&ccu RST_BUS_MMC0>;
reset-names = "ahb";
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
+ bus-width = <0x4>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
--
2.35.3

429
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-Add-sun50i-h5-nanopi-k1-plus-device.patch Normal file
View File

@@ -0,0 +1,429 @@
From 9329c25edf0b747ca66d035e7512491fdd0bc0e5 Mon Sep 17 00:00:00 2001
From: wuweidong <625769020@qq.com>
Date: Mon, 27 Nov 2017 10:23:51 +0800
Subject: [PATCH 088/153] arm64:dts: Add sun50i-h5-nanopi-k1-plus device
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../allwinner/sun50i-h5-nanopi-k1-plus.dts | 396 ++++++++++++++++++
2 files changed, 397 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-k1-plus.dts
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index cb5c98979..2fb04993e 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -28,6 +28,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-r1s-h5.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-k1-plus.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-k1-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-k1-plus.dts
new file mode 100644
index 000000000..b7045a9ef
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-k1-plus.dts
@@ -0,0 +1,396 @@
+/*
+ * Copyright (C) 2016 ARM Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "FriendlyElec NanoPi K1 Plus";
+ compatible = "friendlyelec,nanopi-k1-plus", "allwinner,sun50i-h5";
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ status {
+ label = "nanopi:green:status";
+ gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ pwr {
+ label = "nanopi:red:pwr";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+
+ };
+
+ r-gpio-keys {
+ compatible = "gpio-keys";
+
+ sw4 {
+ label = "sw4";
+ linux,code = <BTN_0>;
+ gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gmac_power_pin_nanopi>;
+ regulator-name = "gmac-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100000>;
+ enable-active-high;
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+ };
+
+ reg_usb0_vbus: usb0-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb0-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
+ status = "okay";
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_en_npi>;
+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+ post-power-on-delay-ms = <200>;
+ };
+
+ rfkill_bt {
+ compatible = "rfkill-gpio";
+ pinctrl-names = "default";
+ pinctrl-0 = <&bt_pwr_pin>;
+ reset-gpios = <&pio 6 13 GPIO_ACTIVE_HIGH>; /* PG13 */
+ clocks = <&osc32k>;
+ clock-frequency = <32768>;
+ rfkill-name = "sunxi-bt";
+ rfkill-type = "bluetooth";
+ };
+
+ pcm5102a: pcm5102a-codec {
+ #sound-dai-cells = <0>;
+ compatible = "ti,pcm5102a";
+ status = "disabled";
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&reg_vdd_cpux>;
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Line Out", "LINEOUT",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ status = "okay";
+};
+
+&de {
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&external_mdio {
+ ext_rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <0>;
+ };
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <&reg_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii-id";
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ allwinner,leds-active-low;
+ status = "okay";
+};
+
+&ir {
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_ir_rx_pin>;
+ status = "okay";
+};
+
+&mmc0 {
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <&reg_vcc3v3>;
+ vqmmc-supply = <&reg_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+ brcmf: bcrmf@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ };
+};
+
+&mmc2 {
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ boot_device = <0>;
+ status = "okay";
+};
+
+&mmc2_8bit_pins {
+ /* Increase drive strength for DDR modes */
+ drive-strength = <40>;
+ /* eMMC is missing pull-ups */
+ bias-pull-up;
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+
+&pio {
+ leds_npi: led_pins@0 {
+ pins = "PA10";
+ function = "gpio_out";
+ };
+ gmac_power_pin_nanopi: gmac_power_pin@0 {
+ pins = "PD6";
+ function = "gpio_out";
+ };
+ bt_pwr_pin: bt_pwr_pin@0 {
+ pins = "PG13";
+ function = "gpio_out";
+ };
+ spi0_cs_pins: spi0_cs_pins {
+ pins = "PC3", "PA6";
+ function = "gpio_out";
+ };
+};
+&r_pio {
+ leds_r_npi: led_pins@0 {
+ pins = "PL10";
+ function = "gpio_out";
+ };
+ vdd_cpux_r_npi: regulator_pins@0 {
+ allwinner,pins = "PL6";
+ allwinner,function = "gpio_out";
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
+ };
+ wifi_en_npi: wifi_en_pin {
+ pins = "PL7";
+ function = "gpio_out";
+ };
+};
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ohci2 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+
+&r_i2c {
+ status = "okay";
+ reg_vdd_cpux: regulator@65 {
+ compatible = "silergy,sy8106a";
+ reg = <0x65>;
+ regulator-name = "vdd-cpux";
+ silergy,fixed-microvolt = <1200000>;
+ /*
+ * The datasheet uses 1.1V as the minimum value of VDD-CPUX,
+ * however both the Armbian DVFS table and the official one
+ * have operating points with voltage under 1.1V, and both
+ * DVFS table are known to work properly at the lowest
+ * operating point.
+ *
+ * Use 1.0V as the minimum voltage instead.
+ */
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-ramp-delay = <200>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+};
+
+&spi0 {
+ status = "okay";
+ spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "jedec,spi-nor";
+ reg = <0>; /* Chip select 0 */
+ spi-max-frequency = <10000000>;
+ status = "okay";
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ partition@0 {
+ label = "uboot";
+ reg = <0x0 0x100000>;
+ };
+ partition@100000 {
+ label = "env";
+ reg = <0x100000 0x100000>;
+ };
+ };
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>;
+ status = "disabled";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2_pins>;
+ status = "disabled";
+};
+
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart3_pins>, <&uart3_rts_cts_pins>;
+ status = "okay";
+};
+&usb_otg {
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&usbphy {
+ /* USB Type-A ports' VBUS is always on */
+ usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+ usb0_vbus-supply = <&reg_usb0_vbus>;
+ status = "okay";
+};
+
+&i2s0 {
+ sound-dai = <&pcm5102a>;
+ status = "disabled";
+};
\ No newline at end of file
--
2.35.3

272
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-Add-sun50i-h5-nanopi-m1-plus2-device.patch Normal file
View File

@@ -0,0 +1,272 @@
From cd587033bd92dcb45b04f99dea2bf502a1ebd19e Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 18:54:36 +0300
Subject: [PATCH 091/153] arm64:dts: Add sun50i-h5-nanopi-m1-plus2 device
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../allwinner/sun50i-h5-nanopi-m1-plus2.dts | 240 ++++++++++++++++++
2 files changed, 241 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-m1-plus2.dts
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 47e87b4f9..2fd4e07cb 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -31,6 +31,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-core2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-r1s-h5.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-k1-plus.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-m1-plus2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-prime.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-zero-plus2.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-m1-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-m1-plus2.dts
new file mode 100644
index 000000000..d051382cc
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-m1-plus2.dts
@@ -0,0 +1,240 @@
+/*
+ * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
+ * Copyright (C) 2017 Armbian
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "FriendlyARM Nanopi M1 Plus 2";
+ compatible = "friendlyarm,nanopi-neo2", "allwinner,sun50i-h5";
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ pwr {
+ label = "nanopi:green:pwr";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
+ default-state = "on";
+ };
+
+ status {
+ label = "nanopi:blue:status";
+ gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "gmac-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100000>;
+ enable-active-high;
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+ };
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ reg_usb0_vbus: usb0-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb0-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
+ status = "okay";
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+ post-power-on-delay-ms = <50>;
+ };
+
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&ehci2 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <&reg_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii";
+ status = "okay";
+};
+
+&mdio {
+ ext_rgmii_phy: ethernet-phy@7 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <7>;
+ };
+};
+
+&mmc0 {
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <&reg_vcc3v3>;
+ vqmmc-supply = <&reg_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ brcmf: brcmf@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ interrupt-parent = <&pio>;
+ interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 */
+ interrupt-names = "host-wake";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wifi_wake>;
+ };
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
+
+&de {
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&ohci2 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&hdmi {
+ status = "okay";
+};
+
+&mixer0 {
+ status = "okay";
+};
+
+&r_pio {
+ wifi_wake: wifi_wake@0 {
+ pins = "PL7";
+ function = "irq";
+ bias-pull-up;
+ };
+};
+
+&tcon0 {
+ status = "okay";
+};
+
+&r_i2c {
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "peripheral";
+ status = "okay";
+};
+
+&usbphy {
+ /* USB Type-A port's VBUS is always on */
+ usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+ usb0_vbus-supply = <&reg_usb0_vbus>;
+ status = "okay";
+};
--
2.35.3

242
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-Add-sun50i-h5-nanopi-neo-core2-device.patch Normal file
View File

@@ -0,0 +1,242 @@
From 9d5d85b7c307587b90748650ca811838e0f6c7ab Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 18:43:42 +0300
Subject: [PATCH 089/153] arm64:dts: Add sun50i-h5-nanopi-neo-core2 device
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../allwinner/sun50i-h5-nanopi-neo-core2.dts | 210 ++++++++++++++++++
2 files changed, 211 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-core2.dts
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 2fb04993e..f3c793236 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -26,6 +26,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-libretech-all-h3-it.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-libretech-all-h5-cc.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-core2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-r1s-h5.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-orangepi-pc2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-k1-plus.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-core2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-core2.dts
new file mode 100644
index 000000000..57283cc16
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-core2.dts
@@ -0,0 +1,210 @@
+/*
+ * Copyright (C) 2017 Antony Antony <antony@phenome.org>
+ * Copyright (C) 2016 ARM Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
+
+/ {
+ model = "FriendlyARM NanoPi NEO Core2";
+ compatible = "friendlyarm,nanopi-neo-core2", "allwinner,sun50i-h5";
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ pwr {
+ label = "nanopi:red:pwr";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
+ linux,default-trigger = "default-on";
+ };
+
+ status {
+ label = "nanopi:green:status";
+ gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ regulator-name = "gmac-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100000>;
+ enable-active-high;
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+ };
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+ post-power-on-delay-ms = <200>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_cpux>;
+};
+
+&codec {
+ allwinner,audio-routing =
+ "Line Out", "LINEOUT",
+ "MIC1", "Mic",
+ "Mic", "MBIAS";
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <&reg_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii-id";
+ status = "okay";
+};
+
+&external_mdio {
+ ext_rgmii_phy: ethernet-phy@7 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <7>;
+ };
+};
+
+&mmc0 {
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&mmc1 {
+ vmmc-supply = <&reg_vcc3v3>;
+ vqmmc-supply = <&reg_vcc3v3>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ brcmf: wifi@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ };
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_8bit_pins>;
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&r_i2c {
+ status = "okay";
+
+ vdd_cpux: regulator@65 {
+ compatible = "silergy,sy8106a";
+ reg = <0x65>;
+ silergy,fixed-microvolt = <1000000>;
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-ramp-delay = <200>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&usbphy {
+ /* USB Type-A ports' VBUS is always on */
+ status = "okay";
+};
--
2.35.3

212
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-Add-sun50i-h5-nanopi-neo2-v1.1-device.patch Normal file
View File

@@ -0,0 +1,212 @@
From 71a8be5024f0474195d647872d7f7db1c0417336 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 18:49:55 +0300
Subject: [PATCH 090/153] arm64:dts: Add sun50i-h5-nanopi-neo2-v1.1 device
---
arch/arm64/boot/dts/allwinner/Makefile | 1 +
.../allwinner/sun50i-h5-nanopi-neo2-v1.1.dts | 180 ++++++++++++++++++
2 files changed, 181 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2-v1.1.dts
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index f3c793236..47e87b4f9 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -25,6 +25,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-libretech-all-h3-cc.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-libretech-all-h3-it.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-libretech-all-h5-cc.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo2-v1.1.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-plus2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-neo-core2.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h5-nanopi-r1s-h5.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2-v1.1.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2-v1.1.dts
new file mode 100644
index 000000000..06ffbbd29
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2-v1.1.dts
@@ -0,0 +1,180 @@
+/*
+ * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This file is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This file is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "FriendlyARM NanoPi NEO 2";
+ compatible = "friendlyarm,nanopi-neo2", "allwinner,sun50i-h5";
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ pwr {
+ label = "nanopi:red:pwr";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
+ linux,default-trigger = "default-on";
+ };
+
+ status {
+ label = "nanopi:green:status";
+ gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
+ reg_gmac_3v3: gmac-3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "gmac-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <100000>;
+ enable-active-high;
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+ };
+
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ vdd_cpux: gpio-regulator {
+ compatible = "regulator-gpio";
+ pinctrl-names = "default";
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1300000 0x1>;
+ };
+
+ reg_usb0_vbus: usb0-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb0-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
+ status = "okay";
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&vdd_cpux>;
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci3 {
+ status = "okay";
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_rgmii_pins>;
+ phy-supply = <&reg_gmac_3v3>;
+ phy-handle = <&ext_rgmii_phy>;
+ phy-mode = "rgmii-id";
+ status = "okay";
+};
+
+&external_mdio {
+ ext_rgmii_phy: ethernet-phy@7 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <7>;
+ };
+};
+
+&mmc0 {
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <4>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci3 {
+ status = "okay";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pa_pins>;
+ status = "okay";
+};
+
+&usb_otg {
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&usbphy {
+ /* USB Type-A port's VBUS is always on */
+ usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+ usb0_vbus-supply = <&reg_usb0_vbus>;
+ status = "okay";
+};
--
2.35.3

100
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-FIXME-a64-olinuxino-add-regulator-audio-mmc.patch Normal file
View File

@@ -0,0 +1,100 @@
From 18a4dd7285608b834318f4df33401c6763d8104b Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 14:24:40 +0300
Subject: [PATCH 087/153] arm64:dts: FIXME: a64-olinuxino add regulator audio
mmc
Duplicate nodes appeared as a result of patching and this needs
to be fixed and tested on the board
---
.../dts/allwinner/sun50i-a64-olinuxino.dts | 46 +++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
index 21d0bdc28..636b64a1d 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts
@@ -52,6 +52,13 @@ reg_usb1_vbus: usb1-vbus {
status = "okay";
};
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
@@ -99,6 +106,10 @@ &ehci1 {
status = "okay";
};
+&mixer0 {
+ status = "okay";
+};
+
&emac {
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
@@ -159,6 +170,16 @@ rtl8723bs: wifi@1 {
};
};
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_pins>;
+ vmmc-supply = <&reg_vcc3v3>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
+
&ohci0 {
status = "okay";
};
@@ -184,6 +205,7 @@ &r_pio {
*/
};
+/* FIXME: Duplicate node */
&pio {
vcc-pa-supply = <&reg_dcdc1>;
vcc-pb-supply = <&reg_dcdc1>;
@@ -365,6 +387,30 @@ &sound_hdmi {
status = "okay";
};
+/* FIXME: Duplicate node
+ * &sound {
+ * status = "okay";
+ * simple-audio-card,widgets = "Microphone", "Internal Microphone Left",
+ * "Microphone", "Internal Microphone Right",
+ * "Headphone", "Headphone Jack";
+ * simple-audio-card,aux-devs = <&codec_analog>;
+ * simple-audio-card,routing =
+ * "Left DAC", "AIF1 Slot 0 Left",
+ * "Right DAC", "AIF1 Slot 0 Right",
+ * "INL", "LINEOUT",
+ * "INR", "LINEOUT",
+ * "Headphone Jack", "HP",
+ * "AIF1 Slot 0 Left ADC", "Left ADC",
+ * "AIF1 Slot 0 Right ADC", "Right ADC",
+ * "Left ADC", "ADC",
+ * "Right ADC", "ADC",
+ * "Internal Microphone Left", "MBIAS",
+ * "MIC1", "Internal Microphone Left",
+ * "Internal Microphone Right", "HBIAS",
+ * "MIC2", "Internal Microphone Right";
+ * };
+ */
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pb_pins>;
--
2.35.3

65
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-allwiner-sun50i-h616.dtsi-add-usb-ehci-ohc.patch Normal file
View File

@@ -0,0 +1,65 @@
From f27727fa124b3e428601614ee95ebe0dc7162f33 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Sun, 13 Nov 2022 23:15:38 +0300
Subject: [PATCH 075/153] arm64: dts: allwiner: sun50i-h616.dtsi: add
usb,ehci,ohci
---
arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
index 74aed0d23..44f8ae11c 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
@@ -58,12 +58,12 @@ reserved-memory {
ranges;
/*
- * 256 KiB reserved for Trusted Firmware-A (BL31).
+ * 512 KiB reserved for Trusted Firmware-A (BL31).
* This is added by BL31 itself, but some bootloaders fail
* to propagate this into the DTB handed to kernels.
*/
secmon@40000000 {
- reg = <0x0 0x40000000 0x0 0x40000>;
+ reg = <0x0 0x40000000 0x0 0x80000>;
no-map;
};
};
@@ -466,6 +466,8 @@ spi0: spi@5010000 {
clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>;
clock-names = "ahb", "mod";
resets = <&ccu RST_BUS_SPI0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pins>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
@@ -479,6 +481,8 @@ spi1: spi@5011000 {
clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>;
clock-names = "ahb", "mod";
resets = <&ccu RST_BUS_SPI1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi1_pins>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
@@ -688,11 +692,14 @@ r_ccu: clock@7010000 {
r_pio: pinctrl@7022000 {
compatible = "allwinner,sun50i-h616-r-pinctrl";
reg = <0x07022000 0x400>;
+ interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&r_ccu CLK_R_APB1>, <&osc24M>,
<&rtc CLK_OSC32K>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
#gpio-cells = <3>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
/omit-if-no-ref/
r_i2c_pins: r-i2c-pins {
--
2.35.3

41
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-allwinner-h616-Add-device-node-for-SID.patch Normal file
View File

@@ -0,0 +1,41 @@
From ce47f52be68065a1fa8e475775c94db5be1a251e Mon Sep 17 00:00:00 2001
From: Kali Prasad <kprasadvnsi@protonmail.com>
Date: Sun, 19 Sep 2021 13:30:08 +0530
Subject: [PATCH 082/153] arm64: dts: allwinner: h616: Add device node for SID
The device tree binding for H616's SID controller.
Signed-off-by: Kali Prasad <kprasadvnsi@protonmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
index 45359b0d3..7ad1982fb 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
@@ -171,6 +171,21 @@ ccu: clock@3001000 {
#reset-cells = <1>;
};
+ sid: efuse@3006000 {
+ compatible = "allwinner,sun50i-h616-sid";
+ reg = <0x03006000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpu_speed_grade: cpu-speed-grade@00 {
+ reg = <0x00 0x02>;
+ };
+
+ ths_calibration: thermal-sensor-calibration@14 {
+ reg = <0x14 0x8>;
+ };
+ };
+
watchdog: watchdog@30090a0 {
compatible = "allwinner,sun50i-h616-wdt",
"allwinner,sun6i-a31-wdt";
--
2.35.3

338
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-allwinner-h616-Add-efuse_xlate-cpu-frequency-scaling-v1_6_2.patch Normal file
View File

@@ -0,0 +1,338 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: AGM1968 <AGM1968@users.noreply.github.com>
Date: Tue, 23 May 2023 16:43:00 +0000
Subject: arm64-dts-allwinner-h616-Add-efuse_xlate-cpu-frequency-scaling-v1_6_2
arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi
arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
drivers/cpufreq/cpufreq-dt-platdev.c drivers/cpufreq/sun50i-cpufreq-nvmem.c
Signed-off-by: AGM1968 <AGM1968@users.noreply.github.com>
---
arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi | 75 ++++++++
arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts | 6 +
drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
drivers/cpufreq/sun50i-cpufreq-nvmem.c | 91 +++++++---
4 files changed, 149 insertions(+), 24 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi
new file mode 100644
index 000000000000..36f2950367c6
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi
@@ -0,0 +1,75 @@
+//SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+//Testing Version 1 from: AGM1968 <AGM1968@users.noreply.github.com>
+//Noted: PLL_CPUX = 24 MHz*N/P (WIP)
+
+/ {
+ cpu_opp_table: opp-table-cpu {
+ compatible = "allwinner,sun50i-h616-operating-points";
+ nvmem-cells = <&cpu_speed_grade>;
+ opp-shared;
+
+ opp-480000000 {
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ opp-hz = /bits/ 64 <480000000>;
+ opp-microvolt-speed0 = <820000 820000 1100000>;
+ opp-microvolt-speed1 = <880000 880000 1100000>;
+ opp-microvolt-speed2 = <880000 880000 1100000>;
+ };
+
+ opp-600000000 {
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt-speed0 = <820000 820000 1100000>;
+ opp-microvolt-speed1 = <880000 880000 1100000>;
+ opp-microvolt-speed2 = <880000 880000 1100000>;
+ };
+
+ opp-792000000 {
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ opp-hz = /bits/ 64 <792000000>;
+ opp-microvolt-speed0 = <860000 860000 1100000>;
+ opp-microvolt-speed1 = <940000 940000 1100000>;
+ opp-microvolt-speed2 = <940000 940000 1100000>;
+ };
+
+ opp-1008000000 {
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt-speed0 = <900000 900000 1100000>;
+ opp-microvolt-speed1 = <1020000 1020000 1100000>;
+ opp-microvolt-speed2 = <1020000 1020000 1100000>;
+ };
+
+ opp-1200000000 {
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt-speed0 = <960000 960000 1100000>;
+ opp-microvolt-speed1 = <1100000 1100000 1100000>;
+ opp-microvolt-speed2 = <1100000 1100000 1100000>;
+ };
+
+ opp-1512000000 {
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ opp-hz = /bits/ 64 <1512000000>;
+ opp-microvolt-speed0 = <1100000 1100000 1100000>;
+ opp-microvolt-speed1 = <1100000 1100000 1100000>;
+ opp-microvolt-speed2 = <1100000 1100000 1100000>;
+ };
+ };
+};
+
+&cpu0 {
+ operating-points-v2 = <&cpu_opp_table>;
+};
+
+&cpu1 {
+ operating-points-v2 = <&cpu_opp_table>;
+};
+
+&cpu2 {
+ operating-points-v2 = <&cpu_opp_table>;
+};
+
+&cpu3 {
+ operating-points-v2 = <&cpu_opp_table>;
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
index 0a24b8571a50..defb8b71f872 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
@@ -4,10 +4,11 @@
*/
/dts-v1/;
#include "sun50i-h616.dtsi"
+#include "sun50i-h616-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/leds/common.h>
@@ -216,10 +217,15 @@ &pio {
vcc-pg-supply = <&reg_bldo1>;
vcc-ph-supply = <&reg_aldo1>;
vcc-pi-supply = <&reg_aldo1>;
};
+&cpu0 {
+ cpu-supply = <&reg_dcdca>;
+ status = "okay";
+};
+
&spi0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>;
diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c
index e85703651098..e4fa483c8a84 100644
--- a/drivers/cpufreq/cpufreq-dt-platdev.c
+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
@@ -100,10 +100,11 @@ static const struct of_device_id allowlist[] __initconst = {
* Machines for which the cpufreq device is *not* created, mostly used for
* platforms using "operating-points-v2" property.
*/
static const struct of_device_id blocklist[] __initconst = {
{ .compatible = "allwinner,sun50i-h6", },
+ { .compatible = "allwinner,sun50i-h616", },
{ .compatible = "apple,arm-platform", },
{ .compatible = "arm,vexpress", },
diff --git a/drivers/cpufreq/sun50i-cpufreq-nvmem.c b/drivers/cpufreq/sun50i-cpufreq-nvmem.c
index 1acec58c33c3..f8d5c30e56d0 100644
--- a/drivers/cpufreq/sun50i-cpufreq-nvmem.c
+++ b/drivers/cpufreq/sun50i-cpufreq-nvmem.c
@@ -4,10 +4,13 @@
*
* The sun50i-cpufreq-nvmem driver reads the efuse value from the SoC to
* provide the OPP framework with required information.
*
* Copyright (C) 2019 Yangtao Li <tiny.windzz@gmail.com>
+ *
+ * ADD efuse_xlate to extract SoC version so that h6 and h616 can coexist.
+ * Version 1 AGM1968 <AGM1968@users.noreply.github.com>
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/module.h>
@@ -17,41 +20,77 @@
#include <linux/pm_opp.h>
#include <linux/slab.h>
#define MAX_NAME_LEN 7
-#define NVMEM_MASK 0x7
-#define NVMEM_SHIFT 5
+#define SUN50I_H616_NVMEM_MASK 0x22
+#define SUN50I_H616_NVMEM_SHIFT 5
+#define SUN50I_H6_NVMEM_MASK 0x7
+#define SUN50I_H6_NVMEM_SHIFT 5
+
+struct sunxi_cpufreq_soc_data {
+ u32 (*efuse_xlate) (void *efuse);
+};
static struct platform_device *cpufreq_dt_pdev, *sun50i_cpufreq_pdev;
+static u32 sun50i_h616_efuse_xlate(void *efuse)
+{
+ u32 efuse_value = (*(u32 *)efuse >> SUN50I_H616_NVMEM_SHIFT) &
+ SUN50I_H616_NVMEM_MASK;
+
+ /* Tested as V1 h616 soc. Expected efuse values are 1 - 3,
+ slowest to fastest */
+ if (efuse_value >=1 && efuse_value <= 3)
+ return efuse_value - 1;
+ else
+ return 0;
+};
+
+static u32 sun50i_h6_efuse_xlate(void *efuse)
+{
+ u32 efuse_value = (*(u32 *)efuse >> SUN50I_H6_NVMEM_SHIFT) &
+ SUN50I_H6_NVMEM_MASK;
+
+ /*
+ * We treat unexpected efuse values as if the SoC was from
+ * the slowest bin. Expected efuse values are 1 - 3, slowest
+ * to fastest.
+ */
+ if (efuse_value >= 1 && efuse_value <= 3)
+ return efuse_value - 1;
+ else
+ return 0;
+};
+
+
/**
* sun50i_cpufreq_get_efuse() - Determine speed grade from efuse value
+ * @soc_data: pointer to sunxi_cpufreq_soc_data context
* @versions: Set to the value parsed from efuse
*
* Returns 0 if success.
*/
-static int sun50i_cpufreq_get_efuse(u32 *versions)
+static int sun50i_cpufreq_get_efuse(const struct sunxi_cpufreq_soc_data *soc_data,
+ u32 *versions)
{
struct nvmem_cell *speedbin_nvmem;
struct device_node *np;
struct device *cpu_dev;
- u32 *speedbin, efuse_value;
+ u32 *speedbin;
size_t len;
- int ret;
cpu_dev = get_cpu_device(0);
if (!cpu_dev)
return -ENODEV;
np = dev_pm_opp_of_get_opp_desc_node(cpu_dev);
if (!np)
return -ENOENT;
-
- ret = of_device_is_compatible(np,
- "allwinner,sun50i-h6-operating-points");
- if (!ret) {
+ if (of_device_is_compatible(np, "allwinner,sun50i-h6-operating-points")) {}
+ else if (of_device_is_compatible(np, "allwinner,sun50i-h616-operating-points")) {}
+ else {
of_node_put(np);
return -ENOENT;
}
speedbin_nvmem = of_nvmem_cell_get(np, NULL);
@@ -63,40 +102,35 @@ static int sun50i_cpufreq_get_efuse(u32 *versions)
speedbin = nvmem_cell_read(speedbin_nvmem, &len);
nvmem_cell_put(speedbin_nvmem);
if (IS_ERR(speedbin))
return PTR_ERR(speedbin);
- efuse_value = (*speedbin >> NVMEM_SHIFT) & NVMEM_MASK;
-
- /*
- * We treat unexpected efuse values as if the SoC was from
- * the slowest bin. Expected efuse values are 1-3, slowest
- * to fastest.
- */
- if (efuse_value >= 1 && efuse_value <= 3)
- *versions = efuse_value - 1;
- else
- *versions = 0;
+ *versions = soc_data->efuse_xlate(speedbin);
kfree(speedbin);
return 0;
};
static int sun50i_cpufreq_nvmem_probe(struct platform_device *pdev)
{
+ const struct of_device_id *match;
int *opp_tokens;
char name[MAX_NAME_LEN];
unsigned int cpu;
u32 speed = 0;
int ret;
+ match = dev_get_platdata(&pdev->dev);
+ if (!match)
+ return -EINVAL;
+
opp_tokens = kcalloc(num_possible_cpus(), sizeof(*opp_tokens),
GFP_KERNEL);
if (!opp_tokens)
return -ENOMEM;
- ret = sun50i_cpufreq_get_efuse(&speed);
+ ret = sun50i_cpufreq_get_efuse(match-> data, &speed);
if (ret) {
kfree(opp_tokens);
return ret;
}
@@ -158,12 +192,21 @@ static struct platform_driver sun50i_cpufreq_driver = {
.driver = {
.name = "sun50i-cpufreq-nvmem",
},
};
+static const struct sunxi_cpufreq_soc_data sun50i_h616_data = {
+ .efuse_xlate = sun50i_h616_efuse_xlate,
+};
+
+static const struct sunxi_cpufreq_soc_data sun50i_h6_data = {
+ .efuse_xlate = sun50i_h6_efuse_xlate,
+};
+
static const struct of_device_id sun50i_cpufreq_match_list[] = {
- { .compatible = "allwinner,sun50i-h6" },
+ { .compatible = "allwinner,sun50i-h6", .data = &sun50i_h6_data },
+ { .compatible = "allwinner,sun50i-h616", .data = &sun50i_h616_data },
{}
};
MODULE_DEVICE_TABLE(of, sun50i_cpufreq_match_list);
static const struct of_device_id *sun50i_cpufreq_match_node(void)
@@ -195,12 +238,12 @@ static int __init sun50i_cpufreq_init(void)
ret = platform_driver_register(&sun50i_cpufreq_driver);
if (unlikely(ret < 0))
return ret;
sun50i_cpufreq_pdev =
- platform_device_register_simple("sun50i-cpufreq-nvmem",
- -1, NULL, 0);
+ platform_device_register_data(NULL,
+ "sun50i-cpufreq-nvmem", -1, match, sizeof(*match));
ret = PTR_ERR_OR_ZERO(sun50i_cpufreq_pdev);
if (ret == 0)
return 0;
platform_driver_unregister(&sun50i_cpufreq_driver);
--
Created with Armbian build tools https://github.com/armbian/build

136
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-allwinner-h616-Add-thermal-sensor-and-thermal-zones.patch Normal file
View File

@@ -0,0 +1,136 @@
From 25511473332b2d43309b707be5c2970a5b9a4efd Mon Sep 17 00:00:00 2001
From: Kali Prasad <kprasadvnsi@protonmail.com>
Date: Sun, 19 Sep 2021 13:38:20 +0530
Subject: [PATCH 083/153] arm64: dts: allwinner: h616: Add thermal sensor and
thermal zones
There are four sensors, CPU, GPU, VE, and DDR.
Signed-off-by: Kali Prasad <kprasadvnsi@protonmail.com>
---
.../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 75 +++++++++++++++++++
1 file changed, 75 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
index 7ad1982fb..8628a9e3d 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
@@ -9,6 +9,7 @@
#include <dt-bindings/clock/sun6i-rtc.h>
#include <dt-bindings/reset/sun50i-h616-ccu.h>
#include <dt-bindings/reset/sun50i-h6-r-ccu.h>
+#include <dt-bindings/thermal/thermal.h>
/ {
interrupt-parent = <&gic>;
@@ -25,6 +26,8 @@ cpu0: cpu@0 {
reg = <0>;
enable-method = "psci";
clocks = <&ccu CLK_CPUX>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ #cooling-cells = <2>;
};
cpu1: cpu@1 {
@@ -33,6 +36,8 @@ cpu1: cpu@1 {
reg = <1>;
enable-method = "psci";
clocks = <&ccu CLK_CPUX>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ #cooling-cells = <2>;
};
cpu2: cpu@2 {
@@ -41,6 +46,8 @@ cpu2: cpu@2 {
reg = <2>;
enable-method = "psci";
clocks = <&ccu CLK_CPUX>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ #cooling-cells = <2>;
};
cpu3: cpu@3 {
@@ -49,6 +56,8 @@ cpu3: cpu@3 {
reg = <3>;
enable-method = "psci";
clocks = <&ccu CLK_CPUX>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ #cooling-cells = <2>;
};
};
@@ -833,5 +842,71 @@ r_rsb: rsb@7083000 {
#address-cells = <1>;
#size-cells = <0>;
};
+
+ ths: thermal-sensor@5070400 {
+ compatible = "allwinner,sun50i-h616-ths";
+ reg = <0x05070400 0x400>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_THS>;
+ clock-names = "bus";
+ resets = <&ccu RST_BUS_THS>;
+ nvmem-cells = <&ths_calibration>;
+ nvmem-cell-names = "calibration";
+ #thermal-sensor-cells = <1>;
+ };
+ };
+
+ thermal-zones {
+ cpu-thermal {
+ polling-delay-passive = <500>;
+ polling-delay = <1000>;
+ thermal-sensors = <&ths 2>;
+ sustainable-power = <1000>;
+ k_po = <20>;
+ k_pu = <40>;
+ k_i = <0>;
+
+ trips {
+ cpu_threshold: trip-point@0 {
+ temperature = <60000>;
+ type = "passive";
+ hysteresis = <0>;
+ };
+ cpu_target: trip-point@1 {
+ temperature = <70000>;
+ type = "passive";
+ hysteresis = <0>;
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&cpu_target>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+
+ gpu-thermal {
+ polling-delay-passive = <500>;
+ polling-delay = <1000>;
+ thermal-sensors = <&ths 0>;
+ sustainable-power = <1100>;
+ };
+
+ ve-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&ths 1>;
+ };
+
+ ddr-thermal {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&ths 3>;
+ };
};
};
--
2.35.3

82
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-allwinner-h616-Fix-thermal-zones-missing-trips.patch Normal file
View File

@@ -0,0 +1,82 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Micha=C5=82=20Dzieko=C5=84ski?=
<michal.dziekonski+github@gmail.com>
Date: Wed, 3 May 2023 12:17:28 +0000
Subject: arm64: dts: allwinner: h616: Fix thermal zones (add missing trips)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Signed-off-by: Michał Dziekoński <michal.dziekonski+github@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 29 ++++++++++
1 file changed, 29 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
index 8628a9e3d..17b13d319 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
@@ -875,10 +875,15 @@ cpu_threshold: trip-point@0 {
cpu_target: trip-point@1 {
temperature = <70000>;
type = "passive";
hysteresis = <0>;
};
+ cpu_temp_critical: trip-point@2 {
+ temperature = <110000>;
+ type = "critical";
+ hysteresis = <0>;
+ };
};
cooling-maps {
map0 {
trip = <&cpu_target>;
@@ -893,20 +898,44 @@ map0 {
gpu-thermal {
polling-delay-passive = <500>;
polling-delay = <1000>;
thermal-sensors = <&ths 0>;
sustainable-power = <1100>;
+
+ trips {
+ gpu_temp_critical: trip-point@0 {
+ temperature = <110000>;
+ type = "critical";
+ hysteresis = <0>;
+ };
+ };
};
ve-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ths 1>;
+
+ trips {
+ ve_temp_critical: trip-point@0 {
+ temperature = <110000>;
+ type = "critical";
+ hysteresis = <0>;
+ };
+ };
};
ddr-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ths 3>;
+
+ trips {
+ ddr_temp_critical: trip-point@0 {
+ temperature = <110000>;
+ type = "critical";
+ hysteresis = <0>;
+ };
+ };
};
};
};
--
Created with Armbian build tools https://github.com/armbian/build

39
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-allwinner-h616-LED-green_power_on-red_status_heartbeat.patch Normal file
View File

@@ -0,0 +1,39 @@
From e88d105d8051a8f90e6103969858debf7a0946eb Mon Sep 17 00:00:00 2001
From: AGM1968 <AGM1968@users.noreply.github.com>
Date: Wed, 31 May 2023 08:12:00 +0000
Subject: [PATCH] LED-green_power_on-red_status_heartbeat
arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
Signed-off-by: AGM1968 <AGM1968@users.noreply.github.com>
---
.../boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
index defb8b71f872..ddb5e387d1f4 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
@@ -29,16 +29,17 @@ leds {
compatible = "gpio-leds";
led-0 {
- function = LED_FUNCTION_POWER;
+ function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_RED>;
gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */
- default-state = "on";
+ linux,default-trigger = "heartbeat";
};
led-1 {
- function = LED_FUNCTION_STATUS;
+ function = LED_FUNCTION_POWER;
color = <LED_COLOR_ID_GREEN>;
gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */
+ default-state = "on";
};
};
--
2.34.1

41
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-allwinner-h616-orangepi-zero2-Enable-expansion-board-USB-ports.patch Normal file
View File

@@ -0,0 +1,41 @@
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Micha=C5=82=20Dzieko=C5=84ski?=
<michal.dziekonski+github@gmail.com>
Date: Sun, 28 May 2023 00:26:43 +0000
Subject: arm64: dts: allwinner: h616 orangepi zero2: Enable expansion board
USB ports
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Signed-off-by: Michał Dziekoński <michal.dziekonski+github@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
index b78941d29..565cd51e2 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts
@@ -64,10 +64,19 @@ reg_usb1_vbus: usb1-vbus {
&ehci1 {
status = "okay";
};
+
+/* USB 2 & 3 are on headers used by expansion board */
+&ehci2 {
+ status = "okay";
+};
+&ehci3 {
+ status = "okay";
+};
+
&gpu {
mali-supply = <&reg_dcdcc>;
status = "okay";
};
--
Created with Armbian build tools https://github.com/armbian/build

2471
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-allwinner-overlay-Add-Overlays-for-sunxi64.patch Normal file
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File diff suppressed because it is too large Load Diff

26
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-allwinner-sun50i-h6-Fix-H6-emmc.patch Normal file
View File

@@ -0,0 +1,26 @@
From 5687615bc7367de46448b94afa29c4590fc009ce Mon Sep 17 00:00:00 2001
From: Ukhellfire <afaulkner420@gmail.com>
Date: Fri, 25 Mar 2022 07:10:57 +0000
Subject: [PATCH 148/153] arm64: dts/allwinner/sun50i-h6: Fix H6 emmc
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index ed54c2c11..6d09fa021 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -612,8 +612,7 @@ mmc1: mmc@4021000 {
};
mmc2: mmc@4022000 {
- compatible = "allwinner,sun50i-h6-emmc",
- "allwinner,sun50i-a64-emmc";
+ compatible = "allwinner,sun50i-h6-emmc";
reg = <0x04022000 0x1000>;
clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
clock-names = "ahb", "mmc";
--
2.35.3

38
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-allwinner-sun50i-h616-Add-GPU-node.patch Normal file
View File

@@ -0,0 +1,38 @@
From 47783d3af85fbbd13bc02c3d830ced631e4a9d75 Mon Sep 17 00:00:00 2001
From: Jernej Skrabec <jernej.skrabec@gmail.com>
Date: Fri, 15 Oct 2021 21:07:46 +0200
Subject: [PATCH 077/153] arm64:dts: allwinner: sun50i-h616 Add GPU node
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
index 44f8ae11c..26ef79c5d 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
@@ -108,6 +108,20 @@ soc {
#size-cells = <1>;
ranges = <0x0 0x0 0x0 0x40000000>;
+ gpu: gpu@1800000 {
+ compatible = "allwinner,sun50i-h616-mali",
+ "arm,mali-bifrost";
+ reg = <0x1800000 0x40000>;
+ interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "job", "mmu", "gpu";
+ clocks = <&ccu CLK_GPU0>, <&ccu CLK_BUS_GPU>;
+ clock-names = "core", "bus";
+ resets = <&ccu RST_BUS_GPU>;
+ status = "disabled";
+ };
+
syscon: syscon@3000000 {
compatible = "allwinner,sun50i-h616-system-control";
reg = <0x03000000 0x1000>;
--
2.35.3

55
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-allwinner-sun50i-h616-Add-VPU-node.patch Normal file
View File

@@ -0,0 +1,55 @@
From 45ab614d69593ab4cbcbca83ccefd16102749e49 Mon Sep 17 00:00:00 2001
From: Jernej Skrabec <jernej.skrabec@gmail.com>
Date: Fri, 15 Oct 2021 21:14:55 +0200
Subject: [PATCH 079/153] arm64:dts:allwinner: sun50i-h616 Add VPU node
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
---
.../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 24 +++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
index 26ef79c5d..944ff2747 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
@@ -122,6 +122,17 @@ gpu: gpu@1800000 {
status = "disabled";
};
+ video-codec@1c0e000 {
+ compatible = "allwinner,sun50i-h616-video-engine";
+ reg = <0x01c0e000 0x2000>;
+ clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
+ <&ccu CLK_MBUS_VE>;
+ clock-names = "ahb", "mod", "ram";
+ resets = <&ccu RST_BUS_VE>;
+ interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
+ allwinner,sram = <&ve_sram 1>;
+ };
+
syscon: syscon@3000000 {
compatible = "allwinner,sun50i-h616-system-control";
reg = <0x03000000 0x1000>;
@@ -136,6 +147,19 @@ sram_c: sram@28000 {
#size-cells = <1>;
ranges = <0 0x00028000 0x30000>;
};
+
+ sram_c1: sram@1a00000 {
+ compatible = "mmio-sram";
+ reg = <0x01a00000 0x200000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x01a00000 0x200000>;
+
+ ve_sram: sram-section@0 {
+ compatible = "allwinner,sun50i-h616-sram-c1";
+ reg = <0x000000 0x200000>;
+ };
+ };
};
ccu: clock@3001000 {
--
2.35.3

29
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-nanopi-a64-set-right-phy-mode-to-rgmii-id.patch Normal file
View File

@@ -0,0 +1,29 @@
From 275620c5565c5e4d692440aaca8b85483aae8127 Mon Sep 17 00:00:00 2001
From: root <guido.lehwalder@gmail.com>
Date: Tue, 26 Jan 2021 18:17:33 +0300
Subject: [PATCH 086/153] arm64:dts: nanopi-a64 set right phy-mode to rgmii-id
set right phy-mode for NPI A64 to rgmii-id for working
onboard-ethernet
Signed-off-by: root <guido.lehwalder@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
index 6239d2c43..2d65dad79 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-nanopi-a64.dts
@@ -80,7 +80,7 @@ &ehci1 {
&emac {
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
- phy-mode = "rgmii";
+ phy-mode = "rgmii-id";
phy-handle = <&ext_rgmii_phy>;
phy-supply = <&reg_dcdc1>;
status = "okay";
--
2.35.3

144
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-overlay-sun50i-a64-pine64-7inch-lcd.patch Normal file
View File

@@ -0,0 +1,144 @@
From 39cdc18896fa2d819e1e825ad255adf7a47e175a Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Wed, 2 Feb 2022 20:27:02 +0300
Subject: [PATCH 113/153] arm64:dts:overlay: sun50i-a64-pine64-7inch-lcd
Added to orange-pi-5.9 2020-11-30
---
.../arm64/boot/dts/allwinner/overlay/Makefile | 1 +
.../overlay/README.sun50i-a64-overlays | 5 ++
.../overlay/sun50i-a64-pine64-7inch-lcd.dts | 87 +++++++++++++++++++
3 files changed, 93 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-pine64-7inch-lcd.dts
diff --git a/arch/arm64/boot/dts/allwinner/overlay/Makefile b/arch/arm64/boot/dts/allwinner/overlay/Makefile
index 9b6528ec2..591eef672 100644
--- a/arch/arm64/boot/dts/allwinner/overlay/Makefile
+++ b/arch/arm64/boot/dts/allwinner/overlay/Makefile
@@ -2,6 +2,7 @@
dtbo-$(CONFIG_ARCH_SUNXI) += \
sun50i-a64-i2c0.dtbo \
sun50i-a64-i2c1.dtbo \
+ sun50i-a64-pine64-7inch-lcd.dtbo \
sun50i-a64-pps-gpio.dtbo \
sun50i-a64-spi-add-cs1.dtbo \
sun50i-a64-spi-jedec-nor.dtbo \
diff --git a/arch/arm64/boot/dts/allwinner/overlay/README.sun50i-a64-overlays b/arch/arm64/boot/dts/allwinner/overlay/README.sun50i-a64-overlays
index cd9dbc686..b684c2e3a 100644
--- a/arch/arm64/boot/dts/allwinner/overlay/README.sun50i-a64-overlays
+++ b/arch/arm64/boot/dts/allwinner/overlay/README.sun50i-a64-overlays
@@ -20,6 +20,7 @@ on supported boards, so this controller is not supported in provided overlays
- i2c0
- i2c1
+- pine64-7inch-lcd
- pps-gpio
- spi-add-cs1
- spi-jedec-nor
@@ -44,6 +45,10 @@ Activates TWI/I2C bus 1
I2C1 pins (SCL, SDA): PH2, PH3
+### pine64-7inch-lcd
+
+Activates the Pine64 7" LCD on pine64/pine64so boards
+
### pps-gpio
Activates pulse-per-second GPIO client
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-pine64-7inch-lcd.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-pine64-7inch-lcd.dts
new file mode 100644
index 000000000..34708103f
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-pine64-7inch-lcd.dts
@@ -0,0 +1,87 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pwm/pwm.h>
+
+/ {
+ compatible = "allwinner,sun50i-a64";
+
+ fragment@0 {
+ target = <&reg_ldo_io0>;
+
+ __overlay__ {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-ctp";
+ status = "okay";
+ };
+ };
+
+ fragment@1 {
+ target = <&i2c0>;
+
+ __overlay__ {
+ status = "okay";
+
+ gt911: touchscreen@5d {
+ compatible = "goodix,gt911";
+ reg = <0x5d>;
+
+ interrupt-parent = <&pio>;
+ interrupts = <7 4 IRQ_TYPE_EDGE_RISING>; /* PH4 */
+ reset-gpios = <&pio 7 11 GPIO_ACTIVE_HIGH>; /* PH11 */
+ AVDD28-supply = <&reg_ldo_io0>;
+ };
+ };
+ };
+
+ fragment@2 {
+ target = <&r_pwm>;
+
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ fragment@3 {
+ target-path = "/";
+
+ __overlay__ {
+ backlight: backlight {
+ compatible = "pwm-backlight";
+ pwms = <&r_pwm 0 50000 PWM_POLARITY_INVERTED>;
+ brightness-levels = <1 2 4 8 16 32 64 128 512>;
+ default-brightness-level = <8>;
+ enable-gpios = <&pio 7 10 GPIO_ACTIVE_HIGH>; /* PH10 */
+ };
+ };
+ };
+
+ fragment@4 {
+ target = <&dsi>;
+
+ __overlay__ {
+ vcc-dsi-supply = <&reg_dldo1>;
+ status = "okay";
+
+ panel@0 {
+ compatible = "feiyang,fy07024di26a30d";
+ reg = <0>;
+ avdd-supply = <&reg_dc1sw>;
+ dvdd-supply = <&reg_dldo2>;
+ reset-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* PD24 */
+ backlight = <&backlight>;
+ };
+ };
+ };
+
+ fragment@5 {
+ target = <&dphy>;
+
+ __overlay__ {
+ status = "okay";
+ };
+ };
+};
--
2.35.3

221
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-overlay-sun50i-h5-add-gpio-regulator-overclock.patch Normal file
View File

@@ -0,0 +1,221 @@
From b68f17bb2badece9592e560458aaaf66138d20a8 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Wed, 2 Feb 2022 21:01:10 +0300
Subject: [PATCH 114/153] arm64:dts:overlay sun50i-h5 add gpio regulator
overclock
---
.../arm64/boot/dts/allwinner/overlay/Makefile | 4 ++
.../sun50i-h5-cpu-clock-1.0GHz-1.1v.dts | 31 ++++++++++
.../sun50i-h5-cpu-clock-1.2GHz-1.3v.dts | 31 ++++++++++
.../sun50i-h5-cpu-clock-1.3GHz-1.3v.dts | 61 +++++++++++++++++++
.../overlay/sun50i-h5-gpio-regulator-1.3v.dts | 38 ++++++++++++
5 files changed, 165 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.0GHz-1.1v.dts
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.2GHz-1.3v.dts
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.3GHz-1.3v.dts
create mode 100644 arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-gpio-regulator-1.3v.dts
diff --git a/arch/arm64/boot/dts/allwinner/overlay/Makefile b/arch/arm64/boot/dts/allwinner/overlay/Makefile
index 591eef672..87f5addec 100644
--- a/arch/arm64/boot/dts/allwinner/overlay/Makefile
+++ b/arch/arm64/boot/dts/allwinner/overlay/Makefile
@@ -14,6 +14,10 @@ dtbo-$(CONFIG_ARCH_SUNXI) += \
sun50i-a64-w1-gpio.dtbo \
sun50i-h5-analog-codec.dtbo \
sun50i-h5-cir.dtbo \
+ sun50i-h5-cpu-clock-1.0GHz-1.1v.dtbo \
+ sun50i-h5-cpu-clock-1.2GHz-1.3v.dtbo \
+ sun50i-h5-cpu-clock-1.3GHz-1.3v.dtbo \
+ sun50i-h5-gpio-regulator-1.3v.dtbo \
sun50i-h5-i2c0.dtbo \
sun50i-h5-i2c1.dtbo \
sun50i-h5-i2c2.dtbo \
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.0GHz-1.1v.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.0GHz-1.1v.dts
new file mode 100644
index 000000000..674ec1dcb
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.0GHz-1.1v.dts
@@ -0,0 +1,31 @@
+// DT overlay for CPU frequency operating points to up to 1.0GHz at a maximum CPU voltage of 1.1v
+
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target = <&cpu_opp_table>;
+
+ __overlay__ {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ // in order to match the H5 DT cooling-maps, update the existing OP table in-place
+ // with the new voltages
+
+ opp-960000000 {
+ opp-hz = /bits/ 64 <960000000>;
+ opp-microvolt = <1100000 1100000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1008000000 {
+ opp-hz = /bits/ 64 <1008000000>;
+ opp-microvolt = <1100000 1100000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+ };
+ };
+};
+
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.2GHz-1.3v.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.2GHz-1.3v.dts
new file mode 100644
index 000000000..4fb5c81d3
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.2GHz-1.3v.dts
@@ -0,0 +1,31 @@
+// DT overlay for CPU frequency operating points to up to 1.2GHz at a maximum CPU voltage of 1.3v
+
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target = <&cpu_opp_table>;
+
+ __overlay__ {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ // in order to match the H5 DT cooling-maps, update the existing OP table in-place
+ // with the new voltages
+
+ opp-1104000000 {
+ opp-hz = /bits/ 64 <1104000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+ };
+ };
+};
+
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.3GHz-1.3v.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.3GHz-1.3v.dts
new file mode 100644
index 000000000..9c633973d
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cpu-clock-1.3GHz-1.3v.dts
@@ -0,0 +1,61 @@
+// DT overlay for CPU frequency operating points to 1.3GHz at a maximum CPU voltage of 1.3v
+
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target = <&cpu_opp_table>;
+
+ __overlay__ {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ // in order to match the H5 DT cooling-maps, update the existing OP table in-place
+ // with the new voltages
+
+ opp-1056000000 {
+ opp-hz = /bits/ 64 <1056000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1104000000 {
+ opp-hz = /bits/ 64 <1104000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1152000000 {
+ opp-hz = /bits/ 64 <1152000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1224000000 {
+ opp-hz = /bits/ 64 <1224000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1248000000 {
+ opp-hz = /bits/ 64 <1248000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+
+ opp-1296000000 {
+ opp-hz = /bits/ 64 <1296000000>;
+ opp-microvolt = <1300000 1300000 1300000>;
+ clock-latency-ns = <244144>; /* 8 32k periods */
+ };
+ };
+ };
+};
+
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-gpio-regulator-1.3v.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-gpio-regulator-1.3v.dts
new file mode 100644
index 000000000..8d2755c3d
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-gpio-regulator-1.3v.dts
@@ -0,0 +1,38 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h5";
+
+ fragment@0 {
+ target-path = "/";
+
+ __overlay__ {
+ reg_vdd_cpux: gpio-regulator {
+ compatible = "regulator-gpio";
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+
+ gpios = <&r_pio 0 6 0>; /* PL6 */
+ enable-active-high;
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1300000 0x1>;
+ };
+ };
+ };
+
+ fragment@1 {
+ target = <&cpu0>;
+
+ __overlay__ {
+ cpu-supply = <&reg_vdd_cpux>;
+ };
+ };
+};
+
--
2.35.3

497
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-overlay-sun50i-h616-bigtreetech-cb1.patch Normal file
View File

@@ -0,0 +1,497 @@
From 0480784b475fe2af7f06ce980583b8c875d2bc5a Mon Sep 17 00:00:00 2001
From: Your Name <you@example.com>
Date: Tue, 30 May 2023 12:04:55 +0800
Subject: [PATCH] cb1-overlay
---
arch/arm64/boot/dts/allwinner/overlay/Makefile | 15 +++++++++++++--
.../overlay/sun50i-h616-fixup.scr-cmd | 110 ++++++++++++++++++
.../dts/allwinner/overlay/sun50i-h616-ir.dts | 13 +++
.../allwinner/overlay/sun50i-h616-light.dts | 27 +++++
.../allwinner/overlay/sun50i-h616-mcp2515.dts | 18 +++
.../overlay/sun50i-h616-spi-spidev.dts | 42 +++++++
.../overlay/sun50i-h616-spidev0_0.dts | 28 +++++
.../overlay/sun50i-h616-spidev1_0.dts | 28 +++++
.../overlay/sun50i-h616-spidev1_1.dts | 28 +++++
.../overlay/sun50i-h616-spidev1_2.dts | 28 +++++
.../overlay/sun50i-h616-tft35_spi.dts | 33 ++++++
.../allwinner/overlay/sun50i-h616-ws2812.dts | 13 +++
12 files changed, 383 insertions(+), 2 deletions(-)
create mode 100755 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-fixup.scr-cmd
create mode 100755 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-ir.dts
create mode 100755 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-light.dts
create mode 100755 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-mcp2515.dts
create mode 100755 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spi-spidev.dts
create mode 100755 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev0_0.dts
create mode 100755 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev1_0.dts
create mode 100755 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev1_1.dts
create mode 100755 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev1_2.dts
create mode 100755 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-tft35_spi.dts
create mode 100755 arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-ws2812.dts
diff --git a/arch/arm64/boot/dts/allwinner/overlay/Makefile b/arch/arm64/boot/dts/allwinner/overlay/Makefile
index 7cabe8f42c5a..e19b987e3b03 100644
--- a/arch/arm64/boot/dts/allwinner/overlay/Makefile
+++ b/arch/arm64/boot/dts/allwinner/overlay/Makefile
@@ -47,12 +47,23 @@ dtbo-$(CONFIG_ARCH_SUNXI) += \
sun50i-h6-uart1.dtbo \
sun50i-h6-uart2.dtbo \
sun50i-h6-uart3.dtbo \
- sun50i-h6-w1-gpio.dtbo
+ sun50i-h6-w1-gpio.dtbo \
+ sun50i-h616-spi-spidev.dtbo \
+ sun50i-h616-spidev0_0.dtbo \
+ sun50i-h616-spidev1_0.dtbo \
+ sun50i-h616-spidev1_1.dtbo \
+ sun50i-h616-spidev1_2.dtbo \
+ sun50i-h616-ir.dtbo \
+ sun50i-h616-tft35_spi.dtbo \
+ sun50i-h616-mcp2515.dtbo \
+ sun50i-h616-ws2812.dtbo \
+ sun50i-h616-light.dtbo
scr-$(CONFIG_ARCH_SUNXI) += \
sun50i-a64-fixup.scr \
sun50i-h5-fixup.scr \
- sun50i-h6-fixup.scr
+ sun50i-h6-fixup.scr \
+ sun50i-h616-fixup.scr
dtbotxt-$(CONFIG_ARCH_SUNXI) += \
README.sun50i-a64-overlays \
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-fixup.scr-cmd b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-fixup.scr-cmd
new file mode 100755
index 000000000000..2bde77cb082d
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-fixup.scr-cmd
@@ -0,0 +1,110 @@
+# overlays fixup script
+# implements (or rather substitutes) overlay arguments functionality
+# using u-boot scripting, environment variables and "fdt" command
+
+# setexpr test_var ${tmp_bank} - A
+# works only for hex numbers (A-F)
+
+setenv decompose_pin 'setexpr tmp_bank sub "P(C|G|H|I)\\d+" "\\1";
+setexpr tmp_pin sub "P\\S(\\d+)" "\\1";
+test "${tmp_bank}" = "C" && setenv tmp_bank 2;
+test "${tmp_bank}" = "G" && setenv tmp_bank 6'
+test "${tmp_bank}" = "H" && setenv tmp_bank 7;
+test "${tmp_bank}" = "I" && setenv tmp_bank 8;
+
+if test -n "${param_spinor_spi_bus}"; then
+ test "${param_spinor_spi_bus}" = "0" && setenv tmp_spi_path "spi@5010000"
+ test "${param_spinor_spi_bus}" = "1" && setenv tmp_spi_path "spi@5011000"
+ fdt set /soc/${tmp_spi_path} status "okay"
+ fdt set /soc/${tmp_spi_path}/spiflash@0 status "okay"
+ if test -n "${param_spinor_max_freq}"; then
+ fdt set /soc/${tmp_spi_path}/spiflash@0 spi-max-frequency "<${param_spinor_max_freq}>"
+ fi
+ if test "${param_spinor_spi_cs}" = "1"; then
+ fdt set /soc/${tmp_spi_path}/spiflash@0 reg "<1>"
+ fi
+ env delete tmp_spi_path
+fi
+
+if test -n "${param_spidev_spi_bus}"; then
+ test "${param_spidev_spi_bus}" = "0" && setenv tmp_spi_path "spi@5010000"
+ test "${param_spidev_spi_bus}" = "1" && setenv tmp_spi_path "spi@5011000"
+ fdt set /soc/${tmp_spi_path} status "okay"
+ fdt set /soc/${tmp_spi_path}/spidev status "okay"
+ if test -n "${param_spidev_max_freq}"; then
+ fdt set /soc/${tmp_spi_path}/spidev spi-max-frequency "<${param_spidev_max_freq}>"
+ fi
+ if test "${param_spidev_spi_cs}" = "1"; then
+ fdt set /soc/${tmp_spi_path}/spidev reg "<1>"
+ fi
+ env delete tmp_spi_path
+fi
+
+if test -n "${param_pps_pin}"; then
+ setenv tmp_bank "${param_pps_pin}"
+ setenv tmp_pin "${param_pps_pin}"
+ run decompose_pin
+ fdt set /soc/pinctrl@300b000/pps_pins pins "${param_pps_pin}"
+ fdt get value tmp_phandle /soc/pinctrl@300b000 phandle
+ fdt set /pps@0 gpios "<${tmp_phandle} ${tmp_bank} ${tmp_pin} 0>"
+ env delete tmp_pin tmp_bank tmp_phandle
+fi
+
+if test "${param_pps_falling_edge}" = "1"; then
+ fdt set /pps@0 assert-falling-edge
+fi
+
+for f in ${overlays}; do
+ if test "${f}" = "pwm34"; then
+ setenv bootargs_new ""
+ for arg in ${bootargs}; do
+ if test "${arg}" = "console=ttyS0,115200"; then
+ echo "Warning: Disabling ttyS0 console due to enabled PWM3 and PWM4 overlay"
+ else
+ setenv bootargs_new "${bootargs_new} ${arg}"
+ fi
+ done
+ setenv bootargs "${bootargs_new}"
+ fi
+done
+
+if test -n "${param_w1_pin}"; then
+ setenv tmp_bank "${param_w1_pin}"
+ setenv tmp_pin "${param_w1_pin}"
+ run decompose_pin
+ fdt set /soc/pinctrl@300b000/w1_pins pins "${param_w1_pin}"
+ fdt get value tmp_phandle /soc/pinctrl@300b000 phandle
+ fdt set /onewire@0 gpios "<${tmp_phandle} ${tmp_bank} ${tmp_pin} 0>"
+ env delete tmp_pin tmp_bank tmp_phandle
+fi
+
+if test "${param_w1_pin_int_pullup}" = "1"; then
+ fdt set /soc/pinctrl@300b000/w1_pins bias-pull-up
+fi
+
+if test "${param_uart1_rtscts}" = "1"; then
+ fdt get value tmp_phandle1 /soc/pinctrl@300b000/uart1-pins phandle
+ fdt get value tmp_phandle2 /soc/pinctrl@300b000/uart1-rts-cts-pins phandle
+ fdt set /soc/serial@5000400 pinctrl-names "default" "default"
+ fdt set /soc/serial@5000400 pinctrl-0 "<${tmp_phandle1}>"
+ fdt set /soc/serial@5000400 pinctrl-1 "<${tmp_phandle2}>"
+ env delete tmp_phandle1 tmp_phandle2
+fi
+
+if test "${param_uart2_rtscts}" = "1"; then
+ fdt get value tmp_phandle1 /soc/pinctrl@300b000/uart2-pins phandle
+ fdt get value tmp_phandle2 /soc/pinctrl@300b000/uart2-rts-cts-pins phandle
+ fdt set /soc/serial@5000800 pinctrl-names "default" "default"
+ fdt set /soc/serial@5000800 pinctrl-0 "<${tmp_phandle1}>"
+ fdt set /soc/serial@5000800 pinctrl-1 "<${tmp_phandle2}>"
+ env delete tmp_phandle1 tmp_phandle2
+fi
+
+if test "${param_uart3_rtscts}" = "1"; then
+ fdt get value tmp_phandle1 /soc/pinctrl@300b000/uart3-pins phandle
+ fdt get value tmp_phandle2 /soc/pinctrl@300b000/uart3-rts-cts-pins phandle
+ fdt set /soc/serial@5000c00 pinctrl-names "default" "default"
+ fdt set /soc/serial@5000c00 pinctrl-0 "<${tmp_phandle1}>"
+ fdt set /soc/serial@5000c00 pinctrl-1 "<${tmp_phandle2}>"
+ env delete tmp_phandle1 tmp_phandle2
+fi
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-ir.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-ir.dts
new file mode 100755
index 000000000000..825433add1c3
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-ir.dts
@@ -0,0 +1,13 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h616";
+
+ fragment@0 {
+ target = <&ir>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-light.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-light.dts
new file mode 100755
index 000000000000..5010ea6a57b5
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-light.dts
@@ -0,0 +1,27 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h616";
+
+ fragment@0 {
+ target = <&i2c_gpio>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ fragment@1 {
+ target = <&uart0>;
+ __overlay__ {
+ status = "disabled";
+ };
+ };
+
+ fragment@2 {
+ target = <&pwm>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-mcp2515.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-mcp2515.dts
new file mode 100755
index 000000000000..64841956e568
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-mcp2515.dts
@@ -0,0 +1,18 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target = <&spi1>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ fragment@1 {
+ target = <&can>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spi-spidev.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spi-spidev.dts
new file mode 100755
index 000000000000..e0ceed71965f
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spi-spidev.dts
@@ -0,0 +1,42 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h616";
+
+ fragment@0 {
+ target-path = "/aliases";
+ __overlay__ {
+ spi0 = "/soc/spi@5010000";
+ spi1 = "/soc/spi@5011000";
+ };
+ };
+
+ fragment@1 {
+ target = <&spi0>;
+ __overlay__ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "disabled";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+ };
+ };
+
+ fragment@2 {
+ target = <&spi1>;
+ __overlay__ {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "disabled";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev0_0.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev0_0.dts
new file mode 100755
index 000000000000..a5a89707c3dd
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev0_0.dts
@@ -0,0 +1,28 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h616";
+
+ fragment@0 {
+ target-path = "/aliases";
+ __overlay__ {
+ spi0 = "/soc/spi@5010000";
+ };
+ };
+
+ fragment@1 {
+ target = <&spi0>;
+ __overlay__ {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spidev0_0: spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev1_0.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev1_0.dts
new file mode 100755
index 000000000000..20a0486442cc
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev1_0.dts
@@ -0,0 +1,28 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h616";
+
+ fragment@0 {
+ target-path = "/aliases";
+ __overlay__ {
+ spi1 = "/soc/spi@5011000";
+ };
+ };
+
+ fragment@1 {
+ target = <&spi1>;
+ __overlay__ {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spidev1_0: spidev@0 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <0>;
+ spi-max-frequency = <1000000>;
+ };
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev1_1.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev1_1.dts
new file mode 100755
index 000000000000..a9ae45e84063
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev1_1.dts
@@ -0,0 +1,28 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h616";
+
+ fragment@0 {
+ target-path = "/aliases";
+ __overlay__ {
+ spi1 = "/soc/spi@5011000";
+ };
+ };
+
+ fragment@1 {
+ target = <&spi1>;
+ __overlay__ {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spidev1_1: spidev@1 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <1>;
+ spi-max-frequency = <1000000>;
+ };
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev1_2.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev1_2.dts
new file mode 100755
index 000000000000..efe5a8949b3a
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-spidev1_2.dts
@@ -0,0 +1,28 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h616";
+
+ fragment@0 {
+ target-path = "/aliases";
+ __overlay__ {
+ spi1 = "/soc/spi@5011000";
+ };
+ };
+
+ fragment@1 {
+ target = <&spi1>;
+ __overlay__ {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ spidev1_2: spidev@2 {
+ compatible = "rohm,dh2228fv";
+ status = "okay";
+ reg = <2>;
+ spi-max-frequency = <1000000>;
+ };
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-tft35_spi.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-tft35_spi.dts
new file mode 100755
index 000000000000..e96582bcbed5
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-tft35_spi.dts
@@ -0,0 +1,33 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ fragment@0 {
+ target = <&i2c_gpio>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ fragment@1 {
+ target = <&spi1>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+
+ fragment@2 {
+ target = <&tft_35>;
+ __overlay__ {
+ status = "okay";
+ spi-max-frequency = <12500000>;
+ };
+ };
+
+ fragment@3 {
+ target = <&tft_tp>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-ws2812.dts b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-ws2812.dts
new file mode 100755
index 000000000000..4e43907cb0ce
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h616-ws2812.dts
@@ -0,0 +1,13 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+ compatible = "allwinner,sun50i-h616";
+
+ fragment@0 {
+ target = <&ws2812>;
+ __overlay__ {
+ status = "okay";
+ };
+ };
+};
--
2.34.1

24
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-sun50i-a64-force-mmc0-bus-width.patch Normal file
View File

@@ -0,0 +1,24 @@
From 3d1dd7fa07b3e07802bc5785304f78ba444e1145 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Fri, 28 Jan 2022 15:52:48 +0300
Subject: [PATCH 105/153] arm64:dts: sun50i-a64 force mmc0 bus-width
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 416532006..6cd8e04ab 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -568,6 +568,7 @@ mmc0: mmc@1c0f000 {
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
max-frequency = <150000000>;
status = "disabled";
+ bus-width = <0x4>;
#address-cells = <1>;
#size-cells = <0>;
};
--
2.35.3

28
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-sun50i-a64-olinuxino-1Ge16GW-Disable-clock-phase-and-.patch Normal file
View File

@@ -0,0 +1,28 @@
From dc5e67efd08e5419c3e9c9d30c1cccc7b58aac85 Mon Sep 17 00:00:00 2001
From: hehopmajieh <hehopmajieh@debian.bg>
Date: Wed, 20 May 2020 09:25:56 +0300
Subject: [PATCH 129/153] arm64:dts:sun50i-a64-olinuxino-1Ge16GW Disable clock
phase and hs just for test
---
.../arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
index 100a7ce49..41c7a4ed4 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
@@ -15,8 +15,8 @@ / {
&mmc2 {
vqmmc-supply = <&reg_eldo1>;
- mmc-hs200-1_8v;
- allwinner,drive-data-phase = <180>;
+/* mmc-hs200-1_8v;
+ allwinner,drive-data-phase = <180>;*/
};
&pio {
--
2.35.3

42
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-sun50i-a64-olinuxino-1Ge16GW-enable-bluetooth.patch Normal file
View File

@@ -0,0 +1,42 @@
From 3f0f108f4d09beaa1cea05717ee012e5e02419d1 Mon Sep 17 00:00:00 2001
From: Stefan Saraev <stefan@saraev.ca>
Date: Fri, 20 Mar 2020 17:31:49 +0200
Subject: [PATCH 127/153] arm64:dts: sun50i-a64-olinuxino-1Ge16GW: enable
bluetooth
---
.../sun50i-a64-olinuxino-1Ge16GW.dts | 21 +++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
index a508d77d2..100a7ce49 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
@@ -18,3 +18,24 @@ &mmc2 {
mmc-hs200-1_8v;
allwinner,drive-data-phase = <180>;
};
+
+&pio {
+ vcc-pc-supply = <&reg_eldo1>;
+ uart1_cts_pins: uart1_cts_pins {
+ pins = "PG8";
+ function = "uart1";
+ };
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_cts_pins>;
+ status = "okay";
+ bluetooth {
+ compatible = "realtek,rtl8723bs-bt";
+ reset-gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>; /* PL4 */
+ device-wake-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
+ host-wake-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ firmware-postfix = "olinuxino";
+ };
+};
--
2.35.3

603
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-sun50i-a64-olinuxino-add-boards.patch Normal file
View File

@@ -0,0 +1,603 @@
From 0687ea1c6ac23b44ce9c6faf1968c9d1537fbb28 Mon Sep 17 00:00:00 2001
From: Mitko Gamishev <hehopmajieh@debian.bg>
Date: Wed, 5 Feb 2020 15:03:08 +0200
Subject: [PATCH 125/153] arm64:dts:sun50i-a64-olinuxino add boards
---
arch/arm64/boot/dts/allwinner/Makefile | 5 +
.../dts/allwinner/sun50i-a64-olinuxino-1G.dts | 362 ++++++++++++++++++
.../sun50i-a64-olinuxino-1Ge16GW.dts | 20 +
.../allwinner/sun50i-a64-olinuxino-1Ge4GW.dts | 97 +++++
.../allwinner/sun50i-a64-olinuxino-1Gs16M.dts | 31 ++
.../allwinner/sun50i-a64-olinuxino-2Ge8G.dts | 25 ++
6 files changed, 540 insertions(+)
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1G.dts
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge4GW.dts
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Gs16M.dts
create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-2Ge8G.dts
diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile
index 43870e278..ea455f120 100644
--- a/arch/arm64/boot/dts/allwinner/Makefile
+++ b/arch/arm64/boot/dts/allwinner/Makefile
@@ -5,6 +5,11 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-nanopi-a64.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-oceanic-5205-5inmfd.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino-emmc.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino-1G.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino-1Ge4GW.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino-1Ge16GW.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino-1Gs16M.dtb
+dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-olinuxino-2Ge8G.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-orangepi-win.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-lts.dtb
dtb-$(CONFIG_ARCH_SUNXI) += sun50i-a64-pine64-plus.dtb sun50i-a64-pine64.dtb
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1G.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1G.dts
new file mode 100644
index 000000000..54af704d2
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1G.dts
@@ -0,0 +1,362 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 OLIMEX Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+ model = "Olimex A64-Olinuxino-1G";
+ compatible = "olimex,a64-olinuxino-1g", "allwinner,sun50i-a64";
+
+ aliases {
+ ethernet0 = &emac;
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ hdmi-connector {
+ compatible = "hdmi-connector";
+ type = "a";
+
+ port {
+ hdmi_con_in: endpoint {
+ remote-endpoint = <&hdmi_out_con>;
+ };
+ };
+ };
+
+ hdmi-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,name = "allwinner,hdmi";
+ simple-audio-card,mclk-fs = <256>;
+ status = "okay";
+
+ simple-audio-card,codec {
+ sound-dai = <&hdmi>;
+ };
+
+ simple-audio-card,cpu {
+ sound-dai = <&i2s2>;
+ };
+ };
+
+ reg_vcc_sys: vcc-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc-sys";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ status = "okay";
+ };
+
+ reg_usb1_vbus: usb1-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb1-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ enable-active-high;
+ gpio = <&pio 6 9 GPIO_ACTIVE_HIGH>; /* PG9 */
+ status = "okay";
+ };
+};
+
+&codec {
+ status = "okay";
+};
+
+&codec_analog {
+ hpvcc-supply = <&reg_eldo1>;
+ status = "okay";
+};
+
+&dai {
+ status = "okay";
+};
+
+&de {
+ status = "okay";
+};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&emac {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rgmii_pins>;
+ phy-mode = "rgmii";
+ phy-handle = <&ext_rgmii_phy>;
+ phy-supply = <&reg_dcdc1>;
+ allwinner,tx-delay-ps = <600>;
+ status = "okay";
+};
+
+&hdmi {
+ hvcc-supply = <&reg_dldo1>;
+ status = "okay";
+};
+
+&hdmi_out {
+ hdmi_out_con: endpoint {
+ remote-endpoint = <&hdmi_con_in>;
+ };
+};
+
+/* Exposed to UEXT connector */
+&i2c1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins>;
+ status = "disabled";
+};
+
+&i2s2 {
+ status = "okay";
+};
+
+&mdio {
+ ext_rgmii_phy: ethernet-phy@1 {
+ compatible = "ethernet-phy-ieee802.3-c22";
+ reg = <1>;
+ };
+};
+
+&mmc0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc0_pins>;
+ vmmc-supply = <&reg_dcdc1>;
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
+ disable-wp;
+ bus-width = <4>;
+ status = "okay";
+};
+
+&ohci0 {
+ status = "okay";
+};
+
+&ohci1 {
+ status = "okay";
+};
+
+&r_rsb {
+ status = "okay";
+
+ axp803: pmic@3a3 {
+ compatible = "x-powers,axp803";
+ reg = <0x3a3>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;
+ x-powers,drive-vbus-en; /* set N_VBUSEN as output pin */
+ };
+};
+
+#include "axp803.dtsi"
+
+&ac_power_supply {
+ status = "okay";
+};
+
+&axp_led {
+ label = "axp20x:yellow:chgled";
+ status = "okay";
+ x-powers,charger-mode = <0>;
+};
+
+&battery_power_supply {
+ status = "okay";
+};
+
+&reg_aldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-name = "vcc-pe";
+};
+
+&reg_aldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-pl";
+};
+
+&reg_aldo3 {
+ regulator-always-on;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-name = "vcc-pll-avcc";
+};
+
+&reg_dcdc1 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-3v3";
+};
+
+&reg_dcdc2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1040000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-name = "vdd-cpux";
+};
+
+/* DCDC3 is polyphased with DCDC2 */
+
+/*
+ * The board uses DDR3L DRAM chips. 1.36V is the closest to the nominal
+ * 1.35V that the PMIC can drive.
+ */
+&reg_dcdc5 {
+ regulator-always-on;
+ regulator-min-microvolt = <1360000>;
+ regulator-max-microvolt = <1360000>;
+ regulator-name = "vcc-ddr3";
+};
+
+&reg_dcdc6 {
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vdd-sys";
+};
+
+&reg_dldo1 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-hdmi";
+};
+
+&reg_dldo2 {
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-mipi";
+};
+
+&reg_dldo3 {
+ regulator-min-microvolt = <2800000>;
+ regulator-max-microvolt = <2800000>;
+ regulator-name = "vcc-avdd-csi";
+};
+
+&reg_dldo4 {
+ regulator-always-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-name = "vcc-wifi-io";
+};
+
+&reg_drivevbus {
+ regulator-name = "usb0-vbus";
+ status = "okay";
+};
+
+&reg_eldo1 {
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-emmc";
+};
+
+&reg_eldo2 {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-name = "vcc-dvdd-csi";
+};
+
+&reg_fldo1 {
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ regulator-name = "vcc-1v2-hsic";
+};
+
+/*
+ * The A64 chip cannot work without this regulator off, although
+ * it seems to be only driving the AR100 core.
+ * Maybe we don't still know well about CPUs domain.
+ */
+&reg_fldo2 {
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-name = "vdd-cpus";
+};
+
+&reg_rtc_ldo {
+ regulator-name = "vcc-rtc";
+};
+
+&simplefb_hdmi {
+ vcc-hdmi-supply = <&reg_dldo1>;
+};
+
+&sound {
+ simple-audio-card,aux-devs = <&codec_analog>;
+ simple-audio-card,widgets = "Microphone", "Microphone Jack Left",
+ "Microphone", "Microphone Jack Right",
+ "Headphone", "Headphone Jack";
+ simple-audio-card,routing = "Left DAC", "AIF1 Slot 0 Left",
+ "Right DAC", "AIF1 Slot 0 Right",
+ "Headphone Jack", "HP",
+ "AIF1 Slot 0 Left ADC", "Left ADC",
+ "AIF1 Slot 0 Right ADC", "Right ADC",
+ "Microphone Jack Left", "MBIAS",
+ "MIC1", "Microphone Jack Left",
+ "Microphone Jack Left", "HBIAS",
+ "MIC2", "Microphone Jack Right";
+ status = "okay";
+};
+
+&spdif {
+ status = "disabled";
+};
+
+/* Exposed on UEXT */
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pins>;
+ status = "disabled";
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pb_pins>;
+ status = "okay";
+};
+
+/* Exposed on UEXT */
+&uart3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart3_pins>;
+ status = "disabled";
+};
+
+&usb_otg {
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+ usb0_id_det-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
+ usb0_vbus_det-gpios = <&pio 7 6 GPIO_ACTIVE_HIGH>; /* PH6 */
+ usb0_vbus-supply = <&reg_drivevbus>;
+ usb1_vbus-supply = <&reg_usb1_vbus>;
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
new file mode 100644
index 000000000..a508d77d2
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge16GW.dts
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 OLIMEX Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64-olinuxino-1Ge4GW.dts"
+
+/ {
+ model = "Olimex A64-Olinuxino-1Ge16GW";
+ compatible = "olimex,a64-olinuxino-1ge16gw", "allwinner,sun50i-a64";
+};
+
+&mmc2 {
+ vqmmc-supply = <&reg_eldo1>;
+ mmc-hs200-1_8v;
+ allwinner,drive-data-phase = <180>;
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge4GW.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge4GW.dts
new file mode 100644
index 000000000..c87ecc6e1
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Ge4GW.dts
@@ -0,0 +1,97 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 OLIMEX Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64-olinuxino-1G.dts"
+
+/ {
+ model = "Olimex A64-Olinuxino-1Ge4GW";
+ compatible = "olimex,a64-olinuxino-1ge4gw", "allwinner,sun50i-a64";
+
+ aliases {
+ ethernet1 = &rtl8723bs;
+ mmc1 = &mmc2;
+ };
+
+ bt-sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,bitclock-inversion = <1>;
+ simple-audio-card,mclk-fs = <256>;
+ simple-audio-card,name = "RTL8723BS";
+ simple-audio-card,cpu {
+ sound-dai = <&i2s1>;
+ };
+ simple-audio-card,codec {
+ sound-dai = <&bt_sco>;
+ };
+ };
+
+ bt_sco: bt-sco {
+ compatible = "linux,bt-sco";
+ #sound-dai-cells = <0>;
+ status = "okay";
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
+ };
+};
+
+&i2s1 {
+ status = "okay";
+};
+
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins>;
+ vmmc-supply = <&reg_aldo2>;
+ vqmmc-supply = <&reg_dldo4>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ rtl8723bs: wifi@1 {
+ reg = <1>;
+ interrupt-parent = <&r_pio>;
+ interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* PL3 */
+ interrupt-names = "host-wake";
+ };
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_pins>;
+ vmmc-supply = <&reg_dcdc1>;
+ vqmmc-supply = <&reg_dcdc1>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
+
+&pio {
+ uart1_cts_pins: uart1_cts_pins {
+ pins = "PG8";
+ function = "uart1";
+ };
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_cts_pins>;
+ status = "okay";
+ bluetooth {
+ compatible = "realtek,rtl8723bs-bt";
+ reset-gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>; /* PL4 */
+ device-wake-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
+ host-wake-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ firmware-postfix = "olinuxino";
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Gs16M.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Gs16M.dts
new file mode 100644
index 000000000..5b85f4d2b
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-1Gs16M.dts
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 OLIMEX Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64-olinuxino-1G.dts"
+
+/ {
+ model = "Olimex A64-Olinuxino-1Gs16M";
+ compatible = "olimex,a64-olinuxino-1gs16m", "allwinner,sun50i-a64";
+
+ aliases {
+ spi0 = &spi0;
+ };
+};
+
+&spi0 {
+ status = "okay";
+
+ spi-nor@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "winbond,w25q128", "jedec,spi-nor", "spi-flash";
+ reg = <0>;
+ spi-max-frequency = <10000000>;
+ status = "okay";
+ };
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-2Ge8G.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-2Ge8G.dts
new file mode 100644
index 000000000..3583c37d3
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-2Ge8G.dts
@@ -0,0 +1,25 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 OLIMEX Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64-olinuxino-1G.dts"
+
+/ {
+ model = "Olimex A64-Olinuxino-2Ge8G-IND";
+ compatible = "olimex,a64-olinuxino-2ge8g", "allwinner,sun50i-a64";
+};
+
+&mmc2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc2_pins>;
+ vmmc-supply = <&reg_dcdc1>;
+ vqmmc-supply = <&reg_dcdc1>;
+ bus-width = <8>;
+ non-removable;
+ cap-mmc-hw-reset;
+ status = "okay";
+};
--
2.35.3

39
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-sun50i-a64-olinuxino-emmc-enable-bluetooth.patch Normal file
View File

@@ -0,0 +1,39 @@
From f4640ed124a9b8b72e1019e2f98da5b731d7dd54 Mon Sep 17 00:00:00 2001
From: Stefan Saraev <stefan@saraev.ca>
Date: Fri, 20 Mar 2020 13:53:44 +0200
Subject: [PATCH 126/153] arm64:dts: sun50i-a64-olinuxino-emmc: enable
bluetooth
---
.../dts/allwinner/sun50i-a64-olinuxino-emmc.dts | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-emmc.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-emmc.dts
index efb20846d..963b8b207 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-emmc.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-emmc.dts
@@ -22,4 +22,21 @@ &mmc2 {
&pio {
vcc-pc-supply = <&reg_eldo1>;
+ uart1_cts_pins: uart1_cts_pins {
+ pins = "PG8";
+ function = "uart1";
+ };
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_cts_pins>;
+ status = "okay";
+ bluetooth {
+ compatible = "realtek,rtl8723bs-bt";
+ reset-gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>; /* PL4 */
+ device-wake-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
+ host-wake-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ firmware-postfix = "olinuxino";
+ };
};
--
2.35.3

25
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-sun50i-a64-orangepi-win-add-aliase-ethernet1.patch Normal file
View File

@@ -0,0 +1,25 @@
From 50fe379ded06f778d171a602775c234c5c993aa7 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Fri, 28 Jan 2022 15:48:25 +0300
Subject: [PATCH 104/153] arm64:dts: sun50i-a64-orangepi-win add aliase
ethernet1
---
arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
index 306ce4acf..fff7fe6dd 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-orangepi-win.dts
@@ -15,6 +15,7 @@ / {
aliases {
ethernet0 = &emac;
+ ethernet1 = &brcmf;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
--
2.35.3

49
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-sun50i-a64-pine64-add-spi0.patch Normal file
View File

@@ -0,0 +1,49 @@
From c2660d24a4fc09776908b689e0e550afbbf44c7e Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Tue, 25 Jan 2022 19:10:06 +0300
Subject: [PATCH 102/153] arm64:dts: sun50i-a64-pine64 add spi0
---
.../boot/dts/allwinner/sun50i-a64-pine64.dts | 29 +++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index cba8ae875..fc0f7975c 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -350,3 +350,32 @@ &usb_otg {
&usbphy {
status = "okay";
};
+
+&spi0 {
+ status = "okay";
+ spi-flash@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "jedec,spi-nor";
+ reg = <0>; /* Chip select 0 */
+ spi-max-frequency = <10000000>;
+ status = "disabled";
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ partition@0 {
+ label = "uboot";
+ reg = <0x0 0x100000>;
+ };
+ partition@100000 {
+ label = "env";
+ reg = <0x100000 0x100000>;
+ };
+ partition@200000 {
+ label = "data";
+ reg = <0x200000 0x200000>;
+ };
+ };
+ };
+};
--
2.35.3

40
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-sun50i-a64-pine64-enable-Bluetooth.patch Normal file
View File

@@ -0,0 +1,40 @@
From 0ffec9e46c33be6ab3d4cc12a43410dad53fc0ad Mon Sep 17 00:00:00 2001
From: Vasily Khoruzhick <anarsoul@gmail.com>
Date: Wed, 31 Oct 2018 20:45:16 -0700
Subject: [PATCH 084/153] arm64:dts: sun50i-a64-pine64 enable Bluetooth
Pine64 has optional RTL8723BS WiFi + BT module, BT is connected to UART1
and uses PL4 as BT reset, PL5 as device wake GPIO, PL6 as host wake GPIO
the I2C controlling signals are connected to R_I2C bus.
Enable it in the device tree.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index a08c97f23..cba8ae875 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -310,7 +310,15 @@ &uart0 {
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
- status = "disabled";
+ status = "okay";
+
+ bluetooth {
+ compatible = "realtek,rtl8723bs-bt";
+ reset-gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>; /* PL4 */
+ device-wake-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
+ host-wake-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ firmware-postfix = "pine64";
+ };
};
/* On Pi-2 connector */
--
2.35.3

52
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-sun50i-a64-pine64-enable-wifi-mmc1.patch Normal file
View File

@@ -0,0 +1,52 @@
From 1be928ed96e5d396bb96c1f3cb0d56470ae0c58a Mon Sep 17 00:00:00 2001
From: Icenowy Zheng <icenowy@aosc.io>
Date: Thu, 9 Feb 2017 00:18:56 +0800
Subject: [PATCH 071/153] arm64:dts: sun50i-a64-pine64 enable wifi mmc1
The Wi-Fi modules of Pine64 is powered via DLDO4 and ELDO1 (the latter
one provides I/O voltage).
Add device node for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
.../boot/dts/allwinner/sun50i-a64-pine64.dts | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
index 17886709b..a08c97f23 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts
@@ -35,6 +35,11 @@ hdmi_con_in: endpoint {
};
};
};
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
+ };
};
&codec {
@@ -128,6 +133,17 @@ &mmc0 {
status = "okay";
};
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins>;
+ vmmc-supply = <&reg_dldo4>;
+ vqmmc-supply = <&reg_eldo1>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ non-removable;
+ bus-width = <4>;
+ status = "okay";
+};
+
&ohci0 {
status = "okay";
};
--
2.35.3

53
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-sun50i-a64-pinephone-wowlan.patch Normal file
View File

@@ -0,0 +1,53 @@
From 49ebdb69e5aa1f581bec7c5752de72b19fa8ccb6 Mon Sep 17 00:00:00 2001
From: AGM1968 <AGM1968@users.noreply.github.com>
Date: Mon, 26 Jun 2023 14:29:56 +0000
Subject: [PATCH] Temp_fix mailbox
arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi
Signed-off-by: AGM1968 <AGM1968@users.noreply.github.com>
---
arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi
index 2f73f937aaf0..c7940fd3623a 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinephone.dtsi
@@ -42,7 +42,7 @@ bat: battery {
resistance-temp-table = <20 150>;
ocv-capacity-celsius = <20>;
ocv-capacity-table-0 =
- <4334000 100>,
+ <4334000 100>,
<4319700 99>,
<4304300 98>,
<4292200 97>,
@@ -144,7 +144,7 @@ bat: battery {
<3393500 1>,
<3256000 0>;
x-powers,ocv-capacity-table =
- <0xc0 0>,
+ <0xc0 0>,
<0xc1 1>,
<0xc2 1>,
<0xc3 2>,
@@ -191,7 +191,7 @@ ppkb_battery: keyboard-battery {
factory-internal-resistance-micro-ohms = <120000>;
ocv-capacity-celsius = <20>;
ocv-capacity-table-0 =
- <4147328 100>,
+ <4147328 100>,
<4132636 99>,
<4121720 98>,
<4110905 97>,
@@ -748,6 +748,7 @@ &mmc1 {
non-removable;
post-power-on-delay-ms = <1>; /* wifi power is always on */
status = "okay";
+ keep-power-in-suspend;
rtl8723cs: wifi@1 {
reg = <1>;
--
2.34.1

44
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-sun50i-a64-sopine-baseboard-Add-i2s2-mmc1.patch Normal file
View File

@@ -0,0 +1,44 @@
From db200162a3596d3b38b12c46dd1c6d512b01bc34 Mon Sep 17 00:00:00 2001
From: Vasily Khoruzhick <anarsoul@gmail.com>
Date: Sun, 3 Dec 2017 11:43:08 -0800
Subject: [PATCH 073/153] arm64:dts: sun50i-a64-sopine-baseboard Add i2s2 mmc1
---
.../dts/allwinner/sun50i-a64-sopine-baseboard.dts | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
index 970d52837..ee4fd195e 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
@@ -100,6 +100,10 @@ &i2s2 {
status = "okay";
};
+&i2s2 {
+ status = "okay";
+};
+
&mdio {
ext_rgmii_phy: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
@@ -107,6 +111,16 @@ ext_rgmii_phy: ethernet-phy@1 {
};
};
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins>;
+ vmmc-supply = <&reg_dldo4>;
+ vqmmc-supply = <&reg_eldo1>;
+ non-removable;
+ bus-width = <4>;
+ status = "okay";
+};
+
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins>;
--
2.35.3

45
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-sun50i-a64-sopine-baseboard-enable-Bluetooth.patch Normal file
View File

@@ -0,0 +1,45 @@
From a2d72298960a239df7cc284ae347f1758a07c3c7 Mon Sep 17 00:00:00 2001
From: Vasily Khoruzhick <anarsoul@gmail.com>
Date: Wed, 31 Oct 2018 20:50:09 -0700
Subject: [PATCH 085/153] arm64:dts: sun50i-a64-sopine-baseboard enable
Bluetooth
SoPine has optional RTL8723BS WiFi + BT module, BT is connected to UART1
and uses PL4 as BT reset, PL5 as device wake GPIO, PL6 as host wake GPIO
the I2C controlling signals are connected to R_I2C bus.
Enable it in the device tree.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
---
.../dts/allwinner/sun50i-a64-sopine-baseboard.dts | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
index ee4fd195e..56714cc3f 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts
@@ -197,6 +197,20 @@ &uart0 {
status = "okay";
};
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+ status = "okay";
+
+ bluetooth {
+ compatible = "realtek,rtl8723bs-bt";
+ reset-gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>; /* PL4 */
+ device-wake-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */
+ host-wake-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ firmware-postfix = "pine64";
+ };
+};
+
/* On Pi-2 connector */
&uart2 {
pinctrl-names = "default";
--
2.35.3

42
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-sun50i-a64.dtsi-adjust-thermal-trip-points.patch Normal file
View File

@@ -0,0 +1,42 @@
From cbf6d09b1bd690775f6c24a9742055e58be7f9bb Mon Sep 17 00:00:00 2001
From: Stefan Saraev <stefan@saraev.ca>
Date: Mon, 6 Apr 2020 15:26:10 +0300
Subject: [PATCH 128/153] arm64:dts:sun50i-a64.dtsi adjust thermal trip points
default values for alert1/crit are way too high.
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 6cd8e04ab..e7095e514 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -244,21 +244,21 @@ map1 {
trips {
cpu_alert0: cpu_alert0 {
/* milliCelsius */
- temperature = <75000>;
+ temperature = <70000>;
hysteresis = <2000>;
type = "passive";
};
cpu_alert1: cpu_alert1 {
/* milliCelsius */
- temperature = <90000>;
+ temperature = <80000>;
hysteresis = <2000>;
type = "hot";
};
cpu_crit: cpu_crit {
/* milliCelsius */
- temperature = <110000>;
+ temperature = <90000>;
hysteresis = <2000>;
type = "critical";
};
--
2.35.3

122
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-sun50i-h5-add-cpu-opp-refs.patch Normal file
View File

@@ -0,0 +1,122 @@
From e51c780cc9461af2d2ea82449a8c5a427674e9ba Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Wed, 2 Feb 2022 20:40:02 +0300
Subject: [PATCH 131/153] arm64:dts:sun50i-h5 add cpu opp refs
---
arch/arm64/boot/dts/allwinner/sun50i-h5-bananapi-m2-plus.dts | 1 +
arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-k1-plus.dts | 3 ++-
arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-m1-plus2.dts | 1 +
arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-core2.dts | 1 +
arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts | 1 +
arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2-v1.1.dts | 1 +
arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts | 1 +
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts | 1 +
8 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-bananapi-m2-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-bananapi-m2-plus.dts
index 77661006d..fa1f4e706 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-bananapi-m2-plus.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-bananapi-m2-plus.dts
@@ -3,6 +3,7 @@
/dts-v1/;
#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp.dtsi"
#include <arm/sunxi-bananapi-m2-plus.dtsi>
/ {
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-k1-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-k1-plus.dts
index b7045a9ef..4980076da 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-k1-plus.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-k1-plus.dts
@@ -42,6 +42,7 @@
/dts-v1/;
#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
@@ -393,4 +394,4 @@ &usbphy {
&i2s0 {
sound-dai = <&pcm5102a>;
status = "disabled";
-};
\ No newline at end of file
+};
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-m1-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-m1-plus2.dts
index d051382cc..2c742e0e8 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-m1-plus2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-m1-plus2.dts
@@ -43,6 +43,7 @@
/dts-v1/;
#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-core2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-core2.dts
index 57283cc16..8d1958cd5 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-core2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-core2.dts
@@ -43,6 +43,7 @@
/dts-v1/;
#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
index 4c3921ac2..49e28ed6d 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
@@ -4,6 +4,7 @@
/dts-v1/;
#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2-v1.1.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2-v1.1.dts
index 06ffbbd29..be48938ee 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2-v1.1.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2-v1.1.dts
@@ -42,6 +42,7 @@
/dts-v1/;
#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
index 39331229c..ba597c9d3 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
@@ -3,6 +3,7 @@
/dts-v1/;
#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
index 375572d2f..8b92d5e77 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
@@ -5,6 +5,7 @@
/dts-v1/;
#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
--
2.35.3

102
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-sun50i-h5-add-termal-zones.patch Normal file
View File

@@ -0,0 +1,102 @@
From 263bb996828c94d6dcc6bf5ef41ead641fc909d8 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Wed, 2 Feb 2022 21:12:46 +0300
Subject: [PATCH 132/153] arm64:dts:sun50i-h5 add termal zones
---
arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 66 ++++++++++++++++----
1 file changed, 54 insertions(+), 12 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
index 62952660b..f6d970d9b 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
@@ -207,31 +207,73 @@ ths: thermal-sensor@1c25000 {
thermal-zones {
cpu_thermal: cpu-thermal {
- polling-delay-passive = <0>;
- polling-delay = <0>;
+ /* milliseconds */
+ polling-delay-passive = <250>;
+ polling-delay = <1000>;
thermal-sensors = <&ths 0>;
trips {
- cpu_hot_trip: cpu-hot {
+ cpu_warm: cpu_warm {
+ temperature = <75000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_hot_pre: cpu_hot_pre {
temperature = <80000>;
hysteresis = <2000>;
type = "passive";
};
- cpu_very_hot_trip: cpu-very-hot {
- temperature = <100000>;
- hysteresis = <0>;
+ cpu_hot: cpu_hot {
+ temperature = <85000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_very_hot_pre: cpu_very_hot_pre {
+ temperature = <90000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_very_hot: cpu_very_hot {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_crit: cpu_crit {
+ temperature = <105000>;
+ hysteresis = <2000>;
type = "critical";
};
};
cooling-maps {
- cpu-hot-limit {
- trip = <&cpu_hot_trip>;
- cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ cpu_warm_limit_cpu {
+ trip = <&cpu_warm>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT 2>;
+ };
+
+ cpu_hot_pre_limit_cpu {
+ trip = <&cpu_hot_pre>;
+ cooling-device = <&cpu0 2 3>;
+ };
+
+ cpu_hot_limit_cpu {
+ trip = <&cpu_hot>;
+ cooling-device = <&cpu0 3 4>;
+ };
+
+ cpu_very_hot_pre_limit_cpu {
+ trip = <&cpu_very_hot_pre>;
+ cooling-device = <&cpu0 5 6>;
+ };
+
+ cpu_very_hot_limit_cpu {
+ trip = <&cpu_very_hot>;
+ cooling-device = <&cpu0 7 THERMAL_NO_LIMIT>;
};
};
};
--
2.35.3

66
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-sun50i-h5-nanopi-neo2-add-regulator-led-triger.patch Normal file
View File

@@ -0,0 +1,66 @@
From 9229f14cbdfed251f4bca5647fdba69c6f61b42b Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 19:24:24 +0300
Subject: [PATCH 092/153] arm64:dts: sun50i-h5-nanopi-neo2 add regulator, led
triger
---
.../dts/allwinner/sun50i-h5-nanopi-neo2.dts | 23 ++++++++++++++++++-
1 file changed, 22 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
index 05486ccce..39331229c 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts
@@ -25,12 +25,13 @@ leds {
led-0 {
label = "nanopi:green:pwr";
gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
- default-state = "on";
+ linux,default-trigger = "default-on";
};
led-1 {
label = "nanopi:blue:status";
gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
};
};
@@ -51,6 +52,22 @@ reg_vcc3v3: vcc3v3 {
regulator-max-microvolt = <3300000>;
};
+ vdd_cpux: gpio-regulator {
+ compatible = "regulator-gpio";
+ pinctrl-names = "default";
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1100000 0x1>;
+ };
+
reg_usb0_vbus: usb0-vbus {
compatible = "regulator-fixed";
regulator-name = "usb0-vbus";
@@ -62,6 +79,10 @@ reg_usb0_vbus: usb0-vbus {
};
};
+&cpu0 {
+ cpu-supply = <&vdd_cpux>;
+};
+
&ehci0 {
status = "okay";
};
--
2.35.3

41
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-sun50i-h5-nanopi-r1s-h5-add-rtl8153-suppor.patch Normal file
View File

@@ -0,0 +1,41 @@
From e7484ea6673338b10e5ebe3b28fafc782301e153 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Tue, 27 Sep 2022 15:28:08 +0300
Subject: [PATCH 150/153] arm64: dts: sun50i-h5-nanopi-r1s-h5: add rtl8153
support
---
.../boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts
index a3e040da3..78c568cab 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts
@@ -21,7 +21,8 @@ / {
aliases {
ethernet0 = &emac;
- ethernet1 = &rtl8189etv;
+ ethernet1 = &rtl8153;
+ ethernet2 = &rtl8189etv;
serial0 = &uart0;
};
@@ -116,6 +117,13 @@ &cpu0 {
&ehci1 {
status = "okay";
+
+ rtl8153: device@1 {
+ compatible = "usbbda,8153";
+ reg = <1>;
+ realtek,led-data = <0x87>;
+ local-mac-address = [00 00 00 00 00 00];
+ };
};
&ehci2 {
--
2.35.3

51
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-sun50i-h5-orangepi-pc2-add-spi-flash.patch Normal file
View File

@@ -0,0 +1,51 @@
From e660f69add6fa460f9b824915cb5fd980997a33c Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 19:27:52 +0300
Subject: [PATCH 093/153] arm64:dts: sun50i-h5-orangepi-pc2 add spi flash
---
.../dts/allwinner/sun50i-h5-orangepi-pc2.dts | 25 ++++++++++++++-----
1 file changed, 19 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
index 20bcbe707..a6dc8696a 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts
@@ -182,15 +182,28 @@ &sound_hdmi {
status = "okay";
};
-&spi0 {
+&spi0 {
status = "okay";
-
- flash@0 {
+ spi-flash@0 {
#address-cells = <1>;
- #size-cells = <1>;
+ #size-cells = <0>;
compatible = "jedec,spi-nor";
- reg = <0>;
- spi-max-frequency = <40000000>;
+ reg = <0>; /* Chip select 0 */
+ spi-max-frequency = <10000000>;
+ status = "okay";
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ partition@0 {
+ label = "uboot";
+ reg = <0x0 0x100000>;
+ };
+ partition@100000 {
+ label = "env";
+ reg = <0x100000 0x100000>;
+ };
+ };
};
};
--
2.35.3

92
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-sun50i-h5-orangepi-prime-add-regulator.patch Normal file
View File

@@ -0,0 +1,92 @@
From 97c2daed24e3317b3dbc4f1c8fc647d42d268c85 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 19:34:31 +0300
Subject: [PATCH 094/153] arm64:dts: sun50i-h5-orangepi-prime add regulator
---
.../allwinner/sun50i-h5-orangepi-prime.dts | 43 ++++++++++++++++---
1 file changed, 36 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
index 6e44f86a8..375572d2f 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
@@ -8,11 +8,19 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Xunlong Orange Pi Prime";
compatible = "xunlong,orangepi-prime", "allwinner,sun50i-h5";
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
aliases {
ethernet0 = &emac;
serial0 = &uart0;
@@ -68,13 +76,6 @@ reg_gmac_3v3: gmac-3v3 {
gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
};
- reg_vcc3v3: vcc3v3 {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
-
reg_usb0_vbus: usb0-vbus {
compatible = "regulator-fixed";
regulator-name = "usb0-vbus";
@@ -91,6 +92,10 @@ wifi_pwrseq: wifi_pwrseq {
};
};
+&cpu0 {
+ cpu-supply = <&reg_vdd_cpux>;
+};
+
&codec {
allwinner,audio-routing =
"Line Out", "LINEOUT",
@@ -189,6 +194,30 @@ &ohci3 {
&sound_hdmi {
status = "okay";
};
+&r_i2c {
+ status = "okay";
+
+ reg_vdd_cpux: regulator@65 {
+ compatible = "silergy,sy8106a";
+ reg = <0x65>;
+ regulator-name = "vdd-cpux";
+ silergy,fixed-microvolt = <1200000>;
+ /*
+ * The datasheet uses 1.1V as the minimum value of VDD-CPUX,
+ * however both the Armbian DVFS table and the official one
+ * have operating points with voltage under 1.1V, and both
+ * DVFS table are known to work properly at the lowest
+ * operating point.
+ *
+ * Use 1.0V as the minimum voltage instead.
+ */
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1400000>;
+ regulator-ramp-delay = <200>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+};
&uart0 {
pinctrl-names = "default";
--
2.35.3

35
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-sun50i-h5-orangepi-prime-add-rtl8723cs.patch Normal file
View File

@@ -0,0 +1,35 @@
From 9e9848bb89025a104dd9b2faad1c5931f3adead4 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 7 Feb 2022 19:11:07 +0300
Subject: [PATCH 138/153] arm64:dts: sun50i-h5-orangepi-prime add rtl8723cs
---
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
index 8b92d5e77..f430acd85 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
@@ -25,6 +25,7 @@ reg_vcc3v3: vcc3v3 {
aliases {
ethernet0 = &emac;
serial0 = &uart0;
+ ethernet1 = &rtl8723cs;
};
chosen {
@@ -174,6 +175,10 @@ &mmc1 {
bus-width = <4>;
non-removable;
status = "okay";
+
+ rtl8723cs: sdio_wifi@1 {
+ reg = <1>;
+ };
};
&ohci0 {
--
2.35.3

67
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-sun50i-h5-orangepi-zero-plus-add-regulator.patch Normal file
View File

@@ -0,0 +1,67 @@
From 0ddff3861766b1b8433872b6f607ee0ffb6ef5c8 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 19:49:11 +0300
Subject: [PATCH 095/153] arm64:dts: sun50i-h5-orangepi-zero-plus add regulator
---
.../sun50i-h5-orangepi-zero-plus.dts | 25 ++++++++++++++++++-
1 file changed, 24 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts
index 7ec5ac850..dfa5fd2a7 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus.dts
@@ -4,6 +4,7 @@
/dts-v1/;
#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
@@ -36,12 +37,13 @@ leds {
led-0 {
label = "orangepi:green:pwr";
gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
- default-state = "on";
+ linux,default-trigger = "default-on";
};
led-1 {
label = "orangepi:red:status";
gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>; /* PA17 */
+ linux,default-trigger = "heartbeat";
};
};
@@ -54,6 +56,27 @@ reg_gmac_3v3: gmac-3v3 {
enable-active-high;
gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */
};
+
+ reg_sy8113b: gpio-regulator {
+ compatible = "regulator-gpio";
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1300000>;
+ regulator-ramp-delay = <50>; /* 4ms */
+
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+ enable-active-high;
+ gpios-states = <0x1>;
+ states = <1100000 0x0
+ 1300000 0x1>;
+ };
+};
+
+&cpu0 {
+ cpu-supply = <&reg_sy8113b>;
};
&ehci0 {
--
2.35.3

107
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-sun50i-h5-orangepi-zero-plus2-regulator-gpio-fix.patch Normal file
View File

@@ -0,0 +1,107 @@
From 609e1ded7fdb0f4bb7c5a46ac841fb92d2f13620 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Mon, 24 Jan 2022 19:54:04 +0300
Subject: [PATCH 096/153] arm64:dts: sun50i-h5-orangepi-zero-plus2
regulator-gpio fix
---
.../sun50i-h5-orangepi-zero-plus2.dts | 58 ++++++++++++++-----
1 file changed, 45 insertions(+), 13 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts
index 3e69ebde5..999fdcd96 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts
@@ -4,6 +4,7 @@
/dts-v1/;
#include "sun50i-h5.dtsi"
+#include "sun50i-h5-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
@@ -30,33 +31,55 @@ hdmi_con_in: endpoint {
};
};
+ reg_vcc3v3: vcc3v3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&pio 0 9 GPIO_ACTIVE_LOW>; /* PA9 */
+ post-power-on-delay-ms = <200>;
+ };
+
leds {
compatible = "gpio-leds";
led-0 {
label = "orangepi:green:pwr";
- gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
- default-state = "on";
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
+ linux,default-trigger = "default-on";
};
led-1 {
label = "orangepi:red:status";
- gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>;
+ gpios = <&pio 0 17 GPIO_ACTIVE_HIGH>; /* PA17 */
+ linux,default-trigger = "heartbeat";
};
};
- reg_vcc3v3: vcc3v3 {
- compatible = "regulator-fixed";
- regulator-name = "vcc3v3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
+ reg_vdd_cpux: gpio-regulator {
+ compatible = "regulator-gpio";
+ regulator-name = "vdd-cpux";
+ regulator-type = "voltage";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1108475>;
+ regulator-max-microvolt = <1307810>;
+ regulator-ramp-delay = <50>; /* 4ms */
+// enable-gpios = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
+ gpios = <&r_pio 0 6 0>; /* PL6 */
+ enable-active-high;
+ gpios-states = <0x1>;
+ states = <1108475 0x0
+ 1307810 0x1>;
};
+};
- wifi_pwrseq: wifi_pwrseq {
- compatible = "mmc-pwrseq-simple";
- reset-gpios = <&pio 0 9 GPIO_ACTIVE_LOW>; /* PA9 */
- post-power-on-delay-ms = <200>;
- };
+&cpu0 {
+ cpu-supply = <&reg_vdd_cpux>;
};
&de {
@@ -149,3 +172,12 @@ &usb_otg {
&usbphy {
status = "okay";
};
+
+&usb_otg {
+ dr_mode = "otg";
+ status = "okay";
+};
+
+&usbphy {
+ status = "okay";
+};
--
2.35.3

122
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-sun50i-h6-Add-AC200-EPHY-related-nodes.patch Normal file
View File

@@ -0,0 +1,122 @@
From fbb61f5656e716e63aba5b04f42966656790cd4b Mon Sep 17 00:00:00 2001
From: Jernej Skrabec <jernej.skrabec@siol.net>
Date: Sun, 12 Jan 2020 12:09:12 +0100
Subject: [PATCH 072/153] arm64:dts: sun50i-h6: Add AC200 EPHY related nodes
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 63 ++++++++++++++++++++
1 file changed, 63 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index fcabca590..8118a3465 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -23,6 +23,16 @@ aliases {
mmc2 = &mmc2;
};
+ ac200_pwm_clk: ac200_clk {
+ compatible = "pwm-clock";
+ #clock-cells = <0>;
+ clock-frequency = <24000000>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm1_pin>;
+ pwms = <&pwm 1 42 0>;
+ status = "disabled";
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -320,6 +330,10 @@ ths_calibration: thermal-sensor-calibration@14 {
reg = <0x14 0x8>;
};
+ ephy_calibration: ephy-calibration@2c {
+ reg = <0x2c 0x2>;
+ };
+
cpu_speed_grade: cpu-speed-grade@1c {
reg = <0x1c 0x4>;
};
@@ -377,6 +391,14 @@ ext_rgmii_pins: rgmii-pins {
drive-strength = <40>;
};
+ /omit-if-no-ref/
+ ext_rmii_pins: rmii_pins {
+ pins = "PA0", "PA1", "PA2", "PA3", "PA4",
+ "PA5", "PA6", "PA7", "PA8", "PA9";
+ function = "emac";
+ drive-strength = <40>;
+ };
+
hdmi_pins: hdmi-pins {
pins = "PH8", "PH9", "PH10";
function = "hdmi";
@@ -397,6 +419,11 @@ i2c2_pins: i2c2-pins {
function = "i2c2";
};
+ i2c3_pins: i2c3-pins {
+ pins = "PB17", "PB18";
+ function = "i2c3";
+ };
+
mmc0_pins: mmc0-pins {
pins = "PF0", "PF1", "PF2", "PF3",
"PF4", "PF5";
@@ -414,6 +441,11 @@ mmc1_pins: mmc1-pins {
bias-pull-up;
};
+ pwm1_pin: pwm1-pin {
+ pins = "PB19";
+ function = "pwm1";
+ };
+
mmc2_pins: mmc2-pins {
pins = "PC1", "PC4", "PC5", "PC6",
"PC7", "PC8", "PC9", "PC10",
@@ -656,6 +688,37 @@ spi1: spi@5011000 {
#size-cells = <0>;
};
+ i2c3: i2c@5002c00 {
+ compatible = "allwinner,sun50i-h6-i2c",
+ "allwinner,sun6i-a31-i2c";
+ reg = <0x05002c00 0x400>;
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2C3>;
+ resets = <&ccu RST_BUS_I2C3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c3_pins>;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ac200: mfd@10 {
+ compatible = "x-powers,ac200";
+ reg = <0x10>;
+ interrupt-parent = <&pio>;
+ interrupts = <1 20 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ ac200_ephy: phy {
+ compatible = "x-powers,ac200-ephy";
+ clocks = <&ac200_pwm_clk>;
+ nvmem-cells = <&ephy_calibration>;
+ nvmem-cell-names = "calibration";
+ status = "disabled";
+ };
+ };
+ };
+
emac: ethernet@5020000 {
compatible = "allwinner,sun50i-h6-emac",
"allwinner,sun50i-a64-emac";
--
2.35.3

119
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-sun50i-h6-Add-r_uart-uart2-3-pins.patch Normal file
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@@ -0,0 +1,119 @@
From 2330659335bd12f215a6d08a8642c3f92243bd6c Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Sun, 23 Jan 2022 20:49:27 +0300
Subject: [PATCH 074/153] arm64:dts: sun50i-h6 Add r_uart uart2-3 pins
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 60 ++++++++++++++++----
1 file changed, 50 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index 8118a3465..2c6204845 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -320,6 +320,17 @@ msgbox: mailbox@3003000 {
#mbox-cells = <1>;
};
+ gic: interrupt-controller@3021000 {
+ compatible = "arm,gic-400";
+ reg = <0x03021000 0x1000>,
+ <0x03022000 0x2000>,
+ <0x03024000 0x2000>,
+ <0x03026000 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ };
+
sid: efuse@3006000 {
compatible = "allwinner,sun50i-h6-sid";
reg = <0x03006000 0x400>;
@@ -383,6 +394,7 @@ pio: pinctrl@300b000 {
interrupt-controller;
#interrupt-cells = <3>;
+ /omit-if-no-ref/
ext_rgmii_pins: rgmii-pins {
pins = "PD0", "PD1", "PD2", "PD3", "PD4",
"PD5", "PD7", "PD8", "PD9", "PD10",
@@ -446,6 +458,7 @@ pwm1_pin: pwm1-pin {
function = "pwm1";
};
+ /omit-if-no-ref/
mmc2_pins: mmc2-pins {
pins = "PC1", "PC4", "PC5", "PC6",
"PC7", "PC8", "PC9", "PC10",
@@ -499,17 +512,26 @@ uart1_rts_cts_pins: uart1-rts-cts-pins {
pins = "PG8", "PG9";
function = "uart1";
};
- };
- gic: interrupt-controller@3021000 {
- compatible = "arm,gic-400";
- reg = <0x03021000 0x1000>,
- <0x03022000 0x2000>,
- <0x03024000 0x2000>,
- <0x03026000 0x2000>;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
- interrupt-controller;
- #interrupt-cells = <3>;
+ uart2_pins: uart2-pins {
+ pins = "PD19", "PD20";
+ function = "uart2";
+ };
+
+ uart2_rts_cts_pins: uart2-rts-cts-pins {
+ pins = "PD21", "PD22";
+ function = "uart2";
+ };
+
+ uart3_pins: uart3-pins {
+ pins = "PD23", "PD24";
+ function = "uart3";
+ };
+
+ uart3_rts_cts_pins: uart3-rts-cts-pins {
+ pins = "PD25", "PD26";
+ function = "uart3";
+ };
};
iommu: iommu@30f0000 {
@@ -1027,6 +1049,19 @@ tcon_tv_out_tcon_top: endpoint@1 {
};
};
+ r_uart: serial@7080000 {
+ compatible = "snps,dw-apb-uart";
+ reg = <0x07080000 0x400>;
+ interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
+ reg-shift = <2>;
+ reg-io-width = <4>;
+ clocks = <&r_ccu CLK_R_APB2_UART>;
+ resets = <&r_ccu RST_R_APB2_UART>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&r_uart_pins>;
+ status = "disabled";
+ };
+
rtc: rtc@7000000 {
compatible = "allwinner,sun50i-h6-rtc";
reg = <0x07000000 0x400>;
@@ -1092,6 +1127,11 @@ r_rsb_pins: r-rsb-pins {
pins = "PL0", "PL1";
function = "s_rsb";
};
+
+ r_uart_pins: r-uart-pins {
+ pins = "PL2", "PL3";
+ function = "s_uart";
+ };
};
r_ir: ir@7040000 {
--
2.35.3

24
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-sun50i-h6-orangepi-3-add-r_uart-aliase.patch Normal file
View File

@@ -0,0 +1,24 @@
From 26999073bbe90f85d65cbc273b0e64496618bd45 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Wed, 2 Feb 2022 20:12:37 +0300
Subject: [PATCH 130/153] arm64:dts: sun50i-h6-orangepi-3 add r_uart aliase
---
arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
index 52b733c7e..59e9095d7 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
@@ -15,6 +15,7 @@ / {
aliases {
serial0 = &uart0;
serial1 = &uart1;
+ serial9 = &r_uart;
ethernet0 = &emac;
};
--
2.35.3

25
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-sun50i-h6-orangepi-3-delete-node-spi0.patch Normal file
View File

@@ -0,0 +1,25 @@
From 7e57e8a636d2e300860752c3bab526fb0002ff5e Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Tue, 25 Jan 2022 17:06:21 +0300
Subject: [PATCH 098/153] arm64:dts: sun50i-h6-orangepi-3 delete-node &spi0
---
arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
index ead12d861..52b733c7e 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
@@ -347,6 +347,8 @@ &sound_hdmi {
status = "okay";
};
+/delete-node/ &spi0;
+
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_ph_pins>;
--
2.35.3

35
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-sun50i-h6-orangepi-add-cpu-opp-refs.patch Normal file
View File

@@ -0,0 +1,35 @@
From 73f520243a73122d115367e115afdc29ac4c8a5e Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Wed, 2 Feb 2022 21:18:05 +0300
Subject: [PATCH 133/153] arm64:dts: sun50i-h6-orangepi add cpu opp refs
---
arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
index b019bbaae..a494b3bbf 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
@@ -5,6 +5,7 @@
/dts-v1/;
#include "sun50i-h6.dtsi"
+#include "sun50i-h6-cpu-opp.dtsi"
#include <dt-bindings/gpio/gpio.h>
@@ -64,6 +65,10 @@ reg_vcc5v: vcc5v {
};
};
+&cpu0 {
+ cpu-supply = <&reg_dcdca>;
+};
+
&de {
status = "okay";
};
--
2.35.3

26
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-sun50i-h6-orangepi-enable-higher-clock-regulator-max-.patch Normal file
View File

@@ -0,0 +1,26 @@
From 99aa5c20eeea53e0e51ccb0a453f9ca7a385bd49 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Wed, 2 Feb 2022 21:22:57 +0300
Subject: [PATCH 134/153] arm64:dts: sun50i-h6-orangepi enable higher clock
regulator-max-microvolt
---
arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
index a494b3bbf..ee1919b80 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
@@ -217,7 +217,7 @@ reg_cldo3: cldo3 {
reg_dcdca: dcdca {
regulator-always-on;
regulator-min-microvolt = <810000>;
- regulator-max-microvolt = <1080000>;
+ regulator-max-microvolt = <1160000>;
regulator-name = "vdd-cpu";
};
--
2.35.3

61
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-sun50i-h6-orangepi-lite2-spi0-usb3phy-dwc3-enable.patch Normal file
View File

@@ -0,0 +1,61 @@
From 31caa82a78ff7546dad5c27372a499ff85b7fa78 Mon Sep 17 00:00:00 2001
From: Igor Pecovnik <igor.pecovnik@gmail.com>
Date: Thu, 22 Jul 2021 08:56:39 +0200
Subject: [PATCH 099/153] arm64:dts: sun50i-h6-orangepi-lite2 spi0, usb3phy,
dwc3 enable
Signed-off-by: Igor Pecovnik <igor.pecovnik@gmail.com>
---
.../allwinner/sun50i-h6-orangepi-lite2.dts | 26 +++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts
index fb31dcb1c..d16ef4cc0 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-lite2.dts
@@ -1,5 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2018 Jagan Teki <jagan@openedev.com>
+// Copyright (C) 2021 Igor Pecovnik <igor@armbian.com>
#include "sun50i-h6-orangepi.dtsi"
@@ -11,6 +12,16 @@ aliases {
serial1 = &uart1; /* BT-UART */
};
+ reg_usb_vbus: vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ startup-delay-us = <100000>;
+ gpio = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 USB0-DRVVBUS */
+ enable-active-high;
+ };
+
wifi_pwrseq: wifi_pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&rtc CLK_OSC32K_FANOUT>;
@@ -72,3 +83,18 @@ bluetooth {
max-speed = <1500000>;
};
};
+
+&spi0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pins>;
+ status = "disabled";
+};
+
+&usb3phy {
+ phy-supply = <&reg_usb_vbus>;
+ status = "okay";
+};
+
+&dwc3 {
+ status = "okay";
+};
--
2.35.3

41
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-sun50i-h6-orangepi.dtsi-Rollback-r_rsb-to-r_i2c.patch Normal file
View File

@@ -0,0 +1,41 @@
From bf74a867f2c0f63ad7c7051fb5052391b6444cf7 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Sun, 24 Jul 2022 13:56:50 +0300
Subject: [PATCH 152/153] arm64: dts: sun50i-h6-orangepi.dtsi: Rollback r_rsb
to r_i2c
This fix affects two boards:
sun50i-h6-orangepi-lite2.dts
sun50i-h6-orangepi-one-plus.dts
It also depends on the revision of the board.
If your board fails when working with this fix, just disable
it by adding (-) minus to the first position of the line
in which the patch is written in the series.conf file.
---
arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
index ee1919b80..15f4d7de9 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
@@ -129,12 +129,12 @@ &r_pio {
vcc-pm-supply = <&reg_bldo3>;
};
-&r_rsb {
+&r_i2c {
status = "okay";
- axp805: pmic@745 {
+ axp805: pmic@36 {
compatible = "x-powers,axp805", "x-powers,axp806";
- reg = <0x745>;
+ reg = <0x36>;
interrupt-parent = <&r_intc>;
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
--
2.35.3

36
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-sun50i-h6-pine-h64-add-dwc3-usb3phy.patch Normal file
View File

@@ -0,0 +1,36 @@
From 44d50a796b4611b646f18bf5a25792d4febf50b4 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Tue, 25 Jan 2022 19:05:25 +0300
Subject: [PATCH 101/153] arm64:dts: sun50i-h6-pine-h64 add dwc3 usb3phy
---
arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
index 41d3b5d21..454d2a297 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
@@ -89,6 +89,10 @@ reg_usb_vbus: vbus {
};
};
+&dwc3 {
+ status = "okay";
+};
+
&cpu0 {
cpu-supply = <&reg_dcdca>;
};
@@ -378,3 +382,8 @@ &usb2phy {
usb3_vbus-supply = <&reg_usb_vbus>;
status = "okay";
};
+
+&usb3phy {
+ phy-supply = <&reg_usb_vbus>;
+ status = "okay";
+};
--
2.35.3

81
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-sun50i-h6-pine-h64-add-wifi-rtl8723cs.patch Normal file
View File

@@ -0,0 +1,81 @@
From 7e74d4487fe647f97fa665603bd369a0e5dab361 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Tue, 25 Jan 2022 18:41:47 +0300
Subject: [PATCH 100/153] arm64:dts: sun50i-h6-pine-h64 add wifi rtl8723cs
---
.../boot/dts/allwinner/sun50i-h6-pine-h64.dts | 38 +++++++++++++++++++
1 file changed, 38 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
index 341f42ae0..41d3b5d21 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-pine-h64.dts
@@ -41,6 +41,14 @@ hdmi_con_in: endpoint {
};
};
+ wifi_pwrseq: wifi_pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ clocks = <&rtc 1>;
+ clock-names = "ext_clock";
+ reset-gpios = <&r_pio 1 3 GPIO_ACTIVE_LOW>; /* PM3 */
+ post-power-on-delay-ms = <200>;
+ };
+
leds {
compatible = "gpio-leds";
@@ -141,6 +149,24 @@ &mmc0 {
status = "okay";
};
+&mmc1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins>;
+ vmmc-supply = <&reg_cldo2>;
+ vqmmc-supply = <&reg_bldo2>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ bus-width = <4>;
+ non-removable;
+ status = "okay";
+
+ rtl8723cs: sdio_wifi@1 {
+ reg = <1>;
+ interrupt-parent = <&r_pio>;
+ interrupts = <1 0 IRQ_TYPE_LEVEL_LOW>; /* PM0 */
+ interrupt-names = "host-wake";
+ };
+};
+
&mmc2 {
vmmc-supply = <&reg_cldo1>;
vqmmc-supply = <&reg_bldo2>;
@@ -234,12 +260,24 @@ reg_cldo1: cldo1 {
};
reg_cldo2: cldo2 {
+ /*
+ * This regulator is connected with CLDO3.
+ * Before the kernel can support synchronized
+ * enable of coupled regulators, keep them
+ * both always on as a ugly hack.
+ */
+ regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-wifi-1";
};
reg_cldo3: cldo3 {
+ /*
+ * This regulator is connected with CLDO2.
+ * See the comments for CLDO2.
+ */
+ regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc-wifi-2";
--
2.35.3

34
patch/kernel/archive/sunxi-6.4/patches.armbian/arm64-dts-sun50i-h6.dtsi-add-pinctrl-pins-for-spi.patch Normal file
View File

@@ -0,0 +1,34 @@
From 3d26d49b828b3da506e582ee26c6c0b2c5b16124 Mon Sep 17 00:00:00 2001
From: The-going <48602507+The-going@users.noreply.github.com>
Date: Fri, 28 Jan 2022 15:19:32 +0300
Subject: [PATCH 103/153] arm64:dts: sun50i-h6.dtsi add pinctrl pins for spi
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index 699c8dee7..e6fd95b6f 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -690,6 +690,8 @@ spi0: spi@5010000 {
clock-names = "ahb", "mod";
dmas = <&dma 22>, <&dma 22>;
dma-names = "rx", "tx";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi0_pins>, <&spi0_cs_pin>;
resets = <&ccu RST_BUS_SPI0>;
status = "disabled";
#address-cells = <1>;
@@ -705,6 +707,8 @@ spi1: spi@5011000 {
clock-names = "ahb", "mod";
dmas = <&dma 23>, <&dma 23>;
dma-names = "rx", "tx";
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi1_pins>, <&spi1_cs_pin>;
resets = <&ccu RST_BUS_SPI1>;
status = "disabled";
#address-cells = <1>;
--
2.35.3

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