mirror of
https://github.com/armbian/build
synced 2025-09-24 19:47:06 +07:00
move kernel media current 6.1 and edge 6.2 (#4781)
* move kernel media current 6.1 and edge 6.2 add board quartz64b * fix nanopc-t4
This commit is contained in:
Oleg
@@ -2,7 +2,7 @@ new file mode 100644
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index 000000000..fac2db500
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--- /dev/null
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+++ b/arch/arm64/boot/dts/rockchip/rk3566-firefly-roc-pc.dts
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@@ -0,0 +1,784 @@
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@@ -0,0 +1,773 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+/*
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+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
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@@ -78,61 +78,62 @@ index 000000000..fac2db500
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+ vin-supply = <&vcc5v0_in>;
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+ };
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+
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+ vcc5v0_usb30_host: vcc5v0_usb30_host {
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+ vcc5v0_host: vcc5v0-host-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc5v0_usb30_host";
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+ regulator-name = "vcc5v0_host";
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+ enable-active-high;
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+ gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&vcc5v0_usb30_host_en_h>;
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+ pinctrl-0 = <&vcc5v0_host_en>;
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+ regulator-always-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ vin-supply = <&vcc5v0_sys>;
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+ };
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+
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+ vcc5v0_usb_otg: vcc5v0_usb_otg {
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+ vcc5v0_otg: vcc5v0-otg-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc5v0_usb_otg";
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+ regulator-name = "vcc5v0_otg";
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+ enable-active-high;
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+ gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&vcc5v0_usb_otg_en_h>;
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+ pinctrl-0 = <&vcc5v0_otg_en>;
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+ regulator-always-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ vin-supply = <&vcc5v0_sys>;
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+ };
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+
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+ pcie30_3v3: gpio-regulator {
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+ compatible = "regulator-gpio";
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+ regulator-name = "pcie30_3v3";
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+ regulator-min-microvolt = <100000>;
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+ vcc3v3_pcie_p: vcc3v3-pcie-p-regulator {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pcie_enable_h>;
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+ regulator-name = "vcc3v3_pcie_p";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
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+ gpios-states = <0x1>;
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+ states = <100000 0x0
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+ 3300000 0x1>;
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+ vin-supply = <&vcc_3v3>;
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+ };
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+
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+ firefly_leds: leds {
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+ compatible = "gpio-leds";
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+ power_led: power {
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+ label = "firefly:blue:power";
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+ linux,default-trigger = "ir-power-click";
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+ default-state = "on";
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+ gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&led_power>;
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+ };
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+ label = "firefly:blue:power";
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+ linux,default-trigger = "ir-power-click";
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+ default-state = "on";
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+ gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&led_power>;
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+ };
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+
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+ user_led: user {
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+ label = "firefly:yellow:user";
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+ linux,default-trigger = "ir-user-click";
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+ default-state = "off";
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+ gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&led_user>;
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+ user_led: user {
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+ label = "firefly:yellow:user";
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+ linux,default-trigger = "ir-user-click";
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+ default-state = "off";
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+ gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&led_user>;
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+ };
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+ };
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+
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@@ -234,7 +235,6 @@ index 000000000..fac2db500
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+
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+&hdmi_in {
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+ hdmi_in_vp0: endpoint@0 {
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+// reg = <0>;
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+ remote-endpoint = <&vp0_out_hdmi>;
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+ };
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+};
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@@ -533,16 +533,11 @@ index 000000000..fac2db500
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+};
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+
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+&pcie2x1 {
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+ reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pcie_reset_gpio>;
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+ vpcie3v3-supply = <&pcie30_3v3>;
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+ status = "okay";
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+};
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+
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+&pcie30_3v3 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pcie_reset_h>;
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+ reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
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+ vpcie3v3-supply = <&vcc3v3_pcie_p>;
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+ status = "okay";
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+ gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
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+};
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+
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+&pinctrl {
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@@ -554,15 +549,15 @@ index 000000000..fac2db500
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+
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+ bt {
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+ bt_enable_h: bt-enable-h {
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+ rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
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+ rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+
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+ bt_host_wake_l: bt-host-wake-l {
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+ rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_down>;
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+ rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_down>;
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+ };
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+
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+ bt_wake_l: bt-wake-l {
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+ rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
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+ rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+ };
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+
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@@ -574,19 +569,21 @@ index 000000000..fac2db500
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+ };
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+
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+ usb {
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+ vcc5v0_usb30_host_en_h: vcc5v0-usb30-host-en_h {
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+ vcc5v0_host_en: vcc5v0-host-en {
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+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+
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+ vcc5v0_usb_otg_en_h: vcc5v0-usb-otg-en_h {
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+ vcc5v0_otg_en: vcc5v0-otg-en {
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+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+ };
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+
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+
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+
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+ pcie {
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+ pcie_reset_gpio: pcie-reset-gpio {
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+ pcie_enable_h: pcie-enable-h {
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+ rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+
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+ pcie_reset_h: pcie-reset-h {
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+ rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+ };
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@@ -680,14 +677,14 @@ index 000000000..fac2db500
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+};
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+
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+&uart0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart0_xfer>;
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+// pinctrl-names = "default";
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+// pinctrl-0 = <&uart0_xfer>;
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+ status = "disabled";
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+};
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+
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+&uart1 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;
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+ pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
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+ status = "okay";
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+ uart-has-rtscts;
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+
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@@ -739,12 +736,12 @@ index 000000000..fac2db500
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+};
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+
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+&usb2phy0_host {
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+ phy-supply = <&vcc5v0_usb30_host>;
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+ phy-supply = <&vcc5v0_host>;
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+ status = "okay";
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+};
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+
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+&usb2phy0_otg {
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+ vbus-supply = <&vcc5v0_usb_otg>;
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+ vbus-supply = <&vcc5v0_otg>;
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+ status = "okay";
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+};
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+
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@@ -753,23 +750,15 @@ index 000000000..fac2db500
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+};
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+
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+&usb2phy1_host {
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+ phy-supply = <&vcc5v0_usb30_host>;
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+ phy-supply = <&vcc5v0_host>;
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+ status = "okay";
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+};
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+
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+&usb2phy1_otg {
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+ phy-supply = <&vcc5v0_usb30_host>;
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+ phy-supply = <&vcc5v0_host>;
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+ status = "okay";
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+};
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+
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+//&usbdrd30 {
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+// status = "okay";
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+//};
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+
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+//&usbhost30 {
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+// status = "okay";
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+//};
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+
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+&vop {
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+ compatible = "rockchip,rk3568-vop";
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+ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
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@@ -56,39 +56,39 @@
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&combphy2 {
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/* used for SATA */
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status = "okay";
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+};
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+//};
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+
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+&cpu0 {
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+ cpu-supply = <&vdd_cpu>;
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+};
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+//&cpu0 {
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+// cpu-supply = <&vdd_cpu>;
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+//};
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+
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+&cpu1 {
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+ cpu-supply = <&vdd_cpu>;
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+};
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+//&cpu1 {
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+// cpu-supply = <&vdd_cpu>;
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+//};
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+
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+&cpu2 {
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+ cpu-supply = <&vdd_cpu>;
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+};
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+//&cpu2 {
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+// cpu-supply = <&vdd_cpu>;
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+//};
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+
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+&cpu3 {
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+ cpu-supply = <&vdd_cpu>;
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+};
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+//&cpu3 {
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+// cpu-supply = <&vdd_cpu>;
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+//};
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+
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+&cpu_thermal {
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+ trips {
|
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+ cpu_hot: cpu_hot {
|
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+ temperature = <55000>;
|
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+ hysteresis = <2000>;
|
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+ type = "active";
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+ };
|
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+ };
|
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+//&cpu_thermal {
|
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+// trips {
|
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+// cpu_hot: cpu_hot {
|
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+// temperature = <55000>;
|
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+// hysteresis = <2000>;
|
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+// type = "active";
|
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+// };
|
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+// };
|
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+
|
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+ cooling-maps {
|
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+ map1 {
|
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+ trip = <&cpu_hot>;
|
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+ cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
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+ };
|
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+ };
|
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+// cooling-maps {
|
||||
+// map1 {
|
||||
+// trip = <&cpu_hot>;
|
||||
+// cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
+// };
|
||||
+// };
|
||||
};
|
||||
|
||||
&gmac0 {
|
||||
@@ -97,23 +97,23 @@
|
||||
status = "okay";
|
||||
|
||||
+
|
||||
+ vdd_cpu: regulator@1c {
|
||||
+ compatible = "tcs,tcs4525";
|
||||
+ reg = <0x1c>;
|
||||
+ vin-supply = <&vcc5v0_sys>;
|
||||
+ regulator-compatible = "fan53555-reg";
|
||||
+ regulator-name = "vdd_cpu";
|
||||
+ regulator-min-microvolt = <712500>;
|
||||
+ regulator-max-microvolt = <1390000>;
|
||||
+ regulator-ramp-delay = <2300>;
|
||||
+ fcs,suspend-voltage-selector = <1>;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-always-on;
|
||||
+// vdd_cpu: regulator@1c {
|
||||
+// compatible = "tcs,tcs4525";
|
||||
+// reg = <0x1c>;
|
||||
+// vin-supply = <&vcc5v0_sys>;
|
||||
+// regulator-compatible = "fan53555-reg";
|
||||
+// regulator-name = "vdd_cpu";
|
||||
+// regulator-min-microvolt = <712500>;
|
||||
+// regulator-max-microvolt = <1390000>;
|
||||
+// regulator-ramp-delay = <2300>;
|
||||
+// fcs,suspend-voltage-selector = <1>;
|
||||
+// regulator-boot-on;
|
||||
+// regulator-always-on;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+// regulator-state-mem {
|
||||
+// regulator-off-in-suspend;
|
||||
+// };
|
||||
+// };
|
||||
+
|
||||
rk809: pmic@20 {
|
||||
compatible = "rockchip,rk809";
|
||||
File diff suppressed because it is too large
Load Diff
@@ -2,7 +2,7 @@ new file mode 100644
|
||||
index 000000000..fac2db500
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3568-firefly-roc-pc.dts
|
||||
@@ -0,0 +1,1000 @@
|
||||
@@ -0,0 +1,1044 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+/*
|
||||
+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
|
||||
@@ -180,6 +180,24 @@ index 000000000..fac2db500
|
||||
+ regulator-name = "vcc5v0_otg";
|
||||
+ };
|
||||
+
|
||||
+ vcc3v3_lcd0_n: vcc3v3-lcd0-n {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc3v3_lcd0_n";
|
||||
+ regulator-boot-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc3v3_lcd1_n: vcc3v3-lcd1-n {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc3v3_lcd1_n";
|
||||
+ regulator-boot-on;
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_hub_power: vcc-hub-power-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ enable-active-high;
|
||||
@@ -210,8 +228,17 @@ index 000000000..fac2db500
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ vcc_4g_power: vcc-4g-power-regulator {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ enable-active-high;
|
||||
+ gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&vcc_4g_power_en>;
|
||||
+ regulator-name = "vcc_4g_power_en";
|
||||
+ regulator-always-on;
|
||||
+ };
|
||||
+
|
||||
+ firefly_leds: leds {
|
||||
+// status = "okay";
|
||||
+ compatible = "gpio-leds";
|
||||
+ power_led: power {
|
||||
+ label = "firefly:blue:power";
|
||||
@@ -242,30 +269,30 @@ index 000000000..fac2db500
|
||||
+ reset-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+
|
||||
+// wireless_wlan: wireless-wlan {
|
||||
+// compatible = "wlan-platdata";
|
||||
+// rockchip,grf = <&grf>;
|
||||
+// wifi_chip_type = "ap6398s";
|
||||
+// pinctrl-names = "default";
|
||||
+// pinctrl-0 = <&wifi_host_wake_irq>;
|
||||
+// WIFI,host_wake_irq = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
|
||||
+// status = "disabled";
|
||||
+// };
|
||||
+ wireless_wlan: wireless-wlan {
|
||||
+ compatible = "wlan-platdata";
|
||||
+ rockchip,grf = <&grf>;
|
||||
+ wifi_chip_type = "ap6398s";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&wifi_host_wake_irq>;
|
||||
+ WIFI,host_wake_irq = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
+// wireless_bluetooth: wireless-bluetooth {
|
||||
+// compatible = "bluetooth-platdata";
|
||||
+// clocks = <&rk809 1>;
|
||||
+// clock-names = "ext_clock";
|
||||
+// //wifi-bt-power-toggle;
|
||||
+// uart_rts_gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
|
||||
+// pinctrl-names = "default", "rts_gpio";
|
||||
+// pinctrl-0 = <&uart8m0_rtsn>;
|
||||
+// pinctrl-1 = <&uart8_gpios>;
|
||||
+// BT,reset_gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
|
||||
+// BT,wake_gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
|
||||
+// BT,wake_host_irq = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
|
||||
+// status = "disabled";
|
||||
+// };
|
||||
+ wireless_bluetooth: wireless-bluetooth {
|
||||
+ compatible = "bluetooth-platdata";
|
||||
+ clocks = <&rk809 1>;
|
||||
+ clock-names = "ext_clock";
|
||||
+ //wifi-bt-power-toggle;
|
||||
+ uart_rts_gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
|
||||
+ pinctrl-names = "default", "rts_gpio";
|
||||
+ pinctrl-0 = <&uart8m0_rtsn>;
|
||||
+ pinctrl-1 = <&uart8_gpios>;
|
||||
+ BT,reset_gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
|
||||
+ BT,wake_gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
|
||||
+ BT,wake_host_irq = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
+ flash_led: flash-led {
|
||||
+ compatible = "led,rgb13h";
|
||||
@@ -279,18 +306,6 @@ index 000000000..fac2db500
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
+// vcc3v3_pcie: vcc3v3_pcie {
|
||||
+// compatible = "regulator-fixed";
|
||||
+// regulator-name = "vcc3v3_pcie";
|
||||
+// enable-active-high;
|
||||
+// gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
|
||||
+// pinctrl-names = "default";
|
||||
+// pinctrl-0 = <&vcc3v3_pcie_en_h>;
|
||||
+// regulator-min-microvolt = <3300000>;
|
||||
+// regulator-max-microvolt = <3300000>;
|
||||
+// vin-supply = <&vcc_3v3>;
|
||||
+// };
|
||||
+
|
||||
+ rk809-sound {
|
||||
+ compatible = "simple-audio-card";
|
||||
+ simple-audio-card,format = "i2s";
|
||||
@@ -407,7 +422,6 @@ index 000000000..fac2db500
|
||||
+
|
||||
+&hdmi_in {
|
||||
+ hdmi_in_vp0: endpoint@0 {
|
||||
+// reg = <0>;
|
||||
+ remote-endpoint = <&vp0_out_hdmi>;
|
||||
+ };
|
||||
+};
|
||||
@@ -698,6 +712,18 @@ index 000000000..fac2db500
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&i2c1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2c4 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2c5 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2s0_8ch {
|
||||
+ status = "okay";
|
||||
+};
|
||||
@@ -726,16 +752,16 @@ index 000000000..fac2db500
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+//&pcie30phy {
|
||||
+// status = "okay";
|
||||
+//};
|
||||
+&pcie30phy {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+//&pcie3x2 {
|
||||
+// reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
|
||||
+// vpcie3v3-supply = <&pcie30_3v3>;
|
||||
+&pcie3x2 {
|
||||
+ reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
|
||||
+ vpcie3v3-supply = <&pcie30_3v3>;
|
||||
+
|
||||
+// status = "okay";
|
||||
+//};
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&gic {
|
||||
+ status = "okay";
|
||||
@@ -752,17 +778,17 @@ index 000000000..fac2db500
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+// wireless-wlan {
|
||||
+// wifi_host_wake_irq: wifi-host-wake-irq {
|
||||
+// rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>;
|
||||
+// };
|
||||
+// };
|
||||
+ wireless-wlan {
|
||||
+ wifi_host_wake_irq: wifi-host-wake-irq {
|
||||
+ rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+// wireless-bluetooth {
|
||||
+// uart8_gpios: uart8-gpios {
|
||||
+// rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+// };
|
||||
+// };
|
||||
+ wireless-bluetooth {
|
||||
+ uart8_gpios: uart8-gpios {
|
||||
+ rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ pmic {
|
||||
+ pmic_int: pmic_int {
|
||||
@@ -803,6 +829,12 @@ index 000000000..fac2db500
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ 4g {
|
||||
+ vcc_4g_power_en: vcc-4g-power-en {
|
||||
+ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ leds {
|
||||
+ led_power: led-power {
|
||||
+ rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
@@ -860,15 +892,9 @@ index 000000000..fac2db500
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+//&sdio_pwrseq {
|
||||
+// status = "okay";
|
||||
+// reset-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>;
|
||||
+// post-power-on-delay-ms = <100>;
|
||||
+//};
|
||||
+
|
||||
+&sdmmc2 {
|
||||
+// max-frequency = <150000000>;
|
||||
+ max-frequency = <100000000>;
|
||||
+ max-frequency = <150000000>;
|
||||
+// max-frequency = <100000000>;
|
||||
+ supports-sdio;
|
||||
+ bus-width = <4>;
|
||||
+ disable-wp;
|
||||
@@ -883,14 +909,20 @@ index 000000000..fac2db500
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+//&wireless_wlan {
|
||||
+// wifi_chip_type = "ap6275s";
|
||||
+// status = "okay";
|
||||
+//};
|
||||
+&sdio_pwrseq {
|
||||
+ status = "okay";
|
||||
+ reset-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>;
|
||||
+ post-power-on-delay-ms = <100>;
|
||||
+};
|
||||
+
|
||||
+//&wireless_bluetooth {
|
||||
+// status = "okay";
|
||||
+//};
|
||||
+&wireless_wlan {
|
||||
+ wifi_chip_type = "ap6275s";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&wireless_bluetooth {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tsadc {
|
||||
+ rockchip,hw-tshut-mode = <1>;
|
||||
@@ -903,15 +935,21 @@ index 000000000..fac2db500
|
||||
+};
|
||||
+
|
||||
+&uart3 {
|
||||
+// status = "disabled";
|
||||
+ pinctrl-names = "default";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart4 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&uart4m1_xfer>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart8 {
|
||||
+ status = "okay";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&uart8m0_xfer &uart8m0_ctsn>;
|
||||
+};
|
||||
+
|
||||
+&usb_host0_ehci {
|
||||
@@ -975,6 +1013,12 @@ index 000000000..fac2db500
|
||||
+// status = "okay";
|
||||
+//};
|
||||
+
|
||||
+&rk809 {
|
||||
+ rtc {
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pwm4 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
@@ -135,7 +135,7 @@ Subject: [PATCH] media: v4l2: Add NV15 and NV20 pixel formats
|
||||
Add NV15 and NV20 pixel formats used by the Rockchip Video Decoder for
|
||||
10-bit buffers.
|
||||
|
||||
NV15 and NV20 is a packed 10-bit 4:2:0/4:2:2 semi-planar Y/CbCr format
|
||||
NV15 and NV20 is a packed 10-bit 4:2:0/4:2:2 semi-planar Y/UV format
|
||||
similar to P010 and P210 but has no padding between components. Instead,
|
||||
luminance and chrominance samples are grouped into 4s so that each group is
|
||||
packed into an integer number of bytes:
|
||||
@@ -172,28 +172,28 @@ index e6fd355a2e92..24771edaa4f2 100644
|
||||
--- a/drivers/media/v4l2-core/v4l2-ioctl.c
|
||||
+++ b/drivers/media/v4l2-core/v4l2-ioctl.c
|
||||
@@ -1354,6 +1354,8 @@ static void v4l_fill_fmtdesc(struct v4l2_fmtdesc *fmt)
|
||||
case V4L2_PIX_FMT_NV24: descr = "Y/CbCr 4:4:4"; break;
|
||||
case V4L2_PIX_FMT_NV42: descr = "Y/CrCb 4:4:4"; break;
|
||||
case V4L2_PIX_FMT_P010: descr = "10-bit Y/CbCr 4:2:0"; break;
|
||||
+ case V4L2_PIX_FMT_NV15: descr = "10-bit Y/CbCr 4:2:0 (Packed)"; break;
|
||||
+ case V4L2_PIX_FMT_NV20: descr = "10-bit Y/CbCr 4:2:2 (Packed)"; break;
|
||||
case V4L2_PIX_FMT_NV12_4L4: descr = "Y/CbCr 4:2:0 (4x4 Linear)"; break;
|
||||
case V4L2_PIX_FMT_NV12_16L16: descr = "Y/CbCr 4:2:0 (16x16 Linear)"; break;
|
||||
case V4L2_PIX_FMT_NV12_32L32: descr = "Y/CbCr 4:2:0 (32x32 Linear)"; break;
|
||||
case V4L2_PIX_FMT_NV24: descr = "Y/UV 4:4:4"; break;
|
||||
case V4L2_PIX_FMT_NV42: descr = "Y/VU 4:4:4"; break;
|
||||
case V4L2_PIX_FMT_P010: descr = "10-bit Y/UV 4:2:0"; break;
|
||||
+ case V4L2_PIX_FMT_NV15: descr = "10-bit Y/UV 4:2:0 (Packed)"; break;
|
||||
+ case V4L2_PIX_FMT_NV20: descr = "10-bit Y/UV 4:2:2 (Packed)"; break;
|
||||
case V4L2_PIX_FMT_NV12_4L4: descr = "Y/UV 4:2:0 (4x4 Linear)"; break;
|
||||
case V4L2_PIX_FMT_NV12_16L16: descr = "Y/UV 4:2:0 (16x16 Linear)"; break;
|
||||
case V4L2_PIX_FMT_NV12_32L32: descr = "Y/UV 4:2:0 (32x32 Linear)"; break;
|
||||
diff --git a/include/uapi/linux/videodev2.h b/include/uapi/linux/videodev2.h
|
||||
index 01e630f2ec78..cea44992aea3 100644
|
||||
--- a/include/uapi/linux/videodev2.h
|
||||
+++ b/include/uapi/linux/videodev2.h
|
||||
@@ -628,6 +628,9 @@ struct v4l2_pix_format {
|
||||
#define V4L2_PIX_FMT_NV42 v4l2_fourcc('N', 'V', '4', '2') /* 24 Y/CrCb 4:4:4 */
|
||||
#define V4L2_PIX_FMT_P010 v4l2_fourcc('P', '0', '1', '0') /* 24 Y/CbCr 4:2:0 10-bit per component */
|
||||
#define V4L2_PIX_FMT_NV42 v4l2_fourcc('N', 'V', '4', '2') /* 24 Y/VU 4:4:4 */
|
||||
#define V4L2_PIX_FMT_P010 v4l2_fourcc('P', '0', '1', '0') /* 24 Y/UV 4:2:0 10-bit per component */
|
||||
|
||||
+#define V4L2_PIX_FMT_NV15 v4l2_fourcc('N', 'V', '1', '5') /* 15 Y/CbCr 4:2:0 10-bit packed */
|
||||
+#define V4L2_PIX_FMT_NV20 v4l2_fourcc('N', 'V', '2', '0') /* 20 Y/CbCr 4:2:2 10-bit packed */
|
||||
+#define V4L2_PIX_FMT_NV15 v4l2_fourcc('N', 'V', '1', '5') /* 15 Y/UV 4:2:0 10-bit packed */
|
||||
+#define V4L2_PIX_FMT_NV20 v4l2_fourcc('N', 'V', '2', '0') /* 20 Y/UV 4:2:2 10-bit packed */
|
||||
+
|
||||
/* two non contiguous planes - one Y, one Cr + Cb interleaved */
|
||||
#define V4L2_PIX_FMT_NV12M v4l2_fourcc('N', 'M', '1', '2') /* 12 Y/CbCr 4:2:0 */
|
||||
#define V4L2_PIX_FMT_NV21M v4l2_fourcc('N', 'M', '2', '1') /* 21 Y/CrCb 4:2:0 */
|
||||
#define V4L2_PIX_FMT_NV12M v4l2_fourcc('N', 'M', '1', '2') /* 12 Y/UV 4:2:0 */
|
||||
#define V4L2_PIX_FMT_NV21M v4l2_fourcc('N', 'M', '2', '1') /* 21 Y/VU 4:2:0 */
|
||||
|
||||
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Karlman <jonas@kwiboo.se>
|
||||
@@ -2112,6 +2112,69 @@ index a2d101ebf7a7..7f6ffbc3e7b2 100644
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -2732,40 +2744,51 @@ static u32 *dw_hdmi_bridge_atomic_get_output_bus_fmts(struct drm_bridge *bridge,
|
||||
*/
|
||||
|
||||
/* Default 8bit RGB fallback */
|
||||
- output_fmts[i++] = MEDIA_BUS_FMT_RGB888_1X24;
|
||||
+ if (is_tmds_allowed(info, mode, MEDIA_BUS_FMT_RGB888_1X24))
|
||||
+ output_fmts[i++] = MEDIA_BUS_FMT_RGB888_1X24;
|
||||
|
||||
if (max_bpc >= 16 && info->bpc == 16) {
|
||||
- if (info->color_formats & DRM_COLOR_FORMAT_YCBCR444)
|
||||
+ if ((info->color_formats & DRM_COLOR_FORMAT_YCBCR444) &&
|
||||
+ is_tmds_allowed(info, mode, MEDIA_BUS_FMT_YUV16_1X48))
|
||||
output_fmts[i++] = MEDIA_BUS_FMT_YUV16_1X48;
|
||||
|
||||
- output_fmts[i++] = MEDIA_BUS_FMT_RGB161616_1X48;
|
||||
+ if (is_tmds_allowed(info, mode, MEDIA_BUS_FMT_RGB161616_1X48))
|
||||
+ output_fmts[i++] = MEDIA_BUS_FMT_RGB161616_1X48;
|
||||
}
|
||||
|
||||
if (max_bpc >= 12 && info->bpc >= 12) {
|
||||
- if (info->color_formats & DRM_COLOR_FORMAT_YCBCR422)
|
||||
+ if ((info->color_formats & DRM_COLOR_FORMAT_YCBCR422) &&
|
||||
+ is_tmds_allowed(info, mode, MEDIA_BUS_FMT_UYVY12_1X24))
|
||||
output_fmts[i++] = MEDIA_BUS_FMT_UYVY12_1X24;
|
||||
|
||||
- if (info->color_formats & DRM_COLOR_FORMAT_YCBCR444)
|
||||
+ if ((info->color_formats & DRM_COLOR_FORMAT_YCBCR444) &&
|
||||
+ is_tmds_allowed(info, mode, MEDIA_BUS_FMT_YUV12_1X36))
|
||||
output_fmts[i++] = MEDIA_BUS_FMT_YUV12_1X36;
|
||||
|
||||
- output_fmts[i++] = MEDIA_BUS_FMT_RGB121212_1X36;
|
||||
+ if (is_tmds_allowed(info, mode, MEDIA_BUS_FMT_RGB121212_1X36))
|
||||
+ output_fmts[i++] = MEDIA_BUS_FMT_RGB121212_1X36;
|
||||
}
|
||||
|
||||
if (max_bpc >= 10 && info->bpc >= 10) {
|
||||
- if (info->color_formats & DRM_COLOR_FORMAT_YCBCR422)
|
||||
+ if ((info->color_formats & DRM_COLOR_FORMAT_YCBCR422) &&
|
||||
+ is_tmds_allowed(info, mode, MEDIA_BUS_FMT_UYVY10_1X20))
|
||||
output_fmts[i++] = MEDIA_BUS_FMT_UYVY10_1X20;
|
||||
|
||||
- if (info->color_formats & DRM_COLOR_FORMAT_YCBCR444)
|
||||
+ if ((info->color_formats & DRM_COLOR_FORMAT_YCBCR444) &&
|
||||
+ is_tmds_allowed(info, mode, MEDIA_BUS_FMT_YUV10_1X30))
|
||||
output_fmts[i++] = MEDIA_BUS_FMT_YUV10_1X30;
|
||||
|
||||
- output_fmts[i++] = MEDIA_BUS_FMT_RGB101010_1X30;
|
||||
+ if (is_tmds_allowed(info, mode, MEDIA_BUS_FMT_RGB101010_1X30))
|
||||
+ output_fmts[i++] = MEDIA_BUS_FMT_RGB101010_1X30;
|
||||
}
|
||||
|
||||
- if (info->color_formats & DRM_COLOR_FORMAT_YCBCR422)
|
||||
+ if ((info->color_formats & DRM_COLOR_FORMAT_YCBCR422) &&
|
||||
+ is_tmds_allowed(info, mode, MEDIA_BUS_FMT_UYVY8_1X16))
|
||||
output_fmts[i++] = MEDIA_BUS_FMT_UYVY8_1X16;
|
||||
|
||||
- if (info->color_formats & DRM_COLOR_FORMAT_YCBCR444)
|
||||
+ if ((info->color_formats & DRM_COLOR_FORMAT_YCBCR444) &&
|
||||
+ is_tmds_allowed(info, mode, MEDIA_BUS_FMT_YUV8_1X24))
|
||||
output_fmts[i++] = MEDIA_BUS_FMT_YUV8_1X24;
|
||||
|
||||
*num_output_fmts = i;
|
||||
|
||||
@@ -2946,11 +2969,20 @@ dw_hdmi_bridge_mode_valid(struct drm_bridge *bridge,
|
||||
struct dw_hdmi *hdmi = bridge->driver_private;
|
||||
const struct dw_hdmi_plat_data *pdata = hdmi->plat_data;
|
||||
@@ -414,13 +414,13 @@ Required to proper decode H.264@4K
|
||||
|
||||
Signed-off-by: Alex Bee <knaerzche@gmail.com>
|
||||
---
|
||||
drivers/staging/media/hantro/rockchip_vpu_hw.c | 14 +++++++++++---
|
||||
drivers/media/platform/verisilicon/rockchip_vpu_hw.c | 14 +++++++++++---
|
||||
1 file changed, 11 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/drivers/staging/media/hantro/rockchip_vpu_hw.c b/drivers/staging/media/hantro/rockchip_vpu_hw.c
|
||||
diff --git a/drivers/media/platform/verisilicon/rockchip_vpu_hw.c b/drivers/media/platform/verisilicon/rockchip_vpu_hw.c
|
||||
index 8de6fd2e8eef..002b1a600f93 100644
|
||||
--- a/drivers/staging/media/hantro/rockchip_vpu_hw.c
|
||||
+++ b/drivers/staging/media/hantro/rockchip_vpu_hw.c
|
||||
--- a/drivers/media/platform/verisilicon/rockchip_vpu_hw.c
|
||||
+++ b/drivers/media/platform/verisilicon/rockchip_vpu_hw.c
|
||||
@@ -15,7 +15,8 @@
|
||||
#include "rockchip_vpu2_regs.h"
|
||||
|
||||
@@ -58,38 +58,6 @@
|
||||
};
|
||||
};
|
||||
|
||||
@@ -190,6 +234,31 @@
|
||||
reset-deassert-us = <30000>;
|
||||
reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
+ };
|
||||
+
|
||||
+ wireless-wlan {
|
||||
+ compatible = "wlan-platdata";
|
||||
+ rockchip,grf = <&grf>;
|
||||
+ wifi_chip_type = "ap6359sa";
|
||||
+ sdio_vref = <1800>;
|
||||
+ WIFI,host_wake_irq = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>;
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
+ wireless-bluetooth {
|
||||
+ compatible = "bluetooth-platdata";
|
||||
+ clocks = <&rk808 1>;
|
||||
+ clock-names = "ext_clock";
|
||||
+ uart_rts_gpios = <&gpio2 RK_PC3 GPIO_ACTIVE_LOW>;
|
||||
+ pinctrl-names = "default", "rts_gpio";
|
||||
+ pinctrl-0 = <&uart0_rts>;
|
||||
+ pinctrl-1 = <&uart0_gpios>;
|
||||
+ // wifi-bt-power-toggle;
|
||||
+ // BT,power_gpio = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
|
||||
+ BT,reset_gpio = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
|
||||
+ BT,wake_gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
|
||||
+ BT,wake_host_irq = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
|
||||
+ status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
@@ -453,10 +522,19 @@
|
||||
};
|
||||
|
||||
@@ -105,8 +73,8 @@
|
||||
+ reg = <0x1a>;
|
||||
+ clocks = <&cru SCLK_I2S_8CH_OUT>;
|
||||
+ clock-names = "mclk";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&i2s_8ch_mclk>;
|
||||
+ //pinctrl-names = "default";
|
||||
+ //pinctrl-0 = <&i2s_8ch_mclk>;
|
||||
+ };
|
||||
};
|
||||
|
||||
@@ -187,26 +155,6 @@
|
||||
pmic {
|
||||
cpu_b_sleep: cpu-b-sleep {
|
||||
rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
|
||||
@@ -581,6 +713,19 @@
|
||||
|
||||
sdmmc0_pwr_h: sdmmc0-pwr-h {
|
||||
rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ wireless-wlan {
|
||||
+ wifi_pwr: wifi-pwr {
|
||||
+ rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ wireless-bluetooth {
|
||||
+ uart0_gpios: uart0-gpios {
|
||||
+ rockchip,pins =
|
||||
+ <2 RK_PC3 1 &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -747,11 +892,3 @@
|
||||
&vopb_mmu {
|
||||
status = "okay";
|
||||
@@ -219,4 +167,3 @@
|
||||
-&vopl_mmu {
|
||||
- status = "okay";
|
||||
-};
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,790 @@
|
||||
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
|
||||
index 42a7ab542..822999710 100644
|
||||
--- a/drivers/gpu/drm/panel/Makefile
|
||||
+++ b/drivers/gpu/drm/panel/Makefile
|
||||
@@ -8,6 +8,7 @@ obj-$(CONFIG_DRM_PANEL_BOE_TV101WUM_NL6) += panel-boe-tv101wum-nl6.o
|
||||
obj-$(CONFIG_DRM_PANEL_DSI_CM) += panel-dsi-cm.o
|
||||
obj-$(CONFIG_DRM_PANEL_LVDS) += panel-lvds.o
|
||||
obj-$(CONFIG_DRM_PANEL_SIMPLE) += panel-simple.o
|
||||
+obj-$(CONFIG_DRM_PANEL_SIMPLE) += panel-simple-dsi.o
|
||||
obj-$(CONFIG_DRM_PANEL_EDP) += panel-edp.o
|
||||
obj-$(CONFIG_DRM_PANEL_ELIDA_KD35T133) += panel-elida-kd35t133.o
|
||||
obj-$(CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02) += panel-feixin-k101-im2ba02.o
|
||||
diff --git a/drivers/gpu/drm/panel/panel-simple-dsi.c b/drivers/gpu/drm/panel/panel-simple-dsi.c
|
||||
new file mode 100644
|
||||
index 000000000..906d40ebe
|
||||
--- /dev/null
|
||||
+++ b/drivers/gpu/drm/panel/panel-simple-dsi.c
|
||||
@@ -0,0 +1,772 @@
|
||||
+/*
|
||||
+ * Copyright (C) 2021
|
||||
+ * This simple dsi driver porting from rock-chip panel-simple.c on linux-4.4
|
||||
+ */
|
||||
+
|
||||
+#include <linux/backlight.h>
|
||||
+#include <linux/gpio/consumer.h>
|
||||
+#include <linux/module.h>
|
||||
+#include <linux/of_platform.h>
|
||||
+#include <linux/platform_device.h>
|
||||
+#include <linux/regulator/consumer.h>
|
||||
+
|
||||
+#include <drm/drm_crtc.h>
|
||||
+#include <drm/drm_mipi_dsi.h>
|
||||
+#include <drm/drm_panel.h>
|
||||
+
|
||||
+#include <video/display_timing.h>
|
||||
+#include <video/mipi_display.h>
|
||||
+#include <linux/of_device.h>
|
||||
+#include <video/of_display_timing.h>
|
||||
+#include <linux/of_graph.h>
|
||||
+#include <video/videomode.h>
|
||||
+#include <linux/delay.h>
|
||||
+
|
||||
+struct cmd_ctrl_hdr {
|
||||
+ u8 dtype; /* data type */
|
||||
+ u8 wait; /* ms */
|
||||
+ u8 dlen; /* payload len */
|
||||
+} __packed;
|
||||
+
|
||||
+struct cmd_desc {
|
||||
+ struct cmd_ctrl_hdr dchdr;
|
||||
+ u8 *payload;
|
||||
+};
|
||||
+
|
||||
+struct panel_cmds {
|
||||
+ u8 *buf;
|
||||
+ int blen;
|
||||
+ struct cmd_desc *cmds;
|
||||
+ int cmd_cnt;
|
||||
+};
|
||||
+
|
||||
+struct panel_desc {
|
||||
+ const struct drm_display_mode *modes;
|
||||
+ unsigned int num_modes;
|
||||
+ const struct display_timing *timings;
|
||||
+ unsigned int num_timings;
|
||||
+
|
||||
+ unsigned int bpc;
|
||||
+
|
||||
+ struct {
|
||||
+ unsigned int width;
|
||||
+ unsigned int height;
|
||||
+ } size;
|
||||
+
|
||||
+ /**
|
||||
+ * @reset: the time (in milliseconds) indicates the delay time
|
||||
+ * after the panel to operate reset gpio
|
||||
+ * @init: the time (in milliseconds) that it takes for the panel to
|
||||
+ * power on and dsi host can send command to panel
|
||||
+ * @prepare: the time (in milliseconds) that it takes for the panel to
|
||||
+ * become ready and start receiving video data
|
||||
+ * @enable: the time (in milliseconds) that it takes for the panel to
|
||||
+ * display the first valid frame after starting to receive
|
||||
+ * video data
|
||||
+ * @disable: the time (in milliseconds) that it takes for the panel to
|
||||
+ * turn the display off (no content is visible)
|
||||
+ * @unprepare: the time (in milliseconds) that it takes for the panel
|
||||
+ * to power itself down completely
|
||||
+ */
|
||||
+ struct {
|
||||
+ unsigned int reset;
|
||||
+ unsigned int init;
|
||||
+ unsigned int prepare;
|
||||
+ unsigned int enable;
|
||||
+ unsigned int disable;
|
||||
+ unsigned int unprepare;
|
||||
+ } delay;
|
||||
+
|
||||
+ u32 bus_format;
|
||||
+};
|
||||
+
|
||||
+struct panel_simple {
|
||||
+ struct drm_panel base;
|
||||
+ struct mipi_dsi_device *dsi;
|
||||
+ bool prepared;
|
||||
+ bool enabled;
|
||||
+ bool power_invert;
|
||||
+
|
||||
+ struct device *dev;
|
||||
+ const struct panel_desc *desc;
|
||||
+
|
||||
+ struct regulator *supply;
|
||||
+
|
||||
+ struct gpio_desc *enable_gpio;
|
||||
+ struct gpio_desc *reset_gpio;
|
||||
+ int cmd_type;
|
||||
+
|
||||
+ struct panel_cmds *on_cmds;
|
||||
+ struct panel_cmds *off_cmds;
|
||||
+ struct device_node *np_crtc;
|
||||
+
|
||||
+ int reset_level;
|
||||
+ enum drm_panel_orientation orientation;
|
||||
+};
|
||||
+
|
||||
+enum rockchip_cmd_type {
|
||||
+ CMD_TYPE_DEFAULT,
|
||||
+ CMD_TYPE_SPI,
|
||||
+ CMD_TYPE_MCU
|
||||
+};
|
||||
+
|
||||
+static void panel_simple_sleep(unsigned int msec)
|
||||
+{
|
||||
+ if (msec > 20)
|
||||
+ msleep(msec);
|
||||
+ else
|
||||
+ usleep_range(msec * 1000, (msec + 1) * 1000);
|
||||
+}
|
||||
+
|
||||
+static inline struct panel_simple *to_panel_simple(struct drm_panel *panel)
|
||||
+{
|
||||
+ return container_of(panel, struct panel_simple, base);
|
||||
+}
|
||||
+
|
||||
+static void panel_simple_cmds_cleanup(struct panel_simple *p)
|
||||
+{
|
||||
+ if (p->on_cmds) {
|
||||
+ kfree(p->on_cmds->buf);
|
||||
+ kfree(p->on_cmds->cmds);
|
||||
+ }
|
||||
+
|
||||
+ if (p->off_cmds) {
|
||||
+ kfree(p->off_cmds->buf);
|
||||
+ kfree(p->off_cmds->cmds);
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+static int panel_simple_parse_cmds(struct device *dev,
|
||||
+ const u8 *data, int blen,
|
||||
+ struct panel_cmds *pcmds)
|
||||
+{
|
||||
+ unsigned int len;
|
||||
+ char *buf, *bp;
|
||||
+ struct cmd_ctrl_hdr *dchdr;
|
||||
+ int i, cnt;
|
||||
+
|
||||
+ if (!pcmds)
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ buf = kmemdup(data, blen, GFP_KERNEL);
|
||||
+ if (!buf)
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ /* scan init commands */
|
||||
+ bp = buf;
|
||||
+ len = blen;
|
||||
+ cnt = 0;
|
||||
+ while (len > sizeof(*dchdr)) {
|
||||
+ dchdr = (struct cmd_ctrl_hdr *)bp;
|
||||
+
|
||||
+ if (dchdr->dlen > len) {
|
||||
+ dev_err(dev, "%s: error, len=%d", __func__,
|
||||
+ dchdr->dlen);
|
||||
+ return -EINVAL;
|
||||
+ }
|
||||
+
|
||||
+ bp += sizeof(*dchdr);
|
||||
+ len -= sizeof(*dchdr);
|
||||
+ bp += dchdr->dlen;
|
||||
+ len -= dchdr->dlen;
|
||||
+ cnt++;
|
||||
+ }
|
||||
+
|
||||
+ if (len != 0) {
|
||||
+ dev_err(dev, "%s: dcs_cmd=%x len=%d error!",
|
||||
+ __func__, buf[0], blen);
|
||||
+ kfree(buf);
|
||||
+ return -EINVAL;
|
||||
+ }
|
||||
+
|
||||
+ pcmds->cmds = kcalloc(cnt, sizeof(struct cmd_desc), GFP_KERNEL);
|
||||
+ if (!pcmds->cmds) {
|
||||
+ kfree(buf);
|
||||
+ return -ENOMEM;
|
||||
+ }
|
||||
+
|
||||
+ pcmds->cmd_cnt = cnt;
|
||||
+ pcmds->buf = buf;
|
||||
+ pcmds->blen = blen;
|
||||
+
|
||||
+ bp = buf;
|
||||
+ len = blen;
|
||||
+ for (i = 0; i < cnt; i++) {
|
||||
+ dchdr = (struct cmd_ctrl_hdr *)bp;
|
||||
+ len -= sizeof(*dchdr);
|
||||
+ bp += sizeof(*dchdr);
|
||||
+ pcmds->cmds[i].dchdr = *dchdr;
|
||||
+ pcmds->cmds[i].payload = bp;
|
||||
+ bp += dchdr->dlen;
|
||||
+ len -= dchdr->dlen;
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int panel_simple_dsi_send_cmds(struct panel_simple *panel,
|
||||
+ struct panel_cmds *cmds)
|
||||
+{
|
||||
+ struct mipi_dsi_device *dsi = panel->dsi;
|
||||
+ int i, err;
|
||||
+
|
||||
+ if (!cmds)
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ for (i = 0; i < cmds->cmd_cnt; i++) {
|
||||
+ struct cmd_desc *cmd = &cmds->cmds[i];
|
||||
+
|
||||
+ switch (cmd->dchdr.dtype) {
|
||||
+ case MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM:
|
||||
+ case MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM:
|
||||
+ case MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM:
|
||||
+ case MIPI_DSI_GENERIC_LONG_WRITE:
|
||||
+ err = mipi_dsi_generic_write(dsi, cmd->payload,
|
||||
+ cmd->dchdr.dlen);
|
||||
+ break;
|
||||
+ case MIPI_DSI_DCS_SHORT_WRITE:
|
||||
+ case MIPI_DSI_DCS_SHORT_WRITE_PARAM:
|
||||
+ case MIPI_DSI_DCS_LONG_WRITE:
|
||||
+ err = mipi_dsi_dcs_write_buffer(dsi, cmd->payload,
|
||||
+ cmd->dchdr.dlen);
|
||||
+ break;
|
||||
+ default:
|
||||
+ return -EINVAL;
|
||||
+ }
|
||||
+
|
||||
+ if (err < 0)
|
||||
+ dev_err(panel->dev, "failed to write dcs cmd: %d\n",
|
||||
+ err);
|
||||
+
|
||||
+ if (cmd->dchdr.wait)
|
||||
+ panel_simple_sleep(cmd->dchdr.wait);
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int panel_simple_get_cmds(struct panel_simple *panel)
|
||||
+{
|
||||
+ const void *data;
|
||||
+ int len;
|
||||
+ int err;
|
||||
+
|
||||
+ data = of_get_property(panel->dev->of_node, "panel-init-sequence",
|
||||
+ &len);
|
||||
+ if (data) {
|
||||
+ panel->on_cmds = devm_kzalloc(panel->dev,
|
||||
+ sizeof(*panel->on_cmds),
|
||||
+ GFP_KERNEL);
|
||||
+ if (!panel->on_cmds)
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ err = panel_simple_parse_cmds(panel->dev, data, len,
|
||||
+ panel->on_cmds);
|
||||
+ if (err) {
|
||||
+ dev_err(panel->dev, "failed to parse panel init sequence\n");
|
||||
+ return err;
|
||||
+ }
|
||||
+ }
|
||||
+
|
||||
+ data = of_get_property(panel->dev->of_node, "panel-exit-sequence",
|
||||
+ &len);
|
||||
+ if (data) {
|
||||
+ panel->off_cmds = devm_kzalloc(panel->dev,
|
||||
+ sizeof(*panel->off_cmds),
|
||||
+ GFP_KERNEL);
|
||||
+ if (!panel->off_cmds)
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ err = panel_simple_parse_cmds(panel->dev, data, len,
|
||||
+ panel->off_cmds);
|
||||
+ if (err) {
|
||||
+ dev_err(panel->dev, "failed to parse panel exit sequence\n");
|
||||
+ return err;
|
||||
+ }
|
||||
+ }
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int panel_simple_get_modes(struct drm_panel *panel,struct drm_connector *connector)
|
||||
+{
|
||||
+ struct panel_simple *p = to_panel_simple(panel);
|
||||
+ struct drm_device *drm = connector->dev;
|
||||
+ struct drm_display_mode *mode;
|
||||
+ struct device_node *timings_np;
|
||||
+ int ret;
|
||||
+
|
||||
+ timings_np = of_get_child_by_name(panel->dev->of_node,
|
||||
+ "display-timings");
|
||||
+ if (!timings_np) {
|
||||
+ dev_dbg(panel->dev, "failed to find display-timings node\n");
|
||||
+ return 0;
|
||||
+ }
|
||||
+
|
||||
+ of_node_put(timings_np);
|
||||
+ mode = drm_mode_create(drm);
|
||||
+ if (!mode)
|
||||
+ return 0;
|
||||
+
|
||||
+ ret = of_get_drm_display_mode(panel->dev->of_node, mode, p->desc->bus_format,
|
||||
+ OF_USE_NATIVE_MODE);
|
||||
+ if (ret) {
|
||||
+ dev_dbg(panel->dev, "failed to find dts display timings\n");
|
||||
+ drm_mode_destroy(drm, mode);
|
||||
+ return 0;
|
||||
+ }
|
||||
+
|
||||
+ drm_mode_set_name(mode);
|
||||
+ mode->type |= DRM_MODE_TYPE_PREFERRED;
|
||||
+
|
||||
+ connector->display_info.width_mm = mode->width_mm;
|
||||
+ connector->display_info.height_mm = mode->height_mm;
|
||||
+
|
||||
+ drm_mode_probed_add(connector, mode);
|
||||
+
|
||||
+ /*
|
||||
+ * TODO: Remove once all drm drivers call
|
||||
+ * drm_connector_set_orientation_from_panel()
|
||||
+ */
|
||||
+ drm_connector_set_panel_orientation(connector, p->orientation);
|
||||
+
|
||||
+ return 1;
|
||||
+}
|
||||
+
|
||||
+static int panel_simple_regulator_enable(struct drm_panel *panel)
|
||||
+{
|
||||
+ struct panel_simple *p = to_panel_simple(panel);
|
||||
+ int err = 0;
|
||||
+
|
||||
+ if (p->power_invert) {
|
||||
+ if (regulator_is_enabled(p->supply) > 0)
|
||||
+ regulator_disable(p->supply);
|
||||
+ } else {
|
||||
+ err = regulator_enable(p->supply);
|
||||
+ if (err < 0) {
|
||||
+ dev_err(panel->dev, "failed to enable supply: %d\n",
|
||||
+ err);
|
||||
+ return err;
|
||||
+ }
|
||||
+ }
|
||||
+
|
||||
+ return err;
|
||||
+}
|
||||
+
|
||||
+static int panel_simple_regulator_disable(struct drm_panel *panel)
|
||||
+{
|
||||
+ struct panel_simple *p = to_panel_simple(panel);
|
||||
+ int err = 0;
|
||||
+
|
||||
+ if (p->power_invert) {
|
||||
+ if (!regulator_is_enabled(p->supply)) {
|
||||
+ err = regulator_enable(p->supply);
|
||||
+ if (err < 0) {
|
||||
+ dev_err(panel->dev, "failed to enable supply: %d\n",
|
||||
+ err);
|
||||
+ return err;
|
||||
+ }
|
||||
+ }
|
||||
+ } else {
|
||||
+ regulator_disable(p->supply);
|
||||
+ }
|
||||
+
|
||||
+ return err;
|
||||
+}
|
||||
+
|
||||
+static int panel_simple_disable(struct drm_panel *panel)
|
||||
+{
|
||||
+ struct panel_simple *p = to_panel_simple(panel);
|
||||
+ int err = 0;
|
||||
+
|
||||
+ if (!p->enabled)
|
||||
+ return 0;
|
||||
+
|
||||
+ if (p->desc && p->desc->delay.disable)
|
||||
+ panel_simple_sleep(p->desc->delay.disable);
|
||||
+
|
||||
+ p->enabled = false;
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int panel_simple_unprepare(struct drm_panel *panel)
|
||||
+{
|
||||
+ struct panel_simple *p = to_panel_simple(panel);
|
||||
+ int err = 0;
|
||||
+
|
||||
+ if (!p->prepared)
|
||||
+ return 0;
|
||||
+
|
||||
+ if (p->off_cmds) {
|
||||
+ if (p->dsi)
|
||||
+ err = panel_simple_dsi_send_cmds(p, p->off_cmds);
|
||||
+ if (err)
|
||||
+ dev_err(p->dev, "failed to send off cmds\n");
|
||||
+ }
|
||||
+
|
||||
+ if (p->reset_gpio)
|
||||
+ gpiod_direction_output(p->reset_gpio, !p->reset_level);
|
||||
+
|
||||
+ if (p->enable_gpio)
|
||||
+ gpiod_direction_output(p->enable_gpio, 0);
|
||||
+
|
||||
+ panel_simple_regulator_disable(panel);
|
||||
+
|
||||
+ if (p->desc && p->desc->delay.unprepare)
|
||||
+ panel_simple_sleep(p->desc->delay.unprepare);
|
||||
+
|
||||
+ p->prepared = false;
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int panel_simple_prepare(struct drm_panel *panel)
|
||||
+{
|
||||
+ struct panel_simple *p = to_panel_simple(panel);
|
||||
+ int err;
|
||||
+
|
||||
+ if (p->prepared)
|
||||
+ return 0;
|
||||
+
|
||||
+ err = panel_simple_regulator_enable(panel);
|
||||
+ if (err < 0) {
|
||||
+ dev_err(panel->dev, "failed to enable supply: %d\n", err);
|
||||
+ return err;
|
||||
+ }
|
||||
+
|
||||
+ if (p->enable_gpio)
|
||||
+ gpiod_direction_output(p->enable_gpio, 1);
|
||||
+
|
||||
+ if (p->desc && p->desc->delay.prepare)
|
||||
+ panel_simple_sleep(p->desc->delay.prepare);
|
||||
+
|
||||
+ if (p->reset_gpio)
|
||||
+ gpiod_direction_output(p->reset_gpio, !p->reset_level);
|
||||
+
|
||||
+ if (p->desc && p->desc->delay.reset)
|
||||
+ panel_simple_sleep(p->desc->delay.reset);
|
||||
+
|
||||
+ if (p->reset_gpio)
|
||||
+ gpiod_direction_output(p->reset_gpio, p->reset_level);
|
||||
+
|
||||
+ if (p->desc && p->desc->delay.init)
|
||||
+ panel_simple_sleep(p->desc->delay.init);
|
||||
+
|
||||
+ if (p->on_cmds) {
|
||||
+ if (p->dsi)
|
||||
+ err = panel_simple_dsi_send_cmds(p, p->on_cmds);
|
||||
+ if (err)
|
||||
+ dev_err(p->dev, "failed to send on cmds\n");
|
||||
+ }
|
||||
+
|
||||
+ p->prepared = true;
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int panel_simple_enable(struct drm_panel *panel)
|
||||
+{
|
||||
+ struct panel_simple *p = to_panel_simple(panel);
|
||||
+ int err = 0;
|
||||
+
|
||||
+ if (p->enabled)
|
||||
+ return 0;
|
||||
+
|
||||
+ if (p->desc && p->desc->delay.enable)
|
||||
+ panel_simple_sleep(p->desc->delay.enable);
|
||||
+
|
||||
+ p->enabled = true;
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int panel_simple_get_timings(struct drm_panel *panel,
|
||||
+ unsigned int num_timings,
|
||||
+ struct display_timing *timings)
|
||||
+{
|
||||
+ struct panel_simple *p = to_panel_simple(panel);
|
||||
+ unsigned int i;
|
||||
+
|
||||
+ if (!p->desc)
|
||||
+ return 0;
|
||||
+
|
||||
+ if (p->desc->num_timings < num_timings)
|
||||
+ num_timings = p->desc->num_timings;
|
||||
+
|
||||
+ if (timings)
|
||||
+ for (i = 0; i < num_timings; i++)
|
||||
+ timings[i] = p->desc->timings[i];
|
||||
+
|
||||
+ return p->desc->num_timings;
|
||||
+}
|
||||
+
|
||||
+static enum drm_panel_orientation panel_simple_get_orientation(struct drm_panel *panel)
|
||||
+{
|
||||
+ struct panel_simple *p = to_panel_simple(panel);
|
||||
+
|
||||
+ return p->orientation;
|
||||
+}
|
||||
+
|
||||
+
|
||||
+static const struct drm_panel_funcs panel_simple_funcs = {
|
||||
+ .disable = panel_simple_disable,
|
||||
+ .unprepare = panel_simple_unprepare,
|
||||
+ .prepare = panel_simple_prepare,
|
||||
+ .enable = panel_simple_enable,
|
||||
+ .get_modes = panel_simple_get_modes,
|
||||
+ .get_orientation = panel_simple_get_orientation,
|
||||
+ .get_timings = panel_simple_get_timings,
|
||||
+};
|
||||
+
|
||||
+static int panel_simple_probe(struct device *dev, const struct panel_desc *desc)
|
||||
+{
|
||||
+ struct panel_simple *panel;
|
||||
+ struct panel_desc *of_desc;
|
||||
+ const char *cmd_type;
|
||||
+ u32 val;
|
||||
+ int err;
|
||||
+
|
||||
+ panel = devm_kzalloc(dev, sizeof(*panel), GFP_KERNEL);
|
||||
+ if (!panel)
|
||||
+ return -ENOMEM;
|
||||
+
|
||||
+ if (!desc)
|
||||
+ of_desc = devm_kzalloc(dev, sizeof(*of_desc), GFP_KERNEL);
|
||||
+ else
|
||||
+ of_desc = devm_kmemdup(dev, desc, sizeof(*of_desc), GFP_KERNEL);
|
||||
+
|
||||
+ if (!of_property_read_u32(dev->of_node, "bus-format", &val))
|
||||
+ of_desc->bus_format = val;
|
||||
+ if (!of_property_read_u32(dev->of_node, "bpc", &val))
|
||||
+ of_desc->bpc = val;
|
||||
+ if (!of_property_read_u32(dev->of_node, "prepare-delay-ms", &val))
|
||||
+ of_desc->delay.prepare = val;
|
||||
+ if (!of_property_read_u32(dev->of_node, "enable-delay-ms", &val))
|
||||
+ of_desc->delay.enable = val;
|
||||
+ if (!of_property_read_u32(dev->of_node, "disable-delay-ms", &val))
|
||||
+ of_desc->delay.disable = val;
|
||||
+ if (!of_property_read_u32(dev->of_node, "unprepare-delay-ms", &val))
|
||||
+ of_desc->delay.unprepare = val;
|
||||
+ if (!of_property_read_u32(dev->of_node, "reset-delay-ms", &val))
|
||||
+ of_desc->delay.reset = val;
|
||||
+ if (!of_property_read_u32(dev->of_node, "init-delay-ms", &val))
|
||||
+ of_desc->delay.init = val;
|
||||
+ if (!of_property_read_u32(dev->of_node, "width-mm", &val))
|
||||
+ of_desc->size.width = val;
|
||||
+ if (!of_property_read_u32(dev->of_node, "height-mm", &val))
|
||||
+ of_desc->size.height = val;
|
||||
+
|
||||
+ panel->enabled = false;
|
||||
+ panel->prepared = false;
|
||||
+ panel->desc = of_desc;
|
||||
+ panel->dev = dev;
|
||||
+
|
||||
+ err = panel_simple_get_cmds(panel);
|
||||
+ if (err) {
|
||||
+ dev_err(dev, "failed to get init cmd: %d\n", err);
|
||||
+ return err;
|
||||
+ }
|
||||
+ panel->supply = devm_regulator_get(dev, "power");
|
||||
+ if (IS_ERR(panel->supply))
|
||||
+ return PTR_ERR(panel->supply);
|
||||
+
|
||||
+ panel->enable_gpio = devm_gpiod_get_optional(dev, "enable", 0);
|
||||
+ if (IS_ERR(panel->enable_gpio)) {
|
||||
+ err = PTR_ERR(panel->enable_gpio);
|
||||
+ dev_err(dev, "failed to request enable GPIO: %d\n", err);
|
||||
+ return err;
|
||||
+ }
|
||||
+
|
||||
+ panel->reset_gpio = devm_gpiod_get_optional(dev, "reset", 0);
|
||||
+ if (IS_ERR(panel->reset_gpio)) {
|
||||
+ err = PTR_ERR(panel->reset_gpio);
|
||||
+ dev_err(dev, "failed to request reset GPIO: %d\n", err);
|
||||
+ return err;
|
||||
+ }
|
||||
+
|
||||
+ if (!of_property_read_u32(dev->of_node, "reset-level", &val)) {
|
||||
+ panel->reset_level = val;
|
||||
+ } else {
|
||||
+ panel->reset_level = 0;
|
||||
+ }
|
||||
+
|
||||
+ err = of_drm_get_panel_orientation(dev->of_node, &panel->orientation);
|
||||
+ if (err) {
|
||||
+ dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, err);
|
||||
+ return err;
|
||||
+ }
|
||||
+
|
||||
+ panel->cmd_type = CMD_TYPE_DEFAULT;
|
||||
+
|
||||
+ panel->power_invert =
|
||||
+ of_property_read_bool(dev->of_node, "power-invert");
|
||||
+
|
||||
+ drm_panel_init(&panel->base, dev, &panel_simple_funcs,DRM_MODE_CONNECTOR_DSI);
|
||||
+ panel->base.dev = dev;
|
||||
+ panel->base.funcs = &panel_simple_funcs;
|
||||
+
|
||||
+ err = drm_panel_of_backlight(&panel->base);
|
||||
+ if (err)
|
||||
+ return err;
|
||||
+
|
||||
+ drm_panel_add(&panel->base);
|
||||
+
|
||||
+ dev_set_drvdata(dev, panel);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int panel_simple_remove(struct device *dev)
|
||||
+{
|
||||
+ struct panel_simple *panel = dev_get_drvdata(dev);
|
||||
+
|
||||
+ drm_panel_remove(&panel->base);
|
||||
+
|
||||
+ panel_simple_disable(&panel->base);
|
||||
+ panel_simple_unprepare(&panel->base);
|
||||
+
|
||||
+ panel_simple_cmds_cleanup(panel);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static void panel_simple_shutdown(struct device *dev)
|
||||
+{
|
||||
+ struct panel_simple *panel = dev_get_drvdata(dev);
|
||||
+
|
||||
+ panel_simple_disable(&panel->base);
|
||||
+
|
||||
+ if (panel->prepared) {
|
||||
+ if (panel->reset_gpio)
|
||||
+ gpiod_direction_output(panel->reset_gpio, !panel->reset_level);
|
||||
+
|
||||
+ if (panel->enable_gpio)
|
||||
+ gpiod_direction_output(panel->enable_gpio, 0);
|
||||
+
|
||||
+ panel_simple_regulator_disable(&panel->base);
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+struct panel_desc_dsi {
|
||||
+ struct panel_desc desc;
|
||||
+
|
||||
+ unsigned long flags;
|
||||
+ enum mipi_dsi_pixel_format format;
|
||||
+ unsigned int lanes;
|
||||
+};
|
||||
+
|
||||
+/*
|
||||
+static const struct drm_display_mode panasonic_vvx10f004b00_mode = {
|
||||
+ .clock = 157200,
|
||||
+ .hdisplay = 1920,
|
||||
+ .hsync_start = 1920 + 154,
|
||||
+ .hsync_end = 1920 + 154 + 16,
|
||||
+ .htotal = 1920 + 154 + 16 + 32,
|
||||
+ .vdisplay = 1200,
|
||||
+ .vsync_start = 1200 + 17,
|
||||
+ .vsync_end = 1200 + 17 + 2,
|
||||
+ .vtotal = 1200 + 17 + 2 + 16,
|
||||
+ .vrefresh = 60,
|
||||
+};
|
||||
+static const struct panel_desc_dsi panasonic_vvx10f004b00 = {
|
||||
+ .desc = {
|
||||
+ .modes = &panasonic_vvx10f004b00_mode,
|
||||
+ .num_modes = 1,
|
||||
+ .bpc = 8,
|
||||
+ .size = {
|
||||
+ .width = 217,
|
||||
+ .height = 136,
|
||||
+ },
|
||||
+ },
|
||||
+ .flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
|
||||
+ MIPI_DSI_CLOCK_NON_CONTINUOUS,
|
||||
+ .format = MIPI_DSI_FMT_RGB888,
|
||||
+ .lanes = 4,
|
||||
+};
|
||||
+*/
|
||||
+
|
||||
+static const struct of_device_id dsi_of_match[] = {
|
||||
+ {
|
||||
+ .compatible = "panel-dsi-simple",
|
||||
+ .data = NULL
|
||||
+ }, {
|
||||
+ /* sentinel */
|
||||
+ }
|
||||
+};
|
||||
+MODULE_DEVICE_TABLE(of, dsi_of_match);
|
||||
+
|
||||
+static int panel_simple_dsi_probe(struct mipi_dsi_device *dsi)
|
||||
+{
|
||||
+ struct device *dev = &dsi->dev;
|
||||
+ struct panel_simple *panel;
|
||||
+ const struct panel_desc_dsi *desc;
|
||||
+ const struct of_device_id *id;
|
||||
+ const struct panel_desc *pdesc;
|
||||
+ int err;
|
||||
+ u32 val;
|
||||
+
|
||||
+ id = of_match_node(dsi_of_match, dev->of_node);
|
||||
+ if (!id)
|
||||
+ return -ENODEV;
|
||||
+
|
||||
+ desc = id->data;
|
||||
+
|
||||
+ if (desc) {
|
||||
+ dsi->mode_flags = desc->flags;
|
||||
+ dsi->format = desc->format;
|
||||
+ dsi->lanes = desc->lanes;
|
||||
+ pdesc = &desc->desc;
|
||||
+ } else {
|
||||
+ pdesc = NULL;
|
||||
+ }
|
||||
+
|
||||
+ err = panel_simple_probe(dev, pdesc);
|
||||
+ if (err < 0)
|
||||
+ return err;
|
||||
+
|
||||
+ panel = dev_get_drvdata(dev);
|
||||
+ panel->dsi = dsi;
|
||||
+
|
||||
+ if (!of_property_read_u32(dev->of_node, "dsi,flags", &val))
|
||||
+ dsi->mode_flags = val;
|
||||
+
|
||||
+ if (!of_property_read_u32(dev->of_node, "dsi,format", &val))
|
||||
+ dsi->format = val;
|
||||
+
|
||||
+ if (!of_property_read_u32(dev->of_node, "dsi,lanes", &val))
|
||||
+ dsi->lanes = val;
|
||||
+
|
||||
+ return mipi_dsi_attach(dsi);
|
||||
+}
|
||||
+
|
||||
+static void panel_simple_dsi_remove(struct mipi_dsi_device *dsi)
|
||||
+{
|
||||
+ int err;
|
||||
+
|
||||
+ err = mipi_dsi_detach(dsi);
|
||||
+ if (err < 0)
|
||||
+ dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", err);
|
||||
+
|
||||
+ panel_simple_remove(&dsi->dev);
|
||||
+}
|
||||
+
|
||||
+static void panel_simple_dsi_shutdown(struct mipi_dsi_device *dsi)
|
||||
+{
|
||||
+ panel_simple_shutdown(&dsi->dev);
|
||||
+}
|
||||
+
|
||||
+static struct mipi_dsi_driver panel_simple_dsi_driver = {
|
||||
+ .driver = {
|
||||
+ .name = "panel-dsi-simple",
|
||||
+ .of_match_table = dsi_of_match,
|
||||
+ },
|
||||
+ .probe = panel_simple_dsi_probe,
|
||||
+ .remove = panel_simple_dsi_remove,
|
||||
+ .shutdown = panel_simple_dsi_shutdown,
|
||||
+};
|
||||
+
|
||||
+module_mipi_dsi_driver(panel_simple_dsi_driver);
|
||||
+
|
||||
+MODULE_AUTHOR("iamdrq <iamdrq@qq.com>");
|
||||
+MODULE_DESCRIPTION("DRM Driver for DSI Simple Panels");
|
||||
+MODULE_LICENSE("GPL");
|
||||
@@ -0,0 +1,12 @@
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
|
||||
@@ -1685,7 +1685,7 @@
|
||||
dma-names = "tx", "rx";
|
||||
clock-names = "i2s_clk", "i2s_hclk";
|
||||
clocks = <&cru SCLK_I2S0_8CH>, <&cru HCLK_I2S0_8CH>;
|
||||
- pinctrl-names = "bclk_on", "bclk_off";
|
||||
+ pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2s0_8ch_bus>;
|
||||
pinctrl-1 = <&i2s0_8ch_bus_bclk_off>;
|
||||
power-domains = <&power RK3399_PD_SDIOAUDIO>;
|
||||
|
||||
@@ -1,656 +0,0 @@
|
||||
From 3b60e97e8cf8a1ae78ec68a2fed37cd763675e56 Mon Sep 17 00:00:00 2001
|
||||
From: baiywt <baiywt_gj@163.com>
|
||||
Date: Fri, 18 Feb 2022 16:38:43 +0800
|
||||
Subject: [PATCH] Add yt8531c support.
|
||||
Adapted from orangepi-xunlong/openwrt - 600-Add-yt8531c-support.patch by schwar3kat
|
||||
---
|
||||
drivers/net/phy/Kconfig | 5 +
|
||||
drivers/net/phy/motorcomm.c | 1540 +++++++++++++++++++++++++++++++++
|
||||
drivers/net/phy/yt8614-phy.h | 491 +++++++++++
|
||||
include/linux/motorcomm_phy.h | 119 +++
|
||||
5 files changed, 2156 insertions(+)
|
||||
create mode 100644 drivers/net/phy/motorcomm.c
|
||||
create mode 100644 drivers/net/phy/yt8614-phy.h
|
||||
create mode 100644 include/linux/motorcomm_phy.h
|
||||
|
||||
diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
|
||||
index ce030fcb1..ff4861847 100644
|
||||
--- a/drivers/net/phy/Kconfig
|
||||
+++ b/drivers/net/phy/Kconfig
|
||||
@@ -297,6 +297,11 @@ config MICROSEMI_PHY
|
||||
help
|
||||
Currently supports VSC8514, VSC8530, VSC8531, VSC8540 and VSC8541 PHYs
|
||||
|
||||
+config MOTORCOMM_PHY
|
||||
+ tristate "Motorcomm PHYs"
|
||||
+ help
|
||||
+ Supports the YT8010, YT8510, YT8511, YT8512 YT8521 YT8531 PHYs.
|
||||
+
|
||||
config NATIONAL_PHY
|
||||
tristate "National Semiconductor PHYs"
|
||||
help
|
||||
diff --git a/drivers/net/phy/yt8614-phy.h b/drivers/net/phy/yt8614-phy.h
|
||||
new file mode 100644
|
||||
index 000000000..56a398338
|
||||
--- /dev/null
|
||||
+++ b/drivers/net/phy/yt8614-phy.h
|
||||
@@ -0,0 +1,491 @@
|
||||
+#ifndef _PHY_H_
|
||||
+#define _PHY_H_
|
||||
+
|
||||
+
|
||||
+/* configuration for driver */
|
||||
+
|
||||
+#define YT8614_MAX_LPORT_ID 3
|
||||
+
|
||||
+#define YT8614_PHY_MODE_FIBER 1 //fiber mode only
|
||||
+#define YT8614_PHY_MODE_UTP 2 //utp mode only
|
||||
+#define YT8614_PHY_MODE_POLL 3 //fiber and utp, poll mode
|
||||
+
|
||||
+/* please make choice according to system design
|
||||
+ * for Fiber only system, please define YT8614_PHY_MODE_CURR 1
|
||||
+ * for UTP only system, please define YT8614_PHY_MODE_CURR 2
|
||||
+ * for combo system, please define YT8614_PHY_MODE_CURR 3
|
||||
+ */
|
||||
+#define YT8614_PHY_MODE_CURR 3
|
||||
+
|
||||
+
|
||||
+
|
||||
+/* pls dont modify below lines */
|
||||
+
|
||||
+#define PHY_ID_YT8614 0x4F51E899 //serdes
|
||||
+#define MOTORCOMM_MPHY_ID_MASK_8614 0xffffffff
|
||||
+
|
||||
+#ifndef BOOL
|
||||
+#define BOOL unsigned int
|
||||
+#endif
|
||||
+
|
||||
+#ifndef FALSE
|
||||
+#define FALSE 0
|
||||
+#endif
|
||||
+
|
||||
+#ifndef TRUE
|
||||
+#define TRUE 1
|
||||
+#endif
|
||||
+
|
||||
+#ifndef SPEED_1000M
|
||||
+#define SPEED_1000M 2
|
||||
+#endif
|
||||
+#ifndef SPEED_100M
|
||||
+#define SPEED_100M 1
|
||||
+#endif
|
||||
+#ifndef SPEED_10M
|
||||
+#define SPEED_10M 0
|
||||
+#endif
|
||||
+
|
||||
+#ifndef SPEED_UNKNOWN
|
||||
+#define SPEED_UNKNOWN 0xffff
|
||||
+#endif
|
||||
+
|
||||
+#ifndef DUPLEX_FULL
|
||||
+#define DUPLEX_FULL 1
|
||||
+#endif
|
||||
+#ifndef DUPLEX_HALF
|
||||
+#define DUPLEX_HALF 0
|
||||
+#endif
|
||||
+
|
||||
+#ifndef BIT
|
||||
+#define BIT(n) (0x1<<(n))
|
||||
+#endif
|
||||
+#ifndef s32
|
||||
+typedef int s32;
|
||||
+typedef unsigned int u32;
|
||||
+typedef unsigned short u16;
|
||||
+typedef unsigned char u8;
|
||||
+#endif
|
||||
+
|
||||
+#ifndef REG_PHY_SPEC_STATUS
|
||||
+#define REG_PHY_SPEC_STATUS 0x11
|
||||
+#define REG_DEBUG_ADDR_OFFSET 0x1e
|
||||
+#define REG_DEBUG_DATA 0x1f
|
||||
+#endif
|
||||
+
|
||||
+/**********YT8614************************************************/
|
||||
+
|
||||
+#define YT8614_SMI_SEL_PHY 0x0
|
||||
+#define YT8614_SMI_SEL_SDS_QSGMII 0x02
|
||||
+#define YT8614_SMI_SEL_SDS_SGMII 0x03
|
||||
+
|
||||
+/* yt8614 register type */
|
||||
+#define YT8614_TYPE_COMMON 0x01
|
||||
+#define YT8614_TYPE_UTP_MII 0x02
|
||||
+#define YT8614_TYPE_UTP_EXT 0x03
|
||||
+#define YT8614_TYPE_LDS_MII 0x04
|
||||
+#define YT8614_TYPE_UTP_MMD 0x05
|
||||
+#define YT8614_TYPE_SDS_QSGMII_MII 0x06
|
||||
+#define YT8614_TYPE_SDS_SGMII_MII 0x07
|
||||
+#define YT8614_TYPE_SDS_QSGMII_EXT 0x08
|
||||
+#define YT8614_TYPE_SDS_SGMII_EXT 0x09
|
||||
+
|
||||
+/* YT8614 extended common register */
|
||||
+#define YT8614_REG_COM_SMI_MUX 0xA000
|
||||
+#define YT8614_REG_COM_SLED_CFG0 0xA001
|
||||
+#define YT8614_REG_COM_PHY_ID 0xA002
|
||||
+#define YT8614_REG_COM_CHIP_VER 0xA003
|
||||
+#define YT8614_REG_COM_SLED_CFG 0xA004
|
||||
+#define YT8614_REG_COM_MODE_CHG_RESET 0xA005
|
||||
+#define YT8614_REG_COM_SYNCE0_CFG 0xA006
|
||||
+#define YT8614_REG_COM_CHIP_MODE 0xA007
|
||||
+
|
||||
+#define YT8614_REG_COM_HIDE_SPEED 0xA009
|
||||
+
|
||||
+#define YT8614_REG_COM_SYNCE1_CFG 0xA00E
|
||||
+
|
||||
+#define YT8614_REG_COM_HIDE_FIBER_MODE 0xA019
|
||||
+
|
||||
+
|
||||
+#define YT8614_REG_COM_HIDE_SEL1 0xA054
|
||||
+#define YT8614_REG_COM_HIDE_LED_CFG2 0xB8
|
||||
+#define YT8614_REG_COM_HIDE_LED_CFG3 0xB9
|
||||
+#define YT8614_REG_COM_HIDE_LED_CFG5 0xBB
|
||||
+
|
||||
+#define YT8614_REG_COM_HIDE_LED_CFG4 0xBA //not used currently
|
||||
+
|
||||
+#if 0
|
||||
+#define YT8614_REG_COM_HIDE_LED12_CFG 0xA060 //not used currently
|
||||
+#define YT8614_REG_COM_HIDE_LED13_CFG 0xA061
|
||||
+#define YT8614_REG_COM_HIDE_LED14_CFG 0xA062
|
||||
+#define YT8614_REG_COM_HIDE_LED15_CFG 0xA063
|
||||
+#define YT8614_REG_COM_HIDE_LED16_CFG 0xA064
|
||||
+#define YT8614_REG_COM_HIDE_LED17_CFG 0xA065
|
||||
+#define YT8614_REG_COM_HIDE_LED18_CFG 0xA066
|
||||
+#define YT8614_REG_COM_HIDE_LED19_CFG 0xA067
|
||||
+#define YT8614_REG_COM_HIDE_LED20_CFG 0xA068
|
||||
+#define YT8614_REG_COM_HIDE_LED21_CFG 0xA069
|
||||
+#define YT8614_REG_COM_HIDE_LED22_CFG 0xA06A
|
||||
+#define YT8614_REG_COM_HIDE_LED23_CFG 0xA06B
|
||||
+#define YT8614_REG_COM_HIDE_LED24_CFG 0xA06C
|
||||
+#define YT8614_REG_COM_HIDE_LED25_CFG 0xA06D
|
||||
+#define YT8614_REG_COM_HIDE_LED26_CFG 0xA06E
|
||||
+#define YT8614_REG_COM_HIDE_LED27_CFG 0xA06F
|
||||
+#endif
|
||||
+
|
||||
+#define YT8614_REG_COM_HIDE_LED28_CFG 0xA070
|
||||
+#define YT8614_REG_COM_HIDE_LED29_CFG 0xA071
|
||||
+#define YT8614_REG_COM_HIDE_LED30_CFG 0xA072
|
||||
+#define YT8614_REG_COM_HIDE_LED31_CFG 0xA073
|
||||
+#define YT8614_REG_COM_HIDE_LED32_CFG 0xA074
|
||||
+#define YT8614_REG_COM_HIDE_LED33_CFG 0xA075
|
||||
+#define YT8614_REG_COM_HIDE_LED34_CFG 0xA076
|
||||
+#define YT8614_REG_COM_HIDE_LED35_CFG 0xA077
|
||||
+
|
||||
+#define YT8614_REG_COM_PKG_CFG0 0xA0A0
|
||||
+#define YT8614_REG_COM_PKG_CFG1 0xA0A1
|
||||
+#define YT8614_REG_COM_PKG_CFG2 0xA0A2
|
||||
+#define YT8614_REG_COM_PKG_RX_VALID0 0xA0A3
|
||||
+#define YT8614_REG_COM_PKG_RX_VALID1 0xA0A4
|
||||
+#define YT8614_REG_COM_PKG_RX_OS0 0xA0A5
|
||||
+#define YT8614_REG_COM_PKG_RX_OS1 0xA0A6
|
||||
+#define YT8614_REG_COM_PKG_RX_US0 0xA0A7
|
||||
+#define YT8614_REG_COM_PKG_RX_US1 0xA0A8
|
||||
+#define YT8614_REG_COM_PKG_RX_ERR 0xA0A9
|
||||
+#define YT8614_REG_COM_PKG_RX_OS_BAD 0xA0AA
|
||||
+#define YT8614_REG_COM_PKG_RX_FRAG 0xA0AB
|
||||
+#define YT8614_REG_COM_PKG_RX_NOSFD 0xA0AC
|
||||
+#define YT8614_REG_COM_PKG_TX_VALID0 0xA0AD
|
||||
+#define YT8614_REG_COM_PKG_TX_VALID1 0xA0AE
|
||||
+#define YT8614_REG_COM_PKG_TX_OS0 0xA0AF
|
||||
+
|
||||
+#define YT8614_REG_COM_PKG_TX_OS1 0xA0B0
|
||||
+#define YT8614_REG_COM_PKG_TX_US0 0xA0B1
|
||||
+#define YT8614_REG_COM_PKG_TX_US1 0xA0B2
|
||||
+#define YT8614_REG_COM_PKG_TX_ERR 0xA0B3
|
||||
+#define YT8614_REG_COM_PKG_TX_OS_BAD 0xA0B4
|
||||
+#define YT8614_REG_COM_PKG_TX_FRAG 0xA0B5
|
||||
+#define YT8614_REG_COM_PKG_TX_NOSFD 0xA0B6
|
||||
+#define YT8614_REG_COM_PKG_CFG3 0xA0B7
|
||||
+#define YT8614_REG_COM_PKG_AZ_CFG 0xA0B8
|
||||
+#define YT8614_REG_COM_PKG_DA_SA_CFG3 0xA0B9
|
||||
+
|
||||
+#define YT8614_REG_COM_MANU_HW_RESET 0xA0C0
|
||||
+
|
||||
+/* YT8614 UTP MII register: same as generic phy register definitions */
|
||||
+#define REG_MII_BMCR 0x00 /* Basic mode control register */
|
||||
+#define REG_MII_BMSR 0x01 /* Basic mode status register */
|
||||
+#define REG_MII_PHYSID1 0x02 /* PHYS ID 1 */
|
||||
+#define REG_MII_PHYSID2 0x03 /* PHYS ID 2 */
|
||||
+#define REG_MII_ADVERTISE 0x04 /* Advertisement control reg */
|
||||
+#define REG_MII_LPA 0x05 /* Link partner ability reg */
|
||||
+#define REG_MII_EXPANSION 0x06 /* Expansion register */
|
||||
+#define REG_MII_NEXT_PAGE 0x07 /* Next page register */
|
||||
+#define REG_MII_LPR_NEXT_PAGE 0x08 /* LPR next page register */
|
||||
+#define REG_MII_CTRL1000 0x09 /* 1000BASE-T control */
|
||||
+#define REG_MII_STAT1000 0x0A /* 1000BASE-T status */
|
||||
+
|
||||
+#define REG_MII_MMD_CTRL 0x0D /* MMD access control register */
|
||||
+#define REG_MII_MMD_DATA 0x0E /* MMD access data register */
|
||||
+
|
||||
+#define REG_MII_ESTATUS 0x0F /* Extended Status */
|
||||
+#define REG_MII_SPEC_CTRL 0x10 /* PHY specific func control */
|
||||
+#define REG_MII_SPEC_STATUS 0x11 /* PHY specific status */
|
||||
+#define REG_MII_INT_MASK 0x12 /* Interrupt mask register */
|
||||
+#define REG_MII_INT_STATUS 0x13 /* Interrupt status register */
|
||||
+#define REG_MII_DOWNG_CTRL 0x14 /* Speed auto downgrade control*/
|
||||
+#define REG_MII_RERRCOUNTER 0x15 /* Receive error counter */
|
||||
+
|
||||
+#define REG_MII_EXT_ADDR 0x1E /* Extended reg's address */
|
||||
+#define REG_MII_EXT_DATA 0x1F /* Extended reg's date */
|
||||
+
|
||||
+#ifndef MII_BMSR
|
||||
+#define MII_BMSR REG_MII_BMSR
|
||||
+#endif
|
||||
+
|
||||
+#ifndef YT8614_SPEED_MODE_BIT
|
||||
+#define YT8614_SPEED_MODE 0xc000
|
||||
+#define YT8614_DUPLEX 0x2000
|
||||
+#define YT8614_SPEED_MODE_BIT 14
|
||||
+#define YT8614_DUPLEX_BIT 13
|
||||
+#define YT8614_LINK_STATUS_BIT 10
|
||||
+
|
||||
+#endif
|
||||
+
|
||||
+#define YT8614_REG_COM_HIDE_SPEED_CMB_PRI 0x2000
|
||||
+
|
||||
+/* YT8614 UTP MMD register */
|
||||
+#define YT8614_REG_UTP_MMD_CTRL1 0x00 /* PCS control 1 register */
|
||||
+#define YT8614_REG_UTP_MMD_STATUS1 0x01 /* PCS status 1 register */
|
||||
+#define YT8614_REG_UTP_MMD_EEE_CTRL 0x14 /* EEE control and capability */
|
||||
+#define YT8614_REG_UTP_MMD_EEE_WK_ERR_CNT 0x16 /* EEE wake error counter */
|
||||
+#define YT8614_REG_UTP_MMD_EEE_LOCAL_ABI 0x3C /* local device EEE ability */
|
||||
+#define YT8614_REG_UTP_MMD_EEE_LP_ABI 0x3D /* link partner EEE ability */
|
||||
+#define YT8614_REG_UTP_MMD_EEE_AUTONEG_RES 0x8000 /* autoneg result of EEE */
|
||||
+
|
||||
+/* YT8614 UTP EXT register */
|
||||
+#define YT8614_REG_UTP_EXT_LPBK 0x0A
|
||||
+#define YT8614_REG_UTP_EXT_SLEEP_CTRL1 0x27
|
||||
+#define YT8614_REG_UTP_EXT_DEBUG_MON1 0x5A
|
||||
+#define YT8614_REG_UTP_EXT_DEBUG_MON2 0x5B
|
||||
+#define YT8614_REG_UTP_EXT_DEBUG_MON3 0x5C
|
||||
+#define YT8614_REG_UTP_EXT_DEBUG_MON4 0x5D
|
||||
+
|
||||
+/* YT8614 SDS(1.25G/5G) MII register: same as YT8521S */
|
||||
+#define REG_SDS_BMCR 0x00 /* Basic mode control register */
|
||||
+#define REG_SDS_BMSR 0x01 /* Basic mode status register */
|
||||
+#define REG_SDS_PHYSID1 0x02 /* PHYS ID 1 */
|
||||
+#define REG_SDS_PHYSID2 0x03 /* PHYS ID 2 */
|
||||
+#define REG_SDS_ADVERTISE 0x04 /* Advertisement control reg */
|
||||
+#define REG_SDS_LPA 0x05 /* Link partner ability reg */
|
||||
+#define REG_SDS_EXPANSION 0x06 /* Expansion register */
|
||||
+#define REG_SDS_NEXT_PAGE 0x07 /* Next page register */
|
||||
+#define REG_SDS_LPR_NEXT_PAGE 0x08 /* LPR next page register */
|
||||
+
|
||||
+#define REG_SDS_ESTATUS 0x0F /* Extended Status */
|
||||
+#define REG_SDS_SPEC_STATUS 0x11 /* SDS specific status */
|
||||
+
|
||||
+#define REG_SDS_100FX_CFG 0x14 /* 100fx cfg */
|
||||
+#define REG_SDS_RERRCOUNTER 0x15 /* Receive error counter */
|
||||
+#define REG_SDS_LINT_FAIL_CNT 0x16 /* Lint fail counter mon */
|
||||
+
|
||||
+/* YT8614 SDS(5G) EXT register */
|
||||
+#define YT8614_REG_QSGMII_EXT_ANA_DIG_CFG 0x02 /* sds analog digital interface cfg */
|
||||
+#define YT8614_REG_QSGMII_EXT_PRBS_CFG1 0x05 /* sds prbs cfg1 */
|
||||
+#define YT8614_REG_QSGMII_EXT_PRBS_CFG2_1 0x06 /* sds prbs cfg2 */
|
||||
+#define YT8614_REG_QSGMII_EXT_PRBS_CFG2_2 0x07 /* sds prbs cfg2 */
|
||||
+#define YT8614_REG_QSGMII_EXT_PRBS_MON1 0x08 /* sds prbs mon1 */
|
||||
+#define YT8614_REG_QSGMII_EXT_PRBS_MON2 0x09 /* sds prbs mon2 */
|
||||
+#define YT8614_REG_QSGMII_EXT_PRBS_MON3 0x0A /* sds prbs mon3 */
|
||||
+#define YT8614_REG_QSGMII_EXT_PRBS_MON4 0x0B /* sds prbs mon4 */
|
||||
+#define YT8614_REG_QSGMII_EXT_PRBS_MON5 0x0C /* sds prbs mon5 */
|
||||
+#define YT8614_REG_QSGMII_EXT_ANA_CFG2 0xA1 /* Analog cfg2 */
|
||||
+
|
||||
+/* YT8614 SDS(1.25G) EXT register */
|
||||
+#define YT8614_REG_SGMII_EXT_PRBS_CFG1 0x05 /* sds prbs cfg1 */
|
||||
+#define YT8614_REG_SGMII_EXT_PRBS_CFG2 0x06 /* sds prbs cfg2 */
|
||||
+#define YT8614_REG_SGMII_EXT_PRBS_MON1 0x08 /* sds prbs mon1 */
|
||||
+#define YT8614_REG_SGMII_EXT_PRBS_MON2 0x09 /* sds prbs mon2 */
|
||||
+#define YT8614_REG_SGMII_EXT_PRBS_MON3 0x0A /* sds prbs mon3 */
|
||||
+#define YT8614_REG_SGMII_EXT_PRBS_MON4 0x0B /* sds prbs mon4 */
|
||||
+#define YT8614_REG_SGMII_EXT_PRBS_MON5 0x0C /* sds prbs mon5 */
|
||||
+#define YT8614_REG_SGMII_EXT_ANA_CFG2 0xA1 /* Analog cfg2 */
|
||||
+#define YT8614_REG_SGMII_EXT_HIDE_AUTO_SEN 0xA5 /* Fiber auto sensing */
|
||||
+
|
||||
+////////////////////////////////////////////////////////////////////
|
||||
+#define YT8614_MMD_DEV_ADDR1 0x1
|
||||
+#define YT8614_MMD_DEV_ADDR3 0x3
|
||||
+#define YT8614_MMD_DEV_ADDR7 0x7
|
||||
+#define YT8614_MMD_DEV_ADDR_NONE 0xFF
|
||||
+
|
||||
+/**********YT8521S************************************************/
|
||||
+/* Basic mode control register(0x00) */
|
||||
+#define BMCR_RESV 0x003f /* Unused... */
|
||||
+#define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */
|
||||
+#define BMCR_CTST 0x0080 /* Collision test */
|
||||
+#define BMCR_FULLDPLX 0x0100 /* Full duplex */
|
||||
+#define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */
|
||||
+#define BMCR_ISOLATE 0x0400 /* Disconnect DP83840 from MII */
|
||||
+#define BMCR_PDOWN 0x0800 /* Powerdown the DP83840 */
|
||||
+#define BMCR_ANENABLE 0x1000 /* Enable auto negotiation */
|
||||
+#define BMCR_SPEED100 0x2000 /* Select 100Mbps */
|
||||
+#define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */
|
||||
+#define BMCR_RESET 0x8000 /* Reset the DP83840 */
|
||||
+
|
||||
+/* Basic mode status register(0x01) */
|
||||
+#define BMSR_ERCAP 0x0001 /* Ext-reg capability */
|
||||
+#define BMSR_JCD 0x0002 /* Jabber detected */
|
||||
+#define BMSR_LSTATUS 0x0004 /* Link status */
|
||||
+#define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */
|
||||
+#define BMSR_RFAULT 0x0010 /* Remote fault detected */
|
||||
+#define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */
|
||||
+#define BMSR_RESV 0x00c0 /* Unused... */
|
||||
+#define BMSR_ESTATEN 0x0100 /* Extended Status in R15 */
|
||||
+#define BMSR_100HALF2 0x0200 /* Can do 100BASE-T2 HDX */
|
||||
+#define BMSR_100FULL2 0x0400 /* Can do 100BASE-T2 FDX */
|
||||
+#define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */
|
||||
+#define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */
|
||||
+#define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */
|
||||
+#define BMSR_100FULL 0x4000 /* Can do 100mbps, full-duplex */
|
||||
+#define BMSR_100BASE4 0x8000 /* Can do 100mbps, 4k packets */
|
||||
+
|
||||
+/* Advertisement control register(0x04) */
|
||||
+#define ADVERTISE_SLCT 0x001f /* Selector bits */
|
||||
+#define ADVERTISE_CSMA 0x0001 /* Only selector supported */
|
||||
+#define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */
|
||||
+#define ADVERTISE_1000XFULL 0x0020 /* Try for 1000BASE-X full-duplex */
|
||||
+#define ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */
|
||||
+#define ADVERTISE_1000XHALF 0x0040 /* Try for 1000BASE-X half-duplex */
|
||||
+#define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */
|
||||
+#define ADVERTISE_1000XPAUSE 0x0080 /* Try for 1000BASE-X pause */
|
||||
+#define ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */
|
||||
+#define ADVERTISE_1000XPSE_ASYM 0x0100 /* Try for 1000BASE-X asym pause */
|
||||
+#define ADVERTISE_100BASE4 0x0200 /* Try for 100mbps 4k packets */
|
||||
+#define ADVERTISE_PAUSE_CAP 0x0400 /* Try for pause */
|
||||
+#define ADVERTISE_PAUSE_ASYM 0x0800 /* Try for asymetric pause */
|
||||
+#define ADVERTISE_RESV 0x1000 /* Unused... */
|
||||
+#define ADVERTISE_RFAULT 0x2000 /* Say we can detect faults */
|
||||
+#define ADVERTISE_LPACK 0x4000 /* Ack link partners response */
|
||||
+#define ADVERTISE_NPAGE 0x8000 /* Next page bit */
|
||||
+
|
||||
+#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | ADVERTISE_CSMA)
|
||||
+#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \
|
||||
+ ADVERTISE_100HALF | ADVERTISE_100FULL)
|
||||
+
|
||||
+/* Link partner ability register(0x05) */
|
||||
+#define LPA_SLCT 0x001f /* Same as advertise selector */
|
||||
+#define LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */
|
||||
+#define LPA_1000XFULL 0x0020 /* Can do 1000BASE-X full-duplex */
|
||||
+#define LPA_10FULL 0x0040 /* Can do 10mbps full-duplex */
|
||||
+#define LPA_1000XHALF 0x0040 /* Can do 1000BASE-X half-duplex */
|
||||
+#define LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */
|
||||
+#define LPA_1000XPAUSE 0x0080 /* Can do 1000BASE-X pause */
|
||||
+#define LPA_100FULL 0x0100 /* Can do 100mbps full-duplex */
|
||||
+#define LPA_1000XPAUSE_ASYM 0x0100 /* Can do 1000BASE-X pause asym */
|
||||
+#define LPA_100BASE4 0x0200 /* Can do 100mbps 4k packets */
|
||||
+#define LPA_PAUSE_CAP 0x0400 /* Can pause */
|
||||
+#define LPA_PAUSE_ASYM 0x0800 /* Can pause asymetrically */
|
||||
+#define LPA_RESV 0x1000 /* Unused... */
|
||||
+#define LPA_RFAULT 0x2000 /* Link partner faulted */
|
||||
+#define LPA_LPACK 0x4000 /* Link partner acked us */
|
||||
+#define LPA_NPAGE 0x8000 /* Next page bit */
|
||||
+
|
||||
+/* 1000BASE-T Control register(0x09) */
|
||||
+#define ADVERTISE_1000FULL 0x0200 /* Advertise 1000BASE-T full duplex */
|
||||
+#define ADVERTISE_1000HALF 0x0100 /* Advertise 1000BASE-T half duplex */
|
||||
+#define CTL1000_AS_MASTER 0x0800
|
||||
+#define CTL1000_ENABLE_MASTER 0x1000
|
||||
+
|
||||
+/* 1000BASE-T Status register(0x0A) */
|
||||
+#define LPA_1000LOCALRXOK 0x2000 /* Link partner local receiver status */
|
||||
+#define LPA_1000REMRXOK 0x1000 /* Link partner remote receiver status */
|
||||
+#define LPA_1000FULL 0x0800 /* Link partner 1000BASE-T full duplex */
|
||||
+#define LPA_1000HALF 0x0400 /* Link partner 1000BASE-T half duplex */
|
||||
+
|
||||
+/**********YT8614************************************************/
|
||||
+/* Basic mode control register(0x00) */
|
||||
+#define FIBER_BMCR_RESV 0x001f /* b[4:0] Unused... */
|
||||
+#define FIBER_BMCR_EN_UNIDIR 0x0020 /* b[5] Valid when bit 0.12 is zero and bit 0.8 is one */
|
||||
+#define FIBER_BMCR_SPEED1000 0x0040 /* b[6] MSB of Speed (1000) */
|
||||
+#define FIBER_BMCR_CTST 0x0080 /* b[7] Collision test */
|
||||
+#define FIBER_BMCR_DUPLEX_MODE 0x0100 /* b[8] Duplex mode */
|
||||
+#define FIBER_BMCR_ANRESTART 0x0200 /* b[9] Auto negotiation restart */
|
||||
+#define FIBER_BMCR_ISOLATE 0x0400 /* b[10] Isolate phy from RGMII/SGMII/FIBER */
|
||||
+#define FIBER_BMCR_PDOWN 0x0800 /* b[11] 1: Power down */
|
||||
+#define FIBER_BMCR_ANENABLE 0x1000 /* b[12] Enable auto negotiation */
|
||||
+#define FIBER_BMCR_SPEED100 0x2000 /* b[13] LSB of Speed (100) */
|
||||
+#define FIBER_BMCR_LOOPBACK 0x4000 /* b[14] Internal loopback control */
|
||||
+#define FIBER_BMCR_RESET 0x8000 /* b[15] PHY Software Reset(self-clear) */
|
||||
+
|
||||
+/* Sds specific status register(0x11) */
|
||||
+#define FIBER_SSR_ERCAP 0x0001 /* b[0] realtime syncstatus */
|
||||
+#define FIBER_SSR_XMIT 0x000E /* b[3:1] realtime transmit statemachine.
|
||||
+ 001: Xmit Idle;
|
||||
+ 010: Xmit Config;
|
||||
+ 100: Xmit Data. */
|
||||
+#define FIBER_SSR_SER_MODE_CFG 0x0030 /* b[5:4] realtime serdes working mode.
|
||||
+ 00: SG_MAC;
|
||||
+ 01: SG_PHY;
|
||||
+ 10: FIB_1000;
|
||||
+ 11: FIB_100. */
|
||||
+#define FIBER_SSR_EN_FLOWCTRL_TX 0x0040 /* b[6] realtime en_flowctrl_tx */
|
||||
+#define FIBER_SSR_EN_FLOWCTRL_RX 0x0080 /* b[7] realtime en_flowctrl_rx */
|
||||
+#define FIBER_SSR_DUPLEX_ERROR 0x0100 /* b[8] realtime deplex error */
|
||||
+#define FIBER_SSR_RX_LPI_ACTIVE 0x0200 /* b[9] rx lpi is active */
|
||||
+#define FIBER_SSR_LSTATUS 0x0400 /* b[10] Link status real-time */
|
||||
+#define FIBER_SSR_PAUSE 0x1800 /* b[12:11] Pause to mac */
|
||||
+#define FIBER_SSR_DUPLEX 0x2000 /* b[13] This status bit is valid only when bit10 is 1.
|
||||
+ 1: full duplex
|
||||
+ 0: half duplex */
|
||||
+#define FIBER_SSR_SPEED_MODE 0xC000 /* b[15:14] These status bits are valid only when bit10 is 1.
|
||||
+ 10---1000M
|
||||
+ 01---100M */
|
||||
+
|
||||
+/* SLED cfg0 (ext 0xA001) */
|
||||
+#define FIBER_SLED_CFG0_EN_CTRL 0x00FF /* b[7:0] Control to enable the eight ports' SLED */
|
||||
+#define FIBER_SLED_CFG0_BIT_MASK 0x0700 /* b[10:8] 1: enable the pin output */
|
||||
+#define FIBER_SLED_CFG0_ACT_LOW 0x0800 /* b[11] control SLED's polarity. 1: active low; 0: active high */
|
||||
+#define FIBER_SLED_CFG0_MANU_ST 0x7000 /* b[14:12] SLEDs' manul status, corresponding to each port's 3 SLEDs */
|
||||
+#define FIBER_SLED_CFG0_MANU_EN 0x8000 /* b[15] to control serial LEDs status manually */
|
||||
+
|
||||
+/**********YT8614************************************************/
|
||||
+/* Fiber auto sensing(sgmii ext 0xA5) */
|
||||
+#define FIBER_AUTO_SEN_ENABLE 0x8000 /* b[15] Enable fiber auto sensing */
|
||||
+
|
||||
+/* Fiber force speed(common ext 0xA009) */
|
||||
+#define FIBER_FORCE_1000M 0x0001 /* b[0] 1:1000BX 0:100FX */
|
||||
+
|
||||
+#ifndef NULL
|
||||
+#define NULL 0
|
||||
+#endif
|
||||
+
|
||||
+/* errno */
|
||||
+enum ytphy_8614_errno_e
|
||||
+{
|
||||
+ SYS_E_NONE,
|
||||
+ SYS_E_PARAM,
|
||||
+ SYS_E_MAX
|
||||
+};
|
||||
+
|
||||
+/* errno */
|
||||
+enum ytphy_8614_combo_speed_e
|
||||
+{
|
||||
+ YT8614_COMBO_FIBER_1000M,
|
||||
+ YT8614_COMBO_FIBER_100M,
|
||||
+ YT8614_COMBO_UTP_ONLY,
|
||||
+ YT8614_COMBO_SPEED_MAX
|
||||
+};
|
||||
+
|
||||
+/* definition for porting */
|
||||
+/* phy registers access */
|
||||
+typedef struct
|
||||
+{
|
||||
+ u16 reg; /* the offset of the phy internal address */
|
||||
+ u16 val; /* the value of the register */
|
||||
+ u8 regType; /* register type */
|
||||
+} phy_data_s;
|
||||
+
|
||||
+/* for porting use.
|
||||
+ * pls over-write member function read/write for mdio access
|
||||
+ */
|
||||
+typedef struct phy_info_str
|
||||
+{
|
||||
+#if 0
|
||||
+ struct phy_device *phydev;
|
||||
+ int mdio_base;
|
||||
+#endif
|
||||
+ unsigned int lport;
|
||||
+ unsigned int bus_id;
|
||||
+ unsigned int phy_addr;
|
||||
+
|
||||
+ s32 (*read)(struct phy_info_str *info, phy_data_s *param);
|
||||
+ s32 (*write)(struct phy_info_str *info, phy_data_s *param);
|
||||
+}phy_info_s;
|
||||
+
|
||||
+/* get phy access method */
|
||||
+s32 yt8614_read_reg(struct phy_info_str *info, phy_data_s *param);
|
||||
+s32 yt8614_write_reg(struct phy_info_str *info, phy_data_s *param);
|
||||
+s32 yt8614_phy_soft_reset(u32 lport);
|
||||
+s32 yt8614_phy_init(u32 lport);
|
||||
+s32 yt8614_fiber_enable(u32 lport, BOOL enable);
|
||||
+s32 yt8614_utp_enable(u32 lport, BOOL enable);
|
||||
+s32 yt8614_fiber_unidirection_set(u32 lport, int speed, BOOL enable);
|
||||
+s32 yt8614_fiber_autosensing_set(u32 lport, BOOL enable);
|
||||
+s32 yt8614_fiber_speed_set(u32 lport, int fiber_speed);
|
||||
+s32 yt8614_qsgmii_autoneg_set(u32 lport, BOOL enable);
|
||||
+s32 yt8614_sgmii_autoneg_set(u32 lport, BOOL enable);
|
||||
+s32 yt8614_qsgmii_sgmii_link_status_get(u32 lport, BOOL *enable, BOOL if_qsgmii);
|
||||
+int yt8614_combo_media_priority_set (u32 lport, int fiber);
|
||||
+int yt8614_combo_media_priority_get (u32 lport, int *fiber);
|
||||
+s32 yt8614_utp_autoneg_set(u32 lport, BOOL enable);
|
||||
+s32 yt8614_utp_autoneg_get(u32 lport, BOOL *enable);
|
||||
+s32 yt8614_utp_autoneg_ability_set(u32 lport, unsigned int cap_mask);
|
||||
+s32 yt8614_utp_autoneg_ability_get(u32 lport, unsigned int *cap_mask);
|
||||
+s32 yt8614_utp_force_duplex_set(u32 lport, BOOL full);
|
||||
+s32 yt8614_utp_force_duplex_get(u32 lport, BOOL *full);
|
||||
+s32 yt8614_utp_force_speed_set(u32 lport, unsigned int speed);
|
||||
+s32 yt8614_utp_force_speed_get(u32 lport, unsigned int *speed);
|
||||
+int yt8614_autoneg_done_get (u32 lport, int speed, int *aneg);
|
||||
+int yt8614_media_status_get(u32 lport, int* speed, int* duplex, int* ret_link, int *media);
|
||||
+
|
||||
+#endif
|
||||
diff --git a/include/linux/motorcomm_phy.h b/include/linux/motorcomm_phy.h
|
||||
new file mode 100644
|
||||
index 000000000..9e01fc205
|
||||
--- /dev/null
|
||||
+++ b/include/linux/motorcomm_phy.h
|
||||
@@ -0,0 +1,119 @@
|
||||
+/*
|
||||
+ * include/linux/motorcomm_phy.h
|
||||
+ *
|
||||
+ * Motorcomm PHY IDs
|
||||
+ *
|
||||
+ * This program is free software; you can redistribute it and/or modify it
|
||||
+ * under the terms of the GNU General Public License as published by the
|
||||
+ * Free Software Foundation; either version 2 of the License, or (at your
|
||||
+ * option) any later version.
|
||||
+ *
|
||||
+ */
|
||||
+
|
||||
+#ifndef _MOTORCOMM_PHY_H
|
||||
+#define _MOTORCOMM_PHY_H
|
||||
+
|
||||
+#define MOTORCOMM_PHY_ID_MASK 0x00000fff
|
||||
+#define MOTORCOMM_PHY_ID_8531_MASK 0xffffffff
|
||||
+#define MOTORCOMM_MPHY_ID_MASK 0x0000ffff
|
||||
+
|
||||
+#define PHY_ID_YT8010 0x00000309
|
||||
+#define PHY_ID_YT8510 0x00000109
|
||||
+#define PHY_ID_YT8511 0x0000010a
|
||||
+#define PHY_ID_YT8512 0x00000118
|
||||
+#define PHY_ID_YT8512B 0x00000128
|
||||
+#define PHY_ID_YT8521 0x0000011a
|
||||
+#define PHY_ID_YT8531S 0x4f51e91a
|
||||
+#define PHY_ID_YT8531 0x4f51e91b
|
||||
+//#define PHY_ID_YT8614 0x0000e899
|
||||
+#define PHY_ID_YT8618 0x0000e889
|
||||
+
|
||||
+#define REG_PHY_SPEC_STATUS 0x11
|
||||
+#define REG_DEBUG_ADDR_OFFSET 0x1e
|
||||
+#define REG_DEBUG_DATA 0x1f
|
||||
+
|
||||
+#define YT8512_EXTREG_AFE_PLL 0x50
|
||||
+#define YT8512_EXTREG_EXTEND_COMBO 0x4000
|
||||
+#define YT8512_EXTREG_LED0 0x40c0
|
||||
+#define YT8512_EXTREG_LED1 0x40c3
|
||||
+
|
||||
+#define YT8512_EXTREG_SLEEP_CONTROL1 0x2027
|
||||
+
|
||||
+#define YT_SOFTWARE_RESET 0x8000
|
||||
+
|
||||
+#define YT8512_CONFIG_PLL_REFCLK_SEL_EN 0x0040
|
||||
+#define YT8512_CONTROL1_RMII_EN 0x0001
|
||||
+#define YT8512_LED0_ACT_BLK_IND 0x1000
|
||||
+#define YT8512_LED0_DIS_LED_AN_TRY 0x0001
|
||||
+#define YT8512_LED0_BT_BLK_EN 0x0002
|
||||
+#define YT8512_LED0_HT_BLK_EN 0x0004
|
||||
+#define YT8512_LED0_COL_BLK_EN 0x0008
|
||||
+#define YT8512_LED0_BT_ON_EN 0x0010
|
||||
+#define YT8512_LED1_BT_ON_EN 0x0010
|
||||
+#define YT8512_LED1_TXACT_BLK_EN 0x0100
|
||||
+#define YT8512_LED1_RXACT_BLK_EN 0x0200
|
||||
+#define YT8512_SPEED_MODE 0xc000
|
||||
+#define YT8512_DUPLEX 0x2000
|
||||
+
|
||||
+#define YT8512_SPEED_MODE_BIT 14
|
||||
+#define YT8512_DUPLEX_BIT 13
|
||||
+#define YT8512_EN_SLEEP_SW_BIT 15
|
||||
+
|
||||
+#define YT8521_EXTREG_SLEEP_CONTROL1 0x27
|
||||
+#define YT8521_EN_SLEEP_SW_BIT 15
|
||||
+
|
||||
+#define YT8521_SPEED_MODE 0xc000
|
||||
+#define YT8521_DUPLEX 0x2000
|
||||
+#define YT8521_SPEED_MODE_BIT 14
|
||||
+#define YT8521_DUPLEX_BIT 13
|
||||
+#define YT8521_LINK_STATUS_BIT 10
|
||||
+
|
||||
+/* based on yt8521 wol config register */
|
||||
+#define YTPHY_UTP_INTR_REG 0x12
|
||||
+/* WOL Event Interrupt Enable */
|
||||
+#define YTPHY_WOL_INTR BIT(6)
|
||||
+
|
||||
+/* Magic Packet MAC address registers */
|
||||
+#define YTPHY_MAGIC_PACKET_MAC_ADDR2 0xa007
|
||||
+#define YTPHY_MAGIC_PACKET_MAC_ADDR1 0xa008
|
||||
+#define YTPHY_MAGIC_PACKET_MAC_ADDR0 0xa009
|
||||
+
|
||||
+#define YTPHY_WOL_CFG_REG 0xa00a
|
||||
+#define YTPHY_WOL_CFG_TYPE BIT(0) /* WOL TYPE */
|
||||
+#define YTPHY_WOL_CFG_EN BIT(3) /* WOL Enable */
|
||||
+#define YTPHY_WOL_CFG_INTR_SEL BIT(6) /* WOL Event Interrupt Enable */
|
||||
+#define YTPHY_WOL_CFG_WIDTH1 BIT(1) /* WOL Pulse Width */
|
||||
+#define YTPHY_WOL_CFG_WIDTH2 BIT(2)
|
||||
+
|
||||
+#define YTPHY_REG_SPACE_UTP 0
|
||||
+#define YTPHY_REG_SPACE_FIBER 2
|
||||
+
|
||||
+enum ytphy_wol_type_e
|
||||
+{
|
||||
+ YTPHY_WOL_TYPE_LEVEL,
|
||||
+ YTPHY_WOL_TYPE_PULSE,
|
||||
+ YTPHY_WOL_TYPE_MAX
|
||||
+};
|
||||
+typedef enum ytphy_wol_type_e ytphy_wol_type_t;
|
||||
+
|
||||
+enum ytphy_wol_width_e
|
||||
+{
|
||||
+ YTPHY_WOL_WIDTH_84MS,
|
||||
+ YTPHY_WOL_WIDTH_168MS,
|
||||
+ YTPHY_WOL_WIDTH_336MS,
|
||||
+ YTPHY_WOL_WIDTH_672MS,
|
||||
+ YTPHY_WOL_WIDTH_MAX
|
||||
+};
|
||||
+typedef enum ytphy_wol_width_e ytphy_wol_width_t;
|
||||
+
|
||||
+struct ytphy_wol_cfg_s
|
||||
+{
|
||||
+ int enable;
|
||||
+ int type;
|
||||
+ int width;
|
||||
+};
|
||||
+typedef struct ytphy_wol_cfg_s ytphy_wol_cfg_t;
|
||||
+
|
||||
+#endif /* _MOTORCOMM_PHY_H */
|
||||
+
|
||||
+
|
||||
--
|
||||
2.25.1
|
||||
|
||||
@@ -1,150 +0,0 @@
|
||||
From 0207f77ece3d07b964d5723c501adc3f3a5a3c6d Mon Sep 17 00:00:00 2001
|
||||
From: Dan Johansen <strit@manjaro.org>
|
||||
Date: Mon, 1 Jun 2020 17:14:50 +0200
|
||||
Subject: [PATCH] fix wonky wifi/bt on PBP
|
||||
|
||||
---
|
||||
drivers/bluetooth/hci_bcm.c | 17 +++++++++++++++++
|
||||
drivers/bluetooth/hci_serdev.c | 2 ++
|
||||
drivers/mmc/core/pwrseq_simple.c | 19 ++++++++++++++++---
|
||||
drivers/tty/serdev/core.c | 11 +++++++++++
|
||||
include/linux/serdev.h | 1 +
|
||||
5 files changed, 47 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/drivers/bluetooth/hci_bcm.c b/drivers/bluetooth/hci_bcm.c
|
||||
index b236cb11c0dc..bfd37fb9eeb0 100644
|
||||
--- a/drivers/bluetooth/hci_bcm.c
|
||||
+++ b/drivers/bluetooth/hci_bcm.c
|
||||
@@ -1472,6 +1472,22 @@ static void bcm_serdev_remove(struct serdev_device *serdev)
|
||||
hci_uart_unregister_device(&bcmdev->serdev_hu);
|
||||
}
|
||||
|
||||
+static void bcm_serdev_shutdown(struct serdev_device *serdev)
|
||||
+{
|
||||
+ struct bcm_device *bcmdev = serdev_device_get_drvdata(serdev);
|
||||
+
|
||||
+/*
|
||||
+ if (test_bit(HCI_UART_REGISTERED, &bcmdev->hu->flags)) {
|
||||
+ hci_uart_unregister_device(&bcmdev->serdev_hu);
|
||||
+ }
|
||||
+*/
|
||||
+ dev_info(bcmdev->dev, "Cutting power to bluetooth module\n");
|
||||
+ if (bcm_gpio_set_power(bcmdev, false)) {
|
||||
+ dev_err(bcmdev->dev, "Failed to power down\n");
|
||||
+ }
|
||||
+ usleep_range(500000, 1000000);
|
||||
+}
|
||||
+
|
||||
#ifdef CONFIG_OF
|
||||
static struct bcm_device_data bcm4354_device_data = {
|
||||
.no_early_set_baudrate = true,
|
||||
@@ -1497,6 +1513,7 @@ MODULE_DEVICE_TABLE(of, bcm_bluetooth_of_match);
|
||||
static struct serdev_device_driver bcm_serdev_driver = {
|
||||
.probe = bcm_serdev_probe,
|
||||
.remove = bcm_serdev_remove,
|
||||
+ .shutdown = bcm_serdev_shutdown,
|
||||
.driver = {
|
||||
.name = "hci_uart_bcm",
|
||||
.of_match_table = of_match_ptr(bcm_bluetooth_of_match),
|
||||
diff --git a/drivers/bluetooth/hci_serdev.c b/drivers/bluetooth/hci_serdev.c
|
||||
index 4652896d4990..043c585b34a7 100644
|
||||
--- a/drivers/bluetooth/hci_serdev.c
|
||||
+++ b/drivers/bluetooth/hci_serdev.c
|
||||
@@ -395,5 +395,7 @@ void hci_uart_unregister_device(struct hci_uart *hu)
|
||||
clear_bit(HCI_UART_PROTO_READY, &hu->flags);
|
||||
serdev_device_close(hu->serdev);
|
||||
}
|
||||
+
|
||||
+clear_bit(HCI_UART_REGISTERED, &hu->flags);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(hci_uart_unregister_device);
|
||||
diff --git a/drivers/mmc/core/pwrseq_simple.c b/drivers/mmc/core/pwrseq_simple.c
|
||||
index ea4d3670560e..b52c3f5b4f13 100644
|
||||
--- a/drivers/mmc/core/pwrseq_simple.c
|
||||
+++ b/drivers/mmc/core/pwrseq_simple.c
|
||||
@@ -80,10 +80,8 @@ static void mmc_pwrseq_simple_post_power_on(struct mmc_host *host)
|
||||
msleep(pwrseq->post_power_on_delay_ms);
|
||||
}
|
||||
|
||||
-static void mmc_pwrseq_simple_power_off(struct mmc_host *host)
|
||||
+static void __mmc_pwrseq_simple_power_off(struct mmc_pwrseq_simple *pwrseq)
|
||||
{
|
||||
- struct mmc_pwrseq_simple *pwrseq = to_pwrseq_simple(host->pwrseq);
|
||||
-
|
||||
mmc_pwrseq_simple_set_gpios_value(pwrseq, 1);
|
||||
|
||||
if (pwrseq->power_off_delay_us)
|
||||
@@ -96,6 +94,12 @@ static void mmc_pwrseq_simple_power_off(struct mmc_host *host)
|
||||
}
|
||||
}
|
||||
|
||||
+static void mmc_pwrseq_simple_power_off(struct mmc_host *host)
|
||||
+{
|
||||
+ struct mmc_pwrseq_simple *pwrseq = to_pwrseq_simple(host->pwrseq);
|
||||
+ __mmc_pwrseq_simple_power_off(pwrseq);
|
||||
+}
|
||||
+
|
||||
static const struct mmc_pwrseq_ops mmc_pwrseq_simple_ops = {
|
||||
.pre_power_on = mmc_pwrseq_simple_pre_power_on,
|
||||
.post_power_on = mmc_pwrseq_simple_post_power_on,
|
||||
@@ -151,9 +155,18 @@ static int mmc_pwrseq_simple_remove(struct platform_device *pdev)
|
||||
return 0;
|
||||
}
|
||||
|
||||
+static void mmc_pwrseq_simple_shutdown(struct platform_device *pdev)
|
||||
+{
|
||||
+ struct mmc_pwrseq_simple *pwrseq = platform_get_drvdata(pdev);
|
||||
+
|
||||
+ dev_info(&pdev->dev, "Turning off mmc\n");
|
||||
+ __mmc_pwrseq_simple_power_off(pwrseq);
|
||||
+}
|
||||
+
|
||||
static struct platform_driver mmc_pwrseq_simple_driver = {
|
||||
.probe = mmc_pwrseq_simple_probe,
|
||||
.remove = mmc_pwrseq_simple_remove,
|
||||
+ .shutdown = mmc_pwrseq_simple_shutdown,
|
||||
.driver = {
|
||||
.name = "pwrseq_simple",
|
||||
.of_match_table = mmc_pwrseq_simple_of_match,
|
||||
diff --git a/drivers/tty/serdev/core.c b/drivers/tty/serdev/core.c
|
||||
index c5f0d936b003..54bcb38f0c05 100644
|
||||
--- a/drivers/tty/serdev/core.c
|
||||
+++ b/drivers/tty/serdev/core.c
|
||||
@@ -432,11 +432,22 @@ static int serdev_drv_remove(struct device *dev)
|
||||
return 0;
|
||||
}
|
||||
|
||||
+static void serdev_drv_shutdown(struct device *dev)
|
||||
+{
|
||||
+ const struct serdev_device_driver *sdrv;
|
||||
+ if (dev->driver) {
|
||||
+ sdrv = to_serdev_device_driver(dev->driver);
|
||||
+ if (sdrv->shutdown)
|
||||
+ sdrv->shutdown(to_serdev_device(dev));
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
static struct bus_type serdev_bus_type = {
|
||||
.name = "serial",
|
||||
.match = serdev_device_match,
|
||||
.probe = serdev_drv_probe,
|
||||
.remove = serdev_drv_remove,
|
||||
+ .shutdown = serdev_drv_shutdown,
|
||||
};
|
||||
|
||||
/**
|
||||
diff --git a/include/linux/serdev.h b/include/linux/serdev.h
|
||||
index 9f14f9c12ec4..c3d5dccd6115 100644
|
||||
--- a/include/linux/serdev.h
|
||||
+++ b/include/linux/serdev.h
|
||||
@@ -63,6 +63,7 @@ struct serdev_device_driver {
|
||||
struct device_driver driver;
|
||||
int (*probe)(struct serdev_device *);
|
||||
void (*remove)(struct serdev_device *);
|
||||
+ void (*shutdown)(struct serdev_device *);
|
||||
};
|
||||
|
||||
static inline struct serdev_device_driver *to_serdev_device_driver(struct device_driver *d)
|
||||
--
|
||||
2.26.2
|
||||
|
||||
@@ -9,30 +9,3 @@
|
||||
phy_type = "utmi_wide";
|
||||
power-domains = <&power RK3568_PD_PIPE>;
|
||||
resets = <&cru SRST_USB3OTG0>;
|
||||
@@ -1031,6 +1031,25 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
+ i2s2_2ch: i2s@fe420000 {
|
||||
+ compatible = "rockchip,rk3568-i2s-tdm";
|
||||
+ reg = <0x0 0xfe420000 0x0 0x1000>;
|
||||
+ interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
|
||||
+ clocks = <&cru MCLK_I2S2_2CH>, <&cru MCLK_I2S2_2CH>, <&cru HCLK_I2S2_2CH>;
|
||||
+ clock-names = "mclk_tx", "mclk_rx", "hclk";
|
||||
+ dmas = <&dmac1 4>, <&dmac1 5>;
|
||||
+ dma-names = "tx", "rx";
|
||||
+ rockchip,cru = <&cru>;
|
||||
+ rockchip,grf = <&grf>;
|
||||
+ pinctrl-0 = <&i2s2m0_sclktx
|
||||
+ &i2s2m0_lrcktx
|
||||
+ &i2s2m0_sdi
|
||||
+ &i2s2m0_sdo>;
|
||||
+ pinctrl-names = "default";
|
||||
+ #sound-dai-cells = <0>;
|
||||
+ status = "disabled";
|
||||
+ };
|
||||
+
|
||||
i2s3_2ch: i2s@fe430000 {
|
||||
compatible = "rockchip,rk3568-i2s-tdm";
|
||||
reg = <0x0 0xfe430000 0x0 0x1000>;
|
||||
|
||||
|
||||
@@ -58,6 +58,38 @@
|
||||
};
|
||||
};
|
||||
|
||||
@@ -190,6 +234,31 @@
|
||||
reset-deassert-us = <30000>;
|
||||
reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
+ };
|
||||
+
|
||||
+ wireless-wlan {
|
||||
+ compatible = "wlan-platdata";
|
||||
+ rockchip,grf = <&grf>;
|
||||
+ wifi_chip_type = "ap6359sa";
|
||||
+ sdio_vref = <1800>;
|
||||
+ WIFI,host_wake_irq = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>;
|
||||
+ status = "okay";
|
||||
+ };
|
||||
+
|
||||
+ wireless-bluetooth {
|
||||
+ compatible = "bluetooth-platdata";
|
||||
+ clocks = <&rk808 1>;
|
||||
+ clock-names = "ext_clock";
|
||||
+ uart_rts_gpios = <&gpio2 RK_PC3 GPIO_ACTIVE_LOW>;
|
||||
+ pinctrl-names = "default", "rts_gpio";
|
||||
+ pinctrl-0 = <&uart0_rts>;
|
||||
+ pinctrl-1 = <&uart0_gpios>;
|
||||
+ // wifi-bt-power-toggle;
|
||||
+ // BT,power_gpio = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
|
||||
+ BT,reset_gpio = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>;
|
||||
+ BT,wake_gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
|
||||
+ BT,wake_host_irq = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
|
||||
+ status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
@@ -453,10 +522,19 @@
|
||||
};
|
||||
|
||||
@@ -73,8 +105,8 @@
|
||||
+ reg = <0x1a>;
|
||||
+ clocks = <&cru SCLK_I2S_8CH_OUT>;
|
||||
+ clock-names = "mclk";
|
||||
+ //pinctrl-names = "default";
|
||||
+ //pinctrl-0 = <&i2s_8ch_mclk>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&i2s_8ch_mclk>;
|
||||
+ };
|
||||
};
|
||||
|
||||
@@ -155,6 +187,26 @@
|
||||
pmic {
|
||||
cpu_b_sleep: cpu-b-sleep {
|
||||
rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
|
||||
@@ -581,6 +713,19 @@
|
||||
|
||||
sdmmc0_pwr_h: sdmmc0-pwr-h {
|
||||
rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ wireless-wlan {
|
||||
+ wifi_pwr: wifi-pwr {
|
||||
+ rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ wireless-bluetooth {
|
||||
+ uart0_gpios: uart0-gpios {
|
||||
+ rockchip,pins =
|
||||
+ <2 RK_PC3 1 &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -747,11 +892,3 @@
|
||||
&vopb_mmu {
|
||||
status = "okay";
|
||||
@@ -167,3 +219,4 @@
|
||||
-&vopl_mmu {
|
||||
- status = "okay";
|
||||
-};
|
||||
|
||||
|
||||
@@ -1,150 +0,0 @@
|
||||
From 0207f77ece3d07b964d5723c501adc3f3a5a3c6d Mon Sep 17 00:00:00 2001
|
||||
From: Dan Johansen <strit@manjaro.org>
|
||||
Date: Mon, 1 Jun 2020 17:14:50 +0200
|
||||
Subject: [PATCH] fix wonky wifi/bt on PBP
|
||||
|
||||
---
|
||||
drivers/bluetooth/hci_bcm.c | 17 +++++++++++++++++
|
||||
drivers/bluetooth/hci_serdev.c | 2 ++
|
||||
drivers/mmc/core/pwrseq_simple.c | 19 ++++++++++++++++---
|
||||
drivers/tty/serdev/core.c | 11 +++++++++++
|
||||
include/linux/serdev.h | 1 +
|
||||
5 files changed, 47 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/drivers/bluetooth/hci_bcm.c b/drivers/bluetooth/hci_bcm.c
|
||||
index b236cb11c0dc..bfd37fb9eeb0 100644
|
||||
--- a/drivers/bluetooth/hci_bcm.c
|
||||
+++ b/drivers/bluetooth/hci_bcm.c
|
||||
@@ -1472,6 +1472,22 @@ static void bcm_serdev_remove(struct serdev_device *serdev)
|
||||
hci_uart_unregister_device(&bcmdev->serdev_hu);
|
||||
}
|
||||
|
||||
+static void bcm_serdev_shutdown(struct serdev_device *serdev)
|
||||
+{
|
||||
+ struct bcm_device *bcmdev = serdev_device_get_drvdata(serdev);
|
||||
+
|
||||
+/*
|
||||
+ if (test_bit(HCI_UART_REGISTERED, &bcmdev->hu->flags)) {
|
||||
+ hci_uart_unregister_device(&bcmdev->serdev_hu);
|
||||
+ }
|
||||
+*/
|
||||
+ dev_info(bcmdev->dev, "Cutting power to bluetooth module\n");
|
||||
+ if (bcm_gpio_set_power(bcmdev, false)) {
|
||||
+ dev_err(bcmdev->dev, "Failed to power down\n");
|
||||
+ }
|
||||
+ usleep_range(500000, 1000000);
|
||||
+}
|
||||
+
|
||||
#ifdef CONFIG_OF
|
||||
static struct bcm_device_data bcm4354_device_data = {
|
||||
.no_early_set_baudrate = true,
|
||||
@@ -1497,6 +1513,7 @@ MODULE_DEVICE_TABLE(of, bcm_bluetooth_of_match);
|
||||
static struct serdev_device_driver bcm_serdev_driver = {
|
||||
.probe = bcm_serdev_probe,
|
||||
.remove = bcm_serdev_remove,
|
||||
+ .shutdown = bcm_serdev_shutdown,
|
||||
.driver = {
|
||||
.name = "hci_uart_bcm",
|
||||
.of_match_table = of_match_ptr(bcm_bluetooth_of_match),
|
||||
diff --git a/drivers/bluetooth/hci_serdev.c b/drivers/bluetooth/hci_serdev.c
|
||||
index 4652896d4990..043c585b34a7 100644
|
||||
--- a/drivers/bluetooth/hci_serdev.c
|
||||
+++ b/drivers/bluetooth/hci_serdev.c
|
||||
@@ -395,5 +395,7 @@ void hci_uart_unregister_device(struct hci_uart *hu)
|
||||
clear_bit(HCI_UART_PROTO_READY, &hu->flags);
|
||||
serdev_device_close(hu->serdev);
|
||||
}
|
||||
+
|
||||
+clear_bit(HCI_UART_REGISTERED, &hu->flags);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(hci_uart_unregister_device);
|
||||
diff --git a/drivers/mmc/core/pwrseq_simple.c b/drivers/mmc/core/pwrseq_simple.c
|
||||
index ea4d3670560e..b52c3f5b4f13 100644
|
||||
--- a/drivers/mmc/core/pwrseq_simple.c
|
||||
+++ b/drivers/mmc/core/pwrseq_simple.c
|
||||
@@ -80,10 +80,8 @@ static void mmc_pwrseq_simple_post_power_on(struct mmc_host *host)
|
||||
msleep(pwrseq->post_power_on_delay_ms);
|
||||
}
|
||||
|
||||
-static void mmc_pwrseq_simple_power_off(struct mmc_host *host)
|
||||
+static void __mmc_pwrseq_simple_power_off(struct mmc_pwrseq_simple *pwrseq)
|
||||
{
|
||||
- struct mmc_pwrseq_simple *pwrseq = to_pwrseq_simple(host->pwrseq);
|
||||
-
|
||||
mmc_pwrseq_simple_set_gpios_value(pwrseq, 1);
|
||||
|
||||
if (pwrseq->power_off_delay_us)
|
||||
@@ -96,6 +94,12 @@ static void mmc_pwrseq_simple_power_off(struct mmc_host *host)
|
||||
}
|
||||
}
|
||||
|
||||
+static void mmc_pwrseq_simple_power_off(struct mmc_host *host)
|
||||
+{
|
||||
+ struct mmc_pwrseq_simple *pwrseq = to_pwrseq_simple(host->pwrseq);
|
||||
+ __mmc_pwrseq_simple_power_off(pwrseq);
|
||||
+}
|
||||
+
|
||||
static const struct mmc_pwrseq_ops mmc_pwrseq_simple_ops = {
|
||||
.pre_power_on = mmc_pwrseq_simple_pre_power_on,
|
||||
.post_power_on = mmc_pwrseq_simple_post_power_on,
|
||||
@@ -151,9 +155,18 @@ static int mmc_pwrseq_simple_remove(struct platform_device *pdev)
|
||||
return 0;
|
||||
}
|
||||
|
||||
+static void mmc_pwrseq_simple_shutdown(struct platform_device *pdev)
|
||||
+{
|
||||
+ struct mmc_pwrseq_simple *pwrseq = platform_get_drvdata(pdev);
|
||||
+
|
||||
+ dev_info(&pdev->dev, "Turning off mmc\n");
|
||||
+ __mmc_pwrseq_simple_power_off(pwrseq);
|
||||
+}
|
||||
+
|
||||
static struct platform_driver mmc_pwrseq_simple_driver = {
|
||||
.probe = mmc_pwrseq_simple_probe,
|
||||
.remove = mmc_pwrseq_simple_remove,
|
||||
+ .shutdown = mmc_pwrseq_simple_shutdown,
|
||||
.driver = {
|
||||
.name = "pwrseq_simple",
|
||||
.of_match_table = mmc_pwrseq_simple_of_match,
|
||||
diff --git a/drivers/tty/serdev/core.c b/drivers/tty/serdev/core.c
|
||||
index c5f0d936b003..54bcb38f0c05 100644
|
||||
--- a/drivers/tty/serdev/core.c
|
||||
+++ b/drivers/tty/serdev/core.c
|
||||
@@ -432,11 +432,22 @@ static int serdev_drv_remove(struct device *dev)
|
||||
return 0;
|
||||
}
|
||||
|
||||
+static void serdev_drv_shutdown(struct device *dev)
|
||||
+{
|
||||
+ const struct serdev_device_driver *sdrv;
|
||||
+ if (dev->driver) {
|
||||
+ sdrv = to_serdev_device_driver(dev->driver);
|
||||
+ if (sdrv->shutdown)
|
||||
+ sdrv->shutdown(to_serdev_device(dev));
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
static struct bus_type serdev_bus_type = {
|
||||
.name = "serial",
|
||||
.match = serdev_device_match,
|
||||
.probe = serdev_drv_probe,
|
||||
.remove = serdev_drv_remove,
|
||||
+ .shutdown = serdev_drv_shutdown,
|
||||
};
|
||||
|
||||
/**
|
||||
diff --git a/include/linux/serdev.h b/include/linux/serdev.h
|
||||
index 9f14f9c12ec4..c3d5dccd6115 100644
|
||||
--- a/include/linux/serdev.h
|
||||
+++ b/include/linux/serdev.h
|
||||
@@ -63,6 +63,7 @@ struct serdev_device_driver {
|
||||
struct device_driver driver;
|
||||
int (*probe)(struct serdev_device *);
|
||||
void (*remove)(struct serdev_device *);
|
||||
+ void (*shutdown)(struct serdev_device *);
|
||||
};
|
||||
|
||||
static inline struct serdev_device_driver *to_serdev_device_driver(struct device_driver *d)
|
||||
--
|
||||
2.26.2
|
||||
|
||||
@@ -0,0 +1,12 @@
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
|
||||
@@ -1705,7 +1705,7 @@
|
||||
dma-names = "tx", "rx";
|
||||
clock-names = "i2s_clk", "i2s_hclk";
|
||||
clocks = <&cru SCLK_I2S0_8CH>, <&cru HCLK_I2S0_8CH>;
|
||||
- pinctrl-names = "bclk_on", "bclk_off";
|
||||
+ pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2s0_8ch_bus>;
|
||||
pinctrl-1 = <&i2s0_8ch_bus_bclk_off>;
|
||||
power-domains = <&power RK3399_PD_SDIOAUDIO>;
|
||||
|
||||
Reference in New Issue
Block a user