diff --git a/config/boards/odroidhc4.conf b/config/boards/odroidhc4.conf index d1ea0d9f8..1251f4ea4 100644 --- a/config/boards/odroidhc4.conf +++ b/config/boards/odroidhc4.conf @@ -1,10 +1,19 @@ # Amlogic S905X3 quad core 4GB RAM SoC GBE USB3 SPI 2 x SATA BOARD_NAME="Odroid HC4" BOARDFAMILY="meson-sm1" -BOOTCONFIG="odroid-c4_defconfig" +BOOTCONFIG="odroid-c4_defconfig" # But also 'odroid-hc4_defconfig', see below at UBOOT_TARGET_MAP KERNEL_TARGET="legacy,current,edge" FULL_DESKTOP="no" SERIALCON="ttyAML0" BOOT_FDT_FILE="amlogic/meson-sm1-odroid-hc4.dtb" -PACKAGE_LIST_BOARD="mtd-utils" # For SPI NOR, mtdinfo et al. Not required but nice to have -# @TODO: write_uboot_platform_mtd() used by nand-sata-install to write u-boot to SPI +PACKAGE_LIST_BOARD="mtd-utils lm-sensors fancontrol" # SPI, sensors, manual fan control via 'pwmconfig' + +# We build u-boot twice: C4 config for SD cards, and HC4 (with SATA) config for SPI. +# To be able to flash to SPI (via nand-sata-install), you need to use the C4 (SD) version. +UBOOT_TARGET_MAP="odroid-c4_defconfig u-boot-dtb.img;;u-boot.bin.sd.bin:u-boot.bin u-boot-dtb.img +odroid-hc4_defconfig u-boot-dtb.img;;u-boot.bin:u-boot-spi.bin" + +# The SPI version (u-boot-spi.bin, built from odroid-hc4_defconfig above) is then used by nand-sata-install +function write_uboot_platform_mtd() { + dd if=$1/u-boot-spi.bin of=/dev/mtdblock0 +} diff --git a/config/boards/odroidn2.conf b/config/boards/odroidn2.conf index 78b7bcf17..8e1fcf3d6 100644 --- a/config/boards/odroidn2.conf +++ b/config/boards/odroidn2.conf @@ -15,6 +15,14 @@ BOOTCONFIG="odroid-n2_defconfig" # For mainline uboot BOOTCONFIG_ODROID="odroidn2_config" # For odroid uboot BOOTSCRIPT_ODROID="boot-odroid-n2.ini:boot.ini" # For odroid uboot, default BOOTSCRIPT is boot-meson64.cmd for mainline (in meson64_common.inc) +# Enable writing u-boot to SPI on the N2(+) for current and edge +# To enable the SPI NOR the -spi .dtb is required, because eMMC shares a pin with SPI on the N2(+). To use it: +# fdtfile=amlogic/meson-g12b-odroid-n2-plus-spi.dtb # in armbianEnv.txt and reboot, then run nand-sata-install +UBOOT_TARGET_MAP="u-boot-dtb.img;;u-boot.bin.sd.bin:u-boot.bin u-boot-dtb.img u-boot.bin:u-boot-spi.bin" +write_uboot_platform_mtd() { + dd if=$1/u-boot-spi.bin of=/dev/mtdblock0 +} + # MAX might be different for N2/N2+, for now use N2+'s CPUMIN=1000000 CPUMAX=2400000 diff --git a/config/sources/families/include/meson64_common.inc b/config/sources/families/include/meson64_common.inc index 926c35aa2..1afcebbc1 100644 --- a/config/sources/families/include/meson64_common.inc +++ b/config/sources/families/include/meson64_common.inc @@ -1,11 +1,11 @@ -UBOOT_TARGET_MAP="u-boot-dtb.img;;u-boot.bin.sd.bin:u-boot.bin u-boot-dtb.img" +UBOOT_TARGET_MAP="${UBOOT_TARGET_MAP:-u-boot-dtb.img;;u-boot.bin.sd.bin:u-boot.bin u-boot-dtb.img}" BOOTSCRIPT="boot-meson64.cmd:boot.cmd" BOOTENV_FILE='meson.txt' LINUXFAMILY=meson64 ARCH=arm64 SERIALCON=ttyAML0 SRC_LOADADDR='LOADADDR=0x1080000' -BOOTBRANCH="tag:v2021.04" +BOOTBRANCH="tag:v2021.07" OVERLAY_PREFIX='meson' # this family does not need it diff --git a/config/sources/families/meson-g12b.conf b/config/sources/families/meson-g12b.conf index 78b27d7c5..36d2900f0 100644 --- a/config/sources/families/meson-g12b.conf +++ b/config/sources/families/meson-g12b.conf @@ -40,17 +40,4 @@ else exit 2 fi } - - if [[ ${BRANCH} == edge ]] && [[ $BOARD == odroidn2 ]]; then - # Experimental, use chewitt's u-boot. - display_alert "Using experimental u-boot" "edge+odroidn2" "info" - BOOTSOURCE="https://github.com/chewitt/u-boot.git" - BOOTDIR='u-boot-chewitt' - BOOTBRANCH='branch:amlogic-2021.07' - UBOOT_TARGET_MAP="u-boot-dtb.img;;u-boot.bin.sd.bin:u-boot.bin u-boot-dtb.img u-boot.bin:u-boot-spi.bin" - - write_uboot_platform_mtd() { - dd if=$1/u-boot-spi.bin of=/dev/mtdblock0 - } - fi fi diff --git a/config/sources/families/meson-sm1.conf b/config/sources/families/meson-sm1.conf index 41e1b0c22..58d08ce16 100644 --- a/config/sources/families/meson-sm1.conf +++ b/config/sources/families/meson-sm1.conf @@ -6,28 +6,7 @@ GOVERNOR=ondemand [[ ${BRANCH} == legacy ]] && SERIALCON=ttyS0 -if [[ ${BRANCH} == edge ]] && [[ $BOARD == odroidhc4 ]]; then - # Experimental, use chewitt's u-boot, which enables SPI+SATA booting. - display_alert "Using experimental u-boot with SPI+SATA" "edge+odroidhc4" "info" - BOOTSOURCE="https://github.com/chewitt/u-boot.git" - BOOTDIR='u-boot-chewitt' - BOOTBRANCH='branch:amlogic-2021.07' - UBOOT_TARGET_MAP="u-boot-dtb.img;;u-boot.bin.sd.bin:u-boot.bin u-boot-dtb.img u-boot.bin:u-boot-spi.bin" - BOOTCONFIG="odroid-hc4_defconfig" # hc4_defconfig vs c4_defconfig, enables PCIe+SATA stuff. - - write_uboot_platform_mtd() { - if [[ -f $1/u-boot-spi.bin ]]; then - dd if=$1/u-boot-spi.bin of=/dev/mtdblock0 - sync - else - echo "SPI u-boot image not found!" - exit 1 - fi - } -fi - -family_tweaks() -{ +family_tweaks() { : } diff --git a/patch/u-boot/u-boot-meson64/0001-HACK-configs-meson64-prevent-stdout-stderr-on-videoconsole.patch b/patch/u-boot/u-boot-meson64/0001-HACK-configs-meson64-prevent-stdout-stderr-on-videoconsole.patch new file mode 100644 index 000000000..c835e1d21 --- /dev/null +++ b/patch/u-boot/u-boot-meson64/0001-HACK-configs-meson64-prevent-stdout-stderr-on-videoconsole.patch @@ -0,0 +1,28 @@ +From f787d690c64550e9b4e1cebb19298e4fd89176d5 Mon Sep 17 00:00:00 2001 +From: Christian Hewitt +Date: Fri, 13 Nov 2020 02:09:36 +0000 +Subject: [CHEWITT] HACK: configs: meson64: prevent stdout/stderr on + videoconsole + +Several devices have CONFIG_DM_VIDEO enabled which causes stdout/stderr +to appear on videoconsole, so remove videoconsole from STDOUT so that +early u-boot boot remains silent unless using the uart/serial console. + +Signed-off-by: Christian Hewitt + +diff --git a/include/configs/meson64.h b/include/configs/meson64.h +index 17ebccd2c4..6224722941 100644 +--- a/include/configs/meson64.h ++++ b/include/configs/meson64.h +@@ -18,7 +18,7 @@ + + /* For splashscreen */ + #ifdef CONFIG_DM_VIDEO +-#define STDOUT_CFG "vidconsole,serial" ++#define STDOUT_CFG "serial" + #else + #define STDOUT_CFG "serial" + #endif +-- +2.33.0 + diff --git a/patch/u-boot/u-boot-meson64/0002-FROMGIT-board-amlogic-odroid-n2-fix-fdtfile-suffix-for-n2-plus.patch b/patch/u-boot/u-boot-meson64/0002-FROMGIT-board-amlogic-odroid-n2-fix-fdtfile-suffix-for-n2-plus.patch new file mode 100644 index 000000000..eb08b2e36 --- /dev/null +++ b/patch/u-boot/u-boot-meson64/0002-FROMGIT-board-amlogic-odroid-n2-fix-fdtfile-suffix-for-n2-plus.patch @@ -0,0 +1,42 @@ +From 1fe3bd4d961fc5c8df9638db4fdb010de5ec4989 Mon Sep 17 00:00:00 2001 +From: Christian Hewitt +Date: Tue, 3 Aug 2021 18:36:32 +0000 +Subject: [CHEWITT] FROMGIT: board: amlogic: odroid-n2: fix fdtfile suffix for + n2-plus + +The N2+ dtb is meson-g12b-odroid-n2-plus.dtb, not n2_plus, so +correct the suffix provided in the board file. Also align the +board info string shown during boot to match. + +Fixes: 8bc780106c13 ("board: amlogic: odroid: add runtime detection of the N2/N2+/C4/HC4 variants") +Signed-off-by: Christian Hewitt + +diff --git a/board/amlogic/odroid-n2/odroid-n2.c b/board/amlogic/odroid-n2/odroid-n2.c +index 88a60f34fe..acfd107fc5 100644 +--- a/board/amlogic/odroid-n2/odroid-n2.c ++++ b/board/amlogic/odroid-n2/odroid-n2.c +@@ -48,7 +48,7 @@ static struct meson_odroid_boards { + /* OdroidN2 rev 2019,2,7 */ + { MESON_SOC_ID_G12B, 330 * 4, 350 * 4, "n2" }, + /* OdroidN2plus rev 2019,11,20 */ +- { MESON_SOC_ID_G12B, 410 * 4, 430 * 4, "n2_plus" }, ++ { MESON_SOC_ID_G12B, 410 * 4, 430 * 4, "n2-plus" }, + /* OdroidC4 rev 2020,01,29 */ + { MESON_SOC_ID_SM1, 80 * 4, 100 * 4, "c4" }, + /* OdroidHC4 rev 2019,12,10 */ +diff --git a/configs/odroid-n2_defconfig b/configs/odroid-n2_defconfig +index 065ecbcfb0..d3f841179e 100644 +--- a/configs/odroid-n2_defconfig ++++ b/configs/odroid-n2_defconfig +@@ -9,7 +9,7 @@ CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-odroid-n2" + CONFIG_MESON_G12A=y + CONFIG_DEBUG_UART_BASE=0xff803000 + CONFIG_DEBUG_UART_CLOCK=24000000 +-CONFIG_IDENT_STRING=" odroid-n2/n2_plus" ++CONFIG_IDENT_STRING=" odroid-n2/n2-plus" + CONFIG_DEBUG_UART=y + CONFIG_OF_BOARD_SETUP=y + # CONFIG_DISPLAY_CPUINFO is not set +-- +2.33.0 + diff --git a/patch/u-boot/u-boot-meson64/0003-FROMLIST-v1-pci-pcie_dw_meson-fix-usb-fail-when-pci-link-fails-to-go-up.patch b/patch/u-boot/u-boot-meson64/0003-FROMLIST-v1-pci-pcie_dw_meson-fix-usb-fail-when-pci-link-fails-to-go-up.patch new file mode 100644 index 000000000..882aa212e --- /dev/null +++ b/patch/u-boot/u-boot-meson64/0003-FROMLIST-v1-pci-pcie_dw_meson-fix-usb-fail-when-pci-link-fails-to-go-up.patch @@ -0,0 +1,40 @@ +From 9f03e521729f314d04bd500e16b6367b04d70a50 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Wed, 8 Sep 2021 14:32:12 +0200 +Subject: [CHEWITT] FROMLIST(v1): pci: pcie_dw_meson: fix usb fail when pci + link fails to go up + +On Amlogic A311D, when the PCIe link fails disabling the related clocks +makes USB fail. For an unknown reason, this doesn happen on the S905D3 SoC. + +Mimic the Linux behavior by not considering a link failure a probe failure, +and continue even if the PCIe link is down. + +Reported-by: Art Nikpal +Signed-off-by: Neil Armstrong +Reviewed-by: Bin Meng + +diff --git a/drivers/pci/pcie_dw_meson.c b/drivers/pci/pcie_dw_meson.c +index 0525ecbea6..07da9fa533 100644 +--- a/drivers/pci/pcie_dw_meson.c ++++ b/drivers/pci/pcie_dw_meson.c +@@ -319,15 +319,9 @@ static int meson_pcie_init_port(struct udevice *dev) + + pcie_dw_setup_host(&priv->dw); + +- ret = meson_pcie_link_up(priv, LINK_SPEED_GEN_2); +- if (ret < 0) +- goto err_link_up; ++ meson_pcie_link_up(priv, LINK_SPEED_GEN_2); + + return 0; +-err_link_up: +- clk_disable(&priv->clk_port); +- clk_disable(&priv->clk_general); +- clk_disable(&priv->clk_pclk); + err_deassert_bulk: + reset_assert_bulk(&priv->rsts); + err_power_off_phy: +-- +2.33.0 + diff --git a/patch/u-boot/u-boot-meson64/0004-SQUASHED-Sync-Amlogic-DT-from-Linux-5.14.patch b/patch/u-boot/u-boot-meson64/0004-SQUASHED-Sync-Amlogic-DT-from-Linux-5.14.patch new file mode 100644 index 000000000..202bb9234 --- /dev/null +++ b/patch/u-boot/u-boot-meson64/0004-SQUASHED-Sync-Amlogic-DT-from-Linux-5.14.patch @@ -0,0 +1,3543 @@ +From 629494ec097d90b9a1f2f310cfb48aa86d3746b3 Mon Sep 17 00:00:00 2001 +From: Neil Armstrong +Date: Wed, 8 Sep 2021 16:17:20 +0200 +Subject: [CHEWITT] SQUASHED: Sync Amlogic DT from Linux 5.14 + +- FROMLIST(v1): ARM: meson-axg: remove local USB nodes +- FROMLIST(v1): meson: keep HW order for MMC devices +- FROMLIST(v1): meson: Sync Amlogic DT from Linux 5.14 + +diff --git a/arch/arm/dts/meson-axg-s400-u-boot.dtsi b/arch/arm/dts/meson-axg-s400-u-boot.dtsi +index 2c4b06f140..334650d610 100644 +--- a/arch/arm/dts/meson-axg-s400-u-boot.dtsi ++++ b/arch/arm/dts/meson-axg-s400-u-boot.dtsi +@@ -3,8 +3,6 @@ + * Copyright (c) 2017 Amlogic, Inc. All rights reserved. + */ + +-#include "meson-axg-u-boot.dtsi" +- + /* wifi module */ + &sd_emmc_b { + status = "disabled"; +@@ -15,12 +13,6 @@ + status = "okay"; + }; + +-&usb { +- status = "okay"; +- dr_mode = "otg"; +- vbus-supply = <&usb_pwr>; +-}; +- + &usb2_phy1 { + phy-supply = <&vcc_5v>; + }; +diff --git a/arch/arm/dts/meson-axg-s400.dts b/arch/arm/dts/meson-axg-s400.dts +index cb1360ae12..359589d1df 100644 +--- a/arch/arm/dts/meson-axg-s400.dts ++++ b/arch/arm/dts/meson-axg-s400.dts +@@ -441,6 +441,16 @@ + status = "okay"; + }; + ++&pcieA { ++ reset-gpios = <&gpio GPIOX_19 GPIO_ACTIVE_LOW>; ++ status = "okay"; ++}; ++ ++&pcieB { ++ reset-gpios = <&gpio GPIOZ_10 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; ++ status = "okay"; ++}; ++ + &pwm_ab { + status = "okay"; + pinctrl-0 = <&pwm_a_x20_pins>; +@@ -584,3 +594,9 @@ + pinctrl-0 = <&uart_ao_a_pins>; + pinctrl-names = "default"; + }; ++ ++&usb { ++ status = "okay"; ++ dr_mode = "otg"; ++ vbus-supply = <&usb_pwr>; ++}; +diff --git a/arch/arm/dts/meson-axg-u-boot.dtsi b/arch/arm/dts/meson-axg-u-boot.dtsi +deleted file mode 100644 +index cb1c71e78c..0000000000 +--- a/arch/arm/dts/meson-axg-u-boot.dtsi ++++ /dev/null +@@ -1,62 +0,0 @@ +-// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +-/* +- * Copyright (c) 2020 BayLibre, SAS. +- * Author: Neil Armstrong +- */ +- +-/ { +- soc { +- usb: usb@ffe09080 { +- compatible = "amlogic,meson-gxl-usb-ctrl"; +- reg = <0x0 0xffe09080 0x0 0x20>; +- interrupts = ; +- #address-cells = <2>; +- #size-cells = <2>; +- ranges; +- +- clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1_DDR_BRIDGE>; +- clock-names = "usb_ctrl", "ddr"; +- resets = <&reset RESET_USB_OTG>; +- +- dr_mode = "otg"; +- +- phys = <&usb2_phy1>; +- phy-names = "usb2-phy1"; +- +- dwc2: usb@ff400000 { +- compatible = "amlogic,meson-g12a-usb", "snps,dwc2"; +- reg = <0x0 0xff400000 0x0 0x40000>; +- interrupts = ; +- clocks = <&clkc CLKID_USB1>; +- clock-names = "otg"; +- phys = <&usb2_phy1>; +- dr_mode = "peripheral"; +- g-rx-fifo-size = <192>; +- g-np-tx-fifo-size = <128>; +- g-tx-fifo-size = <128 128 16 16 16>; +- }; +- +- dwc3: usb@ff500000 { +- compatible = "snps,dwc3"; +- reg = <0x0 0xff500000 0x0 0x100000>; +- interrupts = ; +- dr_mode = "host"; +- maximum-speed = "high-speed"; +- snps,dis_u2_susphy_quirk; +- }; +- }; +- }; +-}; +- +-&apb { +- usb2_phy1: phy@9020 { +- compatible = "amlogic,meson-gxl-usb2-phy"; +- #phy-cells = <0>; +- reg = <0x0 0x9020 0x0 0x20>; +- clocks = <&clkc CLKID_USB>; +- clock-names = "phy"; +- resets = <&reset RESET_USB_OTG>; +- reset-names = "phy"; +- status = "okay"; +- }; +-}; +diff --git a/arch/arm/dts/meson-axg.dtsi b/arch/arm/dts/meson-axg.dtsi +index b9efc84692..3f5254eeb4 100644 +--- a/arch/arm/dts/meson-axg.dtsi ++++ b/arch/arm/dts/meson-axg.dtsi +@@ -12,6 +12,7 @@ + #include + #include + #include ++#include + + / { + compatible = "amlogic,meson-axg"; +@@ -171,6 +172,98 @@ + #size-cells = <2>; + ranges; + ++ pcieA: pcie@f9800000 { ++ compatible = "amlogic,axg-pcie", "snps,dw-pcie"; ++ reg = <0x0 0xf9800000 0x0 0x400000>, ++ <0x0 0xff646000 0x0 0x2000>, ++ <0x0 0xf9f00000 0x0 0x100000>; ++ reg-names = "elbi", "cfg", "config"; ++ interrupts = ; ++ #interrupt-cells = <1>; ++ interrupt-map-mask = <0 0 0 0>; ++ interrupt-map = <0 0 0 0 &gic GIC_SPI 179 IRQ_TYPE_EDGE_RISING>; ++ bus-range = <0x0 0xff>; ++ #address-cells = <3>; ++ #size-cells = <2>; ++ device_type = "pci"; ++ ranges = <0x82000000 0 0xf9c00000 0x0 0xf9c00000 0 0x00300000>; ++ ++ clocks = <&clkc CLKID_USB>, <&clkc CLKID_PCIE_A>, <&clkc CLKID_PCIE_CML_EN0>; ++ clock-names = "general", "pclk", "port"; ++ resets = <&reset RESET_PCIE_A>, <&reset RESET_PCIE_APB>; ++ reset-names = "port", "apb"; ++ num-lanes = <1>; ++ phys = <&pcie_phy>; ++ phy-names = "pcie"; ++ status = "disabled"; ++ }; ++ ++ pcieB: pcie@fa000000 { ++ compatible = "amlogic,axg-pcie", "snps,dw-pcie"; ++ reg = <0x0 0xfa000000 0x0 0x400000>, ++ <0x0 0xff648000 0x0 0x2000>, ++ <0x0 0xfa400000 0x0 0x100000>; ++ reg-names = "elbi", "cfg", "config"; ++ interrupts = ; ++ #interrupt-cells = <1>; ++ interrupt-map-mask = <0 0 0 0>; ++ interrupt-map = <0 0 0 0 &gic GIC_SPI 169 IRQ_TYPE_EDGE_RISING>; ++ bus-range = <0x0 0xff>; ++ #address-cells = <3>; ++ #size-cells = <2>; ++ device_type = "pci"; ++ ranges = <0x82000000 0 0xfa500000 0x0 0xfa500000 0 0x00300000>; ++ ++ clocks = <&clkc CLKID_USB>, <&clkc CLKID_PCIE_B>, <&clkc CLKID_PCIE_CML_EN1>; ++ clock-names = "general", "pclk", "port"; ++ resets = <&reset RESET_PCIE_B>, <&reset RESET_PCIE_APB>; ++ reset-names = "port", "apb"; ++ num-lanes = <1>; ++ phys = <&pcie_phy>; ++ phy-names = "pcie"; ++ status = "disabled"; ++ }; ++ ++ usb: usb@ffe09080 { ++ compatible = "amlogic,meson-axg-usb-ctrl"; ++ reg = <0x0 0xffe09080 0x0 0x20>; ++ interrupts = ; ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ranges; ++ ++ clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1_DDR_BRIDGE>; ++ clock-names = "usb_ctrl", "ddr"; ++ resets = <&reset RESET_USB_OTG>; ++ ++ dr_mode = "otg"; ++ ++ phys = <&usb2_phy1>; ++ phy-names = "usb2-phy1"; ++ ++ dwc2: usb@ff400000 { ++ compatible = "amlogic,meson-g12a-usb", "snps,dwc2"; ++ reg = <0x0 0xff400000 0x0 0x40000>; ++ interrupts = ; ++ clocks = <&clkc CLKID_USB1>; ++ clock-names = "otg"; ++ phys = <&usb2_phy1>; ++ dr_mode = "peripheral"; ++ g-rx-fifo-size = <192>; ++ g-np-tx-fifo-size = <128>; ++ g-tx-fifo-size = <128 128 16 16 16>; ++ }; ++ ++ dwc3: usb@ff500000 { ++ compatible = "snps,dwc3"; ++ reg = <0x0 0xff500000 0x0 0x100000>; ++ interrupts = ; ++ dr_mode = "host"; ++ maximum-speed = "high-speed"; ++ snps,dis_u2_susphy_quirk; ++ }; ++ }; ++ + ethmac: ethernet@ff3f0000 { + compatible = "amlogic,meson-axg-dwmac", + "snps,dwmac-3.70a", +@@ -187,9 +280,19 @@ + "timing-adjustment"; + rx-fifo-depth = <4096>; + tx-fifo-depth = <2048>; ++ power-domains = <&pwrc PWRC_AXG_ETHERNET_MEM_ID>; + status = "disabled"; + }; + ++ pcie_phy: phy@ff644000 { ++ compatible = "amlogic,axg-pcie-phy"; ++ reg = <0x0 0xff644000 0x0 0x1c>; ++ resets = <&reset RESET_PCIE_PHY>; ++ phys = <&mipi_pcie_analog_dphy>; ++ phy-names = "analog"; ++ #phy-cells = <0>; ++ }; ++ + pdm: audio-controller@ff632000 { + compatible = "amlogic,axg-pdm"; + reg = <0x0 0xff632000 0x0 0x34>; +@@ -1117,6 +1220,52 @@ + clocks = <&xtal>; + clock-names = "xtal"; + }; ++ ++ pwrc: power-controller { ++ compatible = "amlogic,meson-axg-pwrc"; ++ #power-domain-cells = <1>; ++ amlogic,ao-sysctrl = <&sysctrl_AO>; ++ resets = <&reset RESET_VIU>, ++ <&reset RESET_VENC>, ++ <&reset RESET_VCBUS>, ++ <&reset RESET_VENCL>, ++ <&reset RESET_VID_LOCK>; ++ reset-names = "viu", "venc", "vcbus", ++ "vencl", "vid_lock"; ++ clocks = <&clkc CLKID_VPU>, ++ <&clkc CLKID_VAPB>; ++ clock-names = "vpu", "vapb"; ++ /* ++ * VPU clocking is provided by two identical clock paths ++ * VPU_0 and VPU_1 muxed to a single clock by a glitch ++ * free mux to safely change frequency while running. ++ * Same for VAPB but with a final gate after the glitch free mux. ++ */ ++ assigned-clocks = <&clkc CLKID_VPU_0_SEL>, ++ <&clkc CLKID_VPU_0>, ++ <&clkc CLKID_VPU>, /* Glitch free mux */ ++ <&clkc CLKID_VAPB_0_SEL>, ++ <&clkc CLKID_VAPB_0>, ++ <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */ ++ assigned-clock-parents = <&clkc CLKID_FCLK_DIV4>, ++ <0>, /* Do Nothing */ ++ <&clkc CLKID_VPU_0>, ++ <&clkc CLKID_FCLK_DIV4>, ++ <0>, /* Do Nothing */ ++ <&clkc CLKID_VAPB_0>; ++ assigned-clock-rates = <0>, /* Do Nothing */ ++ <250000000>, ++ <0>, /* Do Nothing */ ++ <0>, /* Do Nothing */ ++ <250000000>, ++ <0>; /* Do Nothing */ ++ }; ++ ++ mipi_pcie_analog_dphy: phy { ++ compatible = "amlogic,axg-mipi-pcie-analog-phy"; ++ #phy-cells = <0>; ++ status = "disabled"; ++ }; + }; + }; + +@@ -1129,6 +1278,19 @@ + #mbox-cells = <1>; + }; + ++ mipi_dphy: phy@ff640000 { ++ compatible = "amlogic,axg-mipi-dphy"; ++ reg = <0x0 0xff640000 0x0 0x100>; ++ clocks = <&clkc CLKID_MIPI_DSI_PHY>; ++ clock-names = "pclk"; ++ resets = <&reset RESET_MIPI_PHY>; ++ reset-names = "phy"; ++ phys = <&mipi_pcie_analog_dphy>; ++ phy-names = "analog"; ++ #phy-cells = <0>; ++ status = "disabled"; ++ }; ++ + audio: bus@ff642000 { + compatible = "simple-bus"; + reg = <0x0 0xff642000 0x0 0x2000>; +@@ -1563,6 +1725,14 @@ + }; + }; + ++ ge2d: ge2d@ff940000 { ++ compatible = "amlogic,axg-ge2d"; ++ reg = <0x0 0xff940000 0x0 0x10000>; ++ interrupts = ; ++ clocks = <&clkc CLKID_VAPB>; ++ resets = <&reset RESET_GE2D>; ++ }; ++ + gic: interrupt-controller@ffc01000 { + compatible = "arm,gic-400"; + reg = <0x0 0xffc01000 0 0x1000>, +@@ -1701,6 +1871,7 @@ + status = "disabled"; + clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>; + clock-names = "xtal", "pclk", "baud"; ++ fifo-size = <128>; + }; + }; + +@@ -1734,6 +1905,16 @@ + clock-names = "core", "clkin0", "clkin1"; + resets = <&reset RESET_SD_EMMC_C>; + }; ++ ++ usb2_phy1: phy@9020 { ++ compatible = "amlogic,meson-gxl-usb2-phy"; ++ #phy-cells = <0>; ++ reg = <0x0 0x9020 0x0 0x20>; ++ clocks = <&clkc CLKID_USB>; ++ clock-names = "phy"; ++ resets = <&reset RESET_USB_OTG>; ++ reset-names = "phy"; ++ }; + }; + + sram: sram@fffc0000 { +diff --git a/arch/arm/dts/meson-g12-common-u-boot.dtsi b/arch/arm/dts/meson-g12-common-u-boot.dtsi +index 38fd3d3feb..b1f60b15c9 100644 +--- a/arch/arm/dts/meson-g12-common-u-boot.dtsi ++++ b/arch/arm/dts/meson-g12-common-u-boot.dtsi +@@ -5,6 +5,13 @@ + */ + + / { ++ /* Keep HW order from U-boot */ ++ aliases { ++ /delete-property/ mmc0; ++ /delete-property/ mmc1; ++ /delete-property/ mmc2; ++ }; ++ + soc { + u-boot,dm-pre-reloc; + }; +diff --git a/arch/arm/dts/meson-g12-common.dtsi b/arch/arm/dts/meson-g12-common.dtsi +index 1e83ec5b8c..00c6f53290 100644 +--- a/arch/arm/dts/meson-g12-common.dtsi ++++ b/arch/arm/dts/meson-g12-common.dtsi +@@ -17,6 +17,12 @@ + #address-cells = <2>; + #size-cells = <2>; + ++ aliases { ++ mmc0 = &sd_emmc_b; /* SD card */ ++ mmc1 = &sd_emmc_c; /* eMMC */ ++ mmc2 = &sd_emmc_a; /* SDIO */ ++ }; ++ + chosen { + #address-cells = <2>; + #size-cells = <2>; +@@ -122,9 +128,9 @@ + + pcie: pcie@fc000000 { + compatible = "amlogic,g12a-pcie", "snps,dw-pcie"; +- reg = <0x0 0xfc000000 0x0 0x400000 +- 0x0 0xff648000 0x0 0x2000 +- 0x0 0xfc400000 0x0 0x200000>; ++ reg = <0x0 0xfc000000 0x0 0x400000>, ++ <0x0 0xff648000 0x0 0x2000>, ++ <0x0 0xfc400000 0x0 0x200000>; + reg-names = "elbi", "cfg", "config"; + interrupts = ; + #interrupt-cells = <1>; +@@ -134,8 +140,8 @@ + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; +- ranges = <0x81000000 0 0 0x0 0xfc600000 0 0x00100000 +- 0x82000000 0 0xfc700000 0x0 0xfc700000 0 0x1900000>; ++ ranges = <0x81000000 0 0 0x0 0xfc600000 0 0x00100000>, ++ <0x82000000 0 0xfc700000 0x0 0xfc700000 0 0x1900000>; + + clocks = <&clkc CLKID_PCIE_PHY + &clkc CLKID_PCIE_COMB +@@ -209,7 +215,7 @@ + }; + + ethmac: ethernet@ff3f0000 { +- compatible = "amlogic,meson-axg-dwmac", ++ compatible = "amlogic,meson-g12a-dwmac", + "snps,dwmac-3.70a", + "snps,dwmac"; + reg = <0x0 0xff3f0000 0x0 0x10000>, +@@ -282,6 +288,8 @@ + hwrng: rng@218 { + compatible = "amlogic,meson-rng"; + reg = <0x0 0x218 0x0 0x4>; ++ clocks = <&clkc CLKID_RNG0>; ++ clock-names = "core"; + }; + }; + +@@ -2001,7 +2009,7 @@ + }; + }; + +- vrtc: rtc@0a8 { ++ vrtc: rtc@a8 { + compatible = "amlogic,meson-vrtc"; + reg = <0x0 0x000a8 0x0 0x4>; + }; +@@ -2179,6 +2187,12 @@ + amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>; + }; + ++ watchdog: watchdog@f0d0 { ++ compatible = "amlogic,meson-gxbb-wdt"; ++ reg = <0x0 0xf0d0 0x0 0x10>; ++ clocks = <&xtal>; ++ }; ++ + spicc0: spi@13000 { + compatible = "amlogic,meson-g12a-spicc"; + reg = <0x0 0x13000 0x0 0x44>; +@@ -2303,6 +2317,7 @@ + clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>; + clock-names = "xtal", "pclk", "baud"; + status = "disabled"; ++ fifo-size = <128>; + }; + }; + +@@ -2380,7 +2395,7 @@ + interrupts = ; + dr_mode = "host"; + snps,dis_u2_susphy_quirk; +- snps,quirk-frame-length-adjustment; ++ snps,quirk-frame-length-adjustment = <0x20>; + snps,parkmode-disable-ss-quirk; + }; + }; +diff --git a/arch/arm/dts/meson-g12a-sei510.dts b/arch/arm/dts/meson-g12a-sei510.dts +index b00d0468c7..81269ccc24 100644 +--- a/arch/arm/dts/meson-g12a-sei510.dts ++++ b/arch/arm/dts/meson-g12a-sei510.dts +@@ -181,7 +181,7 @@ + + sound { + compatible = "amlogic,axg-sound-card"; +- model = "G12A-SEI510"; ++ model = "SEI510"; + audio-aux-devs = <&tdmout_a>, <&tdmout_b>, + <&tdmin_a>, <&tdmin_b>; + audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0", +diff --git a/arch/arm/dts/meson-g12b-gsking-x.dts b/arch/arm/dts/meson-g12b-gsking-x.dts +new file mode 100644 +index 0000000000..6c7bfacbad +--- /dev/null ++++ b/arch/arm/dts/meson-g12b-gsking-x.dts +@@ -0,0 +1,133 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2019 BayLibre, SAS ++ * Author: Neil Armstrong ++ * Copyright (c) 2019 Christian Hewitt ++ */ ++ ++/dts-v1/; ++ ++#include "meson-g12b-w400.dtsi" ++#include ++#include ++ ++/ { ++ compatible = "azw,gsking-x", "amlogic,s922x", "amlogic,g12b"; ++ model = "Beelink GS-King X"; ++ ++ aliases { ++ rtc0 = &rtc; ++ rtc1 = &vrtc; ++ }; ++ ++ gpio-keys-polled { ++ compatible = "gpio-keys-polled"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ poll-interval = <100>; ++ ++ power-button { ++ label = "power"; ++ linux,code = ; ++ gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>; ++ }; ++ }; ++ ++ sound { ++ compatible = "amlogic,axg-sound-card"; ++ model = "GSKING-X"; ++ audio-aux-devs = <&tdmout_a>; ++ audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 1", ++ "TDMOUT_A IN 1", "FRDDR_B OUT 1", ++ "TDMOUT_A IN 2", "FRDDR_C OUT 1", ++ "TDM_A Playback", "TDMOUT_A OUT"; ++ ++ assigned-clocks = <&clkc CLKID_MPLL2>, ++ <&clkc CLKID_MPLL0>, ++ <&clkc CLKID_MPLL1>; ++ assigned-clock-parents = <0>, <0>, <0>; ++ assigned-clock-rates = <294912000>, ++ <270950400>, ++ <393216000>; ++ status = "okay"; ++ ++ dai-link-0 { ++ sound-dai = <&frddr_a>; ++ }; ++ ++ dai-link-1 { ++ sound-dai = <&frddr_b>; ++ }; ++ ++ dai-link-2 { ++ sound-dai = <&frddr_c>; ++ }; ++ ++ /* 8ch hdmi interface */ ++ dai-link-3 { ++ sound-dai = <&tdmif_a>; ++ dai-format = "i2s"; ++ dai-tdm-slot-tx-mask-0 = <1 1>; ++ dai-tdm-slot-tx-mask-1 = <1 1>; ++ dai-tdm-slot-tx-mask-2 = <1 1>; ++ dai-tdm-slot-tx-mask-3 = <1 1>; ++ mclk-fs = <256>; ++ ++ codec { ++ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>; ++ }; ++ }; ++ ++ dai-link-4 { ++ sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>; ++ ++ codec { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; ++}; ++ ++&arb { ++ status = "okay"; ++}; ++ ++&clkc_audio { ++ status = "okay"; ++}; ++ ++&frddr_a { ++ status = "okay"; ++}; ++ ++&frddr_b { ++ status = "okay"; ++}; ++ ++&frddr_c { ++ status = "okay"; ++}; ++ ++&i2c3 { ++ status = "okay"; ++ pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>; ++ pinctrl-names = "default"; ++ ++ rtc: rtc@51 { ++ compatible = "nxp,pcf8563"; ++ reg = <0x51>; ++ wakeup-source; ++ }; ++}; ++ ++&tdmif_a { ++ status = "okay"; ++}; ++ ++&tdmout_a { ++ status = "okay"; ++}; ++ ++&tohdmitx { ++ status = "okay"; ++}; +diff --git a/arch/arm/dts/meson-g12b-gtking-pro.dts b/arch/arm/dts/meson-g12b-gtking-pro.dts +index f0c56a16af..707daf9278 100644 +--- a/arch/arm/dts/meson-g12b-gtking-pro.dts ++++ b/arch/arm/dts/meson-g12b-gtking-pro.dts +@@ -11,9 +11,14 @@ + #include + + / { +- compatible = "azw,gtking", "amlogic,g12b"; ++ compatible = "azw,gtking", "amlogic,s922x", "amlogic,g12b"; + model = "Beelink GT-King Pro"; + ++ aliases { ++ rtc0 = &rtc; ++ rtc1 = &vrtc; ++ }; ++ + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; +@@ -30,7 +35,7 @@ + leds { + compatible = "gpio-leds"; + +- white { ++ led-white { + label = "power:white"; + gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH>; + default-state = "on"; +@@ -39,7 +44,7 @@ + + sound { + compatible = "amlogic,axg-sound-card"; +- model = "G12B-GTKING-PRO"; ++ model = "GTKING-PRO"; + audio-aux-devs = <&tdmout_b>; + audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1", + "TDMOUT_B IN 1", "FRDDR_B OUT 1", +@@ -112,6 +117,18 @@ + status = "okay"; + }; + ++&i2c3 { ++ status = "okay"; ++ pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>; ++ pinctrl-names = "default"; ++ ++ rtc: rtc@51 { ++ compatible = "nxp,pcf8563"; ++ reg = <0x51>; ++ wakeup-source; ++ }; ++}; ++ + &tdmif_b { + status = "okay"; + }; +diff --git a/arch/arm/dts/meson-g12b-gtking.dts b/arch/arm/dts/meson-g12b-gtking.dts +index eeb7bc5539..5d96c14490 100644 +--- a/arch/arm/dts/meson-g12b-gtking.dts ++++ b/arch/arm/dts/meson-g12b-gtking.dts +@@ -11,9 +11,14 @@ + #include + + / { +- compatible = "azw,gtking", "amlogic,g12b"; ++ compatible = "azw,gtking", "amlogic,s922x", "amlogic,g12b"; + model = "Beelink GT-King"; + ++ aliases { ++ rtc0 = &rtc; ++ rtc1 = &vrtc; ++ }; ++ + spdif_dit: audio-codec-1 { + #sound-dai-cells = <0>; + compatible = "linux,spdif-dit"; +@@ -23,7 +28,7 @@ + + sound { + compatible = "amlogic,axg-sound-card"; +- model = "G12B-GTKING"; ++ model = "GTKING"; + audio-aux-devs = <&tdmout_b>; + audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1", + "TDMOUT_B IN 1", "FRDDR_B OUT 1", +@@ -122,6 +127,19 @@ + status = "okay"; + }; + ++ ++&i2c3 { ++ status = "okay"; ++ pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>; ++ pinctrl-names = "default"; ++ ++ rtc: rtc@51 { ++ compatible = "nxp,pcf8563"; ++ reg = <0x51>; ++ wakeup-source; ++ }; ++}; ++ + &spdifout { + pinctrl-0 = <&spdif_out_h_pins>; + pinctrl-names = "default"; +diff --git a/arch/arm/dts/meson-g12b-odroid-n2-plus.dts b/arch/arm/dts/meson-g12b-odroid-n2-plus.dts +index 5de2815ba9..ce1198ad34 100644 +--- a/arch/arm/dts/meson-g12b-odroid-n2-plus.dts ++++ b/arch/arm/dts/meson-g12b-odroid-n2-plus.dts +@@ -19,7 +19,7 @@ + regulator-min-microvolt = <680000>; + regulator-max-microvolt = <1040000>; + +- pwms = <&pwm_AO_cd 1 1500 0>; ++ pwms = <&pwm_ab 0 1500 0>; + }; + + &vddcpu_b { +diff --git a/arch/arm/dts/meson-g12b-odroid-n2.dtsi b/arch/arm/dts/meson-g12b-odroid-n2.dtsi +index 6982632ae6..344573e157 100644 +--- a/arch/arm/dts/meson-g12b-odroid-n2.dtsi ++++ b/arch/arm/dts/meson-g12b-odroid-n2.dtsi +@@ -13,6 +13,8 @@ + aliases { + serial0 = &uart_AO; + ethernet0 = ðmac; ++ rtc0 = &rtc; ++ rtc1 = &vrtc; + }; + + dioo2133: audio-amplifier-0 { +@@ -40,7 +42,7 @@ + leds { + compatible = "gpio-leds"; + +- blue { ++ led-blue { + label = "n2:blue"; + gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; +@@ -211,7 +213,7 @@ + + sound { + compatible = "amlogic,axg-sound-card"; +- model = "G12B-ODROID-N2"; ++ model = "ODROID-N2"; + audio-widgets = "Line", "Lineout"; + audio-aux-devs = <&tdmout_b>, <&tdmout_c>, <&tdmin_a>, + <&tdmin_b>, <&tdmin_c>, <&tdmin_lb>, +@@ -408,12 +410,12 @@ + + &ext_mdio { + external_phy: ethernet-phy@0 { +- /* Realtek RTL8211F (0x001cc916) */ ++ /* Realtek RTL8211F (0x001cc916) */ + reg = <0>; + max-speed = <1000>; + + reset-assert-us = <10000>; +- reset-deassert-us = <30000>; ++ reset-deassert-us = <80000>; + reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + + interrupt-parent = <&gpio_intc>; +@@ -444,13 +446,58 @@ + }; + + &gpio { ++ gpio-line-names = ++ /* GPIOZ */ ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", ++ /* GPIOH */ ++ "", "", "", "", "", "", "", "", ++ "", ++ /* BOOT */ ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", ++ /* GPIOC */ ++ "", "", "", "", "", "", "", "", ++ /* GPIOA */ ++ "PIN_44", /* GPIOA_0 */ ++ "PIN_46", /* GPIOA_1 */ ++ "PIN_45", /* GPIOA_2 */ ++ "PIN_47", /* GPIOA_3 */ ++ "PIN_26", /* GPIOA_4 */ ++ "", "", "", "", "", "", ++ "PIN_42", /* GPIOA_11 */ ++ "PIN_32", /* GPIOA_12 */ ++ "PIN_7", /* GPIOA_13 */ ++ "PIN_27", /* GPIOA_14 */ ++ "PIN_28", /* GPIOA_15 */ ++ /* GPIOX */ ++ "PIN_16", /* GPIOX_0 */ ++ "PIN_18", /* GPIOX_1 */ ++ "PIN_22", /* GPIOX_2 */ ++ "PIN_11", /* GPIOX_3 */ ++ "PIN_13", /* GPIOX_4 */ ++ "PIN_33", /* GPIOX_5 */ ++ "PIN_35", /* GPIOX_6 */ ++ "PIN_15", /* GPIOX_7 */ ++ "PIN_19", /* GPIOX_8 */ ++ "PIN_21", /* GPIOX_9 */ ++ "PIN_24", /* GPIOX_10 */ ++ "PIN_23", /* GPIOX_11 */ ++ "PIN_8", /* GPIOX_12 */ ++ "PIN_10", /* GPIOX_13 */ ++ "PIN_29", /* GPIOX_14 */ ++ "PIN_31", /* GPIOX_15 */ ++ "PIN_12", /* GPIOX_16 */ ++ "PIN_3", /* GPIOX_17 */ ++ "PIN_5", /* GPIOX_18 */ ++ "PIN_36"; /* GPIOX_19 */ + /* + * WARNING: The USB Hub on the Odroid-N2 needs a reset signal + * to be turned high in order to be detected by the USB Controller + * This signal should be handled by a USB specific power sequence + * in order to reset the Hub when USB bus is powered down. + */ +- usb-hub { ++ hog-0 { + gpio-hog; + gpios = ; + output-high; +@@ -478,6 +525,18 @@ + linux,rc-map-name = "rc-odroid"; + }; + ++&i2c3 { ++ status = "okay"; ++ pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>; ++ pinctrl-names = "default"; ++ ++ rtc: rtc@51 { ++ compatible = "nxp,pcf8563"; ++ reg = <0x51>; ++ wakeup-source; ++ }; ++}; ++ + &pwm_ab { + pinctrl-0 = <&pwm_a_e_pins>; + pinctrl-names = "default"; +@@ -494,6 +553,11 @@ + status = "okay"; + }; + ++&saradc { ++ status = "okay"; ++ vref-supply = <&vddao_1v8>; ++}; ++ + /* SD card */ + &sd_emmc_b { + status = "okay"; +diff --git a/arch/arm/dts/meson-g12b-w400.dtsi b/arch/arm/dts/meson-g12b-w400.dtsi +index 2802ddbb83..feb0885047 100644 +--- a/arch/arm/dts/meson-g12b-w400.dtsi ++++ b/arch/arm/dts/meson-g12b-w400.dtsi +@@ -264,7 +264,7 @@ + max-speed = <1000>; + + reset-assert-us = <10000>; +- reset-deassert-us = <30000>; ++ reset-deassert-us = <80000>; + reset-gpios = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + + interrupt-parent = <&gpio_intc>; +diff --git a/arch/arm/dts/meson-g12b.dtsi b/arch/arm/dts/meson-g12b.dtsi +index 9b8548e5f6..ee8fcae9f9 100644 +--- a/arch/arm/dts/meson-g12b.dtsi ++++ b/arch/arm/dts/meson-g12b.dtsi +@@ -135,3 +135,7 @@ + }; + }; + }; ++ ++&mali { ++ dma-coherent; ++}; +diff --git a/arch/arm/dts/meson-gx-libretech-pc.dtsi b/arch/arm/dts/meson-gx-libretech-pc.dtsi +index c2480bab8d..2d7032f41e 100644 +--- a/arch/arm/dts/meson-gx-libretech-pc.dtsi ++++ b/arch/arm/dts/meson-gx-libretech-pc.dtsi +@@ -186,7 +186,7 @@ + + sound { + compatible = "amlogic,gx-sound-card"; +- model = "GXL-LIBRETECH-S9XX-PC"; ++ model = "LIBRETECH-PC"; + audio-aux-devs = <&dio2133>; + audio-widgets = "Speaker", "7J4-14 LEFT", + "Speaker", "7J4-11 RIGHT"; +diff --git a/arch/arm/dts/meson-gx-p23x-q20x.dtsi b/arch/arm/dts/meson-gx-p23x-q20x.dtsi +index 6b57e15aad..dafc841f7c 100644 +--- a/arch/arm/dts/meson-gx-p23x-q20x.dtsi ++++ b/arch/arm/dts/meson-gx-p23x-q20x.dtsi +@@ -121,7 +121,7 @@ + + sound { + compatible = "amlogic,gx-sound-card"; +- model = "GX-P230-Q200"; ++ model = "P230-Q200"; + audio-aux-devs = <&dio2133>; + audio-widgets = "Line", "Lineout"; + audio-routing = "AU2 INL", "ACODEC LOLP", +diff --git a/arch/arm/dts/meson-gx-u-boot.dtsi b/arch/arm/dts/meson-gx-u-boot.dtsi +index 17d2cb95c1..fb6952f1d8 100644 +--- a/arch/arm/dts/meson-gx-u-boot.dtsi ++++ b/arch/arm/dts/meson-gx-u-boot.dtsi +@@ -5,6 +5,13 @@ + */ + + / { ++ /* Keep HW order from U-boot */ ++ aliases { ++ /delete-property/ mmc0; ++ /delete-property/ mmc1; ++ /delete-property/ mmc2; ++ }; ++ + soc { + u-boot,dm-pre-reloc; + }; +diff --git a/arch/arm/dts/meson-gx.dtsi b/arch/arm/dts/meson-gx.dtsi +index 0edd137151..6b457b2c30 100644 +--- a/arch/arm/dts/meson-gx.dtsi ++++ b/arch/arm/dts/meson-gx.dtsi +@@ -20,6 +20,12 @@ + #address-cells = <2>; + #size-cells = <2>; + ++ aliases { ++ mmc0 = &sd_emmc_b; /* SD card */ ++ mmc1 = &sd_emmc_c; /* eMMC */ ++ mmc2 = &sd_emmc_a; /* SDIO */ ++ }; ++ + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; +@@ -295,6 +301,7 @@ + reg = <0x0 0x84c0 0x0 0x18>; + interrupts = ; + status = "disabled"; ++ fifo-size = <128>; + }; + + uart_B: serial@84dc { +diff --git a/arch/arm/dts/meson-gxbb-nanopi-k2.dts b/arch/arm/dts/meson-gxbb-nanopi-k2.dts +index 7be3e35409..7273eed529 100644 +--- a/arch/arm/dts/meson-gxbb-nanopi-k2.dts ++++ b/arch/arm/dts/meson-gxbb-nanopi-k2.dts +@@ -7,6 +7,7 @@ + + #include "meson-gxbb.dtsi" + #include ++#include + + / { + compatible = "friendlyarm,nanopi-k2", "amlogic,meson-gxbb"; +@@ -130,6 +131,45 @@ + }; + }; + }; ++ ++ sound { ++ compatible = "amlogic,gx-sound-card"; ++ model = "NANOPI-K2"; ++ assigned-clocks = <&clkc CLKID_MPLL0>, ++ <&clkc CLKID_MPLL1>, ++ <&clkc CLKID_MPLL2>; ++ assigned-clock-parents = <0>, <0>, <0>; ++ assigned-clock-rates = <294912000>, ++ <270950400>, ++ <393216000>; ++ status = "okay"; ++ ++ dai-link-0 { ++ sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>; ++ }; ++ ++ dai-link-1 { ++ sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>; ++ dai-format = "i2s"; ++ mclk-fs = <256>; ++ ++ codec-0 { ++ sound-dai = <&aiu AIU_HDMI CTRL_I2S>; ++ }; ++ }; ++ ++ dai-link-2 { ++ sound-dai = <&aiu AIU_HDMI CTRL_OUT>; ++ ++ codec-0 { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; ++}; ++ ++&aiu { ++ status = "okay"; + }; + + &cec_AO { +@@ -165,7 +205,7 @@ + reg = <0>; + + reset-assert-us = <10000>; +- reset-deassert-us = <30000>; ++ reset-deassert-us = <80000>; + reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; + + interrupt-parent = <&gpio_intc>; +diff --git a/arch/arm/dts/meson-gxbb-odroidc2.dts b/arch/arm/dts/meson-gxbb-odroidc2.dts +index 70fcfb7b06..201596247f 100644 +--- a/arch/arm/dts/meson-gxbb-odroidc2.dts ++++ b/arch/arm/dts/meson-gxbb-odroidc2.dts +@@ -9,6 +9,7 @@ + + #include "meson-gxbb.dtsi" + #include ++#include + + / { + compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb"; +@@ -172,6 +173,45 @@ + }; + }; + }; ++ ++ sound { ++ compatible = "amlogic,gx-sound-card"; ++ model = "ODROID-C2"; ++ assigned-clocks = <&clkc CLKID_MPLL0>, ++ <&clkc CLKID_MPLL1>, ++ <&clkc CLKID_MPLL2>; ++ assigned-clock-parents = <0>, <0>, <0>; ++ assigned-clock-rates = <294912000>, ++ <270950400>, ++ <393216000>; ++ status = "okay"; ++ ++ dai-link-0 { ++ sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>; ++ }; ++ ++ dai-link-1 { ++ sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>; ++ dai-format = "i2s"; ++ mclk-fs = <256>; ++ ++ codec-0 { ++ sound-dai = <&aiu AIU_HDMI CTRL_I2S>; ++ }; ++ }; ++ ++ dai-link-2 { ++ sound-dai = <&aiu AIU_HDMI CTRL_OUT>; ++ ++ codec-0 { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; ++}; ++ ++&aiu { ++ status = "okay"; + }; + + &cec_AO { +@@ -200,7 +240,7 @@ + reg = <0>; + + reset-assert-us = <10000>; +- reset-deassert-us = <30000>; ++ reset-deassert-us = <80000>; + reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; + + interrupt-parent = <&gpio_intc>; +@@ -217,7 +257,7 @@ + * This signal should be handled by a USB specific power sequence + * in order to reset the Hub when USB bus is powered down. + */ +- usb-hub { ++ hog-0 { + gpio-hog; + gpios = ; + output-high; +diff --git a/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts b/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts +index 9e43f4dca9..2d769203f6 100644 +--- a/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts ++++ b/arch/arm/dts/meson-gxl-s805x-libretech-ac.dts +@@ -118,7 +118,7 @@ + + sound { + compatible = "amlogic,gx-sound-card"; +- model = "GXL-LIBRETECH-S805X-AC"; ++ model = "LIBRETECH-AC"; + audio-widgets = "Speaker", "9J5-3 LEFT", + "Speaker", "9J5-2 RIGHT"; + audio-routing = "9J5-3 LEFT", "ACODEC LOLN", +diff --git a/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts b/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts +index 8bcdffdf55..60feac0179 100644 +--- a/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts ++++ b/arch/arm/dts/meson-gxl-s905x-khadas-vim.dts +@@ -5,9 +5,9 @@ + + /dts-v1/; + +-#include +- + #include "meson-gxl-s905x-p212.dtsi" ++#include ++#include + + / { + compatible = "khadas,vim", "amlogic,s905x", "amlogic,meson-gxl"; +@@ -42,10 +42,10 @@ + }; + }; + +- pwmleds { ++ led-controller { + compatible = "pwm-leds"; + +- power { ++ led-1 { + label = "vim:red:power"; + pwms = <&pwm_AO_ab 1 7812500 0>; + max-brightness = <255>; +@@ -63,6 +63,45 @@ + }; + }; + }; ++ ++ sound { ++ compatible = "amlogic,gx-sound-card"; ++ model = "KHADAS-VIM"; ++ assigned-clocks = <&clkc CLKID_MPLL0>, ++ <&clkc CLKID_MPLL1>, ++ <&clkc CLKID_MPLL2>; ++ assigned-clock-parents = <0>, <0>, <0>; ++ assigned-clock-rates = <294912000>, ++ <270950400>, ++ <393216000>; ++ status = "okay"; ++ ++ dai-link-0 { ++ sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>; ++ }; ++ ++ dai-link-1 { ++ sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>; ++ dai-format = "i2s"; ++ mclk-fs = <256>; ++ ++ codec-0 { ++ sound-dai = <&aiu AIU_HDMI CTRL_I2S>; ++ }; ++ }; ++ ++ dai-link-2 { ++ sound-dai = <&aiu AIU_HDMI CTRL_OUT>; ++ ++ codec-0 { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; ++}; ++ ++&aiu { ++ status = "okay"; + }; + + &cec_AO { +@@ -97,8 +136,7 @@ + pinctrl-names = "default"; + + rtc: rtc@51 { +- /* has to be enabled manually when a battery is connected: */ +- status = "disabled"; ++ status = "okay"; + compatible = "haoyu,hym8563"; + reg = <0x51>; + #clock-cells = <0>; +diff --git a/arch/arm/dts/meson-gxl-s905x-libretech-cc-v2.dts b/arch/arm/dts/meson-gxl-s905x-libretech-cc-v2.dts +index 675eaa8796..93d8f8aff7 100644 +--- a/arch/arm/dts/meson-gxl-s905x-libretech-cc-v2.dts ++++ b/arch/arm/dts/meson-gxl-s905x-libretech-cc-v2.dts +@@ -84,7 +84,6 @@ + regulator-always-on; + }; + +- + vcck: regulator-vcck { + compatible = "regulator-fixed"; + regulator-name = "VCCK"; +@@ -124,7 +123,6 @@ + regulator-always-on; + }; + +- + vddio_card: regulator-vddio-card { + compatible = "regulator-gpio"; + regulator-name = "VDDIO_CARD"; +@@ -161,7 +159,7 @@ + + sound { + compatible = "amlogic,gx-sound-card"; +- model = "GXL-LIBRETECH-S905X-CC-V2"; ++ model = "LIBRETECH-CC-V2"; + assigned-clocks = <&clkc CLKID_MPLL0>, + <&clkc CLKID_MPLL1>, + <&clkc CLKID_MPLL2>; +@@ -195,7 +193,6 @@ + }; + }; + +- + &aiu { + status = "okay"; + }; +@@ -207,7 +204,6 @@ + hdmi-phandle = <&hdmi_tx>; + }; + +- + ðmac { + status = "okay"; + }; +diff --git a/arch/arm/dts/meson-gxl-s905x-libretech-cc.dts b/arch/arm/dts/meson-gxl-s905x-libretech-cc.dts +index 5ae7bb6209..82bfabfbd3 100644 +--- a/arch/arm/dts/meson-gxl-s905x-libretech-cc.dts ++++ b/arch/arm/dts/meson-gxl-s905x-libretech-cc.dts +@@ -135,7 +135,7 @@ + + sound { + compatible = "amlogic,gx-sound-card"; +- model = "GXL-LIBRETECH-S905X-CC"; ++ model = "LIBRETECH-CC"; + audio-aux-devs = <&dio2133>; + audio-widgets = "Line", "Lineout"; + audio-routing = "AU2 INL", "ACODEC LOLN", +diff --git a/arch/arm/dts/meson-gxm-khadas-vim2.dts b/arch/arm/dts/meson-gxm-khadas-vim2.dts +index bff8ec2c1c..18a4b7a6c5 100644 +--- a/arch/arm/dts/meson-gxm-khadas-vim2.dts ++++ b/arch/arm/dts/meson-gxm-khadas-vim2.dts +@@ -7,9 +7,9 @@ + + /dts-v1/; + +-#include +- + #include "meson-gxm.dtsi" ++#include ++#include + + / { + compatible = "khadas,vim2", "amlogic,s912", "amlogic,meson-gxm"; +@@ -81,10 +81,10 @@ + }; + }; + +- pwmleds { ++ led-controller { + compatible = "pwm-leds"; + +- power { ++ led-1 { + label = "vim:red:power"; + pwms = <&pwm_AO_ab 1 7812500 0>; + max-brightness = <255>; +@@ -145,6 +145,45 @@ + clock-frequency = <32768>; + pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ + }; ++ ++ sound { ++ compatible = "amlogic,gx-sound-card"; ++ model = "KHADAS-VIM2"; ++ assigned-clocks = <&clkc CLKID_MPLL0>, ++ <&clkc CLKID_MPLL1>, ++ <&clkc CLKID_MPLL2>; ++ assigned-clock-parents = <0>, <0>, <0>; ++ assigned-clock-rates = <294912000>, ++ <270950400>, ++ <393216000>; ++ status = "okay"; ++ ++ dai-link-0 { ++ sound-dai = <&aiu AIU_CPU CPU_I2S_FIFO>; ++ }; ++ ++ dai-link-1 { ++ sound-dai = <&aiu AIU_CPU CPU_I2S_ENCODER>; ++ dai-format = "i2s"; ++ mclk-fs = <256>; ++ ++ codec-0 { ++ sound-dai = <&aiu AIU_HDMI CTRL_I2S>; ++ }; ++ }; ++ ++ dai-link-2 { ++ sound-dai = <&aiu AIU_HDMI CTRL_OUT>; ++ ++ codec-0 { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; ++}; ++ ++&aiu { ++ status = "okay"; + }; + + &cec_AO { +@@ -154,7 +193,6 @@ + hdmi-phandle = <&hdmi_tx>; + }; + +- + &cpu_cooling_maps { + map0 { + cooling-device = <&gpio_fan THERMAL_NO_LIMIT 1>; +@@ -194,7 +232,7 @@ + reg = <0>; + + reset-assert-us = <10000>; +- reset-deassert-us = <30000>; ++ reset-deassert-us = <80000>; + reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; + + interrupt-parent = <&gpio_intc>; +@@ -228,8 +266,7 @@ + pinctrl-names = "default"; + + rtc: rtc@51 { +- /* has to be enabled manually when a battery is connected: */ +- status = "disabled"; ++ status = "okay"; + compatible = "haoyu,hym8563"; + reg = <0x51>; + #clock-cells = <0>; +@@ -341,7 +378,7 @@ + #size-cells = <1>; + compatible = "winbond,w25q16", "jedec,spi-nor"; + reg = <0>; +- spi-max-frequency = <3000000>; ++ spi-max-frequency = <104000000>; + }; + }; + +diff --git a/arch/arm/dts/meson-gxm-wetek-core2.dts b/arch/arm/dts/meson-gxm-wetek-core2.dts +index ec794c134c..1e7f77f9b5 100644 +--- a/arch/arm/dts/meson-gxm-wetek-core2.dts ++++ b/arch/arm/dts/meson-gxm-wetek-core2.dts +@@ -22,7 +22,7 @@ + leds { + compatible = "gpio-leds"; + +- blue { ++ led-blue { + color = ; + function = LED_FUNCTION_STATUS; + gpios = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>; +diff --git a/arch/arm/dts/meson-gxm.dtsi b/arch/arm/dts/meson-gxm.dtsi +index fe41451122..411cc312fc 100644 +--- a/arch/arm/dts/meson-gxm.dtsi ++++ b/arch/arm/dts/meson-gxm.dtsi +@@ -42,11 +42,28 @@ + }; + }; + ++ cpu0: cpu@0 { ++ capacity-dmips-mhz = <1024>; ++ }; ++ ++ cpu1: cpu@1 { ++ capacity-dmips-mhz = <1024>; ++ }; ++ ++ cpu2: cpu@2 { ++ capacity-dmips-mhz = <1024>; ++ }; ++ ++ cpu3: cpu@3 { ++ capacity-dmips-mhz = <1024>; ++ }; ++ + cpu4: cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0x0 0x100>; + enable-method = "psci"; ++ capacity-dmips-mhz = <1024>; + next-level-cache = <&l2>; + clocks = <&scpi_dvfs 1>; + #cooling-cells = <2>; +@@ -57,6 +74,7 @@ + compatible = "arm,cortex-a53"; + reg = <0x0 0x101>; + enable-method = "psci"; ++ capacity-dmips-mhz = <1024>; + next-level-cache = <&l2>; + clocks = <&scpi_dvfs 1>; + #cooling-cells = <2>; +@@ -67,6 +85,7 @@ + compatible = "arm,cortex-a53"; + reg = <0x0 0x102>; + enable-method = "psci"; ++ capacity-dmips-mhz = <1024>; + next-level-cache = <&l2>; + clocks = <&scpi_dvfs 1>; + #cooling-cells = <2>; +@@ -77,6 +96,7 @@ + compatible = "arm,cortex-a53"; + reg = <0x0 0x103>; + enable-method = "psci"; ++ capacity-dmips-mhz = <1024>; + next-level-cache = <&l2>; + clocks = <&scpi_dvfs 1>; + #cooling-cells = <2>; +diff --git a/arch/arm/dts/meson-khadas-vim3.dtsi b/arch/arm/dts/meson-khadas-vim3.dtsi +index 7b46555ac5..3cf4ecb6d5 100644 +--- a/arch/arm/dts/meson-khadas-vim3.dtsi ++++ b/arch/arm/dts/meson-khadas-vim3.dtsi +@@ -6,6 +6,7 @@ + */ + + #include ++#include + #include + #include + +@@ -13,6 +14,8 @@ + aliases { + serial0 = &uart_AO; + ethernet0 = ðmac; ++ rtc0 = &rtc; ++ rtc1 = &vrtc; + }; + + chosen { +@@ -41,13 +44,15 @@ + compatible = "gpio-leds"; + + led-white { +- label = "vim3:white:sys"; ++ color = ; ++ function = LED_FUNCTION_STATUS; + gpios = <&gpio_ao GPIOAO_4 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + + led-red { +- label = "vim3:red"; ++ color = ; ++ function = LED_FUNCTION_STATUS; + gpios = <&gpio_expander 5 GPIO_ACTIVE_HIGH>; + }; + }; +@@ -165,12 +170,17 @@ + + sound { + compatible = "amlogic,axg-sound-card"; +- model = "G12B-KHADAS-VIM3"; +- audio-aux-devs = <&tdmout_a>; ++ model = "KHADAS-VIM3"; ++ audio-aux-devs = <&tdmin_a>, <&tdmout_a>; + audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0", + "TDMOUT_A IN 1", "FRDDR_B OUT 0", + "TDMOUT_A IN 2", "FRDDR_C OUT 0", +- "TDM_A Playback", "TDMOUT_A OUT"; ++ "TDM_A Playback", "TDMOUT_A OUT", ++ "TDMIN_A IN 0", "TDM_A Capture", ++ "TDMIN_A IN 3", "TDM_A Loopback", ++ "TODDR_A IN 0", "TDMIN_A OUT", ++ "TODDR_B IN 0", "TDMIN_A OUT", ++ "TODDR_C IN 0", "TDMIN_A OUT"; + + assigned-clocks = <&clkc CLKID_MPLL2>, + <&clkc CLKID_MPLL0>, +@@ -193,8 +203,20 @@ + sound-dai = <&frddr_c>; + }; + +- /* 8ch hdmi interface */ + dai-link-3 { ++ sound-dai = <&toddr_a>; ++ }; ++ ++ dai-link-4 { ++ sound-dai = <&toddr_b>; ++ }; ++ ++ dai-link-5 { ++ sound-dai = <&toddr_c>; ++ }; ++ ++ /* 8ch hdmi interface */ ++ dai-link-6 { + sound-dai = <&tdmif_a>; + dai-format = "i2s"; + dai-tdm-slot-tx-mask-0 = <1 1>; +@@ -209,7 +231,7 @@ + }; + + /* hdmi glue */ +- dai-link-4 { ++ dai-link-7 { + sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>; + + codec { +@@ -278,12 +300,12 @@ + }; + + ðmac { +- pinctrl-0 = <ð_pins>, <ð_rgmii_pins>; +- pinctrl-names = "default"; +- status = "okay"; +- phy-mode = "rgmii"; +- phy-handle = <&external_phy>; +- amlogic,tx-delay-ns = <2>; ++ pinctrl-0 = <ð_pins>, <ð_rgmii_pins>; ++ pinctrl-names = "default"; ++ status = "okay"; ++ phy-mode = "rgmii"; ++ phy-handle = <&external_phy>; ++ amlogic,tx-delay-ns = <2>; + }; + + &frddr_a { +@@ -330,7 +352,7 @@ + #gpio-cells = <2>; + }; + +- rtc@51 { ++ rtc: rtc@51 { + compatible = "haoyu,hym8563"; + reg = <0x51>; + #clock-cells = <0>; +@@ -349,9 +371,9 @@ + }; + + &pwm_ef { +- status = "okay"; +- pinctrl-0 = <&pwm_e_pins>; +- pinctrl-names = "default"; ++ status = "okay"; ++ pinctrl-0 = <&pwm_e_pins>; ++ pinctrl-names = "default"; + }; + + &saradc { +@@ -445,15 +467,30 @@ + }; + }; + +- + &tdmif_a { + status = "okay"; + }; + ++&tdmin_a { ++ status = "okay"; ++}; ++ + &tdmout_a { + status = "okay"; + }; + ++&toddr_a { ++ status = "okay"; ++}; ++ ++&toddr_b { ++ status = "okay"; ++}; ++ ++&toddr_c { ++ status = "okay"; ++}; ++ + &tohdmitx { + status = "okay"; + }; +diff --git a/arch/arm/dts/meson-sm1-bananapi-m5.dts b/arch/arm/dts/meson-sm1-bananapi-m5.dts +new file mode 100644 +index 0000000000..effaa138b5 +--- /dev/null ++++ b/arch/arm/dts/meson-sm1-bananapi-m5.dts +@@ -0,0 +1,646 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2021 BayLibre SAS ++ * Author: Neil Armstrong ++ */ ++ ++/dts-v1/; ++ ++#include "meson-sm1.dtsi" ++#include ++#include ++#include ++#include ++#include ++ ++/ { ++ compatible = "bananapi,bpi-m5", "amlogic,sm1"; ++ model = "Banana Pi BPI-M5"; ++ ++ adc_keys { ++ compatible = "adc-keys"; ++ io-channels = <&saradc 2>; ++ io-channel-names = "buttons"; ++ keyup-threshold-microvolt = <1800000>; ++ ++ key { ++ label = "SW3"; ++ linux,code = ; ++ press-threshold-microvolt = <1700000>; ++ }; ++ }; ++ ++ aliases { ++ serial0 = &uart_AO; ++ ethernet0 = ðmac; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ /* TOFIX: handle CVBS_DET on SARADC channel 0 */ ++ cvbs-connector { ++ compatible = "composite-video-connector"; ++ ++ port { ++ cvbs_connector_in: endpoint { ++ remote-endpoint = <&cvbs_vdac_out>; ++ }; ++ }; ++ }; ++ ++ emmc_pwrseq: emmc-pwrseq { ++ compatible = "mmc-pwrseq-emmc"; ++ reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>; ++ }; ++ ++ gpio-keys { ++ compatible = "gpio-keys"; ++ ++ key { ++ label = "SW1"; ++ linux,code = ; ++ gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_LOW>; ++ interrupt-parent = <&gpio_intc>; ++ interrupts = <3 IRQ_TYPE_EDGE_BOTH>; ++ }; ++ }; ++ ++ hdmi-connector { ++ compatible = "hdmi-connector"; ++ type = "a"; ++ ++ port { ++ hdmi_connector_in: endpoint { ++ remote-endpoint = <&hdmi_tx_tmds_out>; ++ }; ++ }; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ green { ++ color = ; ++ function = LED_FUNCTION_STATUS; ++ gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>; ++ }; ++ ++ blue { ++ color = ; ++ function = LED_FUNCTION_STATUS; ++ gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_LOW>; ++ linux,default-trigger = "heartbeat"; ++ }; ++ }; ++ ++ memory@0 { ++ device_type = "memory"; ++ reg = <0x0 0x0 0x0 0x40000000>; ++ }; ++ ++ emmc_1v8: regulator-emmc_1v8 { ++ compatible = "regulator-fixed"; ++ regulator-name = "EMMC_1V8"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&vddao_3v3>; ++ regulator-always-on; ++ }; ++ ++ dc_in: regulator-dc_in { ++ compatible = "regulator-fixed"; ++ regulator-name = "DC_IN"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-always-on; ++ }; ++ ++ vddio_c: regulator-vddio_c { ++ compatible = "regulator-gpio"; ++ regulator-name = "VDDIO_C"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ ++ enable-gpio = <&gpio GPIOE_2 GPIO_ACTIVE_HIGH>; ++ enable-active-high; ++ regulator-always-on; ++ ++ gpios = <&gpio_ao GPIOAO_6 GPIO_OPEN_DRAIN>; ++ gpios-states = <1>; ++ ++ states = <1800000 0>, ++ <3300000 1>; ++ }; ++ ++ tflash_vdd: regulator-tflash_vdd { ++ compatible = "regulator-fixed"; ++ regulator-name = "TFLASH_VDD"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&dc_in>; ++ gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>; ++ enable-active-high; ++ regulator-always-on; ++ }; ++ ++ vddao_1v8: regulator-vddao_1v8 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VDDAO_1V8"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&vddao_3v3>; ++ regulator-always-on; ++ }; ++ ++ vddao_3v3: regulator-vddao_3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VDDAO_3V3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&dc_in>; ++ regulator-always-on; ++ }; ++ ++ vddcpu: regulator-vddcpu { ++ /* ++ * SY8120B1ABC DC/DC Regulator. ++ */ ++ compatible = "pwm-regulator"; ++ ++ regulator-name = "VDDCPU"; ++ regulator-min-microvolt = <690000>; ++ regulator-max-microvolt = <1050000>; ++ ++ vin-supply = <&dc_in>; ++ ++ pwms = <&pwm_AO_cd 1 1250 0>; ++ pwm-dutycycle-range = <100 0>; ++ ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ /* USB Hub Power Enable */ ++ vl_pwr_en: regulator-vl_pwr_en { ++ compatible = "regulator-fixed"; ++ regulator-name = "VL_PWR_EN"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&dc_in>; ++ ++ gpio = <&gpio GPIOH_6 GPIO_ACTIVE_HIGH>; ++ enable-active-high; ++ }; ++ ++ sound { ++ compatible = "amlogic,axg-sound-card"; ++ model = "BPI-M5"; ++ audio-widgets = "Line", "Lineout"; ++ audio-aux-devs = <&tdmout_b>, <&tdmout_c>, ++ <&tdmin_a>, <&tdmin_b>, <&tdmin_c>; ++ audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1", ++ "TDMOUT_B IN 1", "FRDDR_B OUT 1", ++ "TDMOUT_B IN 2", "FRDDR_C OUT 1", ++ "TDM_B Playback", "TDMOUT_B OUT", ++ "TDMOUT_C IN 0", "FRDDR_A OUT 2", ++ "TDMOUT_C IN 1", "FRDDR_B OUT 2", ++ "TDMOUT_C IN 2", "FRDDR_C OUT 2", ++ "TDM_C Playback", "TDMOUT_C OUT", ++ "TDMIN_A IN 4", "TDM_B Loopback", ++ "TDMIN_B IN 4", "TDM_B Loopback", ++ "TDMIN_C IN 4", "TDM_B Loopback", ++ "TDMIN_A IN 5", "TDM_C Loopback", ++ "TDMIN_B IN 5", "TDM_C Loopback", ++ "TDMIN_C IN 5", "TDM_C Loopback", ++ "TODDR_A IN 0", "TDMIN_A OUT", ++ "TODDR_B IN 0", "TDMIN_A OUT", ++ "TODDR_C IN 0", "TDMIN_A OUT", ++ "TODDR_A IN 1", "TDMIN_B OUT", ++ "TODDR_B IN 1", "TDMIN_B OUT", ++ "TODDR_C IN 1", "TDMIN_B OUT", ++ "TODDR_A IN 2", "TDMIN_C OUT", ++ "TODDR_B IN 2", "TDMIN_C OUT", ++ "TODDR_C IN 2", "TDMIN_C OUT", ++ "Lineout", "ACODEC LOLP", ++ "Lineout", "ACODEC LORP"; ++ ++ assigned-clocks = <&clkc CLKID_MPLL2>, ++ <&clkc CLKID_MPLL0>, ++ <&clkc CLKID_MPLL1>; ++ assigned-clock-parents = <0>, <0>, <0>; ++ assigned-clock-rates = <294912000>, ++ <270950400>, ++ <393216000>; ++ status = "okay"; ++ ++ dai-link-0 { ++ sound-dai = <&frddr_a>; ++ }; ++ ++ dai-link-1 { ++ sound-dai = <&frddr_b>; ++ }; ++ ++ dai-link-2 { ++ sound-dai = <&frddr_c>; ++ }; ++ ++ dai-link-3 { ++ sound-dai = <&toddr_a>; ++ }; ++ ++ dai-link-4 { ++ sound-dai = <&toddr_b>; ++ }; ++ ++ dai-link-5 { ++ sound-dai = <&toddr_c>; ++ }; ++ ++ /* 8ch hdmi interface */ ++ dai-link-6 { ++ sound-dai = <&tdmif_b>; ++ dai-format = "i2s"; ++ dai-tdm-slot-tx-mask-0 = <1 1>; ++ dai-tdm-slot-tx-mask-1 = <1 1>; ++ dai-tdm-slot-tx-mask-2 = <1 1>; ++ dai-tdm-slot-tx-mask-3 = <1 1>; ++ mclk-fs = <256>; ++ ++ codec-0 { ++ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>; ++ }; ++ ++ codec-1 { ++ sound-dai = <&toacodec TOACODEC_IN_B>; ++ }; ++ }; ++ ++ /* i2s jack output interface */ ++ dai-link-7 { ++ sound-dai = <&tdmif_c>; ++ dai-format = "i2s"; ++ dai-tdm-slot-tx-mask-0 = <1 1>; ++ mclk-fs = <256>; ++ ++ codec-0 { ++ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_C>; ++ }; ++ ++ codec-1 { ++ sound-dai = <&toacodec TOACODEC_IN_C>; ++ }; ++ }; ++ ++ /* hdmi glue */ ++ dai-link-8 { ++ sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>; ++ ++ codec { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ ++ /* acodec glue */ ++ dai-link-9 { ++ sound-dai = <&toacodec TOACODEC_OUT>; ++ ++ codec { ++ sound-dai = <&acodec>; ++ }; ++ }; ++ }; ++}; ++ ++&acodec { ++ AVDD-supply = <&vddao_1v8>; ++ status = "okay"; ++}; ++ ++&arb { ++ status = "okay"; ++}; ++ ++&clkc_audio { ++ status = "okay"; ++}; ++ ++&cpu0 { ++ cpu-supply = <&vddcpu>; ++ operating-points-v2 = <&cpu_opp_table>; ++ clocks = <&clkc CLKID_CPU_CLK>; ++ clock-latency = <50000>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&vddcpu>; ++ operating-points-v2 = <&cpu_opp_table>; ++ clocks = <&clkc CLKID_CPU1_CLK>; ++ clock-latency = <50000>; ++}; ++ ++&cpu2 { ++ cpu-supply = <&vddcpu>; ++ operating-points-v2 = <&cpu_opp_table>; ++ clocks = <&clkc CLKID_CPU2_CLK>; ++ clock-latency = <50000>; ++}; ++ ++&cpu3 { ++ cpu-supply = <&vddcpu>; ++ operating-points-v2 = <&cpu_opp_table>; ++ clocks = <&clkc CLKID_CPU3_CLK>; ++ clock-latency = <50000>; ++}; ++ ++&cvbs_vdac_port { ++ cvbs_vdac_out: endpoint { ++ remote-endpoint = <&cvbs_connector_in>; ++ }; ++}; ++ ++&ext_mdio { ++ external_phy: ethernet-phy@0 { ++ /* Realtek RTL8211F (0x001cc916) */ ++ reg = <0>; ++ max-speed = <1000>; ++ ++ interrupt-parent = <&gpio_intc>; ++ /* MAC_INTR on GPIOZ_14 */ ++ interrupts = <26 IRQ_TYPE_LEVEL_LOW>; ++ }; ++}; ++ ++ðmac { ++ pinctrl-0 = <ð_pins>, <ð_rgmii_pins>; ++ pinctrl-names = "default"; ++ status = "okay"; ++ phy-mode = "rgmii-txid"; ++ phy-handle = <&external_phy>; ++}; ++ ++&frddr_a { ++ status = "okay"; ++}; ++ ++&frddr_b { ++ status = "okay"; ++}; ++ ++&frddr_c { ++ status = "okay"; ++}; ++ ++&gpio { ++ gpio-line-names = ++ /* GPIOZ */ ++ "ETH_MDIO", /* GPIOZ_0 */ ++ "ETH_MDC", /* GPIOZ_1 */ ++ "ETH_RXCLK", /* GPIOZ_2 */ ++ "ETH_RX_DV", /* GPIOZ_3 */ ++ "ETH_RXD0", /* GPIOZ_4 */ ++ "ETH_RXD1", /* GPIOZ_5 */ ++ "ETH_RXD2", /* GPIOZ_6 */ ++ "ETH_RXD3", /* GPIOZ_7 */ ++ "ETH_TXCLK", /* GPIOZ_8 */ ++ "ETH_TXEN", /* GPIOZ_9 */ ++ "ETH_TXD0", /* GPIOZ_10 */ ++ "ETH_TXD1", /* GPIOZ_11 */ ++ "ETH_TXD2", /* GPIOZ_12 */ ++ "ETH_TXD3", /* GPIOZ_13 */ ++ "ETH_INTR", /* GPIOZ_14 */ ++ "ETH_NRST", /* GPIOZ_15 */ ++ /* GPIOH */ ++ "HDMI_SDA", /* GPIOH_0 */ ++ "HDMI_SCL", /* GPIOH_1 */ ++ "HDMI_HPD", /* GPIOH_2 */ ++ "HDMI_CEC", /* GPIOH_3 */ ++ "VL-RST_N", /* GPIOH_4 */ ++ "CON1-P36", /* GPIOH_5 */ ++ "VL-PWREN", /* GPIOH_6 */ ++ "WiFi_3V3_1V8", /* GPIOH_7 */ ++ "TFLASH_VDD_EN", /* GPIOH_8 */ ++ /* BOOT */ ++ "eMMC_D0", /* BOOT_0 */ ++ "eMMC_D1", /* BOOT_1 */ ++ "eMMC_D2", /* BOOT_2 */ ++ "eMMC_D3", /* BOOT_3 */ ++ "eMMC_D4", /* BOOT_4 */ ++ "eMMC_D5", /* BOOT_5 */ ++ "eMMC_D6", /* BOOT_6 */ ++ "eMMC_D7", /* BOOT_7 */ ++ "eMMC_CLK", /* BOOT_8 */ ++ "", ++ "eMMC_CMD", /* BOOT_10 */ ++ "", ++ "eMMC_RST#", /* BOOT_12 */ ++ "eMMC_DS", /* BOOT_13 */ ++ /* GPIOC */ ++ "SD_D0_B", /* GPIOC_0 */ ++ "SD_D1_B", /* GPIOC_1 */ ++ "SD_D2_B", /* GPIOC_2 */ ++ "SD_D3_B", /* GPIOC_3 */ ++ "SD_CLK_B", /* GPIOC_4 */ ++ "SD_CMD_B", /* GPIOC_5 */ ++ "CARD_EN_DET", /* GPIOC_6 */ ++ "", ++ /* GPIOA */ ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", ++ "CON1-P27", /* GPIOA_14 */ ++ "CON1-P28", /* GPIOA_15 */ ++ /* GPIOX */ ++ "CON1-P16", /* GPIOX_0 */ ++ "CON1-P18", /* GPIOX_1 */ ++ "CON1-P22", /* GPIOX_2 */ ++ "CON1-P11", /* GPIOX_3 */ ++ "CON1-P13", /* GPIOX_4 */ ++ "CON1-P07", /* GPIOX_5 */ ++ "CON1-P33", /* GPIOX_6 */ ++ "CON1-P15", /* GPIOX_7 */ ++ "CON1-P19", /* GPIOX_8 */ ++ "CON1-P21", /* GPIOX_9 */ ++ "CON1-P24", /* GPIOX_10 */ ++ "CON1-P23", /* GPIOX_11 */ ++ "CON1-P08", /* GPIOX_12 */ ++ "CON1-P10", /* GPIOX_13 */ ++ "CON1-P29", /* GPIOX_14 */ ++ "CON1-P31", /* GPIOX_15 */ ++ "CON1-P26", /* GPIOX_16 */ ++ "CON1-P03", /* GPIOX_17 */ ++ "CON1-P05", /* GPIOX_18 */ ++ "CON1-P32"; /* GPIOX_19 */ ++ ++ /* ++ * WARNING: The USB Hub on the BPI-M5 needs a reset signal ++ * to be turned high in order to be detected by the USB Controller ++ * This signal should be handled by a USB specific power sequence ++ * in order to reset the Hub when USB bus is powered down. ++ */ ++ usb-hub { ++ gpio-hog; ++ gpios = ; ++ output-high; ++ line-name = "usb-hub-reset"; ++ }; ++}; ++ ++&gpio_ao { ++ gpio-line-names = ++ /* GPIOAO */ ++ "DEBUG TX", /* GPIOAO_0 */ ++ "DEBUG RX", /* GPIOAO_1 */ ++ "SYS_LED2", /* GPIOAO_2 */ ++ "UPDATE_KEY", /* GPIOAO_3 */ ++ "CON1-P40", /* GPIOAO_4 */ ++ "IR_IN", /* GPIOAO_5 */ ++ "TF_3V3N_1V8_EN", /* GPIOAO_6 */ ++ "CON1-P35", /* GPIOAO_7 */ ++ "CON1-P12", /* GPIOAO_8 */ ++ "CON1-P37", /* GPIOAO_9 */ ++ "CON1-P38", /* GPIOAO_10 */ ++ "SYS_LED", /* GPIOAO_11 */ ++ /* GPIOE */ ++ "VDDEE_PWM", /* GPIOE_0 */ ++ "VDDCPU_PWM", /* GPIOE_1 */ ++ "TF_PWR_EN"; /* GPIOE_2 */ ++}; ++ ++&hdmi_tx { ++ status = "okay"; ++ pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>; ++ pinctrl-names = "default"; ++ hdmi-supply = <&dc_in>; ++}; ++ ++&hdmi_tx_tmds_port { ++ hdmi_tx_tmds_out: endpoint { ++ remote-endpoint = <&hdmi_connector_in>; ++ }; ++}; ++ ++&ir { ++ status = "okay"; ++ pinctrl-0 = <&remote_input_ao_pins>; ++ pinctrl-names = "default"; ++}; ++ ++&pwm_AO_cd { ++ pinctrl-0 = <&pwm_ao_d_e_pins>; ++ pinctrl-names = "default"; ++ clocks = <&xtal>; ++ clock-names = "clkin1"; ++ status = "okay"; ++}; ++ ++&saradc { ++ status = "okay"; ++ vref-supply = <&vddao_1v8>; ++}; ++ ++/* SD card */ ++&sd_emmc_b { ++ status = "okay"; ++ pinctrl-0 = <&sdcard_c_pins>; ++ pinctrl-1 = <&sdcard_clk_gate_c_pins>; ++ pinctrl-names = "default", "clk-gate"; ++ ++ bus-width = <4>; ++ cap-sd-highspeed; ++ max-frequency = <50000000>; ++ disable-wp; ++ ++ /* TOFIX: SD card is barely usable in SDR modes */ ++ ++ cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>; ++ vmmc-supply = <&tflash_vdd>; ++ vqmmc-supply = <&vddio_c>; ++}; ++ ++/* eMMC */ ++&sd_emmc_c { ++ status = "okay"; ++ pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>; ++ pinctrl-1 = <&emmc_clk_gate_pins>; ++ pinctrl-names = "default", "clk-gate"; ++ ++ bus-width = <8>; ++ cap-mmc-highspeed; ++ mmc-ddr-1_8v; ++ mmc-hs200-1_8v; ++ max-frequency = <200000000>; ++ disable-wp; ++ ++ mmc-pwrseq = <&emmc_pwrseq>; ++ vmmc-supply = <&vddao_3v3>; ++ vqmmc-supply = <&emmc_1v8>; ++}; ++ ++&tdmif_b { ++ status = "okay"; ++}; ++ ++&tdmif_c { ++ status = "okay"; ++}; ++ ++&tdmin_a { ++ status = "okay"; ++}; ++ ++&tdmin_b { ++ status = "okay"; ++}; ++ ++&tdmin_c { ++ status = "okay"; ++}; ++ ++&tdmout_b { ++ status = "okay"; ++}; ++ ++&tdmout_c { ++ status = "okay"; ++}; ++ ++&toacodec { ++ status = "okay"; ++}; ++ ++&tohdmitx { ++ status = "okay"; ++}; ++ ++&toddr_a { ++ status = "okay"; ++}; ++ ++&toddr_b { ++ status = "okay"; ++}; ++ ++&toddr_c { ++ status = "okay"; ++}; ++ ++&uart_AO { ++ status = "okay"; ++ pinctrl-0 = <&uart_ao_a_pins>; ++ pinctrl-names = "default"; ++}; ++ ++&usb { ++ status = "okay"; ++}; ++ ++&usb2_phy0 { ++ phy-supply = <&dc_in>; ++}; ++ ++&usb2_phy1 { ++ /* Enable the hub which is connected to this port */ ++ phy-supply = <&vl_pwr_en>; ++}; +diff --git a/arch/arm/dts/meson-sm1-khadas-vim3l.dts b/arch/arm/dts/meson-sm1-khadas-vim3l.dts +index 4b517ca720..f2c0981435 100644 +--- a/arch/arm/dts/meson-sm1-khadas-vim3l.dts ++++ b/arch/arm/dts/meson-sm1-khadas-vim3l.dts +@@ -32,6 +32,19 @@ + regulator-boot-on; + regulator-always-on; + }; ++ ++ sound { ++ model = "G12B-KHADAS-VIM3L"; ++ audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0", ++ "TDMOUT_A IN 1", "FRDDR_B OUT 0", ++ "TDMOUT_A IN 2", "FRDDR_C OUT 0", ++ "TDM_A Playback", "TDMOUT_A OUT", ++ "TDMIN_A IN 0", "TDM_A Capture", ++ "TDMIN_A IN 13", "TDM_A Loopback", ++ "TODDR_A IN 0", "TDMIN_A OUT", ++ "TODDR_B IN 0", "TDMIN_A OUT", ++ "TODDR_C IN 0", "TDMIN_A OUT"; ++ }; + }; + + &cpu0 { +@@ -89,13 +102,12 @@ + status = "okay"; + }; + +-&sd_emmc_a { +- sd-uhs-sdr50; +-}; +- + &usb { + phys = <&usb2_phy0>, <&usb2_phy1>; + phy-names = "usb2-phy0", "usb2-phy1"; + }; + */ + ++&sd_emmc_a { ++ sd-uhs-sdr50; ++}; +diff --git a/arch/arm/dts/meson-sm1-odroid-c4.dts b/arch/arm/dts/meson-sm1-odroid-c4.dts +index cf5a98f0e4..8c30ce6368 100644 +--- a/arch/arm/dts/meson-sm1-odroid-c4.dts ++++ b/arch/arm/dts/meson-sm1-odroid-c4.dts +@@ -5,34 +5,12 @@ + + /dts-v1/; + +-#include "meson-sm1.dtsi" +-#include +-#include +-#include ++#include "meson-sm1-odroid.dtsi" + + / { + compatible = "hardkernel,odroid-c4", "amlogic,sm1"; + model = "Hardkernel ODROID-C4"; + +- aliases { +- serial0 = &uart_AO; +- ethernet0 = ðmac; +- }; +- +- chosen { +- stdout-path = "serial0:115200n8"; +- }; +- +- memory@0 { +- device_type = "memory"; +- reg = <0x0 0x0 0x0 0x40000000>; +- }; +- +- emmc_pwrseq: emmc-pwrseq { +- compatible = "mmc-pwrseq-emmc"; +- reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>; +- }; +- + leds { + compatible = "gpio-leds"; + +@@ -45,324 +23,19 @@ + }; + }; + +- tflash_vdd: regulator-tflash_vdd { +- compatible = "regulator-fixed"; +- +- regulator-name = "TFLASH_VDD"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- +- gpio = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>; +- enable-active-high; +- regulator-always-on; +- }; +- +- tf_io: gpio-regulator-tf_io { +- compatible = "regulator-gpio"; +- +- regulator-name = "TF_IO"; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <3300000>; +- +- gpios = <&gpio_ao GPIOAO_6 GPIO_ACTIVE_HIGH>; +- gpios-states = <0>; +- +- states = <3300000 0>, +- <1800000 1>; +- }; +- +- flash_1v8: regulator-flash_1v8 { +- compatible = "regulator-fixed"; +- regulator-name = "FLASH_1V8"; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <1800000>; +- vin-supply = <&vcc_3v3>; +- regulator-always-on; +- }; +- +- main_12v: regulator-main_12v { +- compatible = "regulator-fixed"; +- regulator-name = "12V"; +- regulator-min-microvolt = <12000000>; +- regulator-max-microvolt = <12000000>; +- regulator-always-on; +- }; +- +- vcc_5v: regulator-vcc_5v { +- compatible = "regulator-fixed"; +- regulator-name = "5V"; +- regulator-min-microvolt = <5000000>; +- regulator-max-microvolt = <5000000>; +- regulator-always-on; +- vin-supply = <&main_12v>; +- }; +- +- vcc_1v8: regulator-vcc_1v8 { +- compatible = "regulator-fixed"; +- regulator-name = "VCC_1V8"; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <1800000>; +- vin-supply = <&vcc_3v3>; +- regulator-always-on; +- }; +- +- vcc_3v3: regulator-vcc_3v3 { +- compatible = "regulator-fixed"; +- regulator-name = "VCC_3V3"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- vin-supply = <&vddao_3v3>; +- regulator-always-on; +- /* FIXME: actually controlled by VDDCPU_B_EN */ +- }; +- +- vddcpu: regulator-vddcpu { +- /* +- * MP8756GD Regulator. +- */ +- compatible = "pwm-regulator"; +- +- regulator-name = "VDDCPU"; +- regulator-min-microvolt = <721000>; +- regulator-max-microvolt = <1022000>; +- +- vin-supply = <&main_12v>; +- +- pwms = <&pwm_AO_cd 1 1250 0>; +- pwm-dutycycle-range = <100 0>; +- +- regulator-boot-on; +- regulator-always-on; +- }; +- +- hub_5v: regulator-hub_5v { +- compatible = "regulator-fixed"; +- regulator-name = "HUB_5V"; +- regulator-min-microvolt = <5000000>; +- regulator-max-microvolt = <5000000>; +- vin-supply = <&vcc_5v>; +- +- /* Connected to the Hub CHIPENABLE, LOW sets low power state */ +- gpio = <&gpio GPIOH_4 GPIO_ACTIVE_HIGH>; +- enable-active-high; +- }; +- +- usb_pwr_en: regulator-usb_pwr_en { +- compatible = "regulator-fixed"; +- regulator-name = "USB_PWR_EN"; +- regulator-min-microvolt = <5000000>; +- regulator-max-microvolt = <5000000>; +- vin-supply = <&vcc_5v>; +- +- /* Connected to the microUSB port power enable */ +- gpio = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>; +- enable-active-high; +- }; +- +- vddao_1v8: regulator-vddao_1v8 { +- compatible = "regulator-fixed"; +- regulator-name = "VDDAO_1V8"; +- regulator-min-microvolt = <1800000>; +- regulator-max-microvolt = <1800000>; +- vin-supply = <&vddao_3v3>; +- regulator-always-on; +- }; +- +- vddao_3v3: regulator-vddao_3v3 { +- compatible = "regulator-fixed"; +- regulator-name = "VDDAO_3V3"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- vin-supply = <&main_12v>; +- regulator-always-on; +- }; +- +- hdmi-connector { +- compatible = "hdmi-connector"; +- type = "a"; +- +- port { +- hdmi_connector_in: endpoint { +- remote-endpoint = <&hdmi_tx_tmds_out>; +- }; +- }; +- }; +- + sound { +- compatible = "amlogic,axg-sound-card"; +- model = "SM1-ODROID-C4"; +- audio-aux-devs = <&tdmout_b>; +- audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1", +- "TDMOUT_B IN 1", "FRDDR_B OUT 1", +- "TDMOUT_B IN 2", "FRDDR_C OUT 1", +- "TDM_B Playback", "TDMOUT_B OUT"; +- +- assigned-clocks = <&clkc CLKID_MPLL2>, +- <&clkc CLKID_MPLL0>, +- <&clkc CLKID_MPLL1>; +- assigned-clock-parents = <0>, <0>, <0>; +- assigned-clock-rates = <294912000>, +- <270950400>, +- <393216000>; +- status = "okay"; +- +- dai-link-0 { +- sound-dai = <&frddr_a>; +- }; +- +- dai-link-1 { +- sound-dai = <&frddr_b>; +- }; +- +- dai-link-2 { +- sound-dai = <&frddr_c>; +- }; +- +- /* 8ch hdmi interface */ +- dai-link-3 { +- sound-dai = <&tdmif_b>; +- dai-format = "i2s"; +- dai-tdm-slot-tx-mask-0 = <1 1>; +- dai-tdm-slot-tx-mask-1 = <1 1>; +- dai-tdm-slot-tx-mask-2 = <1 1>; +- dai-tdm-slot-tx-mask-3 = <1 1>; +- mclk-fs = <256>; +- +- codec { +- sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>; +- }; +- }; +- +- /* hdmi glue */ +- dai-link-4 { +- sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>; +- +- codec { +- sound-dai = <&hdmi_tx>; +- }; +- }; +- }; +-}; +- +-&arb { +- status = "okay"; +-}; +- +-&clkc_audio { +- status = "okay"; +-}; +- +-&cpu0 { +- cpu-supply = <&vddcpu>; +- operating-points-v2 = <&cpu_opp_table>; +- clocks = <&clkc CLKID_CPU_CLK>; +- clock-latency = <50000>; +-}; +- +-&cpu1 { +- cpu-supply = <&vddcpu>; +- operating-points-v2 = <&cpu_opp_table>; +- clocks = <&clkc CLKID_CPU1_CLK>; +- clock-latency = <50000>; +-}; +- +-&cpu2 { +- cpu-supply = <&vddcpu>; +- operating-points-v2 = <&cpu_opp_table>; +- clocks = <&clkc CLKID_CPU2_CLK>; +- clock-latency = <50000>; +-}; +- +-&cpu3 { +- cpu-supply = <&vddcpu>; +- operating-points-v2 = <&cpu_opp_table>; +- clocks = <&clkc CLKID_CPU3_CLK>; +- clock-latency = <50000>; +-}; +- +-&ext_mdio { +- external_phy: ethernet-phy@0 { +- /* Realtek RTL8211F (0x001cc916) */ +- reg = <0>; +- max-speed = <1000>; +- +- interrupt-parent = <&gpio_intc>; +- /* MAC_INTR on GPIOZ_14 */ +- interrupts = <26 IRQ_TYPE_LEVEL_LOW>; ++ model = "ODROID-C4"; + }; + }; + +-ðmac { +- pinctrl-0 = <ð_pins>, <ð_rgmii_pins>; +- pinctrl-names = "default"; +- status = "okay"; +- phy-mode = "rgmii"; +- phy-handle = <&external_phy>; +- amlogic,tx-delay-ns = <2>; +-}; +- +-&frddr_a { +- status = "okay"; +-}; +- +-&frddr_b { +- status = "okay"; +-}; +- +-&frddr_c { +- status = "okay"; +-}; +- + &gpio { +- gpio-line-names = +- /* GPIOZ */ +- "", "", "", "", "", "", "", "", +- "", "", "", "", "", "", "", "", +- /* GPIOH */ +- "", "", "", "", "", +- "PIN_36", /* GPIOH_5 */ +- "PIN_26", /* GPIOH_6 */ +- "PIN_32", /* GPIOH_7 */ +- "", +- /* BOOT */ +- "", "", "", "", "", "", "", "", +- "", "", "", "", "", "", "", "", +- /* GPIOC */ +- "", "", "", "", "", "", "", "", +- /* GPIOA */ +- "", "", "", "", "", "", "", "", +- "", "", "", "", "", "", +- "PIN_27", /* GPIOA_14 */ +- "PIN_28", /* GPIOA_15 */ +- /* GPIOX */ +- "PIN_16", /* GPIOX_0 */ +- "PIN_18", /* GPIOX_1 */ +- "PIN_22", /* GPIOX_2 */ +- "PIN_11", /* GPIOX_3 */ +- "PIN_13", /* GPIOX_4 */ +- "PIN_7", /* GPIOX_5 */ +- "PIN_33", /* GPIOX_6 */ +- "PIN_15", /* GPIOX_7 */ +- "PIN_19", /* GPIOX_8 */ +- "PIN_21", /* GPIOX_9 */ +- "PIN_24", /* GPIOX_10 */ +- "PIN_23", /* GPIOX_11 */ +- "PIN_8", /* GPIOX_12 */ +- "PIN_10", /* GPIOX_13 */ +- "PIN_29", /* GPIOX_14 */ +- "PIN_31", /* GPIOX_15 */ +- "PIN_12", /* GPIOX_16 */ +- "PIN_3", /* GPIOX_17 */ +- "PIN_5", /* GPIOX_18 */ +- "PIN_35"; /* GPIOX_19 */ +- + /* + * WARNING: The USB Hub on the Odroid-C4 needs a reset signal + * to be turned high in order to be detected by the USB Controller + * This signal should be handled by a USB specific power sequence + * in order to reset the Hub when USB bus is powered down. + */ +- usb-hub { ++ hog-0 { + gpio-hog; + gpios = ; + output-high; +@@ -370,121 +43,6 @@ + }; + }; + +-&gpio_ao { +- gpio-line-names = +- /* GPIOAO */ +- "", "", "", "", +- "PIN_47", /* GPIOAO_4 */ +- "", "", +- "PIN_45", /* GPIOAO_7 */ +- "PIN_46", /* GPIOAO_8 */ +- "PIN_44", /* GPIOAO_9 */ +- "PIN_42", /* GPIOAO_10 */ +- "", +- /* GPIOE */ +- "", "", ""; +-}; +- +-&hdmi_tx { +- status = "okay"; +- pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>; +- pinctrl-names = "default"; +- hdmi-supply = <&vcc_5v>; +-}; +- +-&hdmi_tx_tmds_port { +- hdmi_tx_tmds_out: endpoint { +- remote-endpoint = <&hdmi_connector_in>; +- }; +-}; +- + &ir { +- status = "okay"; +- pinctrl-0 = <&remote_input_ao_pins>; +- pinctrl-names = "default"; + linux,rc-map-name = "rc-odroid"; + }; +- +-&pwm_AO_cd { +- pinctrl-0 = <&pwm_ao_d_e_pins>; +- pinctrl-names = "default"; +- clocks = <&xtal>; +- clock-names = "clkin1"; +- status = "okay"; +-}; +- +-&saradc { +- status = "okay"; +-}; +- +-/* SD card */ +-&sd_emmc_b { +- status = "okay"; +- pinctrl-0 = <&sdcard_c_pins>; +- pinctrl-1 = <&sdcard_clk_gate_c_pins>; +- pinctrl-names = "default", "clk-gate"; +- +- bus-width = <4>; +- cap-sd-highspeed; +- max-frequency = <200000000>; +- sd-uhs-sdr12; +- sd-uhs-sdr25; +- sd-uhs-sdr50; +- sd-uhs-sdr104; +- disable-wp; +- +- cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>; +- vmmc-supply = <&tflash_vdd>; +- vqmmc-supply = <&tf_io>; +-}; +- +-/* eMMC */ +-&sd_emmc_c { +- status = "okay"; +- pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>; +- pinctrl-1 = <&emmc_clk_gate_pins>; +- pinctrl-names = "default", "clk-gate"; +- +- bus-width = <8>; +- cap-mmc-highspeed; +- mmc-ddr-1_8v; +- mmc-hs200-1_8v; +- max-frequency = <200000000>; +- disable-wp; +- +- mmc-pwrseq = <&emmc_pwrseq>; +- vmmc-supply = <&vcc_3v3>; +- vqmmc-supply = <&flash_1v8>; +-}; +- +-&tdmif_b { +- status = "okay"; +-}; +- +-&tdmout_b { +- status = "okay"; +-}; +- +-&tohdmitx { +- status = "okay"; +-}; +- +-&uart_AO { +- status = "okay"; +- pinctrl-0 = <&uart_ao_a_pins>; +- pinctrl-names = "default"; +-}; +- +-&usb { +- status = "okay"; +- vbus-supply = <&usb_pwr_en>; +-}; +- +-&usb2_phy0 { +- phy-supply = <&vcc_5v>; +-}; +- +-&usb2_phy1 { +- /* Enable the hub which is connected to this port */ +- phy-supply = <&hub_5v>; +-}; +diff --git a/arch/arm/dts/meson-sm1-odroid-hc4.dts b/arch/arm/dts/meson-sm1-odroid-hc4.dts +new file mode 100644 +index 0000000000..f3f953225b +--- /dev/null ++++ b/arch/arm/dts/meson-sm1-odroid-hc4.dts +@@ -0,0 +1,140 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2020 Dongjin Kim ++ */ ++ ++/dts-v1/; ++ ++#include "meson-sm1-odroid.dtsi" ++ ++/ { ++ compatible = "hardkernel,odroid-hc4", "amlogic,sm1"; ++ model = "Hardkernel ODROID-HC4"; ++ ++ aliases { ++ rtc0 = &rtc; ++ rtc1 = &vrtc; ++ }; ++ ++ fan0: pwm-fan { ++ compatible = "pwm-fan"; ++ #cooling-cells = <2>; ++ cooling-min-state = <0>; ++ cooling-max-state = <3>; ++ cooling-levels = <0 120 170 220>; ++ pwms = <&pwm_cd 1 40000 0>; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ led-blue { ++ color = ; ++ function = LED_FUNCTION_STATUS; ++ gpios = <&gpio_ao GPIOAO_11 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "heartbeat"; ++ panic-indicator; ++ }; ++ ++ led-red { ++ color = ; ++ function = LED_FUNCTION_POWER; ++ gpios = <&gpio_ao GPIOAO_7 GPIO_ACTIVE_HIGH>; ++ default-state = "on"; ++ }; ++ }; ++ ++ /* Powers the SATA Disk 0 regulator, which is enabled when a disk load is detected */ ++ p12v_0: regulator-p12v_0 { ++ compatible = "regulator-fixed"; ++ regulator-name = "P12V_0"; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ vin-supply = <&main_12v>; ++ ++ gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>; ++ enable-active-high; ++ regulator-always-on; ++ }; ++ ++ /* Powers the SATA Disk 1 regulator, which is enabled when a disk load is detected */ ++ p12v_1: regulator-p12v_1 { ++ compatible = "regulator-fixed"; ++ regulator-name = "P12V_1"; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ vin-supply = <&main_12v>; ++ ++ gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>; ++ enable-active-high; ++ regulator-always-on; ++ }; ++ ++ sound { ++ model = "ODROID-HC4"; ++ }; ++}; ++ ++&cpu_thermal { ++ cooling-maps { ++ map { ++ trip = <&cpu_passive>; ++ cooling-device = <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; ++ }; ++ }; ++}; ++ ++&ir { ++ linux,rc-map-name = "rc-odroid"; ++}; ++ ++&i2c2 { ++ status = "okay"; ++ pinctrl-0 = <&i2c2_sda_x_pins>, <&i2c2_sck_x_pins>; ++ pinctrl-names = "default"; ++ ++ rtc: rtc@51 { ++ status = "okay"; ++ compatible = "nxp,pcf8563"; ++ reg = <0x51>; ++ wakeup-source; ++ }; ++}; ++ ++&pcie { ++ status = "okay"; ++ reset-gpios = <&gpio GPIOH_4 GPIO_ACTIVE_LOW>; ++}; ++ ++&pwm_cd { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwm_d_x6_pins>; ++}; ++ ++&sd_emmc_c { ++ status = "disabled"; ++}; ++ ++&spifc { ++ status = "okay"; ++ pinctrl-0 = <&nor_pins>; ++ pinctrl-names = "default"; ++ ++ spi-flash@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "jedec,spi-nor"; ++ reg = <0>; ++ spi-max-frequency = <104000000>; ++ }; ++}; ++ ++&usb { ++ phys = <&usb2_phy1>; ++ phy-names = "usb2-phy1"; ++}; ++ ++&usb2_phy0 { ++ status = "disabled"; ++}; +diff --git a/arch/arm/dts/meson-sm1-odroid.dtsi b/arch/arm/dts/meson-sm1-odroid.dtsi +new file mode 100644 +index 0000000000..fd0ad85c16 +--- /dev/null ++++ b/arch/arm/dts/meson-sm1-odroid.dtsi +@@ -0,0 +1,449 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2020 Dongjin Kim ++ */ ++ ++#include "meson-sm1.dtsi" ++#include ++#include ++#include ++ ++/ { ++ aliases { ++ serial0 = &uart_AO; ++ ethernet0 = ðmac; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ memory@0 { ++ device_type = "memory"; ++ reg = <0x0 0x0 0x0 0x40000000>; ++ }; ++ ++ emmc_pwrseq: emmc-pwrseq { ++ compatible = "mmc-pwrseq-emmc"; ++ reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>; ++ }; ++ ++ tflash_vdd: regulator-tflash_vdd { ++ compatible = "regulator-fixed"; ++ ++ regulator-name = "TFLASH_VDD"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ ++ gpio = <&gpio_ao GPIOAO_3 GPIO_OPEN_DRAIN>; ++ enable-active-high; ++ regulator-always-on; ++ }; ++ ++ tf_io: gpio-regulator-tf_io { ++ compatible = "regulator-gpio"; ++ ++ regulator-name = "TF_IO"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc_5v>; ++ ++ enable-gpio = <&gpio GPIOE_2 GPIO_ACTIVE_HIGH>; ++ enable-active-high; ++ regulator-always-on; ++ ++ gpios = <&gpio_ao GPIOAO_6 GPIO_OPEN_SOURCE>; ++ gpios-states = <0>; ++ ++ states = <3300000 0>, ++ <1800000 1>; ++ }; ++ ++ flash_1v8: regulator-flash_1v8 { ++ compatible = "regulator-fixed"; ++ regulator-name = "FLASH_1V8"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&vcc_3v3>; ++ regulator-always-on; ++ }; ++ ++ main_12v: regulator-main_12v { ++ compatible = "regulator-fixed"; ++ regulator-name = "12V"; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ regulator-always-on; ++ }; ++ ++ vcc_5v: regulator-vcc_5v { ++ compatible = "regulator-fixed"; ++ regulator-name = "5V"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-always-on; ++ vin-supply = <&main_12v>; ++ gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>; ++ enable-active-high; ++ }; ++ ++ vcc_1v8: regulator-vcc_1v8 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VCC_1V8"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&vcc_3v3>; ++ regulator-always-on; ++ }; ++ ++ vcc_3v3: regulator-vcc_3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VCC_3V3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vddao_3v3>; ++ regulator-always-on; ++ /* FIXME: actually controlled by VDDCPU_B_EN */ ++ }; ++ ++ vddcpu: regulator-vddcpu { ++ /* ++ * MP8756GD Regulator. ++ */ ++ compatible = "pwm-regulator"; ++ ++ regulator-name = "VDDCPU"; ++ regulator-min-microvolt = <721000>; ++ regulator-max-microvolt = <1022000>; ++ ++ vin-supply = <&main_12v>; ++ ++ pwms = <&pwm_AO_cd 1 1250 0>; ++ pwm-dutycycle-range = <100 0>; ++ ++ regulator-boot-on; ++ regulator-always-on; ++ }; ++ ++ usb_pwr_en: regulator-usb_pwr_en { ++ compatible = "regulator-fixed"; ++ regulator-name = "USB_PWR_EN"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc_5v>; ++ ++ /* Connected to the microUSB port power enable */ ++ gpio = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_HIGH>; ++ enable-active-high; ++ }; ++ ++ vddao_1v8: regulator-vddao_1v8 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VDDAO_1V8"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&vddao_3v3>; ++ regulator-always-on; ++ }; ++ ++ vddao_3v3: regulator-vddao_3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VDDAO_3V3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&main_12v>; ++ regulator-always-on; ++ }; ++ ++ hdmi-connector { ++ compatible = "hdmi-connector"; ++ type = "a"; ++ ++ port { ++ hdmi_connector_in: endpoint { ++ remote-endpoint = <&hdmi_tx_tmds_out>; ++ }; ++ }; ++ }; ++ ++ sound { ++ compatible = "amlogic,axg-sound-card"; ++ audio-aux-devs = <&tdmout_b>; ++ audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1", ++ "TDMOUT_B IN 1", "FRDDR_B OUT 1", ++ "TDMOUT_B IN 2", "FRDDR_C OUT 1", ++ "TDM_B Playback", "TDMOUT_B OUT"; ++ ++ assigned-clocks = <&clkc CLKID_MPLL2>, ++ <&clkc CLKID_MPLL0>, ++ <&clkc CLKID_MPLL1>; ++ assigned-clock-parents = <0>, <0>, <0>; ++ assigned-clock-rates = <294912000>, ++ <270950400>, ++ <393216000>; ++ status = "okay"; ++ ++ dai-link-0 { ++ sound-dai = <&frddr_a>; ++ }; ++ ++ dai-link-1 { ++ sound-dai = <&frddr_b>; ++ }; ++ ++ dai-link-2 { ++ sound-dai = <&frddr_c>; ++ }; ++ ++ /* 8ch hdmi interface */ ++ dai-link-3 { ++ sound-dai = <&tdmif_b>; ++ dai-format = "i2s"; ++ dai-tdm-slot-tx-mask-0 = <1 1>; ++ dai-tdm-slot-tx-mask-1 = <1 1>; ++ dai-tdm-slot-tx-mask-2 = <1 1>; ++ dai-tdm-slot-tx-mask-3 = <1 1>; ++ mclk-fs = <256>; ++ ++ codec { ++ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>; ++ }; ++ }; ++ ++ /* hdmi glue */ ++ dai-link-4 { ++ sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>; ++ ++ codec { ++ sound-dai = <&hdmi_tx>; ++ }; ++ }; ++ }; ++}; ++ ++&arb { ++ status = "okay"; ++}; ++ ++&clkc_audio { ++ status = "okay"; ++}; ++ ++&cpu0 { ++ cpu-supply = <&vddcpu>; ++ operating-points-v2 = <&cpu_opp_table>; ++ clocks = <&clkc CLKID_CPU_CLK>; ++ clock-latency = <50000>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&vddcpu>; ++ operating-points-v2 = <&cpu_opp_table>; ++ clocks = <&clkc CLKID_CPU1_CLK>; ++ clock-latency = <50000>; ++}; ++ ++&cpu2 { ++ cpu-supply = <&vddcpu>; ++ operating-points-v2 = <&cpu_opp_table>; ++ clocks = <&clkc CLKID_CPU2_CLK>; ++ clock-latency = <50000>; ++}; ++ ++&cpu3 { ++ cpu-supply = <&vddcpu>; ++ operating-points-v2 = <&cpu_opp_table>; ++ clocks = <&clkc CLKID_CPU3_CLK>; ++ clock-latency = <50000>; ++}; ++ ++&ext_mdio { ++ external_phy: ethernet-phy@0 { ++ /* Realtek RTL8211F (0x001cc916) */ ++ reg = <0>; ++ max-speed = <1000>; ++ ++ interrupt-parent = <&gpio_intc>; ++ /* MAC_INTR on GPIOZ_14 */ ++ interrupts = <26 IRQ_TYPE_LEVEL_LOW>; ++ }; ++}; ++ ++ðmac { ++ pinctrl-0 = <ð_pins>, <ð_rgmii_pins>; ++ pinctrl-names = "default"; ++ status = "okay"; ++ phy-mode = "rgmii"; ++ phy-handle = <&external_phy>; ++ amlogic,tx-delay-ns = <2>; ++}; ++ ++&frddr_a { ++ status = "okay"; ++}; ++ ++&frddr_b { ++ status = "okay"; ++}; ++ ++&frddr_c { ++ status = "okay"; ++}; ++ ++&gpio { ++ gpio-line-names = ++ /* GPIOZ */ ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", ++ /* GPIOH */ ++ "", "", "", "", "", ++ "PIN_36", /* GPIOH_5 */ ++ "PIN_26", /* GPIOH_6 */ ++ "PIN_32", /* GPIOH_7 */ ++ "", ++ /* BOOT */ ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", ++ /* GPIOC */ ++ "", "", "", "", "", "", "", "", ++ /* GPIOA */ ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", ++ "PIN_27", /* GPIOA_14 */ ++ "PIN_28", /* GPIOA_15 */ ++ /* GPIOX */ ++ "PIN_16", /* GPIOX_0 */ ++ "PIN_18", /* GPIOX_1 */ ++ "PIN_22", /* GPIOX_2 */ ++ "PIN_11", /* GPIOX_3 */ ++ "PIN_13", /* GPIOX_4 */ ++ "PIN_7", /* GPIOX_5 */ ++ "PIN_33", /* GPIOX_6 */ ++ "PIN_15", /* GPIOX_7 */ ++ "PIN_19", /* GPIOX_8 */ ++ "PIN_21", /* GPIOX_9 */ ++ "PIN_24", /* GPIOX_10 */ ++ "PIN_23", /* GPIOX_11 */ ++ "PIN_8", /* GPIOX_12 */ ++ "PIN_10", /* GPIOX_13 */ ++ "PIN_29", /* GPIOX_14 */ ++ "PIN_31", /* GPIOX_15 */ ++ "PIN_12", /* GPIOX_16 */ ++ "PIN_3", /* GPIOX_17 */ ++ "PIN_5", /* GPIOX_18 */ ++ "PIN_35"; /* GPIOX_19 */ ++}; ++ ++&gpio_ao { ++ gpio-line-names = ++ /* GPIOAO */ ++ "", "", "", "", ++ "PIN_47", /* GPIOAO_4 */ ++ "", "", ++ "PIN_45", /* GPIOAO_7 */ ++ "PIN_46", /* GPIOAO_8 */ ++ "PIN_44", /* GPIOAO_9 */ ++ "PIN_42", /* GPIOAO_10 */ ++ "", ++ /* GPIOE */ ++ "", "", ""; ++}; ++ ++&hdmi_tx { ++ status = "okay"; ++ pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>; ++ pinctrl-names = "default"; ++ hdmi-supply = <&vcc_5v>; ++}; ++ ++&hdmi_tx_tmds_port { ++ hdmi_tx_tmds_out: endpoint { ++ remote-endpoint = <&hdmi_connector_in>; ++ }; ++}; ++ ++&ir { ++ status = "okay"; ++ pinctrl-0 = <&remote_input_ao_pins>; ++ pinctrl-names = "default"; ++}; ++ ++&pwm_AO_cd { ++ pinctrl-0 = <&pwm_ao_d_e_pins>; ++ pinctrl-names = "default"; ++ clocks = <&xtal>; ++ clock-names = "clkin1"; ++ status = "okay"; ++}; ++ ++&saradc { ++ status = "okay"; ++}; ++ ++/* SD card */ ++&sd_emmc_b { ++ status = "okay"; ++ pinctrl-0 = <&sdcard_c_pins>; ++ pinctrl-1 = <&sdcard_clk_gate_c_pins>; ++ pinctrl-names = "default", "clk-gate"; ++ ++ bus-width = <4>; ++ cap-sd-highspeed; ++ max-frequency = <200000000>; ++ sd-uhs-sdr12; ++ sd-uhs-sdr25; ++ sd-uhs-sdr50; ++ sd-uhs-sdr104; ++ disable-wp; ++ ++ cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>; ++ vmmc-supply = <&tflash_vdd>; ++ vqmmc-supply = <&tf_io>; ++}; ++ ++/* eMMC */ ++&sd_emmc_c { ++ status = "okay"; ++ pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>; ++ pinctrl-1 = <&emmc_clk_gate_pins>; ++ pinctrl-names = "default", "clk-gate"; ++ ++ bus-width = <8>; ++ cap-mmc-highspeed; ++ mmc-ddr-1_8v; ++ mmc-hs200-1_8v; ++ max-frequency = <200000000>; ++ disable-wp; ++ ++ mmc-pwrseq = <&emmc_pwrseq>; ++ vmmc-supply = <&vcc_3v3>; ++ vqmmc-supply = <&flash_1v8>; ++}; ++ ++&tdmif_b { ++ status = "okay"; ++}; ++ ++&tdmout_b { ++ status = "okay"; ++}; ++ ++&tohdmitx { ++ status = "okay"; ++}; ++ ++&uart_AO { ++ status = "okay"; ++ pinctrl-0 = <&uart_ao_a_pins>; ++ pinctrl-names = "default"; ++}; ++ ++&usb { ++ status = "okay"; ++ vbus-supply = <&usb_pwr_en>; ++}; ++ ++&usb2_phy0 { ++ phy-supply = <&vcc_5v>; ++}; ++ +diff --git a/arch/arm/dts/meson-sm1-sei610.dts b/arch/arm/dts/meson-sm1-sei610.dts +index 5ab139a34c..2194a77897 100644 +--- a/arch/arm/dts/meson-sm1-sei610.dts ++++ b/arch/arm/dts/meson-sm1-sei610.dts +@@ -101,20 +101,20 @@ + }; + }; + +- leds { ++ led-controller-1 { + compatible = "gpio-leds"; + +- led-bluetooth { ++ led-1 { + label = "sei610:blue:bt"; + gpios = <&gpio GPIOC_7 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; + default-state = "off"; + }; + }; + +- pwmleds { ++ led-controller-2 { + compatible = "pwm-leds"; + +- power { ++ led-2 { + label = "sei610:red:power"; + pwms = <&pwm_AO_ab 0 30518 0>; + max-brightness = <255>; +@@ -220,7 +220,7 @@ + + sound { + compatible = "amlogic,axg-sound-card"; +- model = "SM1-SEI610"; ++ model = "SEI610"; + audio-aux-devs = <&tdmout_a>, <&tdmout_b>, + <&tdmin_a>, <&tdmin_b>; + audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0", +diff --git a/arch/arm/dts/meson-sm1.dtsi b/arch/arm/dts/meson-sm1.dtsi +index 71317f5aad..3d8b1f4f20 100644 +--- a/arch/arm/dts/meson-sm1.dtsi ++++ b/arch/arm/dts/meson-sm1.dtsi +@@ -130,7 +130,7 @@ + opp-microvolt = <790000>; + }; + +- opp-1512000000 { ++ opp-1500000000 { + opp-hz = /bits/ 64 <1500000000>; + opp-microvolt = <800000>; + }; +@@ -401,6 +401,16 @@ + status = "disabled"; + }; + ++ toacodec: audio-controller@740 { ++ compatible = "amlogic,sm1-toacodec", ++ "amlogic,g12a-toacodec"; ++ reg = <0x0 0x740 0x0 0x4>; ++ #sound-dai-cells = <1>; ++ sound-name-prefix = "TOACODEC"; ++ resets = <&clkc_audio AUD_RESET_TOACODEC>; ++ status = "disabled"; ++ }; ++ + tohdmitx: audio-controller@744 { + compatible = "amlogic,sm1-tohdmitx", + "amlogic,g12a-tohdmitx"; +diff --git a/include/dt-bindings/clock/axg-clkc.h b/include/dt-bindings/clock/axg-clkc.h +index fd1f938c38..93752ea107 100644 +--- a/include/dt-bindings/clock/axg-clkc.h ++++ b/include/dt-bindings/clock/axg-clkc.h +@@ -70,7 +70,31 @@ + #define CLKID_HIFI_PLL 69 + #define CLKID_PCIE_CML_EN0 79 + #define CLKID_PCIE_CML_EN1 80 +-#define CLKID_MIPI_ENABLE 81 + #define CLKID_GEN_CLK 84 ++#define CLKID_VPU_0_SEL 92 ++#define CLKID_VPU_0 93 ++#define CLKID_VPU_1_SEL 95 ++#define CLKID_VPU_1 96 ++#define CLKID_VPU 97 ++#define CLKID_VAPB_0_SEL 99 ++#define CLKID_VAPB_0 100 ++#define CLKID_VAPB_1_SEL 102 ++#define CLKID_VAPB_1 103 ++#define CLKID_VAPB_SEL 104 ++#define CLKID_VAPB 105 ++#define CLKID_VCLK 106 ++#define CLKID_VCLK2 107 ++#define CLKID_VCLK_DIV1 122 ++#define CLKID_VCLK_DIV2 123 ++#define CLKID_VCLK_DIV4 124 ++#define CLKID_VCLK_DIV6 125 ++#define CLKID_VCLK_DIV12 126 ++#define CLKID_VCLK2_DIV1 127 ++#define CLKID_VCLK2_DIV2 128 ++#define CLKID_VCLK2_DIV4 129 ++#define CLKID_VCLK2_DIV6 130 ++#define CLKID_VCLK2_DIV12 131 ++#define CLKID_CTS_ENCL 133 ++#define CLKID_VDIN_MEAS 136 + + #endif /* __AXG_CLKC_H */ +diff --git a/include/dt-bindings/clock/g12a-clkc.h b/include/dt-bindings/clock/g12a-clkc.h +index 40d49940d8..a93b58c5e1 100644 +--- a/include/dt-bindings/clock/g12a-clkc.h ++++ b/include/dt-bindings/clock/g12a-clkc.h +@@ -147,5 +147,7 @@ + #define CLKID_SPICC1_SCLK 261 + #define CLKID_NNA_AXI_CLK 264 + #define CLKID_NNA_CORE_CLK 267 ++#define CLKID_MIPI_DSI_PXCLK_SEL 269 ++#define CLKID_MIPI_DSI_PXCLK 270 + + #endif /* __G12A_CLKC_H */ +-- +2.33.0 + diff --git a/patch/u-boot/u-boot-meson64/0001-Add-support-for-Radxa-Zero.patch b/patch/u-boot/u-boot-meson64/0005-SQUASHED-Add-Radxa-Zero-support-for-2021.07-from-chewitt-tree.patch similarity index 57% rename from patch/u-boot/u-boot-meson64/0001-Add-support-for-Radxa-Zero.patch rename to patch/u-boot/u-boot-meson64/0005-SQUASHED-Add-Radxa-Zero-support-for-2021.07-from-chewitt-tree.patch index 963ceb988..526b3b6f5 100644 --- a/patch/u-boot/u-boot-meson64/0001-Add-support-for-Radxa-Zero.patch +++ b/patch/u-boot/u-boot-meson64/0005-SQUASHED-Add-Radxa-Zero-support-for-2021.07-from-chewitt-tree.patch @@ -1,38 +1,28 @@ -From cda2a9f4f2bc6eae3b98d84c7fe119ba730070de Mon Sep 17 00:00:00 2001 -From: Jack Ma -Date: Wed, 11 Aug 2021 16:26:25 +0800 -Subject: [PATCH] Add support for Radxa Zero +From b84b18403b347970773018a30eb720108ed499d9 Mon Sep 17 00:00:00 2001 +From: Ricardo Pardini +Date: Sun, 19 Sep 2021 13:18:54 +0200 +Subject: [CHEWITT] SQUASHED: Add Radxa Zero support for 2021.07 (from chewitt + tree) -Signed-off-by: Jack Ma ---- - arch/arm/dts/Makefile | 1 + - .../arm/dts/meson-g12a-radxa-zero-u-boot.dtsi | 7 + - arch/arm/dts/meson-g12a-radxa-zero.dts | 537 ++++++++++++++++++ - board/amlogic/radxa-zero/Makefile | 6 + - board/amlogic/radxa-zero/radxa-zero.c | 24 + - configs/radxa-zero_defconfig | 90 +++ - 6 files changed, 665 insertions(+) - create mode 100644 arch/arm/dts/meson-g12a-radxa-zero-u-boot.dtsi - create mode 100644 arch/arm/dts/meson-g12a-radxa-zero.dts - create mode 100644 board/amlogic/radxa-zero/Makefile - create mode 100644 board/amlogic/radxa-zero/radxa-zero.c - create mode 100644 configs/radxa-zero_defconfig +- FROMLIST(v1): boards: amlogic: add Radxa Zero defconfig +- FROMLIST(v1): ARM: dts: add support for Radxa Zero +- FROMGIT: ARM: meson: Add S905Y2 SOC ID diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile -index c6710826..809ecd0e 100644 +index 9fb38682e6..88c73be03f 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -168,6 +168,7 @@ dtb-$(CONFIG_ARCH_MESON) += \ + meson-gxm-khadas-vim2.dtb \ + meson-gxm-s912-libretech-pc.dtb \ meson-gxm-wetek-core2.dtb \ ++ meson-g12a-radxa-zero.dtb \ meson-axg-s400.dtb \ meson-g12a-u200.dtb \ -+ meson-g12a-radxa-zero.dtb \ meson-g12a-sei510.dtb \ - meson-g12b-gtking.dtb \ - meson-g12b-gtking-pro.dtb \ diff --git a/arch/arm/dts/meson-g12a-radxa-zero-u-boot.dtsi b/arch/arm/dts/meson-g12a-radxa-zero-u-boot.dtsi new file mode 100644 -index 00000000..236f2468 +index 0000000000..236f2468dc --- /dev/null +++ b/arch/arm/dts/meson-g12a-radxa-zero-u-boot.dtsi @@ -0,0 +1,7 @@ @@ -45,20 +35,18 @@ index 00000000..236f2468 +#include "meson-g12-common-u-boot.dtsi" diff --git a/arch/arm/dts/meson-g12a-radxa-zero.dts b/arch/arm/dts/meson-g12a-radxa-zero.dts new file mode 100644 -index 00000000..9345d63f +index 0000000000..e3bb6df42f --- /dev/null +++ b/arch/arm/dts/meson-g12a-radxa-zero.dts -@@ -0,0 +1,537 @@ +@@ -0,0 +1,405 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* -+ * Copyright (c) 2019 BayLibre SAS. All rights reserved. ++ * Copyright (c) 2018 BayLibre SAS. All rights reserved. + */ + +/dts-v1/; + +#include "meson-g12a.dtsi" -+#include -+#include +#include +#include + @@ -66,46 +54,28 @@ index 00000000..9345d63f + compatible = "radxa,zero", "amlogic,g12a"; + model = "Radxa Zero"; + -+ adc_keys { -+ compatible = "adc-keys"; -+ io-channels = <&saradc 0>; -+ io-channel-names = "buttons"; -+ keyup-threshold-microvolt = <1800000>; -+ -+ button-onoff { -+ label = "On/Off"; -+ linux,code = ; -+ press-threshold-microvolt = <1700000>; -+ }; -+ }; -+ + aliases { + serial0 = &uart_AO; + }; + -+ mono_dac: audio-codec-0 { -+ compatible = "maxim,max98357a"; -+ #sound-dai-cells = <0>; -+ sound-name-prefix = "U16"; -+ sdmode-gpios = <&gpio GPIOX_8 GPIO_ACTIVE_HIGH>; -+ }; -+ -+ dmics: audio-codec-1 { -+ #sound-dai-cells = <0>; -+ compatible = "dmic-codec"; -+ num-channels = <2>; -+ wakeup-delay-ms = <50>; -+ status = "okay"; -+ sound-name-prefix = "MIC"; -+ }; -+ + chosen { + stdout-path = "serial0:115200n8"; + }; + -+ emmc_pwrseq: emmc-pwrseq { -+ compatible = "mmc-pwrseq-emmc"; -+ reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>; ++ memory@0 { ++ device_type = "memory"; ++ reg = <0x0 0x0 0x0 0x40000000>; ++ }; ++ ++ cvbs-connector { ++ status = "disabled"; ++ compatible = "composite-video-connector"; ++ ++ port { ++ cvbs_connector_in: endpoint { ++ remote-endpoint = <&cvbs_vdac_out>; ++ }; ++ }; + }; + + hdmi-connector { @@ -119,9 +89,16 @@ index 00000000..9345d63f + }; + }; + -+ memory@0 { -+ device_type = "memory"; -+ reg = <0x0 0x0 0x0 0x40000000>; ++ emmc_pwrseq: emmc-pwrseq { ++ compatible = "mmc-pwrseq-emmc"; ++ reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>; ++ }; ++ ++ sdio_pwrseq: sdio-pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; ++ clocks = <&wifi32k>; ++ clock-names = "ext_clock"; + }; + + ao_5v: regulator-ao_5v { @@ -129,21 +106,39 @@ index 00000000..9345d63f + regulator-name = "AO_5V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; -+ vin-supply = <&dc_in>; + regulator-always-on; + }; + -+ dc_in: regulator-dc_in { ++ vcc_1v8: regulator-vcc_1v8 { + compatible = "regulator-fixed"; -+ regulator-name = "DC_IN"; ++ regulator-name = "VCC_1V8"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&vcc_3v3>; ++ regulator-always-on; ++ }; ++ ++ vcc_3v3: regulator-vcc_3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "VCC_3V3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vddao_3v3>; ++ regulator-always-on; ++ }; ++ ++ hdmi_pw: regulator-hdmi_pw { ++ compatible = "regulator-fixed"; ++ regulator-name = "HDMI_PW"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; ++ vin-supply = <&ao_5v>; + regulator-always-on; + }; + -+ emmc_1v8: regulator-emmc_1v8 { ++ vddao_1v8: regulator-vddao_1v8 { + compatible = "regulator-fixed"; -+ regulator-name = "EMMC_1V8"; ++ regulator-name = "VDDAO_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vddao_3v3>; @@ -155,31 +150,18 @@ index 00000000..9345d63f + regulator-name = "VDDAO_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; -+ vin-supply = <&dc_in>; ++ vin-supply = <&ao_5v>; + regulator-always-on; + }; + -+ vddao_3v3_t: regultor-vddao_3v3_t { -+ compatible = "regulator-fixed"; -+ regulator-name = "VDDAO_3V3_T"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ vin-supply = <&vddao_3v3>; -+ gpio = <&gpio GPIOH_8 GPIO_OPEN_DRAIN>; -+ enable-active-high; -+ }; -+ + vddcpu: regulator-vddcpu { -+ /* -+ * SY8120B1ABC DC/DC Regulator. -+ */ + compatible = "pwm-regulator"; + + regulator-name = "VDDCPU"; + regulator-min-microvolt = <721000>; + regulator-max-microvolt = <1022000>; + -+ vin-supply = <&dc_in>; ++ vin-supply = <&ao_5v>; + + pwms = <&pwm_AO_cd 1 1250 0>; + pwm-dutycycle-range = <100 0>; @@ -188,67 +170,14 @@ index 00000000..9345d63f + regulator-always-on; + }; + -+ vddio_ao1v8: regulator-vddio_ao1v8 { -+ compatible = "regulator-fixed"; -+ regulator-name = "VDDIO_AO1V8"; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ vin-supply = <&vddao_3v3>; -+ regulator-always-on; -+ }; -+ -+ reserved-memory { -+ /* TEE Reserved Memory */ -+ bl32_reserved: bl32@5000000 { -+ reg = <0x0 0x05300000 0x0 0x2000000>; -+ no-map; -+ }; -+ }; -+ -+ sdio_pwrseq: sdio-pwrseq { -+ compatible = "mmc-pwrseq-simple"; -+ reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>; -+ clocks = <&wifi32k>; -+ clock-names = "ext_clock"; -+ }; -+ -+ wifi32k: wifi32k { -+ compatible = "pwm-clock"; -+ #clock-cells = <0>; -+ clock-frequency = <32768>; -+ pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ -+ }; -+ + sound { + compatible = "amlogic,axg-sound-card"; -+ model = "G12A-SEI510"; -+ audio-aux-devs = <&tdmout_a>, <&tdmout_b>, -+ <&tdmin_a>, <&tdmin_b>; -+ audio-routing = "TDMOUT_A IN 0", "FRDDR_A OUT 0", -+ "TDMOUT_A IN 1", "FRDDR_B OUT 0", -+ "TDMOUT_A IN 2", "FRDDR_C OUT 0", -+ "TDM_A Playback", "TDMOUT_A OUT", -+ "TDMOUT_B IN 0", "FRDDR_A OUT 1", ++ model = "RADXA-ZERO"; ++ audio-aux-devs = <&tdmout_b>; ++ audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1", + "TDMOUT_B IN 1", "FRDDR_B OUT 1", + "TDMOUT_B IN 2", "FRDDR_C OUT 1", -+ "TDM_B Playback", "TDMOUT_B OUT", -+ "TODDR_A IN 4", "PDM Capture", -+ "TODDR_B IN 4", "PDM Capture", -+ "TODDR_C IN 4", "PDM Capture", -+ "TDMIN_A IN 0", "TDM_A Capture", -+ "TDMIN_A IN 3", "TDM_A Loopback", -+ "TDMIN_B IN 0", "TDM_A Capture", -+ "TDMIN_B IN 3", "TDM_A Loopback", -+ "TDMIN_A IN 1", "TDM_B Capture", -+ "TDMIN_A IN 4", "TDM_B Loopback", -+ "TDMIN_B IN 1", "TDM_B Capture", -+ "TDMIN_B IN 4", "TDM_B Loopback", -+ "TODDR_A IN 0", "TDMIN_A OUT", -+ "TODDR_B IN 0", "TDMIN_A OUT", -+ "TODDR_C IN 0", "TDMIN_A OUT", -+ "TODDR_A IN 1", "TDMIN_B OUT", -+ "TODDR_B IN 1", "TDMIN_B OUT", -+ "TODDR_C IN 1", "TDMIN_B OUT"; ++ "TDM_B Playback", "TDMOUT_B OUT"; + + assigned-clocks = <&clkc CLKID_MPLL2>, + <&clkc CLKID_MPLL0>, @@ -271,36 +200,8 @@ index 00000000..9345d63f + sound-dai = <&frddr_c>; + }; + -+ dai-link-3 { -+ sound-dai = <&toddr_a>; -+ }; -+ -+ dai-link-4 { -+ sound-dai = <&toddr_b>; -+ }; -+ -+ dai-link-5 { -+ sound-dai = <&toddr_c>; -+ }; -+ -+ /* internal speaker interface */ -+ dai-link-6 { -+ sound-dai = <&tdmif_a>; -+ dai-format = "i2s"; -+ dai-tdm-slot-tx-mask-0 = <1 1>; -+ mclk-fs = <256>; -+ -+ codec-0 { -+ sound-dai = <&mono_dac>; -+ }; -+ -+ codec-1 { -+ sound-dai = <&tohdmitx TOHDMITX_I2S_IN_A>; -+ }; -+ }; -+ + /* 8ch hdmi interface */ -+ dai-link-7 { ++ dai-link-3 { + sound-dai = <&tdmif_b>; + dai-format = "i2s"; + dai-tdm-slot-tx-mask-0 = <1 1>; @@ -314,17 +215,7 @@ index 00000000..9345d63f + }; + }; + -+ /* internal digital mics */ -+ dai-link-8 { -+ sound-dai = <&pdm>; -+ -+ codec { -+ sound-dai = <&dmics>; -+ }; -+ }; -+ -+ /* hdmi glue */ -+ dai-link-9 { ++ dai-link-4 { + sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>; + + codec { @@ -332,6 +223,13 @@ index 00000000..9345d63f + }; + }; + }; ++ ++ wifi32k: wifi32k { ++ compatible = "pwm-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <32768>; ++ pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */ ++ }; +}; + +&arb { @@ -384,6 +282,12 @@ index 00000000..9345d63f + clock-latency = <50000>; +}; + ++&cvbs_vdac_port { ++ cvbs_vdac_out: endpoint { ++ remote-endpoint = <&cvbs_connector_in>; ++ }; ++}; ++ +&frddr_a { + status = "okay"; +}; @@ -400,6 +304,7 @@ index 00000000..9345d63f + status = "okay"; + pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>; + pinctrl-names = "default"; ++ hdmi-supply = <&hdmi_pw>; +}; + +&hdmi_tx_tmds_port { @@ -408,9 +313,9 @@ index 00000000..9345d63f + }; +}; + -+&i2c3 { -+ status = "okay"; -+ pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>; ++&ir { ++ status = "disabled"; ++ pinctrl-0 = <&remote_input_ao_pins>; + pinctrl-names = "default"; +}; + @@ -430,17 +335,9 @@ index 00000000..9345d63f + clock-names = "clkin0"; +}; + -+&pdm { -+ pinctrl-0 = <&pdm_din0_z_pins>, <&pdm_din1_z_pins>, -+ <&pdm_din2_z_pins>, <&pdm_din3_z_pins>, -+ <&pdm_dclk_z_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+}; -+ +&saradc { + status = "okay"; -+ vref-supply = <&vddio_ao1v8>; ++ vref-supply = <&vddao_1v8>; +}; + +/* SDIO */ @@ -466,7 +363,7 @@ index 00000000..9345d63f + mmc-pwrseq = <&sdio_pwrseq>; + + vmmc-supply = <&vddao_3v3>; -+ vqmmc-supply = <&vddio_ao1v8>; ++ vqmmc-supply = <&vddao_1v8>; + + brcmf: wifi@1 { + reg = <1>; @@ -483,7 +380,7 @@ index 00000000..9345d63f + + bus-width = <4>; + cap-sd-highspeed; -+ max-frequency = <50000000>; ++ max-frequency = <100000000>; + disable-wp; + + cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>; @@ -503,58 +400,21 @@ index 00000000..9345d63f + mmc-ddr-1_8v; + mmc-hs200-1_8v; + max-frequency = <200000000>; -+ non-removable; + disable-wp; + + mmc-pwrseq = <&emmc_pwrseq>; -+ vmmc-supply = <&vddao_3v3>; -+ vqmmc-supply = <&emmc_1v8>; -+}; -+ -+&tdmif_a { -+ pinctrl-0 = <&tdm_a_dout0_pins>, <&tdm_a_fs_pins>, <&tdm_a_sclk_pins>; -+ pinctrl-names = "default"; -+ status = "okay"; -+ -+ assigned-clocks = <&clkc_audio AUD_CLKID_TDM_SCLK_PAD0>, -+ <&clkc_audio AUD_CLKID_TDM_LRCLK_PAD0>; -+ assigned-clock-parents = <&clkc_audio AUD_CLKID_MST_A_SCLK>, -+ <&clkc_audio AUD_CLKID_MST_A_LRCLK>; -+ assigned-clock-rates = <0>, <0>; ++ vmmc-supply = <&vcc_3v3>; ++ vqmmc-supply = <&vcc_1v8>; +}; + +&tdmif_b { + status = "okay"; +}; + -+&tdmin_a { -+ status = "okay"; -+}; -+ -+&tdmin_b { -+ status = "okay"; -+}; -+ -+&tdmout_a { -+ status = "okay"; -+}; -+ +&tdmout_b { + status = "okay"; +}; + -+&toddr_a { -+ status = "okay"; -+}; -+ -+&toddr_b { -+ status = "okay"; -+}; -+ -+&toddr_c { -+ status = "okay"; -+}; -+ +&tohdmitx { + status = "okay"; +}; @@ -571,8 +431,6 @@ index 00000000..9345d63f + max-speed = <2000000>; + clocks = <&wifi32k>; + clock-names = "lpo"; -+ vbat-supply = <&vddao_3v3>; -+ vddio-supply = <&vddio_ao1v8>; + }; +}; + @@ -586,107 +444,60 @@ index 00000000..9345d63f + status = "okay"; + dr_mode = "host"; +}; -diff --git a/board/amlogic/radxa-zero/Makefile b/board/amlogic/radxa-zero/Makefile -new file mode 100644 -index 00000000..9dd34804 ---- /dev/null -+++ b/board/amlogic/radxa-zero/Makefile -@@ -0,0 +1,6 @@ -+# SPDX-License-Identifier: GPL-2.0+ -+# -+# (C) Copyright 2021 Radxa Limited -+# Author: Jack Ma -+ -+obj-y := radxa-zero.o -diff --git a/board/amlogic/radxa-zero/radxa-zero.c b/board/amlogic/radxa-zero/radxa-zero.c -new file mode 100644 -index 00000000..a2c23d62 ---- /dev/null -+++ b/board/amlogic/radxa-zero/radxa-zero.c -@@ -0,0 +1,24 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright (C) 2021 Radxa Limited -+ * Author: Jack Ma -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+int misc_init_r(void) -+{ -+ env_set("serial#", "AMLG12A-RADXA-ZERO"); -+ -+ return 0; -+} +diff --git a/arch/arm/mach-meson/board-info.c b/arch/arm/mach-meson/board-info.c +index d16d3f194d..2421acd817 100644 +--- a/arch/arm/mach-meson/board-info.c ++++ b/arch/arm/mach-meson/board-info.c +@@ -64,6 +64,7 @@ static const struct meson_gx_package_id { + { "A113X", 0x25, 0x37, 0xff }, + { "A113D", 0x25, 0x22, 0xff }, + { "S905D2", 0x28, 0x10, 0xf0 }, ++ { "S905Y2", 0x28, 0x30, 0xf0 }, + { "S905X2", 0x28, 0x40, 0xf0 }, + { "A311D", 0x29, 0x10, 0xf0 }, + { "S922X", 0x29, 0x40, 0xf0 }, diff --git a/configs/radxa-zero_defconfig b/configs/radxa-zero_defconfig new file mode 100644 -index 00000000..5c253f09 +index 0000000000..acd13f1c6b --- /dev/null +++ b/configs/radxa-zero_defconfig -@@ -0,0 +1,90 @@ +@@ -0,0 +1,70 @@ +CONFIG_ARM=y -+CONFIG_SYS_BOARD="radxa-zero" +CONFIG_ARCH_MESON=y +CONFIG_SYS_TEXT_BASE=0x01000000 +CONFIG_NR_DRAM_BANKS=1 -+CONFIG_ENV_SIZE=0x10000 -+CONFIG_ENV_OFFSET=0xFFFF0000 ++CONFIG_ENV_SIZE=0x2000 +CONFIG_DM_GPIO=y ++CONFIG_DEFAULT_DEVICE_TREE="meson-g12a-radxa-zero" +CONFIG_MESON_G12A=y +CONFIG_DEBUG_UART_BASE=0xff803000 +CONFIG_DEBUG_UART_CLOCK=24000000 -+CONFIG_IDENT_STRING=" radxazero" -+# CONFIG_PSCI_RESET is not set -+CONFIG_DEFAULT_DEVICE_TREE="meson-g12a-radxa-zero" ++CONFIG_IDENT_STRING=" radxa-zero" +CONFIG_DEBUG_UART=y +CONFIG_OF_BOARD_SETUP=y -+CONFIG_USE_PREBOOT=y -+CONFIG_PREBOOT="run load_logo" -+# CONFIG_CONSOLE_MUX is not set +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_MISC_INIT_R=y -+CONFIG_AVB_VERIFY=y +# CONFIG_CMD_BDI is not set -+CONFIG_CMD_ADTIMG=y -+CONFIG_CMD_ABOOTIMG=y +# CONFIG_CMD_IMI is not set -+CONFIG_CMD_BCB=y +CONFIG_CMD_GPIO=y -+CONFIG_CMD_GPT=y +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +CONFIG_CMD_USB_MASS_STORAGE=y +# CONFIG_CMD_SETEXPR is not set -+CONFIG_CMD_BMP=y +CONFIG_CMD_REGULATOR=y -+CONFIG_CMD_AVB=y +CONFIG_OF_CONTROL=y -+CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y -+CONFIG_SYS_MMC_ENV_DEV=2 -+CONFIG_SYS_MMC_ENV_PART=1 -+CONFIG_NET_RANDOM_ETHADDR=y -+CONFIG_USB_FUNCTION_FASTBOOT=y -+CONFIG_FASTBOOT_BUF_ADDR=0x6000000 -+CONFIG_FASTBOOT_FLASH=y -+CONFIG_FASTBOOT_FLASH_CUSTOM=y -+CONFIG_FASTBOOT_FLASH_MMC_DEV=2 -+CONFIG_FASTBOOT_CMD_OEM_FORMAT=y -+# CONFIG_INPUT is not set -+CONFIG_DM_MMC=y ++# CONFIG_NET_RANDOM_ETHADDR is not set +CONFIG_MMC_MESON_GX=y -+# CONFIG_NETDEVICES is not set ++CONFIG_MTD=y ++CONFIG_DM_MTD=y ++# CONFIG_PHY_REALTEK is not set ++# CONFIG_DM_ETH is not set ++CONFIG_DM_MDIO=y ++CONFIG_DM_MDIO_MUX=y ++# CONFIG_ETH_DESIGNWARE_MESON8B is not set ++CONFIG_MDIO_MUX_MESON_G12A=y +CONFIG_MESON_G12A_USB_PHY=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_MESON_G12A=y @@ -705,11 +516,13 @@ index 00000000..5c253f09 +CONFIG_USB_DWC3=y +# CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_DWC3_MESON_G12A=y ++CONFIG_USB_KEYBOARD=y +CONFIG_USB_GADGET=y -+CONFIG_USB_GADGET_VENDOR_NUM=0x18d1 ++CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e +CONFIG_USB_GADGET_PRODUCT_NUM=0xfada +CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y ++CONFIG_USB_GADGET_DOWNLOAD=y +CONFIG_DM_VIDEO=y +# CONFIG_VIDEO_BPP8 is not set +# CONFIG_VIDEO_BPP16 is not set @@ -718,12 +531,7 @@ index 00000000..5c253f09 +CONFIG_VIDEO_DT_SIMPLEFB=y +CONFIG_SPLASH_SCREEN=y +CONFIG_SPLASH_SCREEN_ALIGN=y -+CONFIG_VIDEO_BMP_RLE8=y -+CONFIG_BMP_16BPP=y -+CONFIG_BMP_24BPP=y -+CONFIG_BMP_32BPP=y -+CONFIG_LIBAVB=y +CONFIG_OF_LIBFDT_OVERLAY=y -- -2.25.1 +2.33.0 diff --git a/patch/u-boot/u-boot-meson64/0006-SQUASHED-Support-for-ODROID-HC4-with-SPI-NOR-chip-and-SATA-booting.patch b/patch/u-boot/u-boot-meson64/0006-SQUASHED-Support-for-ODROID-HC4-with-SPI-NOR-chip-and-SATA-booting.patch new file mode 100644 index 000000000..1e2f6172e --- /dev/null +++ b/patch/u-boot/u-boot-meson64/0006-SQUASHED-Support-for-ODROID-HC4-with-SPI-NOR-chip-and-SATA-booting.patch @@ -0,0 +1,226 @@ +From 249acc18e674f8750c2ff2473e23f9c11a6abdaf Mon Sep 17 00:00:00 2001 +From: Ricardo Pardini +Date: Sun, 19 Sep 2021 13:26:27 +0200 +Subject: [CHEWITT] SQUASHED: Support for ODROID HC4, with SPI-NOR chip and + SATA booting + +- WIP: boards: amlogic: add SPI/SPIFC support to Odroid-HC4 +- FROMLIST(v1): ARM: amlogic: add support for Odroid-HC4 device +- FROMLIST(v1): distro_bootcmd: run pci enum for scsi_boot just like it is done for nvme_boot +- FROMLIST(v1): configs: meson64: add SCSI boot target +- FROMGIT: mtd: spi-nor-ids: Add XTX XT25F128B + +diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile +index 88c73be03f..e23e169bb8 100644 +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -179,6 +179,7 @@ dtb-$(CONFIG_ARCH_MESON) += \ + meson-g12b-a311d-khadas-vim3.dtb \ + meson-sm1-khadas-vim3l.dtb \ + meson-sm1-odroid-c4.dtb \ ++ meson-sm1-odroid-hc4.dtb \ + meson-sm1-sei610.dtb + dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \ + tegra20-medcom-wide.dtb \ +diff --git a/arch/arm/dts/meson-sm1-odroid-hc4-u-boot.dtsi b/arch/arm/dts/meson-sm1-odroid-hc4-u-boot.dtsi +new file mode 100644 +index 0000000000..963bf96b25 +--- /dev/null ++++ b/arch/arm/dts/meson-sm1-odroid-hc4-u-boot.dtsi +@@ -0,0 +1,23 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2020 BayLibre, SAS ++ * Author: Neil Armstrong ++ */ ++ ++#include "meson-sm1-u-boot.dtsi" ++ ++ðmac { ++ snps,reset-gpio = <&gpio GPIOZ_15 (GPIO_ACTIVE_LOW | GPIO_OPEN_DRAIN)>; ++ snps,reset-delays-us = <0 10000 1000000>; ++ snps,reset-active-low; ++}; ++ ++/* SARADC is needed for proper board variant detection */ ++&saradc { ++ status = "okay"; ++ vref-supply = <&vddao_1v8>; ++}; ++ ++&tflash_vdd { ++ gpio = <&gpio_ao GPIOAO_3 GPIO_OPEN_DRAIN>; ++}; +diff --git a/configs/odroid-hc4_defconfig b/configs/odroid-hc4_defconfig +new file mode 100644 +index 0000000000..c900624a06 +--- /dev/null ++++ b/configs/odroid-hc4_defconfig +@@ -0,0 +1,95 @@ ++CONFIG_ARM=y ++CONFIG_SYS_BOARD="odroid-n2" ++CONFIG_ARCH_MESON=y ++CONFIG_SYS_TEXT_BASE=0x01000000 ++CONFIG_NR_DRAM_BANKS=1 ++CONFIG_ENV_SIZE=0x2000 ++CONFIG_DM_GPIO=y ++CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-odroid-hc4" ++CONFIG_MESON_G12A=y ++CONFIG_DEBUG_UART_BASE=0xff803000 ++CONFIG_DEBUG_UART_CLOCK=24000000 ++CONFIG_IDENT_STRING=" odroid-hc4" ++CONFIG_DEBUG_UART=y ++CONFIG_AHCI=y ++CONFIG_OF_BOARD_SETUP=y ++# CONFIG_DISPLAY_CPUINFO is not set ++CONFIG_MISC_INIT_R=y ++# CONFIG_CMD_BDI is not set ++# CONFIG_CMD_IMI is not set ++CONFIG_CMD_GPIO=y ++# CONFIG_CMD_LOADS is not set ++CONFIG_CMD_MMC=y ++CONFIG_CMD_PCI=y ++CONFIG_CMD_SPI=y ++CONFIG_CMD_USB=y ++CONFIG_CMD_USB_MASS_STORAGE=y ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_REGULATOR=y ++CONFIG_OF_CONTROL=y ++CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_NET_RANDOM_ETHADDR=y ++CONFIG_ADC=y ++CONFIG_SARADC_MESON=y ++CONFIG_SATA=y ++CONFIG_SCSI_AHCI=y ++CONFIG_AHCI_PCI=y ++CONFIG_DM_MMC=y ++CONFIG_MMC_MESON_GX=y ++CONFIG_MTD=y ++CONFIG_DM_MTD=y ++CONFIG_DM_SPI_FLASH=y ++CONFIG_SPI_FLASH_XTX=y ++CONFIG_PHY_REALTEK=y ++CONFIG_DM_ETH=y ++CONFIG_DM_MDIO=y ++CONFIG_DM_MDIO_MUX=y ++CONFIG_ETH_DESIGNWARE_MESON8B=y ++CONFIG_MDIO_MUX_MESON_G12A=y ++CONFIG_PCI=y ++CONFIG_PCIE_DW_MESON=y ++CONFIG_MESON_G12A_USB_PHY=y ++CONFIG_PINCTRL=y ++CONFIG_PINCTRL_MESON_G12A=y ++CONFIG_POWER_DOMAIN=y ++CONFIG_MESON_EE_POWER_DOMAIN=y ++CONFIG_DM_REGULATOR=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_DM_REGULATOR_GPIO=y ++CONFIG_DM_RESET=y ++CONFIG_SCSI=y ++CONFIG_DM_SCSI=y ++CONFIG_DEBUG_UART_ANNOUNCE=y ++CONFIG_DEBUG_UART_SKIP_INIT=y ++CONFIG_MESON_SERIAL=y ++CONFIG_SPI=y ++CONFIG_DM_SPI=y ++CONFIG_MESON_SPIFC=y ++CONFIG_DM_USB=y ++CONFIG_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y ++CONFIG_USB_DWC3=y ++# CONFIG_USB_DWC3_GADGET is not set ++CONFIG_USB_DWC3_MESON_G12A=y ++CONFIG_USB_KEYBOARD=y ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_VENDOR_NUM=0x1b8e ++CONFIG_USB_GADGET_PRODUCT_NUM=0xfada ++CONFIG_USB_GADGET_DWC2_OTG=y ++CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8=y ++CONFIG_USB_GADGET_DOWNLOAD=y ++CONFIG_DM_VIDEO=y ++# CONFIG_VIDEO_BPP8 is not set ++# CONFIG_VIDEO_BPP16 is not set ++CONFIG_SYS_WHITE_ON_BLACK=y ++CONFIG_VIDEO_MESON=y ++CONFIG_VIDEO_DT_SIMPLEFB=y ++CONFIG_SPLASH_SCREEN=y ++CONFIG_SPLASH_SCREEN_ALIGN=y ++CONFIG_VIDEO_BMP_RLE8=y ++CONFIG_BMP_16BPP=y ++CONFIG_BMP_24BPP=y ++CONFIG_BMP_32BPP=y ++CONFIG_OF_LIBFDT_OVERLAY=y ++CONFIG_DM_PCI=y +diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig +index f8db8e5213..8c797d1e03 100644 +--- a/drivers/mtd/spi/Kconfig ++++ b/drivers/mtd/spi/Kconfig +@@ -162,6 +162,12 @@ config SPI_FLASH_XMC + Add support for various XMC (Wuhan Xinxin Semiconductor + Manufacturing Corp.) SPI flash chips (XM25xxx) + ++config SPI_FLASH_XTX ++ bool "XTX SPI flash support" ++ help ++ Add support for various XTX (XTX Technology Limited) ++ SPI flash chips (XT25xxx). ++ + endif + + config SPI_FLASH_USE_4K_SECTORS +diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c +index 2b57797954..d772b73a53 100644 +--- a/drivers/mtd/spi/spi-nor-ids.c ++++ b/drivers/mtd/spi/spi-nor-ids.c +@@ -336,6 +336,10 @@ const struct flash_info spi_nor_ids[] = { + /* XMC (Wuhan Xinxin Semiconductor Manufacturing Corp.) */ + { INFO("XM25QH64A", 0x207017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { INFO("XM25QH128A", 0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, ++#endif ++#ifdef CONFIG_SPI_FLASH_XTX ++ /* XTX Technology (Shenzhen) Limited */ ++ { INFO("xt25f128b", 0x0b4018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + #endif + { }, + }; +diff --git a/include/config_distro_bootcmd.h b/include/config_distro_bootcmd.h +index 2627c2a6a5..f4f6fa8f8a 100644 +--- a/include/config_distro_bootcmd.h ++++ b/include/config_distro_bootcmd.h +@@ -226,6 +226,7 @@ + "fi\0" \ + \ + "scsi_boot=" \ ++ BOOTENV_RUN_PCI_ENUM \ + BOOTENV_RUN_SCSI_INIT \ + BOOTENV_SHARED_BLKDEV_BODY(scsi) + #define BOOTENV_DEV_SCSI BOOTENV_DEV_BLKDEV +diff --git a/include/configs/meson64.h b/include/configs/meson64.h +index 6224722941..0f8b7ecb18 100644 +--- a/include/configs/meson64.h ++++ b/include/configs/meson64.h +@@ -64,6 +64,12 @@ + #define BOOT_TARGET_NVME(func) + #endif + ++#ifdef CONFIG_CMD_SCSI ++ #define BOOT_TARGET_SCSI(func) func(SCSI, scsi, 0) ++#else ++ #define BOOT_TARGET_SCSI(func) ++#endif ++ + #ifndef BOOT_TARGET_DEVICES + #define BOOT_TARGET_DEVICES(func) \ + func(ROMUSB, romusb, na) \ +@@ -72,6 +78,7 @@ + func(MMC, mmc, 2) \ + BOOT_TARGET_DEVICES_USB(func) \ + BOOT_TARGET_NVME(func) \ ++ BOOT_TARGET_SCSI(func) \ + func(PXE, pxe, na) \ + func(DHCP, dhcp, na) + #endif +-- +2.33.0 +