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Fixed tinker-edgr-r board GPU bug, drivers:regulator:fan53555:add new device chip id (#6998)
This commit is contained in:
@@ -1,24 +0,0 @@
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diff --git a/drivers/regulator/fan53555.c b/drivers/regulator/fan53555.c
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index 48f312167..40d8607a3 100644
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--- a/drivers/regulator/fan53555.c
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+++ b/drivers/regulator/fan53555.c
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@@ -113,6 +113,7 @@ enum {
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enum {
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FAN53555_CHIP_REV_00 = 0x3,
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FAN53555_CHIP_REV_13 = 0xf,
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+ FAN53555_CHIP_REV_23 = 0xc,
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};
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enum {
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@@ -301,6 +302,11 @@ static int fan53555_voltages_setup_fairchild(struct fan53555_device_info *di)
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di->vsel_min = 800000;
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di->vsel_step = 10000;
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break;
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+ case FAN53555_CHIP_REV_23:
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+ dev_info(di->dev, "setup fairchild REV_23 vsel\n");
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+ di->vsel_min = 600000;
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+ di->vsel_step = 12500;
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+ break;
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default:
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dev_err(di->dev,
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"Chip ID %d with rev %d not supported!\n",
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@@ -0,0 +1,44 @@
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From b95c594a0969e469ef627c3e1724566dc5aa3016 Mon Sep 17 00:00:00 2001
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From: ARC-MX <wmx129674@126.com>
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Date: Thu, 25 Jul 2024 17:44:54 +0800
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Subject: [PATCH] drivers:regulator:fan53555:add new device chip id
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drivers:regulator:fan53555
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When I use fan53555, I see an error:
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FAN53555-regulator 0-0060: Chip ID 0 with rev 12 not supported!
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So I fixed this bug
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Signed-off-by: ARC-MX <wmx129674@126.com>
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---
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drivers/regulator/fan53555.c | 5 +++++
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1 file changed, 5 insertions(+)
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diff --git a/drivers/regulator/fan53555.c b/drivers/regulator/fan53555.c
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index 17c9bf204..c8a2e9405 100644
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--- a/drivers/regulator/fan53555.c
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+++ b/drivers/regulator/fan53555.c
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@@ -113,6 +113,7 @@ enum {
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enum {
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FAN53555_CHIP_REV_00 = 0x3,
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FAN53555_CHIP_REV_13 = 0xf,
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+ FAN53555_CHIP_REV_23 = 0xc,
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};
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enum {
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@@ -301,6 +302,10 @@ static int fan53555_voltages_setup_fairchild(struct fan53555_device_info *di)
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di->vsel_min = 800000;
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di->vsel_step = 10000;
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break;
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+ case FAN53555_CHIP_REV_23:
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+ di->vsel_min = 600000;
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+ di->vsel_step = 12500;
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+ break;
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default:
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dev_err(di->dev,
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"Chip ID %d with rev %d not supported!\n",
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--
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2.25.1
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@@ -323,8 +323,8 @@
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&vopb {
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status = "okay";
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assigned-clocks = <&cru DCLK_VOP0_DIV>;
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assigned-clock-parents = <&cru PLL_VPLL>;
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// assigned-clocks = <&cru DCLK_VOP0_DIV>;
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// assigned-clock-parents = <&cru PLL_VPLL>;
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};
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&vopb_mmu {
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@@ -333,8 +333,8 @@
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&vopl {
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status = "okay";
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assigned-clocks = <&cru DCLK_VOP1_DIV>;
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assigned-clock-parents = <&cru PLL_CPLL>;
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// assigned-clocks = <&cru DCLK_VOP1_DIV>;
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// assigned-clock-parents = <&cru PLL_CPLL>;
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};
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&vopl_mmu {
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@@ -769,6 +769,12 @@
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};
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&pcie0 {
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pinctrl-0 = <&pcie_clkreqnb_cpm>;
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bus-scan-delay-ms = <0>;
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pinctrl-names = "default";
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vpcie0v9-supply = <&vcca0v9_s3>; /* VCC_0V9_S0 */
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vpcie1v8-supply = <&vcc1v8_s0>; /* VCC_1V8_S0 */
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vpcie3v3-supply = <&vccio_3v3>;
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status = "okay";
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};
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@@ -0,0 +1,44 @@
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From b95c594a0969e469ef627c3e1724566dc5aa3016 Mon Sep 17 00:00:00 2001
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From: ARC-MX <wmx129674@126.com>
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Date: Thu, 25 Jul 2024 17:44:54 +0800
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Subject: [PATCH] drivers:regulator:fan53555:add new device chip id
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drivers:regulator:fan53555
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When I use fan53555, I see an error:
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FAN53555-regulator 0-0060: Chip ID 0 with rev 12 not supported!
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So I fixed this bug
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Signed-off-by: ARC-MX <wmx129674@126.com>
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---
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drivers/regulator/fan53555.c | 5 +++++
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1 file changed, 5 insertions(+)
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diff --git a/drivers/regulator/fan53555.c b/drivers/regulator/fan53555.c
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index 17c9bf204..c8a2e9405 100644
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--- a/drivers/regulator/fan53555.c
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+++ b/drivers/regulator/fan53555.c
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@@ -113,6 +113,7 @@ enum {
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enum {
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FAN53555_CHIP_REV_00 = 0x3,
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FAN53555_CHIP_REV_13 = 0xf,
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+ FAN53555_CHIP_REV_23 = 0xc,
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};
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enum {
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@@ -301,6 +302,10 @@ static int fan53555_voltages_setup_fairchild(struct fan53555_device_info *di)
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di->vsel_min = 800000;
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di->vsel_step = 10000;
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break;
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+ case FAN53555_CHIP_REV_23:
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+ di->vsel_min = 600000;
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+ di->vsel_step = 12500;
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+ break;
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default:
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dev_err(di->dev,
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"Chip ID %d with rev %d not supported!\n",
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--
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2.25.1
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@@ -323,8 +323,8 @@
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&vopb {
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status = "okay";
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assigned-clocks = <&cru DCLK_VOP0_DIV>;
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assigned-clock-parents = <&cru PLL_VPLL>;
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// assigned-clocks = <&cru DCLK_VOP0_DIV>;
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// assigned-clock-parents = <&cru PLL_VPLL>;
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};
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&vopb_mmu {
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@@ -333,8 +333,8 @@
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&vopl {
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status = "okay";
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assigned-clocks = <&cru DCLK_VOP1_DIV>;
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assigned-clock-parents = <&cru PLL_CPLL>;
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// assigned-clocks = <&cru DCLK_VOP1_DIV>;
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// assigned-clock-parents = <&cru PLL_CPLL>;
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};
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&vopl_mmu {
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@@ -769,6 +769,12 @@
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};
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&pcie0 {
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pinctrl-0 = <&pcie_clkreqnb_cpm>;
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bus-scan-delay-ms = <0>;
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pinctrl-names = "default";
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vpcie0v9-supply = <&vcca0v9_s3>; /* VCC_0V9_S0 */
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vpcie1v8-supply = <&vcc1v8_s0>; /* VCC_1V8_S0 */
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vpcie3v3-supply = <&vccio_3v3>;
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status = "okay";
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};
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