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83 lines
2.8 KiB
Diff
83 lines
2.8 KiB
Diff
From bc7b1c3119fd74f4898d547849dffdfefccbcc06 Mon Sep 17 00:00:00 2001
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From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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Date: Sun, 20 Apr 2025 18:48:00 +0200
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Subject: [PATCH 14/55] FROMGIT(6.15): arm64: dts: amlogic: gx: fix reference
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to unknown/untested PWM clock
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Device-tree expects absent clocks to be specified as <0> (instead of
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using <>). This fixes using the FCLK4/FCLK3 clocks as they are now
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seen at their correct index (while before they were recognized, but at
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the correct index - resulting in the hardware using a different clock
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than what the kernel sees).
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Fixes: a526eeef9a81 ("arm64: dts: amlogic: gx: switch to the new PWM controller binding")
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Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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---
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arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 6 +++---
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arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 6 +++---
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2 files changed, 6 insertions(+), 6 deletions(-)
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diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
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index 8ebce7114a60..6c134592c7bb 100644
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--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
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+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
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@@ -741,7 +741,7 @@ mux {
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&pwm_ab {
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clocks = <&xtal>,
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- <>, /* unknown/untested, the datasheet calls it "vid_pll" */
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+ <0>, /* unknown/untested, the datasheet calls it "vid_pll" */
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<&clkc CLKID_FCLK_DIV4>,
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<&clkc CLKID_FCLK_DIV3>;
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};
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@@ -752,14 +752,14 @@ &pwm_AO_ab {
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&pwm_cd {
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clocks = <&xtal>,
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- <>, /* unknown/untested, the datasheet calls it "vid_pll" */
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+ <0>, /* unknown/untested, the datasheet calls it "vid_pll" */
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<&clkc CLKID_FCLK_DIV4>,
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<&clkc CLKID_FCLK_DIV3>;
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};
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&pwm_ef {
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clocks = <&xtal>,
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- <>, /* unknown/untested, the datasheet calls it "vid_pll" */
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+ <0>, /* unknown/untested, the datasheet calls it "vid_pll" */
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<&clkc CLKID_FCLK_DIV4>,
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<&clkc CLKID_FCLK_DIV3>;
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};
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diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
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index 2dc2fdaecf9f..19b8a39de6a0 100644
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--- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
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+++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
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@@ -811,7 +811,7 @@ internal_phy: ethernet-phy@8 {
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&pwm_ab {
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clocks = <&xtal>,
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- <>, /* unknown/untested, the datasheet calls it "vid_pll" */
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+ <0>, /* unknown/untested, the datasheet calls it "vid_pll" */
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<&clkc CLKID_FCLK_DIV4>,
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<&clkc CLKID_FCLK_DIV3>;
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};
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@@ -822,14 +822,14 @@ &pwm_AO_ab {
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&pwm_cd {
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clocks = <&xtal>,
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- <>, /* unknown/untested, the datasheet calls it "vid_pll" */
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+ <0>, /* unknown/untested, the datasheet calls it "vid_pll" */
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<&clkc CLKID_FCLK_DIV4>,
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<&clkc CLKID_FCLK_DIV3>;
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};
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&pwm_ef {
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clocks = <&xtal>,
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- <>, /* unknown/untested, the datasheet calls it "vid_pll" */
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+ <0>, /* unknown/untested, the datasheet calls it "vid_pll" */
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<&clkc CLKID_FCLK_DIV4>,
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<&clkc CLKID_FCLK_DIV3>;
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};
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--
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2.34.1
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