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31 lines
950 B
Diff
31 lines
950 B
Diff
From 59e0942f5cb2c61521bf740e6fcd1270072cf65a Mon Sep 17 00:00:00 2001
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From: Jonas Karlman <jonas@kwiboo.se>
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Date: Fri, 11 Jul 2025 22:44:34 +0000
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Subject: [PATCH 45/84] rockchip: clk: clk_rk3576: Add dummy CLK_REF_PCIEx_PHY
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support
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Add dummy support for the CLK_REF_PCIEx_PHY clocks to allow probe of the
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phy-rockchip-naneng-combphy driver on RK3576.
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Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
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---
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drivers/clk/rockchip/clk_rk3576.c | 2 ++
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1 file changed, 2 insertions(+)
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diff --git a/drivers/clk/rockchip/clk_rk3576.c b/drivers/clk/rockchip/clk_rk3576.c
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index e84a0943a94..125b08ee832 100644
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--- a/drivers/clk/rockchip/clk_rk3576.c
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+++ b/drivers/clk/rockchip/clk_rk3576.c
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@@ -2168,6 +2168,8 @@ static ulong rk3576_clk_set_rate(struct clk *clk, ulong rate)
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case CLK_CPLL_DIV10:
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case FCLK_DDR_CM0_CORE:
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case ACLK_PHP_ROOT:
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+ case CLK_REF_PCIE0_PHY:
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+ case CLK_REF_PCIE1_PHY:
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ret = 0;
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break;
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#ifndef CONFIG_SPL_BUILD
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--
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2.34.1
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