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48 lines
1.6 KiB
Diff
48 lines
1.6 KiB
Diff
From bbf94bdbe33c3644ae2172d723d3ae88a3c57a98 Mon Sep 17 00:00:00 2001
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From: Jonas Karlman <jonas@kwiboo.se>
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Date: Mon, 21 Jul 2025 22:07:18 +0000
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Subject: [PATCH 10/84] rockchip: rk3576: Disable USB3OTG0 U3 port early
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The RK3576 SoC comes with USB OTG support using a DWC3 controller with
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a USB2 PHY and a USB3 PHY (USBDP PHY).
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Some board designs may not use the USBDP PHY for USB3 purpose. For these
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board to use USB OTG the input clock source must change to use UTMI clk
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instead of PIPE clk.
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Change to always disable the USB3OTG0 U3 port early and leave it to the
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USBDP PHY driver to re-enable the U3 port when a usb3-phy is described
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in the board device tree.
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Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
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---
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arch/arm/mach-rockchip/rk3576/rk3576.c | 6 ++++++
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1 file changed, 6 insertions(+)
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diff --git a/arch/arm/mach-rockchip/rk3576/rk3576.c b/arch/arm/mach-rockchip/rk3576/rk3576.c
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index ba5c94b4b3d..dc53941ab2f 100644
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--- a/arch/arm/mach-rockchip/rk3576/rk3576.c
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+++ b/arch/arm/mach-rockchip/rk3576/rk3576.c
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@@ -29,6 +29,9 @@
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#define SGRF_DOMAIN_CON4 0x10
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#define SGRF_DOMAIN_CON5 0x14
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+#define USB_GRF_BASE 0x2601E000
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+#define USB3OTG0_CON1 0x0030
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+
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const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
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[BROM_BOOTSOURCE_EMMC] = "/soc/mmc@2a330000",
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[BROM_BOOTSOURCE_SD] = "/soc/mmc@2a310000",
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@@ -151,5 +154,8 @@ int arch_cpu_init(void)
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*/
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writel(0xffffff00, SYS_SGRF_BASE + SYS_SGRF_SOC_CON20);
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+ /* Disable USB3OTG0 U3 port, later enabled by USBDP PHY driver */
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+ writel(0xffff0188, USB_GRF_BASE + USB3OTG0_CON1);
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+
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return 0;
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}
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--
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2.34.1
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