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https://github.com/LibreELEC/LibreELEC.tv
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53 lines
2.2 KiB
Diff
53 lines
2.2 KiB
Diff
From d9207b2496fb9ddbcf0b874af6920bcf2371752b Mon Sep 17 00:00:00 2001
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From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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Date: Sun, 20 Apr 2025 18:48:01 +0200
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Subject: [PATCH 15/55] FROMGIT(6.15): arm64: dts: amlogic: g12: fix reference
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to unknown/untested PWM clock
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Device-tree expects absent clocks to be specified as <0> (instead of
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using <>). This fixes using the FCLK4/FCLK3 clocks as they are now
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seen at their correct index (while before they were recognized, but at
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the correct index - resulting in the hardware using a different clock
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than what the kernel sees).
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Fixes: e6884f2e4129 ("arm64: dts: amlogic: g12: switch to the new PWM controller binding")
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Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
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---
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arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 6 +++---
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1 file changed, 3 insertions(+), 3 deletions(-)
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diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
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index 9b6593555912..4b75b4d07901 100644
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--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
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+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
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@@ -2313,7 +2313,7 @@ pwm_ef: pwm@19000 {
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"amlogic,meson8-pwm-v2";
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reg = <0x0 0x19000 0x0 0x20>;
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clocks = <&xtal>,
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- <>, /* unknown/untested, the datasheet calls it "vid_pll" */
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+ <0>, /* unknown/untested, the datasheet calls it "vid_pll" */
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<&clkc CLKID_FCLK_DIV4>,
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<&clkc CLKID_FCLK_DIV3>;
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#pwm-cells = <3>;
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@@ -2325,7 +2325,7 @@ pwm_cd: pwm@1a000 {
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"amlogic,meson8-pwm-v2";
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reg = <0x0 0x1a000 0x0 0x20>;
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clocks = <&xtal>,
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- <>, /* unknown/untested, the datasheet calls it "vid_pll" */
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+ <0>, /* unknown/untested, the datasheet calls it "vid_pll" */
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<&clkc CLKID_FCLK_DIV4>,
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<&clkc CLKID_FCLK_DIV3>;
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#pwm-cells = <3>;
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@@ -2337,7 +2337,7 @@ pwm_ab: pwm@1b000 {
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"amlogic,meson8-pwm-v2";
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reg = <0x0 0x1b000 0x0 0x20>;
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clocks = <&xtal>,
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- <>, /* unknown/untested, the datasheet calls it "vid_pll" */
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+ <0>, /* unknown/untested, the datasheet calls it "vid_pll" */
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<&clkc CLKID_FCLK_DIV4>,
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<&clkc CLKID_FCLK_DIV3>;
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#pwm-cells = <3>;
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--
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2.34.1
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