From 4cf063b9621deec3436e85c08d59e9830fe344d3 Mon Sep 17 00:00:00 2001 From: Christian Hewitt Date: Fri, 19 Sep 2025 06:41:21 +0000 Subject: [PATCH 1/3] u-boot: bump Rockchip to 2025.10-rc4 and update patchset Signed-off-by: Christian Hewitt --- packages/tools/u-boot/package.mk | 4 +- ...ng-combphy-Enable-U3-port-for-USB3O.patch} | 8 +- ...p-inno-usb2-Fix-Synchronous-Abort-on.patch | 76 ------ ...dp-Fix-Generic-PHY-reference-countin.patch | 72 ----- ...3568-Disable-USB3OTG-U3-ports-early.patch} | 4 +- ...p_sdhci-Set-xx_TAP_VALUE-for-RK3528.patch} | 6 +- ...phy-rockchip-usbdp-Simplify-init-ops.patch | 134 ---------- ...-upstream-use-v6.17-rockchip-dts64-.patch} | 4 +- ...eng-combphy-Fix-Generic-PHY-referenc.patch | 37 --- ...hip-naneng-combphy-Simplify-init-ops.patch | 159 ----------- ...adxa-e20c-Drop-eMMC-HS200-prop-from.patch} | 4 +- ...-upstream-use-work-in-progress-RK35.patch} | 4 +- ...eng-combphy-Use-syscon_regmap_lookup.patch | 53 ---- ...o-usb2-Fix-improper-use-of-UCLASS_PH.patch | 35 --- ...eneric-Add-basic-support-for-USB-OT.patch} | 4 +- ...typec-Fix-improper-use-of-UCLASS_PHY.patch | 34 --- ...dd-support-for-booting-from-SPI-fla.patch} | 4 +- ...Allow-use-of-rx-tx-delayline-for-rg.patch} | 4 +- ...k3588-Disable-USB3OTG-U3-ports-early.patch | 50 ---- ...Use-CRU-as-default-TX-clk-source-fo.patch} | 4 +- ...k3576-Disable-USB3OTG0-U3-port-early.patch | 47 ---- ...board-rockchip-Add-Radxa-ROCK-2A-2F.patch} | 6 +- ...-generic-Move-usb-nodes-to-board-dts.patch | 90 ------- ...WIP-board-rockchip-Add-ArmSoM-Sige1.patch} | 6 +- ...kchip-Add-FriendlyElec-NanoPi-Zero2.patch} | 6 +- ...4-WIP-board-rockchip-Add-Radxa-E24C.patch} | 6 +- ...-HACK-use-usb3-host-mode-on-rock-2a.patch} | 4 +- ...generic-Fix-boot-after-dts-upstream-.patch | 44 --- ...-Use-sdmmc-node-from-dts-upstream-on.patch | 121 --------- ...dram-Add-rockchip_sdram_type-helper.patch} | 4 +- ...-Set-init-microvolt-for-pwm-regulato.patch | 35 --- ...ck5b-rk3588-Add-support-for-ROCK-5B.patch} | 8 +- ...rk3528-Disable-USB3OTG-U3-port-early.patch | 48 ---- ...ockchip_sfc-Support-sclk_x2-version.patch} | 4 +- ..._rk3528-Add-dummy-CLK_REF_PCIE_INNER.patch | 29 -- ...dd-a-read_brom_bootsource_id-helper.patch} | 4 +- ...p-rk3576-Add-SPI-Flash-boot-support.patch} | 4 +- ...-Use-combined-glue-and-ctrl-node-for.patch | 31 --- ...21-board-rockchip-Add-Radxa-ROCK-4D.patch} | 6 +- ...aneng-combphy-Add-support-for-RK3528.patch | 145 ---------- ...radxa-e20c-Enable-USB-gadget-Kconfig.patch | 61 ----- ...ot-order-Defer-probe-of-boot-device.patch} | 4 +- ...env-in-SPI-Flash-can-work-correctly.patch} | 4 +- ...e-of-GPU-and-WIFI_PMU-in-assigned-c.patch} | 4 +- ...o2-Remove-cru-assigned-clocks-overr.patch} | 4 +- ...o2-Remove-u-boot.dtsi-props-already.patch} | 4 +- ...id-go2-Use-appropriate-bootph-props.patch} | 4 +- ...o2-Move-SoC-common-overrides-into-a.patch} | 4 +- ...o2-Remove-unsupported-Kconfig-optio.patch} | 4 +- ...-go2-Update-Kconfig-options-for-SPL.patch} | 4 +- ...o2-Include-pinctrl-for-sdmmc-sfc-an.patch} | 4 +- ...o2-Use-power-off-at-power-plug-in-e.patch} | 4 +- ...-go2-Add-support-for-SPI-flash-boot.patch} | 4 +- ...o2-Select-board-FDT-from-FIT-in-SPL.patch} | 4 +- ...o2-Use-env-from-same-storage-FIT-wa.patch} | 4 +- ...o2-Enable-RockUSB-button-LED-and-RN.patch} | 4 +- ...ckchip_rng-Add-compatible-for-RK3576.patch | 42 --- ...id-go2-Turn-on-the-blue-LED-at-boot.patch} | 4 +- ...ault-USB_GADGET_PRODUCT_NUM-for-RK35.patch | 28 -- ...hip-odroid-go2-Enable-more-commands.patch} | 4 +- ...hip-Add-minimal-generic-RK3576-board.patch | 190 ------------- ...odroid-go2-Add-myself-as-a-reviewer.patch} | 4 +- ...Include-OTP-in-U-Boot-pre-reloc-pha.patch} | 4 +- ...Implement-checkboard-to-print-SoC-va.patch | 88 ------ ...-Include-OTP-in-U-Boot-pre-reloc-pha.patch | 39 --- ...Split-size_and_off-and-size_and_nim.patch} | 4 +- ...Print-image-information-for-all-emb.patch} | 4 +- ...-Use-combined-glue-and-ctrl-node-for.patch | 31 --- ...hip-inno-usb2-Add-support-for-RK3576.patch | 62 ----- ...ge-Print-boot0-and-boot1-parameters.patch} | 4 +- ...ockchip-usbdp-Add-support-for-RK3576.patch | 62 ----- ...Add-option-to-change-image-offset-a.patch} | 4 +- ..._rk3576-Add-dummy-CLK_REF_PCIEx_PHY-.patch | 30 --- ...Add-support-for-up-to-4-input-files.patch} | 4 +- ...aneng-combphy-Add-support-for-RK3576.patch | 183 ------------- ...Add-option-for-image-load-address-a.patch} | 4 +- ...age-Add-rk3576-align-and-sd-card-wo.patch} | 4 +- ...0047-board-rockchip-Add-ArmSoM-Sige5.patch | 153 ----------- ...-upstream-use-v6.17-rockchip-dts64-.patch} | 4 +- ...board-rockchip-Add-Luckfox-Omni3576.patch} | 6 +- ...rockchip-Add-FriendlyElec-NanoPi-M5.patch} | 6 +- ...p-rk3288-Pick-SD-card-as-first-boot.patch} | 4 +- ...3326-Implement-checkboard-to-print-S.patch | 167 ------------ ...am-rk3328-add-ddr4-1600-sdram-timing.patch | 250 ------------------ ...4-dts-rockchip-roc-3328-cc-use-1600-.patch | 30 --- 85 files changed, 116 insertions(+), 2772 deletions(-) rename projects/Rockchip/patches/u-boot/{rockchip-0012-phy-rockchip-naneng-combphy-Enable-U3-port-for-USB3O.patch => rockchip-0001-phy-rockchip-naneng-combphy-Enable-U3-port-for-USB3O.patch} (82%) delete mode 100644 projects/Rockchip/patches/u-boot/rockchip-0001-rockchip-rockchip-inno-usb2-Fix-Synchronous-Abort-on.patch delete mode 100644 projects/Rockchip/patches/u-boot/rockchip-0002-phy-rockchip-usbdp-Fix-Generic-PHY-reference-countin.patch rename projects/Rockchip/patches/u-boot/{rockchip-0013-rockchip-rk3568-Disable-USB3OTG-U3-ports-early.patch => rockchip-0002-rockchip-rk3568-Disable-USB3OTG-U3-ports-early.patch} (92%) rename projects/Rockchip/patches/u-boot/{rockchip-0014-mmc-rockchip_sdhci-Set-xx_TAP_VALUE-for-RK3528.patch => rockchip-0003-mmc-rockchip_sdhci-Set-xx_TAP_VALUE-for-RK3528.patch} (95%) delete mode 100644 projects/Rockchip/patches/u-boot/rockchip-0003-phy-rockchip-usbdp-Simplify-init-ops.patch rename projects/Rockchip/patches/u-boot/{rockchip-0023-HACK-rockchip-dts-upstream-use-v6.17-rockchip-dts64-.patch => rockchip-0004-HACK-rockchip-dts-upstream-use-v6.17-rockchip-dts64-.patch} (98%) delete mode 100644 projects/Rockchip/patches/u-boot/rockchip-0004-phy-rockchip-naneng-combphy-Fix-Generic-PHY-referenc.patch delete mode 100644 projects/Rockchip/patches/u-boot/rockchip-0005-phy-rockchip-naneng-combphy-Simplify-init-ops.patch rename projects/Rockchip/patches/u-boot/{rockchip-0024-rockchip-rk3528-radxa-e20c-Drop-eMMC-HS200-prop-from.patch => rockchip-0005-rockchip-rk3528-radxa-e20c-Drop-eMMC-HS200-prop-from.patch} (87%) rename projects/Rockchip/patches/u-boot/{rockchip-0025-HACK-rockchip-dts-upstream-use-work-in-progress-RK35.patch => rockchip-0006-HACK-rockchip-dts-upstream-use-work-in-progress-RK35.patch} (99%) delete mode 100644 projects/Rockchip/patches/u-boot/rockchip-0006-phy-rockchip-naneng-combphy-Use-syscon_regmap_lookup.patch delete mode 100644 projects/Rockchip/patches/u-boot/rockchip-0007-phy-rockchip-inno-usb2-Fix-improper-use-of-UCLASS_PH.patch rename projects/Rockchip/patches/u-boot/{rockchip-0026-rockchip-rk3528-generic-Add-basic-support-for-USB-OT.patch => rockchip-0007-rockchip-rk3528-generic-Add-basic-support-for-USB-OT.patch} (94%) delete mode 100644 projects/Rockchip/patches/u-boot/rockchip-0008-phy-rockchip-typec-Fix-improper-use-of-UCLASS_PHY.patch rename projects/Rockchip/patches/u-boot/{rockchip-0027-rockchip-rk3528-Add-support-for-booting-from-SPI-fla.patch => rockchip-0008-rockchip-rk3528-Add-support-for-booting-from-SPI-fla.patch} (92%) rename projects/Rockchip/patches/u-boot/{rockchip-0028-WIP-net-rockchip-Allow-use-of-rx-tx-delayline-for-rg.patch => rockchip-0009-WIP-net-rockchip-Allow-use-of-rx-tx-delayline-for-rg.patch} (97%) delete mode 100644 projects/Rockchip/patches/u-boot/rockchip-0009-rockchip-rk3588-Disable-USB3OTG-U3-ports-early.patch rename projects/Rockchip/patches/u-boot/{rockchip-0029-WIP-net-rockchip-Use-CRU-as-default-TX-clk-source-fo.patch => rockchip-0010-WIP-net-rockchip-Use-CRU-as-default-TX-clk-source-fo.patch} (92%) delete mode 100644 projects/Rockchip/patches/u-boot/rockchip-0010-rockchip-rk3576-Disable-USB3OTG0-U3-port-early.patch rename projects/Rockchip/patches/u-boot/{rockchip-0030-WIP-board-rockchip-Add-Radxa-ROCK-2A-2F.patch => rockchip-0011-WIP-board-rockchip-Add-Radxa-ROCK-2A-2F.patch} (98%) delete mode 100644 projects/Rockchip/patches/u-boot/rockchip-0011-rockchip-rk3588-generic-Move-usb-nodes-to-board-dts.patch rename projects/Rockchip/patches/u-boot/{rockchip-0031-WIP-board-rockchip-Add-ArmSoM-Sige1.patch => rockchip-0012-WIP-board-rockchip-Add-ArmSoM-Sige1.patch} (96%) rename projects/Rockchip/patches/u-boot/{rockchip-0032-WIP-board-rockchip-Add-FriendlyElec-NanoPi-Zero2.patch => rockchip-0013-WIP-board-rockchip-Add-FriendlyElec-NanoPi-Zero2.patch} (96%) rename projects/Rockchip/patches/u-boot/{rockchip-0033-WIP-board-rockchip-Add-Radxa-E24C.patch => rockchip-0014-WIP-board-rockchip-Add-Radxa-E24C.patch} (98%) rename projects/Rockchip/patches/u-boot/{rockchip-0034-HACK-use-usb3-host-mode-on-rock-2a.patch => rockchip-0015-HACK-use-usb3-host-mode-on-rock-2a.patch} (81%) delete mode 100644 projects/Rockchip/patches/u-boot/rockchip-0015-rockchip-rk3528-generic-Fix-boot-after-dts-upstream-.patch delete mode 100644 projects/Rockchip/patches/u-boot/rockchip-0016-arm-dts-rockchip-Use-sdmmc-node-from-dts-upstream-on.patch rename projects/Rockchip/patches/u-boot/{rockchip-0035-rockchip-sdram-Add-rockchip_sdram_type-helper.patch => rockchip-0016-rockchip-sdram-Add-rockchip_sdram_type-helper.patch} (93%) delete mode 100644 projects/Rockchip/patches/u-boot/rockchip-0017-arm-dts-rockchip-Set-init-microvolt-for-pwm-regulato.patch rename projects/Rockchip/patches/u-boot/{rockchip-0036-rockchip-rock5b-rk3588-Add-support-for-ROCK-5B.patch => rockchip-0017-rockchip-rock5b-rk3588-Add-support-for-ROCK-5B.patch} (95%) delete mode 100644 projects/Rockchip/patches/u-boot/rockchip-0018-rockchip-rk3528-Disable-USB3OTG-U3-port-early.patch rename projects/Rockchip/patches/u-boot/{rockchip-0048-spi-rockchip_sfc-Support-sclk_x2-version.patch => rockchip-0018-spi-rockchip_sfc-Support-sclk_x2-version.patch} (92%) delete mode 100644 projects/Rockchip/patches/u-boot/rockchip-0019-rockchip-clk-clk_rk3528-Add-dummy-CLK_REF_PCIE_INNER.patch rename projects/Rockchip/patches/u-boot/{rockchip-0049-rockchip-spl-Add-a-read_brom_bootsource_id-helper.patch => rockchip-0019-rockchip-spl-Add-a-read_brom_bootsource_id-helper.patch} (94%) rename projects/Rockchip/patches/u-boot/{rockchip-0050-rockchip-rk3576-Add-SPI-Flash-boot-support.patch => rockchip-0020-rockchip-rk3576-Add-SPI-Flash-boot-support.patch} (96%) delete mode 100644 projects/Rockchip/patches/u-boot/rockchip-0020-usb-dwc3-generic-Use-combined-glue-and-ctrl-node-for.patch rename projects/Rockchip/patches/u-boot/{rockchip-0051-board-rockchip-Add-Radxa-ROCK-4D.patch => rockchip-0021-board-rockchip-Add-Radxa-ROCK-4D.patch} (96%) delete mode 100644 projects/Rockchip/patches/u-boot/rockchip-0021-phy-rockchip-naneng-combphy-Add-support-for-RK3528.patch delete mode 100644 projects/Rockchip/patches/u-boot/rockchip-0022-rockchip-rk3528-radxa-e20c-Enable-USB-gadget-Kconfig.patch rename projects/Rockchip/patches/u-boot/{rockchip-0052-rockchip-spl-boot-order-Defer-probe-of-boot-device.patch => rockchip-0022-rockchip-spl-boot-order-Defer-probe-of-boot-device.patch} (92%) rename projects/Rockchip/patches/u-boot/{rockchip-0053-rockchip-Ensure-env-in-SPI-Flash-can-work-correctly.patch => rockchip-0023-rockchip-Ensure-env-in-SPI-Flash-can-work-correctly.patch} (91%) rename projects/Rockchip/patches/u-boot/{rockchip-0055-clk-px30-Allow-use-of-GPU-and-WIFI_PMU-in-assigned-c.patch => rockchip-0024-clk-px30-Allow-use-of-GPU-and-WIFI_PMU-in-assigned-c.patch} (90%) rename projects/Rockchip/patches/u-boot/{rockchip-0056-rockchip-odroid-go2-Remove-cru-assigned-clocks-overr.patch => rockchip-0025-rockchip-odroid-go2-Remove-cru-assigned-clocks-overr.patch} (88%) rename projects/Rockchip/patches/u-boot/{rockchip-0057-rockchip-odroid-go2-Remove-u-boot.dtsi-props-already.patch => rockchip-0026-rockchip-odroid-go2-Remove-u-boot.dtsi-props-already.patch} (90%) rename projects/Rockchip/patches/u-boot/{rockchip-0058-rockchip-odroid-go2-Use-appropriate-bootph-props.patch => rockchip-0027-rockchip-odroid-go2-Use-appropriate-bootph-props.patch} (92%) rename projects/Rockchip/patches/u-boot/{rockchip-0059-rockchip-odroid-go2-Move-SoC-common-overrides-into-a.patch => rockchip-0028-rockchip-odroid-go2-Move-SoC-common-overrides-into-a.patch} (96%) rename projects/Rockchip/patches/u-boot/{rockchip-0060-rockchip-odroid-go2-Remove-unsupported-Kconfig-optio.patch => rockchip-0029-rockchip-odroid-go2-Remove-unsupported-Kconfig-optio.patch} (93%) rename projects/Rockchip/patches/u-boot/{rockchip-0061-rockchip-odroid-go2-Update-Kconfig-options-for-SPL.patch => rockchip-0030-rockchip-odroid-go2-Update-Kconfig-options-for-SPL.patch} (94%) rename projects/Rockchip/patches/u-boot/{rockchip-0062-rockchip-odroid-go2-Include-pinctrl-for-sdmmc-sfc-an.patch => rockchip-0031-rockchip-odroid-go2-Include-pinctrl-for-sdmmc-sfc-an.patch} (95%) rename projects/Rockchip/patches/u-boot/{rockchip-0063-rockchip-odroid-go2-Use-power-off-at-power-plug-in-e.patch => rockchip-0032-rockchip-odroid-go2-Use-power-off-at-power-plug-in-e.patch} (94%) rename projects/Rockchip/patches/u-boot/{rockchip-0064-rockchip-odroid-go2-Add-support-for-SPI-flash-boot.patch => rockchip-0033-rockchip-odroid-go2-Add-support-for-SPI-flash-boot.patch} (95%) rename projects/Rockchip/patches/u-boot/{rockchip-0065-rockchip-odroid-go2-Select-board-FDT-from-FIT-in-SPL.patch => rockchip-0034-rockchip-odroid-go2-Select-board-FDT-from-FIT-in-SPL.patch} (97%) rename projects/Rockchip/patches/u-boot/{rockchip-0066-rockchip-odroid-go2-Use-env-from-same-storage-FIT-wa.patch => rockchip-0035-rockchip-odroid-go2-Use-env-from-same-storage-FIT-wa.patch} (95%) rename projects/Rockchip/patches/u-boot/{rockchip-0067-rockchip-odroid-go2-Enable-RockUSB-button-LED-and-RN.patch => rockchip-0036-rockchip-odroid-go2-Enable-RockUSB-button-LED-and-RN.patch} (92%) delete mode 100644 projects/Rockchip/patches/u-boot/rockchip-0037-rng-rockchip_rng-Add-compatible-for-RK3576.patch rename projects/Rockchip/patches/u-boot/{rockchip-0068-rockchip-odroid-go2-Turn-on-the-blue-LED-at-boot.patch => rockchip-0037-rockchip-odroid-go2-Turn-on-the-blue-LED-at-boot.patch} (85%) delete mode 100644 projects/Rockchip/patches/u-boot/rockchip-0038-rockchip-Add-default-USB_GADGET_PRODUCT_NUM-for-RK35.patch rename projects/Rockchip/patches/u-boot/{rockchip-0069-rockchip-odroid-go2-Enable-more-commands.patch => rockchip-0038-rockchip-odroid-go2-Enable-more-commands.patch} (91%) delete mode 100644 projects/Rockchip/patches/u-boot/rockchip-0039-board-rockchip-Add-minimal-generic-RK3576-board.patch rename projects/Rockchip/patches/u-boot/{rockchip-0070-rockchip-odroid-go2-Add-myself-as-a-reviewer.patch => rockchip-0039-rockchip-odroid-go2-Add-myself-as-a-reviewer.patch} (87%) rename projects/Rockchip/patches/u-boot/{rockchip-0071-arm-dts-rockchip-Include-OTP-in-U-Boot-pre-reloc-pha.patch => rockchip-0040-arm-dts-rockchip-Include-OTP-in-U-Boot-pre-reloc-pha.patch} (87%) delete mode 100644 projects/Rockchip/patches/u-boot/rockchip-0040-rockchip-rk3576-Implement-checkboard-to-print-SoC-va.patch delete mode 100644 projects/Rockchip/patches/u-boot/rockchip-0041-arm-dts-rockchip-Include-OTP-in-U-Boot-pre-reloc-pha.patch rename projects/Rockchip/patches/u-boot/{rockchip-0072-rockchip-mkimage-Split-size_and_off-and-size_and_nim.patch => rockchip-0041-rockchip-mkimage-Split-size_and_off-and-size_and_nim.patch} (97%) rename projects/Rockchip/patches/u-boot/{rockchip-0073-rockchip-mkimage-Print-image-information-for-all-emb.patch => rockchip-0042-rockchip-mkimage-Print-image-information-for-all-emb.patch} (96%) delete mode 100644 projects/Rockchip/patches/u-boot/rockchip-0042-usb-dwc3-generic-Use-combined-glue-and-ctrl-node-for.patch delete mode 100644 projects/Rockchip/patches/u-boot/rockchip-0043-phy-rockchip-inno-usb2-Add-support-for-RK3576.patch rename projects/Rockchip/patches/u-boot/{rockchip-0074-rockchip-mkimage-Print-boot0-and-boot1-parameters.patch => rockchip-0043-rockchip-mkimage-Print-boot0-and-boot1-parameters.patch} (94%) delete mode 100644 projects/Rockchip/patches/u-boot/rockchip-0044-phy-rockchip-usbdp-Add-support-for-RK3576.patch rename projects/Rockchip/patches/u-boot/{rockchip-0075-rockchip-mkimage-Add-option-to-change-image-offset-a.patch => rockchip-0044-rockchip-mkimage-Add-option-to-change-image-offset-a.patch} (98%) delete mode 100644 projects/Rockchip/patches/u-boot/rockchip-0045-rockchip-clk-clk_rk3576-Add-dummy-CLK_REF_PCIEx_PHY-.patch rename projects/Rockchip/patches/u-boot/{rockchip-0076-rockchip-mkimage-Add-support-for-up-to-4-input-files.patch => rockchip-0045-rockchip-mkimage-Add-support-for-up-to-4-input-files.patch} (98%) delete mode 100644 projects/Rockchip/patches/u-boot/rockchip-0046-phy-rockchip-naneng-combphy-Add-support-for-RK3576.patch rename projects/Rockchip/patches/u-boot/{rockchip-0077-rockchip-mkimage-Add-option-for-image-load-address-a.patch => rockchip-0046-rockchip-mkimage-Add-option-for-image-load-address-a.patch} (92%) rename projects/Rockchip/patches/u-boot/{rockchip-0078-WIP-rockchip-mkimage-Add-rk3576-align-and-sd-card-wo.patch => rockchip-0047-WIP-rockchip-mkimage-Add-rk3576-align-and-sd-card-wo.patch} (96%) delete mode 100644 projects/Rockchip/patches/u-boot/rockchip-0047-board-rockchip-Add-ArmSoM-Sige5.patch rename projects/Rockchip/patches/u-boot/{rockchip-0079-HACK-rockchip-dts-upstream-use-v6.17-rockchip-dts64-.patch => rockchip-0048-HACK-rockchip-dts-upstream-use-v6.17-rockchip-dts64-.patch} (99%) rename projects/Rockchip/patches/u-boot/{rockchip-0080-WIP-board-rockchip-Add-Luckfox-Omni3576.patch => rockchip-0049-WIP-board-rockchip-Add-Luckfox-Omni3576.patch} (96%) rename projects/Rockchip/patches/u-boot/{rockchip-0081-WIP-board-rockchip-Add-FriendlyElec-NanoPi-M5.patch => rockchip-0050-WIP-board-rockchip-Add-FriendlyElec-NanoPi-M5.patch} (96%) rename projects/Rockchip/patches/u-boot/{rockchip-0084-KNAERZCHE-rockchip-rk3288-Pick-SD-card-as-first-boot.patch => rockchip-0051-KNAERZCHE-rockchip-rk3288-Pick-SD-card-as-first-boot.patch} (84%) delete mode 100644 projects/Rockchip/patches/u-boot/rockchip-0054-rockchip-px30-rk3326-Implement-checkboard-to-print-S.patch delete mode 100644 projects/Rockchip/patches/u-boot/rockchip-0082-FROMLIST-v1-ram-rk3328-add-ddr4-1600-sdram-timing.patch delete mode 100644 projects/Rockchip/patches/u-boot/rockchip-0083-FROMLIST-v1-arm64-dts-rockchip-roc-3328-cc-use-1600-.patch diff --git a/packages/tools/u-boot/package.mk b/packages/tools/u-boot/package.mk index 5d1cbf0cb6..ba35d713c4 100644 --- a/packages/tools/u-boot/package.mk +++ b/packages/tools/u-boot/package.mk @@ -13,8 +13,8 @@ PKG_STAMP="${UBOOT_SYSTEM} ${UBOOT_TARGET}" case ${PROJECT} in Rockchip) - PKG_VERSION="2025.10-rc3" # plus Kwiboo changes for RK3576 support - PKG_SHA256="1224f85046da9a8687df26b7f87ce74fe3b29d40b0151b06f9add88be5c3dc9d" + PKG_VERSION="2025.10-rc4" # plus Kwiboo changes for RK3576 support + PKG_SHA256="a30574d74a4a761ed683a2b74d938ddb89e3ffacc3b2a6aabf3f40be91d03ebe" PKG_URL="https://ftp.denx.de/pub/u-boot/${PKG_NAME}-${PKG_VERSION}.tar.bz2" ;; *) diff --git a/projects/Rockchip/patches/u-boot/rockchip-0012-phy-rockchip-naneng-combphy-Enable-U3-port-for-USB3O.patch b/projects/Rockchip/patches/u-boot/rockchip-0001-phy-rockchip-naneng-combphy-Enable-U3-port-for-USB3O.patch similarity index 82% rename from projects/Rockchip/patches/u-boot/rockchip-0012-phy-rockchip-naneng-combphy-Enable-U3-port-for-USB3O.patch rename to projects/Rockchip/patches/u-boot/rockchip-0001-phy-rockchip-naneng-combphy-Enable-U3-port-for-USB3O.patch index e314ec8b04..83caaae666 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0012-phy-rockchip-naneng-combphy-Enable-U3-port-for-USB3O.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0001-phy-rockchip-naneng-combphy-Enable-U3-port-for-USB3O.patch @@ -1,7 +1,7 @@ -From 23b7834fa5265f7b4c14b84c454951783adb2156 Mon Sep 17 00:00:00 2001 +From 853612b964d72d9e9d12b7baeea05970be71120b Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 20 Jul 2025 13:09:38 +0000 -Subject: [PATCH 12/84] phy: rockchip: naneng-combphy: Enable U3 port for +Subject: [PATCH 01/51] phy: rockchip: naneng-combphy: Enable U3 port for USB3OTG on RK3568 The USB OTG U3 port may have been disabled early, add support to the @@ -13,10 +13,10 @@ Signed-off-by: Jonas Karlman 1 file changed, 8 insertions(+) diff --git a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c -index 7f107a11606..81195de60bc 100644 +index d602f965d6a..82353ae7678 100644 --- a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c +++ b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c -@@ -301,6 +301,14 @@ static int rk3568_combphy_cfg(struct rockchip_combphy_priv *priv) +@@ -399,6 +399,14 @@ static int rk3568_combphy_cfg(struct rockchip_combphy_priv *priv) param_write(priv->phy_grf, &cfg->pipe_txcomp_sel, false); param_write(priv->phy_grf, &cfg->pipe_txelec_sel, false); param_write(priv->phy_grf, &cfg->usb_mode_set, true); diff --git a/projects/Rockchip/patches/u-boot/rockchip-0001-rockchip-rockchip-inno-usb2-Fix-Synchronous-Abort-on.patch b/projects/Rockchip/patches/u-boot/rockchip-0001-rockchip-rockchip-inno-usb2-Fix-Synchronous-Abort-on.patch deleted file mode 100644 index cba12e8765..0000000000 --- a/projects/Rockchip/patches/u-boot/rockchip-0001-rockchip-rockchip-inno-usb2-Fix-Synchronous-Abort-on.patch +++ /dev/null @@ -1,76 +0,0 @@ -From 84361828ad40949a0ca4f9a39b7248c46bf71b7c Mon Sep 17 00:00:00 2001 -From: Alex Shumsky -Date: Thu, 3 Jul 2025 09:04:48 +0300 -Subject: [PATCH 01/84] rockchip: rockchip-inno-usb2: Fix Synchronous Abort on - usb start - -Fix NULL pointer dereference that happen when rockchip-inno-usb2 clock -enabled before device probe. This early clock enable call happen in process -of parent clock activation added in ac30d90f3367. - -Fixes: 229218373c22 ("phy: rockchip-inno-usb2: Add support for clkout_ctl_phy"). -Fixes: ac30d90f3367 ("clk: Ensure the parent clocks are enabled while reparenting") -Co-authored-by: Jonas Karlman -Signed-off-by: Alex Shumsky ---- - drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 19 ++++++++++++++----- - 1 file changed, 14 insertions(+), 5 deletions(-) - -diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c -index 88b33de1b2a..3cc5956aed5 100644 ---- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c -+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c -@@ -167,20 +167,27 @@ static struct phy_ops rockchip_usb2phy_ops = { - .of_xlate = rockchip_usb2phy_of_xlate, - }; - --static void rockchip_usb2phy_clkout_ctl(struct clk *clk, struct regmap **base, -- const struct usb2phy_reg **clkout_ctl) -+static int rockchip_usb2phy_clkout_ctl(struct clk *clk, struct regmap **base, -+ const struct usb2phy_reg **clkout_ctl) - { - struct udevice *parent = dev_get_parent(clk->dev); - struct rockchip_usb2phy *priv = dev_get_priv(parent); - const struct rockchip_usb2phy_cfg *phy_cfg = priv->phy_cfg; - -- if (priv->phy_cfg->clkout_ctl_phy.enable) { -+ // phy_cfg can be NULL if this function called before probe (when parent -+ // clocks are enabled) -+ if (!phy_cfg) -+ return -EINVAL; -+ -+ if (phy_cfg->clkout_ctl_phy.enable) { - *base = priv->phy_base; - *clkout_ctl = &phy_cfg->clkout_ctl_phy; - } else { - *base = priv->reg_base; - *clkout_ctl = &phy_cfg->clkout_ctl; - } -+ -+ return 0; - } - - /** -@@ -206,7 +213,8 @@ int rockchip_usb2phy_clk_enable(struct clk *clk) - const struct usb2phy_reg *clkout_ctl; - struct regmap *base; - -- rockchip_usb2phy_clkout_ctl(clk, &base, &clkout_ctl); -+ if (rockchip_usb2phy_clkout_ctl(clk, &base, &clkout_ctl)) -+ return -ENOSYS; - - /* turn on 480m clk output if it is off */ - if (!property_enabled(base, clkout_ctl)) { -@@ -230,7 +238,8 @@ int rockchip_usb2phy_clk_disable(struct clk *clk) - const struct usb2phy_reg *clkout_ctl; - struct regmap *base; - -- rockchip_usb2phy_clkout_ctl(clk, &base, &clkout_ctl); -+ if (rockchip_usb2phy_clkout_ctl(clk, &base, &clkout_ctl)) -+ return -ENOSYS; - - /* turn off 480m clk output */ - property_enable(base, clkout_ctl, false); --- -2.34.1 - diff --git a/projects/Rockchip/patches/u-boot/rockchip-0002-phy-rockchip-usbdp-Fix-Generic-PHY-reference-countin.patch b/projects/Rockchip/patches/u-boot/rockchip-0002-phy-rockchip-usbdp-Fix-Generic-PHY-reference-countin.patch deleted file mode 100644 index 4c23df7268..0000000000 --- a/projects/Rockchip/patches/u-boot/rockchip-0002-phy-rockchip-usbdp-Fix-Generic-PHY-reference-countin.patch +++ /dev/null @@ -1,72 +0,0 @@ -From 813fb2de3997d55a44c82769bc26fa6e548ad9d1 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Mon, 21 Jul 2025 22:07:10 +0000 -Subject: [PATCH 02/84] phy: rockchip: usbdp: Fix Generic PHY reference - counting - -Generic PHY reference counting helps ensure driver ops for init/exit and -power on/off are called at correct state. For this to work the PHY -driver must initialize PHY-id to a persistent value in of_xlate ops. - -The Rockchip USBDP PHY driver does not initialize the PHY-id field, this -typically lead to use of unshared reference counting among different -struct phy instances. - -Initialize the PHY-id in of_xlate ops to ensure use of shared reference -counting among all struct phy instances. - -E.g. on a ROCK 5B following could be observed: - - => usb start - starting USB... - [...] - Bus usb@fc400000: 2 USB Device(s) found - scanning usb for storage devices... 1 Storage Device(s) found - - => usb reset - resetting USB... - [...] - rockchip_udphy phy@fed90000: cmn ana lcpll lock timeout - rockchip_udphy phy@fed90000: failed to init usbdp combophy - rockchip_udphy phy@fed90000: PHY: Failed to init phy@fed90000: -110. - Can't init PHY1 - Bus usb@fc400000: probe failed, error -110 - scanning usb for storage devices... 0 Storage Device(s) found - -With shared reference counting this is fixed: - - => usb reset - resetting USB... - [...] - Bus usb@fc400000: 2 USB Device(s) found - scanning usb for storage devices... 1 Storage Device(s) found - -Signed-off-by: Jonas Karlman ---- - drivers/phy/rockchip/phy-rockchip-usbdp.c | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/drivers/phy/rockchip/phy-rockchip-usbdp.c b/drivers/phy/rockchip/phy-rockchip-usbdp.c -index 9deec47ae46..56963c87183 100644 ---- a/drivers/phy/rockchip/phy-rockchip-usbdp.c -+++ b/drivers/phy/rockchip/phy-rockchip-usbdp.c -@@ -587,12 +587,16 @@ static int udphy_power_off(struct rockchip_udphy *udphy, u8 mode) - static int rockchip_u3phy_of_xlate(struct phy *phy, - struct ofnode_phandle_args *args) - { -+ struct rockchip_udphy *udphy = dev_get_priv(phy->dev); -+ - if (args->args_count == 0) - return -EINVAL; - - if (args->args[0] != PHY_TYPE_USB3) - return -EINVAL; - -+ phy->id = udphy->id; -+ - return 0; - } - --- -2.34.1 - diff --git a/projects/Rockchip/patches/u-boot/rockchip-0013-rockchip-rk3568-Disable-USB3OTG-U3-ports-early.patch b/projects/Rockchip/patches/u-boot/rockchip-0002-rockchip-rk3568-Disable-USB3OTG-U3-ports-early.patch similarity index 92% rename from projects/Rockchip/patches/u-boot/rockchip-0013-rockchip-rk3568-Disable-USB3OTG-U3-ports-early.patch rename to projects/Rockchip/patches/u-boot/rockchip-0002-rockchip-rk3568-Disable-USB3OTG-U3-ports-early.patch index 5a334d05cc..58e53ad29d 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0013-rockchip-rk3568-Disable-USB3OTG-U3-ports-early.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0002-rockchip-rk3568-Disable-USB3OTG-U3-ports-early.patch @@ -1,7 +1,7 @@ -From 8d5f4e5a9e5e2281386e4d273e5232a8636bfff8 Mon Sep 17 00:00:00 2001 +From 2890fa911ceadb70514af483acae2a3c8e546ae3 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 20 Jul 2025 13:10:36 +0000 -Subject: [PATCH 13/84] rockchip: rk3568: Disable USB3OTG U3 ports early +Subject: [PATCH 02/51] rockchip: rk3568: Disable USB3OTG U3 ports early The RK3568 SoC comes with USB OTG support using a DWC3 controller with a USB2 PHY and a USB3 PHY (COMBPHY). diff --git a/projects/Rockchip/patches/u-boot/rockchip-0014-mmc-rockchip_sdhci-Set-xx_TAP_VALUE-for-RK3528.patch b/projects/Rockchip/patches/u-boot/rockchip-0003-mmc-rockchip_sdhci-Set-xx_TAP_VALUE-for-RK3528.patch similarity index 95% rename from projects/Rockchip/patches/u-boot/rockchip-0014-mmc-rockchip_sdhci-Set-xx_TAP_VALUE-for-RK3528.patch rename to projects/Rockchip/patches/u-boot/rockchip-0003-mmc-rockchip_sdhci-Set-xx_TAP_VALUE-for-RK3528.patch index 6e805dc5e3..65331b1585 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0014-mmc-rockchip_sdhci-Set-xx_TAP_VALUE-for-RK3528.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0003-mmc-rockchip_sdhci-Set-xx_TAP_VALUE-for-RK3528.patch @@ -1,7 +1,7 @@ -From e3cb5639cb00274c6517f28e47d0849534bab000 Mon Sep 17 00:00:00 2001 +From 5896962c834789527d2a54eb409f8c3a18146d75 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Mon, 14 Jul 2025 20:34:07 +0000 -Subject: [PATCH 14/84] mmc: rockchip_sdhci: Set xx_TAP_VALUE for RK3528 +Subject: [PATCH 03/51] mmc: rockchip_sdhci: Set xx_TAP_VALUE for RK3528 eMMC erase and write support on RK3528 is somewhat unreliable, sometime e.g. mmc erase and write commands will fail with an error. @@ -19,7 +19,7 @@ Signed-off-by: Jonas Karlman 1 file changed, 22 insertions(+), 5 deletions(-) diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c -index 761e3619329..cca917da68e 100644 +index 5e025d76a82..8116e464278 100644 --- a/drivers/mmc/rockchip_sdhci.c +++ b/drivers/mmc/rockchip_sdhci.c @@ -9,6 +9,7 @@ diff --git a/projects/Rockchip/patches/u-boot/rockchip-0003-phy-rockchip-usbdp-Simplify-init-ops.patch b/projects/Rockchip/patches/u-boot/rockchip-0003-phy-rockchip-usbdp-Simplify-init-ops.patch deleted file mode 100644 index 7e1afe622c..0000000000 --- a/projects/Rockchip/patches/u-boot/rockchip-0003-phy-rockchip-usbdp-Simplify-init-ops.patch +++ /dev/null @@ -1,134 +0,0 @@ -From ef03459846d7be6b231c19e07f4613ec1f74b884 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Mon, 21 Jul 2025 22:07:11 +0000 -Subject: [PATCH 03/84] phy: rockchip: usbdp: Simplify init ops - -With working shared reference counting for Generic PHY ops there is no -need for the Rockchip USBDP PHY driver to keep its own status (reference -counting) handling. - -Simplify the init ops now that shared reference counting is working. -This also removes the unused mode_change handling as part of the -simplication. - -No runtime change is expected with this simplication. - -Signed-off-by: Jonas Karlman ---- - drivers/phy/rockchip/phy-rockchip-usbdp.c | 71 +++-------------------- - 1 file changed, 8 insertions(+), 63 deletions(-) - -diff --git a/drivers/phy/rockchip/phy-rockchip-usbdp.c b/drivers/phy/rockchip/phy-rockchip-usbdp.c -index 56963c87183..6cfbef02b4a 100644 ---- a/drivers/phy/rockchip/phy-rockchip-usbdp.c -+++ b/drivers/phy/rockchip/phy-rockchip-usbdp.c -@@ -96,9 +96,7 @@ struct rockchip_udphy { - - /* PHY status management */ - bool flip; -- bool mode_change; - u8 mode; -- u8 status; - - /* utilized for USB */ - bool hs; /* flag for high-speed */ -@@ -525,65 +523,6 @@ static int udphy_parse_dt(struct rockchip_udphy *udphy, struct udevice *dev) - return 0; - } - --static int udphy_power_on(struct rockchip_udphy *udphy, u8 mode) --{ -- int ret; -- -- if (!(udphy->mode & mode)) { -- dev_info(udphy->dev, "mode 0x%02x is not support\n", mode); -- return 0; -- } -- -- if (udphy->status == UDPHY_MODE_NONE) { -- udphy->mode_change = false; -- ret = udphy_setup(udphy); -- if (ret) -- return ret; -- -- if (udphy->mode & UDPHY_MODE_USB) -- udphy_u3_port_disable(udphy, false); -- } else if (udphy->mode_change) { -- udphy->mode_change = false; -- udphy->status = UDPHY_MODE_NONE; -- if (udphy->mode == UDPHY_MODE_DP) -- udphy_u3_port_disable(udphy, true); -- -- ret = udphy_disable(udphy); -- if (ret) -- return ret; -- ret = udphy_setup(udphy); -- if (ret) -- return ret; -- } -- -- udphy->status |= mode; -- -- return 0; --} -- --static int udphy_power_off(struct rockchip_udphy *udphy, u8 mode) --{ -- int ret; -- -- if (!(udphy->mode & mode)) { -- dev_info(udphy->dev, "mode 0x%02x is not supported\n", mode); -- return 0; -- } -- -- if (!udphy->status) -- return 0; -- -- udphy->status &= ~mode; -- -- if (udphy->status == UDPHY_MODE_NONE) { -- ret = udphy_disable(udphy); -- if (ret) -- return ret; -- } -- -- return 0; --} -- - static int rockchip_u3phy_of_xlate(struct phy *phy, - struct ofnode_phandle_args *args) - { -@@ -603,6 +542,7 @@ static int rockchip_u3phy_of_xlate(struct phy *phy, - static int rockchip_u3phy_init(struct phy *phy) - { - struct rockchip_udphy *udphy = dev_get_priv(phy->dev); -+ int ret; - - /* DP only or high-speed, disable U3 port */ - if (!(udphy->mode & UDPHY_MODE_USB) || udphy->hs) { -@@ -610,7 +550,12 @@ static int rockchip_u3phy_init(struct phy *phy) - return 0; - } - -- return udphy_power_on(udphy, UDPHY_MODE_USB); -+ ret = udphy_setup(udphy); -+ if (ret) -+ return ret; -+ -+ udphy_u3_port_disable(udphy, false); -+ return 0; - } - - static int rockchip_u3phy_exit(struct phy *phy) -@@ -621,7 +566,7 @@ static int rockchip_u3phy_exit(struct phy *phy) - if (!(udphy->mode & UDPHY_MODE_USB) || udphy->hs) - return 0; - -- return udphy_power_off(udphy, UDPHY_MODE_USB); -+ return udphy_disable(udphy); - } - - static const struct phy_ops rockchip_u3phy_ops = { --- -2.34.1 - diff --git a/projects/Rockchip/patches/u-boot/rockchip-0023-HACK-rockchip-dts-upstream-use-v6.17-rockchip-dts64-.patch b/projects/Rockchip/patches/u-boot/rockchip-0004-HACK-rockchip-dts-upstream-use-v6.17-rockchip-dts64-.patch similarity index 98% rename from projects/Rockchip/patches/u-boot/rockchip-0023-HACK-rockchip-dts-upstream-use-v6.17-rockchip-dts64-.patch rename to projects/Rockchip/patches/u-boot/rockchip-0004-HACK-rockchip-dts-upstream-use-v6.17-rockchip-dts64-.patch index 4d19123ba0..62e024d1fb 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0023-HACK-rockchip-dts-upstream-use-v6.17-rockchip-dts64-.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0004-HACK-rockchip-dts-upstream-use-v6.17-rockchip-dts64-.patch @@ -1,7 +1,7 @@ -From 66aaba61526a93e9544e38206a77c8793bc74807 Mon Sep 17 00:00:00 2001 +From 761e2216beda33b15a91a1952add73ccca9a8586 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 11 Jul 2025 10:13:08 +0000 -Subject: [PATCH 23/84] HACK: rockchip: dts/upstream: use +Subject: [PATCH 04/51] HACK: rockchip: dts/upstream: use v6.17-rockchip-dts64-2 RK3528 DTs Signed-off-by: Jonas Karlman diff --git a/projects/Rockchip/patches/u-boot/rockchip-0004-phy-rockchip-naneng-combphy-Fix-Generic-PHY-referenc.patch b/projects/Rockchip/patches/u-boot/rockchip-0004-phy-rockchip-naneng-combphy-Fix-Generic-PHY-referenc.patch deleted file mode 100644 index 8b7c33bea2..0000000000 --- a/projects/Rockchip/patches/u-boot/rockchip-0004-phy-rockchip-naneng-combphy-Fix-Generic-PHY-referenc.patch +++ /dev/null @@ -1,37 +0,0 @@ -From 5338a239b47d28a04da856bd9fbc18d4fefa96ba Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Mon, 21 Jul 2025 22:07:12 +0000 -Subject: [PATCH 04/84] phy: rockchip: naneng-combphy: Fix Generic PHY - reference counting - -Generic PHY reference counting helps ensure driver ops for init/exit and -power on/off are called at correct state. For this to work the PHY -driver must initialize PHY-id to a persistent value in of_xlate ops. - -The Rockchip COMBPHY driver does not initialize the PHY-id field, this -typically lead to use of unshared reference counting among different -struct phy instances. - -Initialize the PHY-id in of_xlate ops to ensure use of shared reference -counting among all struct phy instances. - -Signed-off-by: Jonas Karlman ---- - drivers/phy/rockchip/phy-rockchip-naneng-combphy.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c -index 5145b517aa4..a3038d067d3 100644 ---- a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c -+++ b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c -@@ -223,6 +223,7 @@ static int rockchip_combphy_xlate(struct phy *phy, struct ofnode_phandle_args *a - return -EINVAL; - } - -+ phy->id = priv->id; - priv->mode = args->args[0]; - - return 0; --- -2.34.1 - diff --git a/projects/Rockchip/patches/u-boot/rockchip-0005-phy-rockchip-naneng-combphy-Simplify-init-ops.patch b/projects/Rockchip/patches/u-boot/rockchip-0005-phy-rockchip-naneng-combphy-Simplify-init-ops.patch deleted file mode 100644 index dc083e6d01..0000000000 --- a/projects/Rockchip/patches/u-boot/rockchip-0005-phy-rockchip-naneng-combphy-Simplify-init-ops.patch +++ /dev/null @@ -1,159 +0,0 @@ -From 87ec15bbdc953d552dde11a5772b1e3dadc855f4 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Mon, 21 Jul 2025 22:07:13 +0000 -Subject: [PATCH 05/84] phy: rockchip: naneng-combphy: Simplify init ops - -The init ops for Rockchip COMBPHY driver is more complex than it needs -to be, e.g. declaring multiple init functions that only differ in the -error message. - -Simplify the init ops based on code from the Linux mainline driver. - -This change also ensure that errors returned from combphy_cfg() and -reset_deassert_bulk() is propertly propagated to the caller. No other -runtime change is expected with this simplication. - -Signed-off-by: Jonas Karlman ---- - .../rockchip/phy-rockchip-naneng-combphy.c | 101 ++++-------------- - 1 file changed, 19 insertions(+), 82 deletions(-) - -diff --git a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c -index a3038d067d3..f246c8db2d6 100644 ---- a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c -+++ b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c -@@ -98,104 +98,41 @@ static int param_write(struct regmap *base, - return regmap_write(base, reg->offset, val); - } - --static int rockchip_combphy_pcie_init(struct rockchip_combphy_priv *priv) --{ -- int ret = 0; -- -- if (priv->cfg->combphy_cfg) { -- ret = priv->cfg->combphy_cfg(priv); -- if (ret) { -- dev_err(priv->dev, "failed to init phy for pcie\n"); -- return ret; -- } -- } -- -- return ret; --} -- --static int rockchip_combphy_usb3_init(struct rockchip_combphy_priv *priv) --{ -- int ret = 0; -- -- if (priv->cfg->combphy_cfg) { -- ret = priv->cfg->combphy_cfg(priv); -- if (ret) { -- dev_err(priv->dev, "failed to init phy for usb3\n"); -- return ret; -- } -- } -- -- return ret; --} -- --static int rockchip_combphy_sata_init(struct rockchip_combphy_priv *priv) --{ -- int ret = 0; -- -- if (priv->cfg->combphy_cfg) { -- ret = priv->cfg->combphy_cfg(priv); -- if (ret) { -- dev_err(priv->dev, "failed to init phy for sata\n"); -- return ret; -- } -- } -- -- return ret; --} -- --static int rockchip_combphy_sgmii_init(struct rockchip_combphy_priv *priv) -+static int rockchip_combphy_init(struct phy *phy) - { -- int ret = 0; -- -- if (priv->cfg->combphy_cfg) { -- ret = priv->cfg->combphy_cfg(priv); -- if (ret) { -- dev_err(priv->dev, "failed to init phy for sgmii\n"); -- return ret; -- } -- } -+ struct rockchip_combphy_priv *priv = dev_get_priv(phy->dev); -+ int ret; - -- return ret; --} -+ ret = clk_enable(&priv->ref_clk); -+ if (ret < 0 && ret != -ENOSYS) -+ return ret; - --static int rockchip_combphy_set_mode(struct rockchip_combphy_priv *priv) --{ - switch (priv->mode) { - case PHY_TYPE_PCIE: -- rockchip_combphy_pcie_init(priv); -- break; - case PHY_TYPE_USB3: -- rockchip_combphy_usb3_init(priv); -- break; - case PHY_TYPE_SATA: -- rockchip_combphy_sata_init(priv); -- break; - case PHY_TYPE_SGMII: - case PHY_TYPE_QSGMII: -- return rockchip_combphy_sgmii_init(priv); -+ if (priv->cfg->combphy_cfg) -+ ret = priv->cfg->combphy_cfg(priv); -+ else -+ ret = 0; -+ break; - default: - dev_err(priv->dev, "incompatible PHY type\n"); -- return -EINVAL; -+ ret = -EINVAL; -+ break; - } - -- return 0; --} -- --static int rockchip_combphy_init(struct phy *phy) --{ -- struct rockchip_combphy_priv *priv = dev_get_priv(phy->dev); -- int ret; -- -- ret = clk_enable(&priv->ref_clk); -- if (ret < 0 && ret != -ENOSYS) -- return ret; -+ if (ret) { -+ dev_err(priv->dev, "failed to init phy for phy type %x\n", priv->mode); -+ goto err_clk; -+ } - -- ret = rockchip_combphy_set_mode(priv); -+ ret = reset_deassert_bulk(&priv->phy_rsts); - if (ret) - goto err_clk; - -- reset_deassert_bulk(&priv->phy_rsts); -- - return 0; - - err_clk: -@@ -305,7 +242,7 @@ static int rockchip_combphy_probe(struct udevice *udev) - } - - priv->dev = udev; -- priv->mode = PHY_TYPE_SATA; -+ priv->mode = PHY_NONE; - priv->cfg = phy_cfg; - - return rockchip_combphy_parse_dt(udev, priv); --- -2.34.1 - diff --git a/projects/Rockchip/patches/u-boot/rockchip-0024-rockchip-rk3528-radxa-e20c-Drop-eMMC-HS200-prop-from.patch b/projects/Rockchip/patches/u-boot/rockchip-0005-rockchip-rk3528-radxa-e20c-Drop-eMMC-HS200-prop-from.patch similarity index 87% rename from projects/Rockchip/patches/u-boot/rockchip-0024-rockchip-rk3528-radxa-e20c-Drop-eMMC-HS200-prop-from.patch rename to projects/Rockchip/patches/u-boot/rockchip-0005-rockchip-rk3528-radxa-e20c-Drop-eMMC-HS200-prop-from.patch index b4ba54e151..4c64f908d2 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0024-rockchip-rk3528-radxa-e20c-Drop-eMMC-HS200-prop-from.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0005-rockchip-rk3528-radxa-e20c-Drop-eMMC-HS200-prop-from.patch @@ -1,7 +1,7 @@ -From f46aba244531135b5349418c5a1d386a5af54ee9 Mon Sep 17 00:00:00 2001 +From a75fe1d67e8adf70c6f70c09a0956345069d0531 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 20 Jul 2025 15:23:27 +0000 -Subject: [PATCH 24/84] rockchip: rk3528-radxa-e20c: Drop eMMC HS200 prop from +Subject: [PATCH 05/51] rockchip: rk3528-radxa-e20c: Drop eMMC HS200 prop from board u-boot.dtsi The commit f8cb3fde935e ("arm: dts: rockchip: Fix eMMC write on RK3528") diff --git a/projects/Rockchip/patches/u-boot/rockchip-0025-HACK-rockchip-dts-upstream-use-work-in-progress-RK35.patch b/projects/Rockchip/patches/u-boot/rockchip-0006-HACK-rockchip-dts-upstream-use-work-in-progress-RK35.patch similarity index 99% rename from projects/Rockchip/patches/u-boot/rockchip-0025-HACK-rockchip-dts-upstream-use-work-in-progress-RK35.patch rename to projects/Rockchip/patches/u-boot/rockchip-0006-HACK-rockchip-dts-upstream-use-work-in-progress-RK35.patch index be4c3dcda2..77361f1649 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0025-HACK-rockchip-dts-upstream-use-work-in-progress-RK35.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0006-HACK-rockchip-dts-upstream-use-work-in-progress-RK35.patch @@ -1,7 +1,7 @@ -From ea6c170437917c10bfae93ea2e1b58edc8b6eab8 Mon Sep 17 00:00:00 2001 +From 6baa2c963767dd90a4186483422d7c83902750d1 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Wed, 12 Mar 2025 00:32:03 +0000 -Subject: [PATCH 25/84] HACK: rockchip: dts/upstream: use work-in-progress +Subject: [PATCH 06/51] HACK: rockchip: dts/upstream: use work-in-progress RK3528 DTs Signed-off-by: Jonas Karlman diff --git a/projects/Rockchip/patches/u-boot/rockchip-0006-phy-rockchip-naneng-combphy-Use-syscon_regmap_lookup.patch b/projects/Rockchip/patches/u-boot/rockchip-0006-phy-rockchip-naneng-combphy-Use-syscon_regmap_lookup.patch deleted file mode 100644 index 43cf0d6ad9..0000000000 --- a/projects/Rockchip/patches/u-boot/rockchip-0006-phy-rockchip-naneng-combphy-Use-syscon_regmap_lookup.patch +++ /dev/null @@ -1,53 +0,0 @@ -From eec16e822568cf506da371bd8d4ea21c04567dc9 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Mon, 21 Jul 2025 22:07:14 +0000 -Subject: [PATCH 06/84] phy: rockchip: naneng-combphy: Use - syscon_regmap_lookup_by_phandle - -Change to use syscon_regmap_lookup_by_phandle() helper instead of -finding the syscon udevice and making a call to syscon_get_regmap(). - -No runtime change is expected with this simplication. - -Signed-off-by: Jonas Karlman ---- - .../phy/rockchip/phy-rockchip-naneng-combphy.c | 17 +++++++---------- - 1 file changed, 7 insertions(+), 10 deletions(-) - -diff --git a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c -index f246c8db2d6..7f107a11606 100644 ---- a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c -+++ b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c -@@ -175,22 +175,19 @@ static const struct phy_ops rockchip_combphy_ops = { - static int rockchip_combphy_parse_dt(struct udevice *dev, - struct rockchip_combphy_priv *priv) - { -- struct udevice *syscon; - int ret; - -- ret = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, "rockchip,pipe-grf", &syscon); -- if (ret) { -- dev_err(dev, "failed to find peri_ctrl pipe-grf regmap"); -- return ret; -+ priv->pipe_grf = syscon_regmap_lookup_by_phandle(dev, "rockchip,pipe-grf"); -+ if (IS_ERR(priv->pipe_grf)) { -+ dev_err(dev, "failed to find peri_ctrl pipe-grf regmap\n"); -+ return PTR_ERR(priv->pipe_grf); - } -- priv->pipe_grf = syscon_get_regmap(syscon); - -- ret = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, "rockchip,pipe-phy-grf", &syscon); -- if (ret) { -+ priv->phy_grf = syscon_regmap_lookup_by_phandle(dev, "rockchip,pipe-phy-grf"); -+ if (IS_ERR(priv->phy_grf)) { - dev_err(dev, "failed to find peri_ctrl pipe-phy-grf regmap\n"); -- return ret; -+ return PTR_ERR(priv->phy_grf); - } -- priv->phy_grf = syscon_get_regmap(syscon); - - ret = clk_get_by_index(dev, 0, &priv->ref_clk); - if (ret) { --- -2.34.1 - diff --git a/projects/Rockchip/patches/u-boot/rockchip-0007-phy-rockchip-inno-usb2-Fix-improper-use-of-UCLASS_PH.patch b/projects/Rockchip/patches/u-boot/rockchip-0007-phy-rockchip-inno-usb2-Fix-improper-use-of-UCLASS_PH.patch deleted file mode 100644 index 75fb417413..0000000000 --- a/projects/Rockchip/patches/u-boot/rockchip-0007-phy-rockchip-inno-usb2-Fix-improper-use-of-UCLASS_PH.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 677ca627443e49b96b0b21fe9d33070848b26a7b Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Mon, 21 Jul 2025 22:07:15 +0000 -Subject: [PATCH 07/84] phy: rockchip: inno-usb2: Fix improper use of - UCLASS_PHY - -The Rockchip USB2PHY glue driver improperly present itself as a -UCLASS_PHY driver, without ever implementing the required phy_ops. - -This is something that in special circumstances can lead to a NULL -pointer dereference followed by a SError crash. - -Change the glue driver to use UCLASS_NOP to fix this. - -Signed-off-by: Jonas Karlman ---- - drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c -index 3cc5956aed5..a3222138b9d 100644 ---- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c -+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c -@@ -547,7 +547,7 @@ U_BOOT_DRIVER(rockchip_usb2phy_clock) = { - - U_BOOT_DRIVER(rockchip_usb2phy) = { - .name = "rockchip_usb2phy", -- .id = UCLASS_PHY, -+ .id = UCLASS_NOP, - .of_match = rockchip_usb2phy_ids, - .probe = rockchip_usb2phy_probe, - .bind = rockchip_usb2phy_bind, --- -2.34.1 - diff --git a/projects/Rockchip/patches/u-boot/rockchip-0026-rockchip-rk3528-generic-Add-basic-support-for-USB-OT.patch b/projects/Rockchip/patches/u-boot/rockchip-0007-rockchip-rk3528-generic-Add-basic-support-for-USB-OT.patch similarity index 94% rename from projects/Rockchip/patches/u-boot/rockchip-0026-rockchip-rk3528-generic-Add-basic-support-for-USB-OT.patch rename to projects/Rockchip/patches/u-boot/rockchip-0007-rockchip-rk3528-generic-Add-basic-support-for-USB-OT.patch index b863b29107..d5ce8cc871 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0026-rockchip-rk3528-generic-Add-basic-support-for-USB-OT.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0007-rockchip-rk3528-generic-Add-basic-support-for-USB-OT.patch @@ -1,7 +1,7 @@ -From bc38f857e5ae6e1dd211151c6cbf458d8a878774 Mon Sep 17 00:00:00 2001 +From 3786a7326b5a6a0c1129e09dd6afb1c73b03a5e8 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 20 Jul 2025 10:08:16 +0000 -Subject: [PATCH 26/84] rockchip: rk3528-generic: Add basic support for USB OTG +Subject: [PATCH 07/51] rockchip: rk3528-generic: Add basic support for USB OTG Signed-off-by: Jonas Karlman --- diff --git a/projects/Rockchip/patches/u-boot/rockchip-0008-phy-rockchip-typec-Fix-improper-use-of-UCLASS_PHY.patch b/projects/Rockchip/patches/u-boot/rockchip-0008-phy-rockchip-typec-Fix-improper-use-of-UCLASS_PHY.patch deleted file mode 100644 index 97320c8217..0000000000 --- a/projects/Rockchip/patches/u-boot/rockchip-0008-phy-rockchip-typec-Fix-improper-use-of-UCLASS_PHY.patch +++ /dev/null @@ -1,34 +0,0 @@ -From b607543bf26e94417f401654f5eed7459f6a7547 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Mon, 21 Jul 2025 22:07:16 +0000 -Subject: [PATCH 08/84] phy: rockchip: typec: Fix improper use of UCLASS_PHY - -The Rockchip TypeC glue driver improperly present itself as a UCLASS_PHY -driver, without ever implementing the required phy_ops. - -This is something that in special circumstances can lead to a NULL -pointer dereference followed by a SError crash. - -Change the glue driver to use UCLASS_NOP to fix this. - -Signed-off-by: Jonas Karlman ---- - drivers/phy/rockchip/phy-rockchip-typec.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/phy/rockchip/phy-rockchip-typec.c b/drivers/phy/rockchip/phy-rockchip-typec.c -index c48a5cd5267..66d1d32d25c 100644 ---- a/drivers/phy/rockchip/phy-rockchip-typec.c -+++ b/drivers/phy/rockchip/phy-rockchip-typec.c -@@ -788,7 +788,7 @@ U_BOOT_DRIVER(rockchip_tcphy_usb3_port) = { - - U_BOOT_DRIVER(rockchip_typec_phy) = { - .name = "rockchip_typec_phy", -- .id = UCLASS_PHY, -+ .id = UCLASS_NOP, - .of_match = rockchip_typec_phy_ids, - .probe = rockchip_tcphy_probe, - .bind = rockchip_tcphy_bind, --- -2.34.1 - diff --git a/projects/Rockchip/patches/u-boot/rockchip-0027-rockchip-rk3528-Add-support-for-booting-from-SPI-fla.patch b/projects/Rockchip/patches/u-boot/rockchip-0008-rockchip-rk3528-Add-support-for-booting-from-SPI-fla.patch similarity index 92% rename from projects/Rockchip/patches/u-boot/rockchip-0027-rockchip-rk3528-Add-support-for-booting-from-SPI-fla.patch rename to projects/Rockchip/patches/u-boot/rockchip-0008-rockchip-rk3528-Add-support-for-booting-from-SPI-fla.patch index d5294ffec3..3a36f0c2db 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0027-rockchip-rk3528-Add-support-for-booting-from-SPI-fla.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0008-rockchip-rk3528-Add-support-for-booting-from-SPI-fla.patch @@ -1,7 +1,7 @@ -From 6f012de41460639e7efd9a6713ee3757b40a0c85 Mon Sep 17 00:00:00 2001 +From 5287ab111719d5be9ca32b2419061095529de70e Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Wed, 23 Jul 2025 22:22:36 +0000 -Subject: [PATCH 27/84] rockchip: rk3528: Add support for booting from SPI +Subject: [PATCH 08/51] rockchip: rk3528: Add support for booting from SPI flash Signed-off-by: Jonas Karlman diff --git a/projects/Rockchip/patches/u-boot/rockchip-0028-WIP-net-rockchip-Allow-use-of-rx-tx-delayline-for-rg.patch b/projects/Rockchip/patches/u-boot/rockchip-0009-WIP-net-rockchip-Allow-use-of-rx-tx-delayline-for-rg.patch similarity index 97% rename from projects/Rockchip/patches/u-boot/rockchip-0028-WIP-net-rockchip-Allow-use-of-rx-tx-delayline-for-rg.patch rename to projects/Rockchip/patches/u-boot/rockchip-0009-WIP-net-rockchip-Allow-use-of-rx-tx-delayline-for-rg.patch index 14e5933385..4f451c46f3 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0028-WIP-net-rockchip-Allow-use-of-rx-tx-delayline-for-rg.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0009-WIP-net-rockchip-Allow-use-of-rx-tx-delayline-for-rg.patch @@ -1,7 +1,7 @@ -From 81809fd8f075a3fd12d7388d8222609f17fbc6f5 Mon Sep 17 00:00:00 2001 +From fa397cbb00e6217c591243541dd7bafeec62e001 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 27 Jul 2025 08:45:50 +0000 -Subject: [PATCH 28/84] WIP: net: rockchip: Allow use of rx/tx delayline for +Subject: [PATCH 09/51] WIP: net: rockchip: Allow use of rx/tx delayline for rgmii-id modes Signed-off-by: Jonas Karlman diff --git a/projects/Rockchip/patches/u-boot/rockchip-0009-rockchip-rk3588-Disable-USB3OTG-U3-ports-early.patch b/projects/Rockchip/patches/u-boot/rockchip-0009-rockchip-rk3588-Disable-USB3OTG-U3-ports-early.patch deleted file mode 100644 index da7d724d6f..0000000000 --- a/projects/Rockchip/patches/u-boot/rockchip-0009-rockchip-rk3588-Disable-USB3OTG-U3-ports-early.patch +++ /dev/null @@ -1,50 +0,0 @@ -From 12d3074fb4c7c8ab80bbc5f5faae505e25609385 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Mon, 21 Jul 2025 22:07:17 +0000 -Subject: [PATCH 09/84] rockchip: rk3588: Disable USB3OTG U3 ports early - -The RK3588 SoC comes with USB OTG support using a DWC3 controller with -a USB2 PHY and a USB3 PHY (USBDP PHY). - -Some board designs may not use the USBDP PHY for USB3 purpose. For these -board to use USB OTG the input clock source must change to use UTMI clk -instead of PIPE clk. - -Change to always disable the USB3OTG U3 ports early and leave it to the -USBDP PHY driver to re-enable the U3 port when a usb3-phy is described -in the board device tree. - -Signed-off-by: Jonas Karlman ---- - arch/arm/mach-rockchip/rk3588/rk3588.c | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c b/arch/arm/mach-rockchip/rk3588/rk3588.c -index e2278ff792b..c01a4002089 100644 ---- a/arch/arm/mach-rockchip/rk3588/rk3588.c -+++ b/arch/arm/mach-rockchip/rk3588/rk3588.c -@@ -15,6 +15,10 @@ - #include - #include - -+#define USB_GRF_BASE 0xfd5ac000 -+#define USB3OTG0_CON1 0x001c -+#define USB3OTG1_CON1 0x0034 -+ - #define FIREWALL_DDR_BASE 0xfe030000 - #define FW_DDR_MST5_REG 0x54 - #define FW_DDR_MST13_REG 0x74 -@@ -184,6 +188,10 @@ int arch_cpu_init(void) - /* Disable JTAG exposed on SDMMC */ - rk_clrreg(&sys_grf->soc_con[6], SYS_GRF_FORCE_JTAG); - #endif -+ -+ /* Disable USB3OTG U3 ports, later enabled by USBDP PHY driver */ -+ writel(0xffff0188, USB_GRF_BASE + USB3OTG0_CON1); -+ writel(0xffff0188, USB_GRF_BASE + USB3OTG1_CON1); - #endif - - return 0; --- -2.34.1 - diff --git a/projects/Rockchip/patches/u-boot/rockchip-0029-WIP-net-rockchip-Use-CRU-as-default-TX-clk-source-fo.patch b/projects/Rockchip/patches/u-boot/rockchip-0010-WIP-net-rockchip-Use-CRU-as-default-TX-clk-source-fo.patch similarity index 92% rename from projects/Rockchip/patches/u-boot/rockchip-0029-WIP-net-rockchip-Use-CRU-as-default-TX-clk-source-fo.patch rename to projects/Rockchip/patches/u-boot/rockchip-0010-WIP-net-rockchip-Use-CRU-as-default-TX-clk-source-fo.patch index 04ccc5e2fa..5546e49c6e 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0029-WIP-net-rockchip-Use-CRU-as-default-TX-clk-source-fo.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0010-WIP-net-rockchip-Use-CRU-as-default-TX-clk-source-fo.patch @@ -1,7 +1,7 @@ -From c95d9d8bb9c312e78c3027fb89139200c5421bfb Mon Sep 17 00:00:00 2001 +From bd1ae5092d835376db267a50f31e9dbb45ccf681 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 27 Jul 2025 08:46:40 +0000 -Subject: [PATCH 29/84] WIP: net: rockchip Use CRU as default TX clk source for +Subject: [PATCH 10/51] WIP: net: rockchip Use CRU as default TX clk source for RGMII modes Signed-off-by: Jonas Karlman diff --git a/projects/Rockchip/patches/u-boot/rockchip-0010-rockchip-rk3576-Disable-USB3OTG0-U3-port-early.patch b/projects/Rockchip/patches/u-boot/rockchip-0010-rockchip-rk3576-Disable-USB3OTG0-U3-port-early.patch deleted file mode 100644 index aadcb3d74d..0000000000 --- a/projects/Rockchip/patches/u-boot/rockchip-0010-rockchip-rk3576-Disable-USB3OTG0-U3-port-early.patch +++ /dev/null @@ -1,47 +0,0 @@ -From bbf94bdbe33c3644ae2172d723d3ae88a3c57a98 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Mon, 21 Jul 2025 22:07:18 +0000 -Subject: [PATCH 10/84] rockchip: rk3576: Disable USB3OTG0 U3 port early - -The RK3576 SoC comes with USB OTG support using a DWC3 controller with -a USB2 PHY and a USB3 PHY (USBDP PHY). - -Some board designs may not use the USBDP PHY for USB3 purpose. For these -board to use USB OTG the input clock source must change to use UTMI clk -instead of PIPE clk. - -Change to always disable the USB3OTG0 U3 port early and leave it to the -USBDP PHY driver to re-enable the U3 port when a usb3-phy is described -in the board device tree. - -Signed-off-by: Jonas Karlman ---- - arch/arm/mach-rockchip/rk3576/rk3576.c | 6 ++++++ - 1 file changed, 6 insertions(+) - -diff --git a/arch/arm/mach-rockchip/rk3576/rk3576.c b/arch/arm/mach-rockchip/rk3576/rk3576.c -index ba5c94b4b3d..dc53941ab2f 100644 ---- a/arch/arm/mach-rockchip/rk3576/rk3576.c -+++ b/arch/arm/mach-rockchip/rk3576/rk3576.c -@@ -29,6 +29,9 @@ - #define SGRF_DOMAIN_CON4 0x10 - #define SGRF_DOMAIN_CON5 0x14 - -+#define USB_GRF_BASE 0x2601E000 -+#define USB3OTG0_CON1 0x0030 -+ - const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = { - [BROM_BOOTSOURCE_EMMC] = "/soc/mmc@2a330000", - [BROM_BOOTSOURCE_SD] = "/soc/mmc@2a310000", -@@ -151,5 +154,8 @@ int arch_cpu_init(void) - */ - writel(0xffffff00, SYS_SGRF_BASE + SYS_SGRF_SOC_CON20); - -+ /* Disable USB3OTG0 U3 port, later enabled by USBDP PHY driver */ -+ writel(0xffff0188, USB_GRF_BASE + USB3OTG0_CON1); -+ - return 0; - } --- -2.34.1 - diff --git a/projects/Rockchip/patches/u-boot/rockchip-0030-WIP-board-rockchip-Add-Radxa-ROCK-2A-2F.patch b/projects/Rockchip/patches/u-boot/rockchip-0011-WIP-board-rockchip-Add-Radxa-ROCK-2A-2F.patch similarity index 98% rename from projects/Rockchip/patches/u-boot/rockchip-0030-WIP-board-rockchip-Add-Radxa-ROCK-2A-2F.patch rename to projects/Rockchip/patches/u-boot/rockchip-0011-WIP-board-rockchip-Add-Radxa-ROCK-2A-2F.patch index e18daf3161..2e7c7239a0 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0030-WIP-board-rockchip-Add-Radxa-ROCK-2A-2F.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0011-WIP-board-rockchip-Add-Radxa-ROCK-2A-2F.patch @@ -1,7 +1,7 @@ -From 69af49f3e3f54baf88b09a003f33c9bcc04c2ae2 Mon Sep 17 00:00:00 2001 +From 9a7f27696bf3f19206d8a5cdbf921c62e18720e8 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Wed, 12 Mar 2025 00:13:48 +0000 -Subject: [PATCH 30/84] WIP: board: rockchip: Add Radxa ROCK 2A/2F +Subject: [PATCH 11/51] WIP: board: rockchip: Add Radxa ROCK 2A/2F Features tested on a ROCK 2A v1.202: - SD-card boot @@ -326,7 +326,7 @@ index 00000000000..b9261de460b +CONFIG_USB_FUNCTION_ROCKUSB=y +CONFIG_ERRNO_STR=y diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst -index b88299cbba2..263291884b0 100644 +index de3aa79cb5c..c9cf3e4d2a9 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -102,6 +102,7 @@ List of mainline supported Rockchip boards: diff --git a/projects/Rockchip/patches/u-boot/rockchip-0011-rockchip-rk3588-generic-Move-usb-nodes-to-board-dts.patch b/projects/Rockchip/patches/u-boot/rockchip-0011-rockchip-rk3588-generic-Move-usb-nodes-to-board-dts.patch deleted file mode 100644 index f9520a0caa..0000000000 --- a/projects/Rockchip/patches/u-boot/rockchip-0011-rockchip-rk3588-generic-Move-usb-nodes-to-board-dts.patch +++ /dev/null @@ -1,90 +0,0 @@ -From 3504dae677104a8cf12d625ad628726c5b061c7b Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Mon, 21 Jul 2025 22:07:19 +0000 -Subject: [PATCH 11/84] rockchip: rk3588-generic: Move usb nodes to board dts - -After the commit 7a53abb18325 ("rockchip: rk3588: Remove USB3 DRD nodes -in u-boot.dtsi") was merged for v2024.10 there is no reason to keep the -usb nodes for the Generic RK3588 board in the board u-boot.dtsi. - -Move usb related nodes from board u-boot.dtsi to main board device tree. - -While at it, also drop use of the usb3-phy as we only want to enable the -usb2-phy to be compatible with as many boards as possible. - -Signed-off-by: Jonas Karlman ---- - arch/arm/dts/rk3588-generic-u-boot.dtsi | 18 ------------------ - arch/arm/dts/rk3588-generic.dts | 16 ++++++++++++++++ - configs/generic-rk3588_defconfig | 1 - - 3 files changed, 16 insertions(+), 19 deletions(-) - -diff --git a/arch/arm/dts/rk3588-generic-u-boot.dtsi b/arch/arm/dts/rk3588-generic-u-boot.dtsi -index f67301d87a6..853ed58cfe5 100644 ---- a/arch/arm/dts/rk3588-generic-u-boot.dtsi -+++ b/arch/arm/dts/rk3588-generic-u-boot.dtsi -@@ -1,21 +1,3 @@ - // SPDX-License-Identifier: (GPL-2.0+ OR MIT) - - #include "rk3588s-u-boot.dtsi" -- --&u2phy0 { -- status = "okay"; --}; -- --&u2phy0_otg { -- status = "okay"; --}; -- --&usbdp_phy0 { -- status = "okay"; --}; -- --&usb_host0_xhci { -- dr_mode = "peripheral"; -- maximum-speed = "high-speed"; -- status = "okay"; --}; -diff --git a/arch/arm/dts/rk3588-generic.dts b/arch/arm/dts/rk3588-generic.dts -index 95d757676f1..6740f9866f1 100644 ---- a/arch/arm/dts/rk3588-generic.dts -+++ b/arch/arm/dts/rk3588-generic.dts -@@ -39,7 +39,23 @@ - status = "okay"; - }; - -+&u2phy0 { -+ status = "okay"; -+}; -+ -+&u2phy0_otg { -+ status = "okay"; -+}; -+ - &uart2 { - pinctrl-0 = <&uart2m0_xfer>; - status = "okay"; - }; -+ -+&usb_host0_xhci { -+ dr_mode = "peripheral"; -+ maximum-speed = "high-speed"; -+ phys = <&u2phy0_otg>; -+ phy-names = "usb2-phy"; -+ status = "okay"; -+}; -diff --git a/configs/generic-rk3588_defconfig b/configs/generic-rk3588_defconfig -index ed2f936b324..dfa8efabe6b 100644 ---- a/configs/generic-rk3588_defconfig -+++ b/configs/generic-rk3588_defconfig -@@ -53,7 +53,6 @@ CONFIG_MMC_SDHCI=y - CONFIG_MMC_SDHCI_SDMA=y - CONFIG_MMC_SDHCI_ROCKCHIP=y - CONFIG_PHY_ROCKCHIP_INNO_USB2=y --CONFIG_PHY_ROCKCHIP_USBDP=y - CONFIG_SPL_PINCTRL=y - CONFIG_SPL_RAM=y - CONFIG_BAUDRATE=1500000 --- -2.34.1 - diff --git a/projects/Rockchip/patches/u-boot/rockchip-0031-WIP-board-rockchip-Add-ArmSoM-Sige1.patch b/projects/Rockchip/patches/u-boot/rockchip-0012-WIP-board-rockchip-Add-ArmSoM-Sige1.patch similarity index 96% rename from projects/Rockchip/patches/u-boot/rockchip-0031-WIP-board-rockchip-Add-ArmSoM-Sige1.patch rename to projects/Rockchip/patches/u-boot/rockchip-0012-WIP-board-rockchip-Add-ArmSoM-Sige1.patch index 6238078a17..64ba39bed6 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0031-WIP-board-rockchip-Add-ArmSoM-Sige1.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0012-WIP-board-rockchip-Add-ArmSoM-Sige1.patch @@ -1,7 +1,7 @@ -From 9911469f091441d62832338bce312b3c2bab1434 Mon Sep 17 00:00:00 2001 +From 32786ea5b3d187a884bcd76f0cc4c97f6fd74434 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Wed, 12 Mar 2025 00:30:54 +0000 -Subject: [PATCH 31/84] WIP: board: rockchip: Add ArmSoM Sige1 +Subject: [PATCH 12/51] WIP: board: rockchip: Add ArmSoM Sige1 Features tested on a ArmSoM Sige1 v1.1: - SD-card boot @@ -122,7 +122,7 @@ index 00000000000..6061427ce94 +CONFIG_USB_FUNCTION_ROCKUSB=y +CONFIG_ERRNO_STR=y diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst -index 263291884b0..d2ff8653e2a 100644 +index c9cf3e4d2a9..44e161c45fe 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -100,6 +100,7 @@ List of mainline supported Rockchip boards: diff --git a/projects/Rockchip/patches/u-boot/rockchip-0032-WIP-board-rockchip-Add-FriendlyElec-NanoPi-Zero2.patch b/projects/Rockchip/patches/u-boot/rockchip-0013-WIP-board-rockchip-Add-FriendlyElec-NanoPi-Zero2.patch similarity index 96% rename from projects/Rockchip/patches/u-boot/rockchip-0032-WIP-board-rockchip-Add-FriendlyElec-NanoPi-Zero2.patch rename to projects/Rockchip/patches/u-boot/rockchip-0013-WIP-board-rockchip-Add-FriendlyElec-NanoPi-Zero2.patch index 790b4cc0a2..fff84bbc21 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0032-WIP-board-rockchip-Add-FriendlyElec-NanoPi-Zero2.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0013-WIP-board-rockchip-Add-FriendlyElec-NanoPi-Zero2.patch @@ -1,7 +1,7 @@ -From bdd09deddc01633c4bfc3be932b8b865003211b5 Mon Sep 17 00:00:00 2001 +From e0fe0b326cfd4c78d3a276e599bdea42044a2aed Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Mon, 17 Mar 2025 00:29:24 +0000 -Subject: [PATCH 32/84] WIP: board: rockchip: Add FriendlyElec NanoPi Zero2 +Subject: [PATCH 13/51] WIP: board: rockchip: Add FriendlyElec NanoPi Zero2 Features tested on a FriendlyElec NanoPi Zero2 2407: - SD-card boot @@ -125,7 +125,7 @@ index 00000000000..0913f6cc195 +CONFIG_USB_FUNCTION_ROCKUSB=y +CONFIG_ERRNO_STR=y diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst -index d2ff8653e2a..1e46f2b5619 100644 +index 44e161c45fe..183ae3f0322 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -101,6 +101,7 @@ List of mainline supported Rockchip boards: diff --git a/projects/Rockchip/patches/u-boot/rockchip-0033-WIP-board-rockchip-Add-Radxa-E24C.patch b/projects/Rockchip/patches/u-boot/rockchip-0014-WIP-board-rockchip-Add-Radxa-E24C.patch similarity index 98% rename from projects/Rockchip/patches/u-boot/rockchip-0033-WIP-board-rockchip-Add-Radxa-E24C.patch rename to projects/Rockchip/patches/u-boot/rockchip-0014-WIP-board-rockchip-Add-Radxa-E24C.patch index 00adcd72ca..b5df233c9b 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0033-WIP-board-rockchip-Add-Radxa-E24C.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0014-WIP-board-rockchip-Add-Radxa-E24C.patch @@ -1,7 +1,7 @@ -From 4a14e69f721fbc3843c2a3e8207576bbb6133816 Mon Sep 17 00:00:00 2001 +From e9c40ab22f55543ddb519992f8ce223512ecf5ea Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Wed, 23 Jul 2025 22:25:26 +0000 -Subject: [PATCH 33/84] WIP: board: rockchip: Add Radxa E24C +Subject: [PATCH 14/51] WIP: board: rockchip: Add Radxa E24C Features tested on a E24C v1.203 (D4E0S16): - SD-card boot @@ -342,7 +342,7 @@ index b9261de460b..06cc6c3d5e7 100644 CONFIG_USB_XHCI_HCD=y CONFIG_USB_EHCI_HCD=y diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst -index 1e46f2b5619..4072a7b058b 100644 +index 183ae3f0322..42828cc6618 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -104,6 +104,7 @@ List of mainline supported Rockchip boards: diff --git a/projects/Rockchip/patches/u-boot/rockchip-0034-HACK-use-usb3-host-mode-on-rock-2a.patch b/projects/Rockchip/patches/u-boot/rockchip-0015-HACK-use-usb3-host-mode-on-rock-2a.patch similarity index 81% rename from projects/Rockchip/patches/u-boot/rockchip-0034-HACK-use-usb3-host-mode-on-rock-2a.patch rename to projects/Rockchip/patches/u-boot/rockchip-0015-HACK-use-usb3-host-mode-on-rock-2a.patch index 391afdc97c..982c218b44 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0034-HACK-use-usb3-host-mode-on-rock-2a.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0015-HACK-use-usb3-host-mode-on-rock-2a.patch @@ -1,7 +1,7 @@ -From b820293e44501010c656d7e1941f910dfc5c7c89 Mon Sep 17 00:00:00 2001 +From a4df83dfc47d9a5d7d94ebf5aa42cfb4b81965ad Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 20 Jul 2025 13:11:09 +0000 -Subject: [PATCH 34/84] HACK: use usb3 host mode on rock-2a +Subject: [PATCH 15/51] HACK: use usb3 host mode on rock-2a --- arch/arm/dts/rk3528-rock-2a-u-boot.dtsi | 4 ++++ diff --git a/projects/Rockchip/patches/u-boot/rockchip-0015-rockchip-rk3528-generic-Fix-boot-after-dts-upstream-.patch b/projects/Rockchip/patches/u-boot/rockchip-0015-rockchip-rk3528-generic-Fix-boot-after-dts-upstream-.patch deleted file mode 100644 index 1f594bf219..0000000000 --- a/projects/Rockchip/patches/u-boot/rockchip-0015-rockchip-rk3528-generic-Fix-boot-after-dts-upstream-.patch +++ /dev/null @@ -1,44 +0,0 @@ -From 31932a9b2babf23c3c95b412bdb4af35176e1826 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Wed, 30 Jul 2025 23:52:42 +0000 -Subject: [PATCH 15/84] rockchip: rk3528-generic: Fix boot after dts/upstream - v6.16-dts merge - -The rk3528-generic target can no longer boot after v6.16-dts was merged -into dts/upstream, and instead end up in a boot loop: - - No serial driver found - resetting ... - -After Linux commit 34d2730fbbdd ("arm64: dts: rockchip: move rk3528 -i2c+uart aliases to board files") there is no longer an alias for -serial0 defined for the U-Boot only rk3528-generic device tree. - -Add a board specific aliases node that include the missing serial0 alias -to resolve the boot issue and ensure that stdout-path = "serial0:..." -can be resolved by U-Boot. - -Signed-off-by: Jonas Karlman ---- - arch/arm/dts/rk3528-generic.dts | 5 +++++ - 1 file changed, 5 insertions(+) - -diff --git a/arch/arm/dts/rk3528-generic.dts b/arch/arm/dts/rk3528-generic.dts -index 3f6f0bed108..fe9e72c41cd 100644 ---- a/arch/arm/dts/rk3528-generic.dts -+++ b/arch/arm/dts/rk3528-generic.dts -@@ -10,6 +10,11 @@ - model = "Generic RK3528"; - compatible = "rockchip,rk3528"; - -+ aliases { -+ mmc0 = &sdhci; -+ serial0 = &uart0; -+ }; -+ - chosen { - stdout-path = "serial0:1500000n8"; - }; --- -2.34.1 - diff --git a/projects/Rockchip/patches/u-boot/rockchip-0016-arm-dts-rockchip-Use-sdmmc-node-from-dts-upstream-on.patch b/projects/Rockchip/patches/u-boot/rockchip-0016-arm-dts-rockchip-Use-sdmmc-node-from-dts-upstream-on.patch deleted file mode 100644 index 4b30555c60..0000000000 --- a/projects/Rockchip/patches/u-boot/rockchip-0016-arm-dts-rockchip-Use-sdmmc-node-from-dts-upstream-on.patch +++ /dev/null @@ -1,121 +0,0 @@ -From 3e100c18fe037bde5f4c08d9ff06ba68caee85d5 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Wed, 30 Jul 2025 23:52:43 +0000 -Subject: [PATCH 16/84] arm: dts: rockchip: Use sdmmc node from dts/upstream on - RK3528 - -Drop the sdmmc node from soc u-boot.dtsi and instead use the sdmmc node -from rk3528.dtsi with v6.16-dts now merged to dts/upstream. - -This cleanup has no intended functional change. - -Signed-off-by: Jonas Karlman ---- - arch/arm/dts/rk3528-generic-u-boot.dtsi | 9 --------- - arch/arm/dts/rk3528-generic.dts | 12 +++++++++++- - arch/arm/dts/rk3528-radxa-e20c-u-boot.dtsi | 9 --------- - arch/arm/dts/rk3528-u-boot.dtsi | 18 ------------------ - 4 files changed, 11 insertions(+), 37 deletions(-) - -diff --git a/arch/arm/dts/rk3528-generic-u-boot.dtsi b/arch/arm/dts/rk3528-generic-u-boot.dtsi -index cc830b51456..9e1fb2a7eef 100644 ---- a/arch/arm/dts/rk3528-generic-u-boot.dtsi -+++ b/arch/arm/dts/rk3528-generic-u-boot.dtsi -@@ -1,12 +1,3 @@ - // SPDX-License-Identifier: (GPL-2.0+ OR MIT) - - #include "rk3528-u-boot.dtsi" -- --&sdmmc { -- bus-width = <4>; -- cap-sd-highspeed; -- disable-wp; -- no-mmc; -- no-sdio; -- status = "okay"; --}; -diff --git a/arch/arm/dts/rk3528-generic.dts b/arch/arm/dts/rk3528-generic.dts -index fe9e72c41cd..637ca03325e 100644 ---- a/arch/arm/dts/rk3528-generic.dts -+++ b/arch/arm/dts/rk3528-generic.dts -@@ -1,6 +1,6 @@ - // SPDX-License-Identifier: (GPL-2.0+ OR MIT) - /* -- * Minimal generic DT for RK3528 with eMMC enabled -+ * Minimal generic DT for RK3528 with eMMC and SD-card enabled - */ - - /dts-v1/; -@@ -12,6 +12,7 @@ - - aliases { - mmc0 = &sdhci; -+ mmc1 = &sdmmc; - serial0 = &uart0; - }; - -@@ -30,6 +31,15 @@ - status = "okay"; - }; - -+&sdmmc { -+ bus-width = <4>; -+ cap-sd-highspeed; -+ disable-wp; -+ no-mmc; -+ no-sdio; -+ status = "okay"; -+}; -+ - &uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0m0_xfer>; -diff --git a/arch/arm/dts/rk3528-radxa-e20c-u-boot.dtsi b/arch/arm/dts/rk3528-radxa-e20c-u-boot.dtsi -index 1372d8f1e38..05a58c136bc 100644 ---- a/arch/arm/dts/rk3528-radxa-e20c-u-boot.dtsi -+++ b/arch/arm/dts/rk3528-radxa-e20c-u-boot.dtsi -@@ -5,12 +5,3 @@ - &sdhci { - mmc-hs200-1_8v; - }; -- --&sdmmc { -- bus-width = <4>; -- cap-mmc-highspeed; -- cap-sd-highspeed; -- disable-wp; -- vmmc-supply = <&vcc_3v3>; -- status = "okay"; --}; -diff --git a/arch/arm/dts/rk3528-u-boot.dtsi b/arch/arm/dts/rk3528-u-boot.dtsi -index eb6a55cd5c9..a18d33b3d36 100644 ---- a/arch/arm/dts/rk3528-u-boot.dtsi -+++ b/arch/arm/dts/rk3528-u-boot.dtsi -@@ -27,24 +27,6 @@ - compatible = "rockchip,rk3528-otp"; - reg = <0x0 0xffce0000 0x0 0x4000>; - }; -- -- sdmmc: mmc@ffc30000 { -- compatible = "rockchip,rk3528-dw-mshc", -- "rockchip,rk3288-dw-mshc"; -- reg = <0x0 0xffc30000 0x0 0x4000>; -- clocks = <&cru HCLK_SDMMC0>, <&cru CCLK_SRC_SDMMC0>; -- clock-names = "biu", "ciu"; -- fifo-depth = <0x100>; -- interrupts = ; -- max-frequency = <150000000>; -- pinctrl-names = "default"; -- pinctrl-0 = <&sdmmc_bus4>, <&sdmmc_clk>, <&sdmmc_cmd>, -- <&sdmmc_det>; -- resets = <&cru SRST_H_SDMMC0>; -- reset-names = "reset"; -- rockchip,default-sample-phase = <90>; -- status = "disabled"; -- }; - }; - }; - --- -2.34.1 - diff --git a/projects/Rockchip/patches/u-boot/rockchip-0035-rockchip-sdram-Add-rockchip_sdram_type-helper.patch b/projects/Rockchip/patches/u-boot/rockchip-0016-rockchip-sdram-Add-rockchip_sdram_type-helper.patch similarity index 93% rename from projects/Rockchip/patches/u-boot/rockchip-0035-rockchip-sdram-Add-rockchip_sdram_type-helper.patch rename to projects/Rockchip/patches/u-boot/rockchip-0016-rockchip-sdram-Add-rockchip_sdram_type-helper.patch index 25585f4fbc..05374fd3bc 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0035-rockchip-sdram-Add-rockchip_sdram_type-helper.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0016-rockchip-sdram-Add-rockchip_sdram_type-helper.patch @@ -1,7 +1,7 @@ -From df76b4ebfb1fa9d600d5e28dba5c4a9a1f3b30fd Mon Sep 17 00:00:00 2001 +From 7a1532221bff00fbc5cde72203fbd2e9bbe623ff Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 20 Jul 2025 13:07:25 +0000 -Subject: [PATCH 35/84] rockchip: sdram: Add rockchip_sdram_type() helper +Subject: [PATCH 16/51] rockchip: sdram: Add rockchip_sdram_type() helper Add a helper function based on rockchip_sdram_size() that return what DRAM type is used on current running board. diff --git a/projects/Rockchip/patches/u-boot/rockchip-0017-arm-dts-rockchip-Set-init-microvolt-for-pwm-regulato.patch b/projects/Rockchip/patches/u-boot/rockchip-0017-arm-dts-rockchip-Set-init-microvolt-for-pwm-regulato.patch deleted file mode 100644 index fce05b6b1f..0000000000 --- a/projects/Rockchip/patches/u-boot/rockchip-0017-arm-dts-rockchip-Set-init-microvolt-for-pwm-regulato.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 021508b653ce85a4528a63834457d5754724e4a1 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Wed, 30 Jul 2025 23:52:44 +0000 -Subject: [PATCH 17/84] arm: dts: rockchip: Set init-microvolt for - pwm-regulators on Radxa E20C - -Radxa E20C has two main pwm-regulators, vdd_arm and vdd_logic. - -Add init-microvolt props to ensure the regulators are initialized at -the recommended power-on sequence voltage instead of at max voltage. - -Signed-off-by: Jonas Karlman ---- - arch/arm/dts/rk3528-radxa-e20c-u-boot.dtsi | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/arch/arm/dts/rk3528-radxa-e20c-u-boot.dtsi b/arch/arm/dts/rk3528-radxa-e20c-u-boot.dtsi -index 05a58c136bc..16c47e6b9a9 100644 ---- a/arch/arm/dts/rk3528-radxa-e20c-u-boot.dtsi -+++ b/arch/arm/dts/rk3528-radxa-e20c-u-boot.dtsi -@@ -5,3 +5,11 @@ - &sdhci { - mmc-hs200-1_8v; - }; -+ -+&vdd_arm { -+ regulator-init-microvolt = <953000>; -+}; -+ -+&vdd_logic { -+ regulator-init-microvolt = <900000>; -+}; --- -2.34.1 - diff --git a/projects/Rockchip/patches/u-boot/rockchip-0036-rockchip-rock5b-rk3588-Add-support-for-ROCK-5B.patch b/projects/Rockchip/patches/u-boot/rockchip-0017-rockchip-rock5b-rk3588-Add-support-for-ROCK-5B.patch similarity index 95% rename from projects/Rockchip/patches/u-boot/rockchip-0036-rockchip-rock5b-rk3588-Add-support-for-ROCK-5B.patch rename to projects/Rockchip/patches/u-boot/rockchip-0017-rockchip-rock5b-rk3588-Add-support-for-ROCK-5B.patch index 77deffbf3a..1c021e8e44 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0036-rockchip-rock5b-rk3588-Add-support-for-ROCK-5B.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0017-rockchip-rock5b-rk3588-Add-support-for-ROCK-5B.patch @@ -1,7 +1,7 @@ -From 0e8492adb9af36ec07969652638295b92e662840 Mon Sep 17 00:00:00 2001 +From 26a50f1661ef1d698ed4806a807130551fcf0a6a Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Mon, 14 Jul 2025 19:08:46 +0000 -Subject: [PATCH 36/84] rockchip: rock5b-rk3588: Add support for ROCK 5B+ +Subject: [PATCH 17/51] rockchip: rock5b-rk3588: Add support for ROCK 5B+ Include FDTs for both ROCK 5B and 5B+ in the FIT and add board selection code to load the 5B+ FDT when the DRAM type is LPDDR5 and ADC channel 5 @@ -172,10 +172,10 @@ index 6349e879145..967cebc2054 100644 CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_REGMAP=y diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst -index 4072a7b058b..347c344a7c5 100644 +index 42828cc6618..dd9563d9124 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst -@@ -156,7 +156,7 @@ List of mainline supported Rockchip boards: +@@ -159,7 +159,7 @@ List of mainline supported Rockchip boards: - Pine64 QuartzPro64 (quartzpro64-rk3588) - Radxa ROCK 5 ITX (rock-5-itx-rk3588) - Radxa ROCK 5A (rock5a-rk3588s) diff --git a/projects/Rockchip/patches/u-boot/rockchip-0018-rockchip-rk3528-Disable-USB3OTG-U3-port-early.patch b/projects/Rockchip/patches/u-boot/rockchip-0018-rockchip-rk3528-Disable-USB3OTG-U3-port-early.patch deleted file mode 100644 index d373f53152..0000000000 --- a/projects/Rockchip/patches/u-boot/rockchip-0018-rockchip-rk3528-Disable-USB3OTG-U3-port-early.patch +++ /dev/null @@ -1,48 +0,0 @@ -From 95e59308dcc7a38811241ccee900c22d151ff507 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Wed, 30 Jul 2025 23:52:45 +0000 -Subject: [PATCH 18/84] rockchip: rk3528: Disable USB3OTG U3 port early - -The RK3528 SoC comes with USB OTG support using a DWC3 controller with -a USB2 PHY and a USB3 PHY (COMBPHY). - -Some board designs may not use the COMBPHY for USB3 purpose. For these -board to use USB OTG the input clock source must change to use UTMI clk -instead of PIPE clk. - -Change to always disable the USB3OTG U3 port early and leave it to the -COMBPHY driver to re-enable the U3 port when a usb3-phy is described in -the board device tree. - -Signed-off-by: Jonas Karlman ---- - arch/arm/mach-rockchip/rk3528/rk3528.c | 6 ++++++ - 1 file changed, 6 insertions(+) - -diff --git a/arch/arm/mach-rockchip/rk3528/rk3528.c b/arch/arm/mach-rockchip/rk3528/rk3528.c -index 4892ff6ba9d..f9bfc445b85 100644 ---- a/arch/arm/mach-rockchip/rk3528/rk3528.c -+++ b/arch/arm/mach-rockchip/rk3528/rk3528.c -@@ -9,6 +9,9 @@ - #include - #include - -+#define VPU_GRF_BASE 0xff340000 -+#define USB3OTG_CON1 0x44 -+ - #define FIREWALL_DDR_BASE 0xff2e0000 - #define FW_DDR_MST6_REG 0x58 - #define FW_DDR_MST7_REG 0x5c -@@ -69,6 +72,9 @@ int arch_cpu_init(void) - val = readl(FIREWALL_DDR_BASE + FW_DDR_MST16_REG); - writel(val & 0xffff0000, FIREWALL_DDR_BASE + FW_DDR_MST16_REG); - -+ /* Disable USB3OTG U3 port, later enabled in COMBPHY driver */ -+ writel(0xffff0181, VPU_GRF_BASE + USB3OTG_CON1); -+ - return 0; - } - --- -2.34.1 - diff --git a/projects/Rockchip/patches/u-boot/rockchip-0048-spi-rockchip_sfc-Support-sclk_x2-version.patch b/projects/Rockchip/patches/u-boot/rockchip-0018-spi-rockchip_sfc-Support-sclk_x2-version.patch similarity index 92% rename from projects/Rockchip/patches/u-boot/rockchip-0048-spi-rockchip_sfc-Support-sclk_x2-version.patch rename to projects/Rockchip/patches/u-boot/rockchip-0018-spi-rockchip_sfc-Support-sclk_x2-version.patch index c1d145c60d..d8acc87198 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0048-spi-rockchip_sfc-Support-sclk_x2-version.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0018-spi-rockchip_sfc-Support-sclk_x2-version.patch @@ -1,7 +1,7 @@ -From 113b2c01405d21703c15e34b56eb61520f3adccc Mon Sep 17 00:00:00 2001 +From aa575e20b0ac6032b0628553638dd2c4cb54b3c6 Mon Sep 17 00:00:00 2001 From: Jon Lin Date: Fri, 11 Jul 2025 23:06:03 +0000 -Subject: [PATCH 48/84] spi: rockchip_sfc: Support sclk_x2 version +Subject: [PATCH 18/51] spi: rockchip_sfc: Support sclk_x2 version SFC after version 8 supports dtr mode, so the IO is the binary output of the controller clock. diff --git a/projects/Rockchip/patches/u-boot/rockchip-0019-rockchip-clk-clk_rk3528-Add-dummy-CLK_REF_PCIE_INNER.patch b/projects/Rockchip/patches/u-boot/rockchip-0019-rockchip-clk-clk_rk3528-Add-dummy-CLK_REF_PCIE_INNER.patch deleted file mode 100644 index c48282dcb1..0000000000 --- a/projects/Rockchip/patches/u-boot/rockchip-0019-rockchip-clk-clk_rk3528-Add-dummy-CLK_REF_PCIE_INNER.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 257c7fd65c9e070089127b1ca17a49e5a349c863 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Wed, 30 Jul 2025 23:52:46 +0000 -Subject: [PATCH 19/84] rockchip: clk: clk_rk3528: Add dummy - CLK_REF_PCIE_INNER_PHY support - -Add dummy support for the CLK_REF_PCIE_INNER_PHY clock to allow probe of -the phy-rockchip-naneng-combphy driver on RK3528. - -Signed-off-by: Jonas Karlman ---- - drivers/clk/rockchip/clk_rk3528.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/clk/rockchip/clk_rk3528.c b/drivers/clk/rockchip/clk_rk3528.c -index 06f20895acc..d58557ff56d 100644 ---- a/drivers/clk/rockchip/clk_rk3528.c -+++ b/drivers/clk/rockchip/clk_rk3528.c -@@ -1535,6 +1535,7 @@ static ulong rk3528_clk_set_rate(struct clk *clk, ulong rate) - /* Might occur in cru assigned-clocks, can be ignored here */ - case ACLK_BUS_VOPGL_ROOT: - case BCLK_EMMC: -+ case CLK_REF_PCIE_INNER_PHY: - case XIN_OSC0_DIV: - ret = 0; - break; --- -2.34.1 - diff --git a/projects/Rockchip/patches/u-boot/rockchip-0049-rockchip-spl-Add-a-read_brom_bootsource_id-helper.patch b/projects/Rockchip/patches/u-boot/rockchip-0019-rockchip-spl-Add-a-read_brom_bootsource_id-helper.patch similarity index 94% rename from projects/Rockchip/patches/u-boot/rockchip-0049-rockchip-spl-Add-a-read_brom_bootsource_id-helper.patch rename to projects/Rockchip/patches/u-boot/rockchip-0019-rockchip-spl-Add-a-read_brom_bootsource_id-helper.patch index 801139f312..3b6e504bb3 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0049-rockchip-spl-Add-a-read_brom_bootsource_id-helper.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0019-rockchip-spl-Add-a-read_brom_bootsource_id-helper.patch @@ -1,7 +1,7 @@ -From 8c261270d150b57c3094f16cfe8abc48396bcf69 Mon Sep 17 00:00:00 2001 +From 4a98c5fe68ae303bb7d0f21a52432e016da30e2a Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 11 Jul 2025 23:06:04 +0000 -Subject: [PATCH 49/84] rockchip: spl: Add a read_brom_bootsource_id() helper +Subject: [PATCH 19/51] rockchip: spl: Add a read_brom_bootsource_id() helper The bootsource ids reported by BootROM of RK3576 for e.g. SPI NOR and USB differs slightly compared to prior SoCs: diff --git a/projects/Rockchip/patches/u-boot/rockchip-0050-rockchip-rk3576-Add-SPI-Flash-boot-support.patch b/projects/Rockchip/patches/u-boot/rockchip-0020-rockchip-rk3576-Add-SPI-Flash-boot-support.patch similarity index 96% rename from projects/Rockchip/patches/u-boot/rockchip-0050-rockchip-rk3576-Add-SPI-Flash-boot-support.patch rename to projects/Rockchip/patches/u-boot/rockchip-0020-rockchip-rk3576-Add-SPI-Flash-boot-support.patch index bb0c3e1180..fbc7e6ec59 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0050-rockchip-rk3576-Add-SPI-Flash-boot-support.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0020-rockchip-rk3576-Add-SPI-Flash-boot-support.patch @@ -1,7 +1,7 @@ -From de7ac8d5909a3153ae9513eaba23266bd4771a3b Mon Sep 17 00:00:00 2001 +From 6d9a84704bb84e86f87efec0f70973b0ee3b4bed Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 11 Jul 2025 23:06:05 +0000 -Subject: [PATCH 50/84] rockchip: rk3576: Add SPI Flash boot support +Subject: [PATCH 20/51] rockchip: rk3576: Add SPI Flash boot support The bootsource ids reported by BootROM of RK3576 for SPI NOR and USB differs slightly compared to prior SoCs: diff --git a/projects/Rockchip/patches/u-boot/rockchip-0020-usb-dwc3-generic-Use-combined-glue-and-ctrl-node-for.patch b/projects/Rockchip/patches/u-boot/rockchip-0020-usb-dwc3-generic-Use-combined-glue-and-ctrl-node-for.patch deleted file mode 100644 index 1002e9ca6a..0000000000 --- a/projects/Rockchip/patches/u-boot/rockchip-0020-usb-dwc3-generic-Use-combined-glue-and-ctrl-node-for.patch +++ /dev/null @@ -1,31 +0,0 @@ -From f01c443ad30c51d9ed055aa30e0a5cba864d2610 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Wed, 30 Jul 2025 23:52:47 +0000 -Subject: [PATCH 20/84] usb: dwc3-generic: Use combined glue and ctrl node for - RK3528 - -Like Rockchip RK3328, RK3568 and RK3588, the RK3528 also have a single -node to represent the glue and ctrl for USB 3.0. - -Use rk_ops as driver data to select correct ctrl node for RK3528 DWC3. - -Signed-off-by: Jonas Karlman ---- - drivers/usb/dwc3/dwc3-generic.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c -index 3cda2b74b7e..6b2016c0cd3 100644 ---- a/drivers/usb/dwc3/dwc3-generic.c -+++ b/drivers/usb/dwc3/dwc3-generic.c -@@ -698,6 +698,7 @@ static const struct udevice_id dwc3_glue_ids[] = { - { .compatible = "ti,am654-dwc3" }, - { .compatible = "rockchip,rk3328-dwc3", .data = (ulong)&rk_ops }, - { .compatible = "rockchip,rk3399-dwc3" }, -+ { .compatible = "rockchip,rk3528-dwc3", .data = (ulong)&rk_ops }, - { .compatible = "rockchip,rk3568-dwc3", .data = (ulong)&rk_ops }, - { .compatible = "rockchip,rk3588-dwc3", .data = (ulong)&rk_ops }, - { .compatible = "qcom,dwc3", .data = (ulong)&qcom_ops }, --- -2.34.1 - diff --git a/projects/Rockchip/patches/u-boot/rockchip-0051-board-rockchip-Add-Radxa-ROCK-4D.patch b/projects/Rockchip/patches/u-boot/rockchip-0021-board-rockchip-Add-Radxa-ROCK-4D.patch similarity index 96% rename from projects/Rockchip/patches/u-boot/rockchip-0051-board-rockchip-Add-Radxa-ROCK-4D.patch rename to projects/Rockchip/patches/u-boot/rockchip-0021-board-rockchip-Add-Radxa-ROCK-4D.patch index cde1ae359e..257490436b 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0051-board-rockchip-Add-Radxa-ROCK-4D.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0021-board-rockchip-Add-Radxa-ROCK-4D.patch @@ -1,7 +1,7 @@ -From c2f38fb0dd818b73ba80b32304a9cbef9d442308 Mon Sep 17 00:00:00 2001 +From 871d420f2f2a0270207b42e17a7525ca8b7ac12d Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 11 Jul 2025 23:06:06 +0000 -Subject: [PATCH 51/84] board: rockchip: Add Radxa ROCK 4D +Subject: [PATCH 21/51] board: rockchip: Add Radxa ROCK 4D The Radxa ROCK 4D is a compact single-board computer (SBC) featuring numerous top-tier functions, features, and expansion options. @@ -141,7 +141,7 @@ index 00000000000..140a3e0ccd8 +CONFIG_USB_DWC3_GENERIC=y +CONFIG_ERRNO_STR=y diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst -index e50dde2ccb1..97266d370bf 100644 +index dd9563d9124..2b902002f66 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -141,6 +141,7 @@ List of mainline supported Rockchip boards: diff --git a/projects/Rockchip/patches/u-boot/rockchip-0021-phy-rockchip-naneng-combphy-Add-support-for-RK3528.patch b/projects/Rockchip/patches/u-boot/rockchip-0021-phy-rockchip-naneng-combphy-Add-support-for-RK3528.patch deleted file mode 100644 index 8cc479a69e..0000000000 --- a/projects/Rockchip/patches/u-boot/rockchip-0021-phy-rockchip-naneng-combphy-Add-support-for-RK3528.patch +++ /dev/null @@ -1,145 +0,0 @@ -From 243470bb288e50adbe36b0d4d8c512546b4b9aa8 Mon Sep 17 00:00:00 2001 -From: Jianwei Zheng -Date: Wed, 30 Jul 2025 23:52:48 +0000 -Subject: [PATCH 21/84] phy: rockchip: naneng-combphy: Add support for RK3528 - -Add support for the PCIe/USB3 combo PHY used in the RK3528 SoC. - -Config values are taken from vendor U-Boot linux-6.1-stan-rkr5 tag. - -Signed-off-by: Jianwei Zheng -Signed-off-by: Jonas Karlman ---- - .../rockchip/phy-rockchip-naneng-combphy.c | 102 ++++++++++++++++++ - 1 file changed, 102 insertions(+) - -diff --git a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c -index 81195de60bc..432a8f8e03a 100644 ---- a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c -+++ b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c -@@ -37,6 +37,7 @@ struct rockchip_combphy_grfcfg { - struct combphy_reg pipe_rxterm_set; - struct combphy_reg pipe_txelec_set; - struct combphy_reg pipe_txcomp_set; -+ struct combphy_reg pipe_clk_24m; - struct combphy_reg pipe_clk_25m; - struct combphy_reg pipe_clk_100m; - struct combphy_reg pipe_phymode_sel; -@@ -245,6 +246,103 @@ static int rockchip_combphy_probe(struct udevice *udev) - return rockchip_combphy_parse_dt(udev, priv); - } - -+static int rk3528_combphy_cfg(struct rockchip_combphy_priv *priv) -+{ -+ const struct rockchip_combphy_grfcfg *cfg = priv->cfg->grfcfg; -+ u32 val; -+ -+ switch (priv->mode) { -+ case PHY_TYPE_PCIE: -+ /* Set SSC downward spread spectrum */ -+ val = readl(priv->mmio + 0x18); -+ val &= ~GENMASK(5, 4); -+ val |= 0x01 << 4; -+ writel(val, priv->mmio + 0x18); -+ -+ param_write(priv->phy_grf, &cfg->con0_for_pcie, true); -+ param_write(priv->phy_grf, &cfg->con1_for_pcie, true); -+ param_write(priv->phy_grf, &cfg->con2_for_pcie, true); -+ param_write(priv->phy_grf, &cfg->con3_for_pcie, true); -+ break; -+ case PHY_TYPE_USB3: -+ /* Set SSC downward spread spectrum */ -+ val = readl(priv->mmio + 0x18); -+ val &= ~GENMASK(5, 4); -+ val |= 0x01 << 4; -+ writel(val, priv->mmio + 0x18); -+ -+ /* Enable adaptive CTLE for USB3.0 Rx */ -+ val = readl(priv->mmio + 0x200); -+ val &= ~GENMASK(17, 17); -+ val |= 0x01 << 17; -+ writel(val, priv->mmio + 0x200); -+ -+ /* Set Rx squelch input filler bandwidth */ -+ val = readl(priv->mmio + 0x20c); -+ val &= ~GENMASK(2, 0); -+ val |= 0x06; -+ writel(val, priv->mmio + 0x20c); -+ -+ param_write(priv->phy_grf, &cfg->pipe_txcomp_sel, false); -+ param_write(priv->phy_grf, &cfg->pipe_txelec_sel, false); -+ param_write(priv->phy_grf, &cfg->usb_mode_set, true); -+ param_write(priv->pipe_grf, &cfg->u3otg0_port_en, true); -+ break; -+ default: -+ dev_err(priv->dev, "incompatible PHY type\n"); -+ return -EINVAL; -+ } -+ -+ param_write(priv->phy_grf, &cfg->pipe_clk_100m, true); -+ -+ if (priv->mode == PHY_TYPE_PCIE) { -+ /* PLL KVCO tuning fine */ -+ val = readl(priv->mmio + 0x18); -+ val &= ~(0x7 << 10); -+ val |= 0x2 << 10; -+ writel(val, priv->mmio + 0x18); -+ -+ /* su_trim[6:4]=111, [10:7]=1001, [2:0]=000 */ -+ val = readl(priv->mmio + 0x108); -+ val &= ~(0x7f7); -+ val |= 0x4f0; -+ writel(val, priv->mmio + 0x108); -+ } -+ -+ return 0; -+} -+ -+static const struct rockchip_combphy_grfcfg rk3528_combphy_grfcfgs = { -+ /* pipe-phy-grf */ -+ .pcie_mode_set = { 0x0000, 5, 0, 0x00, 0x11 }, -+ .usb_mode_set = { 0x0000, 5, 0, 0x00, 0x04 }, -+ .pipe_rxterm_set = { 0x0000, 12, 12, 0x00, 0x01 }, -+ .pipe_txelec_set = { 0x0004, 1, 1, 0x00, 0x01 }, -+ .pipe_txcomp_set = { 0x0004, 4, 4, 0x00, 0x01 }, -+ .pipe_clk_24m = { 0x0004, 14, 13, 0x00, 0x00 }, -+ .pipe_clk_100m = { 0x0004, 14, 13, 0x00, 0x02 }, -+ .pipe_rxterm_sel = { 0x0008, 8, 8, 0x00, 0x01 }, -+ .pipe_txelec_sel = { 0x0008, 12, 12, 0x00, 0x01 }, -+ .pipe_txcomp_sel = { 0x0008, 15, 15, 0x00, 0x01 }, -+ .pipe_clk_ext = { 0x000c, 9, 8, 0x02, 0x01 }, -+ .pipe_phy_status = { 0x0034, 6, 6, 0x01, 0x00 }, -+ .con0_for_pcie = { 0x0000, 15, 0, 0x00, 0x110 }, -+ .con1_for_pcie = { 0x0004, 15, 0, 0x00, 0x00 }, -+ .con2_for_pcie = { 0x0008, 15, 0, 0x00, 0x101 }, -+ .con3_for_pcie = { 0x000c, 15, 0, 0x00, 0x0200 }, -+ /* pipe-grf */ -+ .u3otg0_port_en = { 0x0044, 15, 0, 0x0181, 0x1100 }, -+}; -+ -+static const struct rockchip_combphy_cfg rk3528_combphy_cfgs = { -+ .num_phys = 1, -+ .phy_ids = { -+ 0xffdc0000, -+ }, -+ .grfcfg = &rk3528_combphy_grfcfgs, -+ .combphy_cfg = rk3528_combphy_cfg, -+}; -+ - static int rk3568_combphy_cfg(struct rockchip_combphy_priv *priv) - { - const struct rockchip_combphy_grfcfg *cfg = priv->cfg->grfcfg; -@@ -503,6 +601,10 @@ static const struct rockchip_combphy_cfg rk3588_combphy_cfgs = { - }; - - static const struct udevice_id rockchip_combphy_ids[] = { -+ { -+ .compatible = "rockchip,rk3528-naneng-combphy", -+ .data = (ulong)&rk3528_combphy_cfgs -+ }, - { - .compatible = "rockchip,rk3568-naneng-combphy", - .data = (ulong)&rk3568_combphy_cfgs --- -2.34.1 - diff --git a/projects/Rockchip/patches/u-boot/rockchip-0022-rockchip-rk3528-radxa-e20c-Enable-USB-gadget-Kconfig.patch b/projects/Rockchip/patches/u-boot/rockchip-0022-rockchip-rk3528-radxa-e20c-Enable-USB-gadget-Kconfig.patch deleted file mode 100644 index 45a8602859..0000000000 --- a/projects/Rockchip/patches/u-boot/rockchip-0022-rockchip-rk3528-radxa-e20c-Enable-USB-gadget-Kconfig.patch +++ /dev/null @@ -1,61 +0,0 @@ -From 5dff95a52ade3b461fab6608786ac92e8ac5a47f Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Wed, 30 Jul 2025 23:52:49 +0000 -Subject: [PATCH 22/84] rockchip: rk3528-radxa-e20c: Enable USB gadget Kconfig - options - -Radxa E20C has a USB OTG Type-C port for Debug and Data. - -Add required Kconfig options to use USB gadget features once pending -USB nodes finally lands in dts/upstream by a future sync. - -Signed-off-by: Jonas Karlman ---- - configs/radxa-e20c-rk3528_defconfig | 10 ++++++++++ - 1 file changed, 10 insertions(+) - -diff --git a/configs/radxa-e20c-rk3528_defconfig b/configs/radxa-e20c-rk3528_defconfig -index f5e097f3edf..0941d1b9be8 100644 ---- a/configs/radxa-e20c-rk3528_defconfig -+++ b/configs/radxa-e20c-rk3528_defconfig -@@ -20,6 +20,8 @@ CONFIG_CMD_GPT=y - CONFIG_CMD_MISC=y - CONFIG_CMD_MMC=y - CONFIG_CMD_USB=y -+CONFIG_CMD_ROCKUSB=y -+CONFIG_CMD_USB_MASS_STORAGE=y - # CONFIG_CMD_SETEXPR is not set - CONFIG_CMD_RNG=y - CONFIG_CMD_REGULATOR=y -@@ -28,6 +30,7 @@ CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigne - CONFIG_BUTTON=y - CONFIG_BUTTON_ADC=y - CONFIG_BUTTON_GPIO=y -+# CONFIG_USB_FUNCTION_FASTBOOT is not set - CONFIG_ROCKCHIP_GPIO=y - CONFIG_LED=y - CONFIG_LED_GPIO=y -@@ -43,6 +46,7 @@ CONFIG_DM_MDIO=y - CONFIG_DWC_ETH_QOS=y - CONFIG_DWC_ETH_QOS_ROCKCHIP=y - CONFIG_PHY_ROCKCHIP_INNO_USB2=y -+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y - CONFIG_REGULATOR_PWM=y - CONFIG_DM_REGULATOR_GPIO=y - CONFIG_PWM_ROCKCHIP=y -@@ -50,6 +54,12 @@ CONFIG_BAUDRATE=1500000 - CONFIG_DEBUG_UART_SHIFT=2 - CONFIG_SYS_NS16550_MEM32=y - CONFIG_USB=y -+CONFIG_USB_XHCI_HCD=y - CONFIG_USB_EHCI_HCD=y - CONFIG_USB_EHCI_GENERIC=y -+CONFIG_USB_DWC3=y -+CONFIG_USB_DWC3_GENERIC=y -+CONFIG_USB_GADGET=y -+CONFIG_USB_GADGET_DOWNLOAD=y -+CONFIG_USB_FUNCTION_ROCKUSB=y - CONFIG_ERRNO_STR=y --- -2.34.1 - diff --git a/projects/Rockchip/patches/u-boot/rockchip-0052-rockchip-spl-boot-order-Defer-probe-of-boot-device.patch b/projects/Rockchip/patches/u-boot/rockchip-0022-rockchip-spl-boot-order-Defer-probe-of-boot-device.patch similarity index 92% rename from projects/Rockchip/patches/u-boot/rockchip-0052-rockchip-spl-boot-order-Defer-probe-of-boot-device.patch rename to projects/Rockchip/patches/u-boot/rockchip-0022-rockchip-spl-boot-order-Defer-probe-of-boot-device.patch index 850eb2cb50..1d6bbb0801 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0052-rockchip-spl-boot-order-Defer-probe-of-boot-device.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0022-rockchip-spl-boot-order-Defer-probe-of-boot-device.patch @@ -1,7 +1,7 @@ -From f2102f6d2743b6db7a35a0082326bf39b5fd16e5 Mon Sep 17 00:00:00 2001 +From e4c235bb6563aba6cc654e62c46ca980d07e0dc8 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sat, 12 Jul 2025 21:12:29 +0000 -Subject: [PATCH 52/84] rockchip: spl-boot-order: Defer probe of boot device +Subject: [PATCH 22/51] rockchip: spl-boot-order: Defer probe of boot device Boot devices are being probed when SPL boot order is determined. This may delay boot slightly and can prevent booting from SPI Flash on boards diff --git a/projects/Rockchip/patches/u-boot/rockchip-0053-rockchip-Ensure-env-in-SPI-Flash-can-work-correctly.patch b/projects/Rockchip/patches/u-boot/rockchip-0023-rockchip-Ensure-env-in-SPI-Flash-can-work-correctly.patch similarity index 91% rename from projects/Rockchip/patches/u-boot/rockchip-0053-rockchip-Ensure-env-in-SPI-Flash-can-work-correctly.patch rename to projects/Rockchip/patches/u-boot/rockchip-0023-rockchip-Ensure-env-in-SPI-Flash-can-work-correctly.patch index f9d8e9f0e6..9e0d35d657 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0053-rockchip-Ensure-env-in-SPI-Flash-can-work-correctly.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0023-rockchip-Ensure-env-in-SPI-Flash-can-work-correctly.patch @@ -1,7 +1,7 @@ -From eb0eb85a065095685056da32409bbcbbe2fb5dd4 Mon Sep 17 00:00:00 2001 +From 49a0d7e854e126698b1ca9cfae94feaabd94a36d Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sat, 12 Jul 2025 21:27:07 +0000 -Subject: [PATCH 53/84] rockchip: Ensure env in SPI Flash can work correctly +Subject: [PATCH 23/51] rockchip: Ensure env in SPI Flash can work correctly Ensure that the spi/sfc node for SPI flash is aviliable during pre-reloc phase so that env can successfully be loaded from SPI Flash. diff --git a/projects/Rockchip/patches/u-boot/rockchip-0055-clk-px30-Allow-use-of-GPU-and-WIFI_PMU-in-assigned-c.patch b/projects/Rockchip/patches/u-boot/rockchip-0024-clk-px30-Allow-use-of-GPU-and-WIFI_PMU-in-assigned-c.patch similarity index 90% rename from projects/Rockchip/patches/u-boot/rockchip-0055-clk-px30-Allow-use-of-GPU-and-WIFI_PMU-in-assigned-c.patch rename to projects/Rockchip/patches/u-boot/rockchip-0024-clk-px30-Allow-use-of-GPU-and-WIFI_PMU-in-assigned-c.patch index f1978e54fe..085c9700c6 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0055-clk-px30-Allow-use-of-GPU-and-WIFI_PMU-in-assigned-c.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0024-clk-px30-Allow-use-of-GPU-and-WIFI_PMU-in-assigned-c.patch @@ -1,7 +1,7 @@ -From 1d9809d479e99125850b2eadbbca633435ea273f Mon Sep 17 00:00:00 2001 +From 9cfd4e04b148bb5ccf62ab0acdaef806cccc166d Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 13 Jul 2025 23:33:49 +0000 -Subject: [PATCH 55/84] clk: px30: Allow use of GPU and WIFI_PMU in +Subject: [PATCH 24/51] clk: px30: Allow use of GPU and WIFI_PMU in assigned-clocks Add dummy implementation of set_rate for SCLK_GPU and SCLK_WIFI_PMU to diff --git a/projects/Rockchip/patches/u-boot/rockchip-0056-rockchip-odroid-go2-Remove-cru-assigned-clocks-overr.patch b/projects/Rockchip/patches/u-boot/rockchip-0025-rockchip-odroid-go2-Remove-cru-assigned-clocks-overr.patch similarity index 88% rename from projects/Rockchip/patches/u-boot/rockchip-0056-rockchip-odroid-go2-Remove-cru-assigned-clocks-overr.patch rename to projects/Rockchip/patches/u-boot/rockchip-0025-rockchip-odroid-go2-Remove-cru-assigned-clocks-overr.patch index 0300269590..f6df39320d 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0056-rockchip-odroid-go2-Remove-cru-assigned-clocks-overr.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0025-rockchip-odroid-go2-Remove-cru-assigned-clocks-overr.patch @@ -1,7 +1,7 @@ -From aa6ea252bf5c82e4b277c6101569b722c756875f Mon Sep 17 00:00:00 2001 +From c95439a755f9a29692591c0147e0b0091cb7bae8 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 13 Jul 2025 23:33:50 +0000 -Subject: [PATCH 56/84] rockchip: odroid-go2: Remove cru assigned-clocks +Subject: [PATCH 25/51] rockchip: odroid-go2: Remove cru assigned-clocks override Remove the cru assigned-clocks override now that SCLK_GPU is supported diff --git a/projects/Rockchip/patches/u-boot/rockchip-0057-rockchip-odroid-go2-Remove-u-boot.dtsi-props-already.patch b/projects/Rockchip/patches/u-boot/rockchip-0026-rockchip-odroid-go2-Remove-u-boot.dtsi-props-already.patch similarity index 90% rename from projects/Rockchip/patches/u-boot/rockchip-0057-rockchip-odroid-go2-Remove-u-boot.dtsi-props-already.patch rename to projects/Rockchip/patches/u-boot/rockchip-0026-rockchip-odroid-go2-Remove-u-boot.dtsi-props-already.patch index 14bf240f9d..5093245a9e 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0057-rockchip-odroid-go2-Remove-u-boot.dtsi-props-already.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0026-rockchip-odroid-go2-Remove-u-boot.dtsi-props-already.patch @@ -1,7 +1,7 @@ -From 82df30c64326c27218bbefc4f4b3ce24e07efc28 Mon Sep 17 00:00:00 2001 +From 0b97cab93001fe399f114a09004ef6f38da22d63 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 13 Jul 2025 23:33:51 +0000 -Subject: [PATCH 57/84] rockchip: odroid-go2: Remove u-boot.dtsi props already +Subject: [PATCH 26/51] rockchip: odroid-go2: Remove u-boot.dtsi props already defined DTs from dts/upstream already contain aliases for i2c, mmc and serial. diff --git a/projects/Rockchip/patches/u-boot/rockchip-0058-rockchip-odroid-go2-Use-appropriate-bootph-props.patch b/projects/Rockchip/patches/u-boot/rockchip-0027-rockchip-odroid-go2-Use-appropriate-bootph-props.patch similarity index 92% rename from projects/Rockchip/patches/u-boot/rockchip-0058-rockchip-odroid-go2-Use-appropriate-bootph-props.patch rename to projects/Rockchip/patches/u-boot/rockchip-0027-rockchip-odroid-go2-Use-appropriate-bootph-props.patch index 00dd0b4390..bf8d19f748 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0058-rockchip-odroid-go2-Use-appropriate-bootph-props.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0027-rockchip-odroid-go2-Use-appropriate-bootph-props.patch @@ -1,7 +1,7 @@ -From 7f9f8ec3bf764a6475b923822b6f7b1951532293 Mon Sep 17 00:00:00 2001 +From ec6d1722325780fb2b7ca6a963288743f20e9a8c Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 13 Jul 2025 23:33:52 +0000 -Subject: [PATCH 58/84] rockchip: odroid-go2: Use appropriate bootph props +Subject: [PATCH 27/51] rockchip: odroid-go2: Use appropriate bootph props GPIO devices are needed in U-Boot proper phase, sdmmc and sfc devices are needed in SPL and pre-reloc phase. diff --git a/projects/Rockchip/patches/u-boot/rockchip-0059-rockchip-odroid-go2-Move-SoC-common-overrides-into-a.patch b/projects/Rockchip/patches/u-boot/rockchip-0028-rockchip-odroid-go2-Move-SoC-common-overrides-into-a.patch similarity index 96% rename from projects/Rockchip/patches/u-boot/rockchip-0059-rockchip-odroid-go2-Move-SoC-common-overrides-into-a.patch rename to projects/Rockchip/patches/u-boot/rockchip-0028-rockchip-odroid-go2-Move-SoC-common-overrides-into-a.patch index 8bca3e8612..20238b9de6 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0059-rockchip-odroid-go2-Move-SoC-common-overrides-into-a.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0028-rockchip-odroid-go2-Move-SoC-common-overrides-into-a.patch @@ -1,7 +1,7 @@ -From fe2785fc50dd69aefa6efb9acae0b8f51878f43d Mon Sep 17 00:00:00 2001 +From d19a9805b702f7a380292f4341cbae8e9a48c2b7 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 13 Jul 2025 23:33:53 +0000 -Subject: [PATCH 59/84] rockchip: odroid-go2: Move SoC common overrides into a +Subject: [PATCH 28/51] rockchip: odroid-go2: Move SoC common overrides into a SoC u-boot.dtsi Add a new common rk3326-u-boot.dtsi and move the SoC common overrides diff --git a/projects/Rockchip/patches/u-boot/rockchip-0060-rockchip-odroid-go2-Remove-unsupported-Kconfig-optio.patch b/projects/Rockchip/patches/u-boot/rockchip-0029-rockchip-odroid-go2-Remove-unsupported-Kconfig-optio.patch similarity index 93% rename from projects/Rockchip/patches/u-boot/rockchip-0060-rockchip-odroid-go2-Remove-unsupported-Kconfig-optio.patch rename to projects/Rockchip/patches/u-boot/rockchip-0029-rockchip-odroid-go2-Remove-unsupported-Kconfig-optio.patch index eff2646861..cafc15e585 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0060-rockchip-odroid-go2-Remove-unsupported-Kconfig-optio.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0029-rockchip-odroid-go2-Remove-unsupported-Kconfig-optio.patch @@ -1,7 +1,7 @@ -From 467deac3ad081c7d8b960c8df04ca4a575073c08 Mon Sep 17 00:00:00 2001 +From d6233cc52c43a601df804cefcefd51daacd22346 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 13 Jul 2025 23:33:54 +0000 -Subject: [PATCH 60/84] rockchip: odroid-go2: Remove unsupported Kconfig +Subject: [PATCH 29/51] rockchip: odroid-go2: Remove unsupported Kconfig options The handheld gaming devices that this defconfig tagets does not contain diff --git a/projects/Rockchip/patches/u-boot/rockchip-0061-rockchip-odroid-go2-Update-Kconfig-options-for-SPL.patch b/projects/Rockchip/patches/u-boot/rockchip-0030-rockchip-odroid-go2-Update-Kconfig-options-for-SPL.patch similarity index 94% rename from projects/Rockchip/patches/u-boot/rockchip-0061-rockchip-odroid-go2-Update-Kconfig-options-for-SPL.patch rename to projects/Rockchip/patches/u-boot/rockchip-0030-rockchip-odroid-go2-Update-Kconfig-options-for-SPL.patch index 2692d49654..9ba1e591e7 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0061-rockchip-odroid-go2-Update-Kconfig-options-for-SPL.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0030-rockchip-odroid-go2-Update-Kconfig-options-for-SPL.patch @@ -1,7 +1,7 @@ -From e7e406bdfc634127304dbc1f70d051f46e3f683e Mon Sep 17 00:00:00 2001 +From 37b82ba73c9b8f2ae9868a8512dc5370b62d4653 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 13 Jul 2025 23:33:55 +0000 -Subject: [PATCH 61/84] rockchip: odroid-go2: Update Kconfig options for SPL +Subject: [PATCH 30/51] rockchip: odroid-go2: Update Kconfig options for SPL Drop SPL_DRIVERS_MISC, it is not needed/used on these devices. diff --git a/projects/Rockchip/patches/u-boot/rockchip-0062-rockchip-odroid-go2-Include-pinctrl-for-sdmmc-sfc-an.patch b/projects/Rockchip/patches/u-boot/rockchip-0031-rockchip-odroid-go2-Include-pinctrl-for-sdmmc-sfc-an.patch similarity index 95% rename from projects/Rockchip/patches/u-boot/rockchip-0062-rockchip-odroid-go2-Include-pinctrl-for-sdmmc-sfc-an.patch rename to projects/Rockchip/patches/u-boot/rockchip-0031-rockchip-odroid-go2-Include-pinctrl-for-sdmmc-sfc-an.patch index def3e2d21a..8fcc2f8ca6 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0062-rockchip-odroid-go2-Include-pinctrl-for-sdmmc-sfc-an.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0031-rockchip-odroid-go2-Include-pinctrl-for-sdmmc-sfc-an.patch @@ -1,7 +1,7 @@ -From 28ee80ddeb0611760a2540168d36ff88c8cb62de Mon Sep 17 00:00:00 2001 +From 523a6585956c9971f4b78e28c195fe42381fb9d2 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 13 Jul 2025 23:33:56 +0000 -Subject: [PATCH 62/84] rockchip: odroid-go2: Include pinctrl for sdmmc, sfc +Subject: [PATCH 31/51] rockchip: odroid-go2: Include pinctrl for sdmmc, sfc and uart in SPL Include pinctrl nodes and props for sdmmc, sfc and uart in SPL to ensure diff --git a/projects/Rockchip/patches/u-boot/rockchip-0063-rockchip-odroid-go2-Use-power-off-at-power-plug-in-e.patch b/projects/Rockchip/patches/u-boot/rockchip-0032-rockchip-odroid-go2-Use-power-off-at-power-plug-in-e.patch similarity index 94% rename from projects/Rockchip/patches/u-boot/rockchip-0063-rockchip-odroid-go2-Use-power-off-at-power-plug-in-e.patch rename to projects/Rockchip/patches/u-boot/rockchip-0032-rockchip-odroid-go2-Use-power-off-at-power-plug-in-e.patch index e639e1128c..ca8d828d20 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0063-rockchip-odroid-go2-Use-power-off-at-power-plug-in-e.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0032-rockchip-odroid-go2-Use-power-off-at-power-plug-in-e.patch @@ -1,7 +1,7 @@ -From 1f53e8b192440fc37144acc6469fae4f839ff2f0 Mon Sep 17 00:00:00 2001 +From 21dd4189ca39e4276a69fc2292a9858cee6f51ff Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 13 Jul 2025 23:33:57 +0000 -Subject: [PATCH 63/84] rockchip: odroid-go2: Use power off at power plug-in +Subject: [PATCH 32/51] rockchip: odroid-go2: Use power off at power plug-in event Include the RK817 PMIC in SPL and enable Kconfig options to power off diff --git a/projects/Rockchip/patches/u-boot/rockchip-0064-rockchip-odroid-go2-Add-support-for-SPI-flash-boot.patch b/projects/Rockchip/patches/u-boot/rockchip-0033-rockchip-odroid-go2-Add-support-for-SPI-flash-boot.patch similarity index 95% rename from projects/Rockchip/patches/u-boot/rockchip-0064-rockchip-odroid-go2-Add-support-for-SPI-flash-boot.patch rename to projects/Rockchip/patches/u-boot/rockchip-0033-rockchip-odroid-go2-Add-support-for-SPI-flash-boot.patch index 1c87d96bf1..bd327d5f6f 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0064-rockchip-odroid-go2-Add-support-for-SPI-flash-boot.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0033-rockchip-odroid-go2-Add-support-for-SPI-flash-boot.patch @@ -1,7 +1,7 @@ -From 6fb5e32dff040ea7ee9991009764007ed760016d Mon Sep 17 00:00:00 2001 +From a2f1cfb18ca139dce0b760581f8769522a53506f Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 13 Jul 2025 23:33:58 +0000 -Subject: [PATCH 64/84] rockchip: odroid-go2: Add support for SPI flash boot +Subject: [PATCH 33/51] rockchip: odroid-go2: Add support for SPI flash boot The ODROID GO2 devices come with onboard SPI flash, add support for using the SPI flash. diff --git a/projects/Rockchip/patches/u-boot/rockchip-0065-rockchip-odroid-go2-Select-board-FDT-from-FIT-in-SPL.patch b/projects/Rockchip/patches/u-boot/rockchip-0034-rockchip-odroid-go2-Select-board-FDT-from-FIT-in-SPL.patch similarity index 97% rename from projects/Rockchip/patches/u-boot/rockchip-0065-rockchip-odroid-go2-Select-board-FDT-from-FIT-in-SPL.patch rename to projects/Rockchip/patches/u-boot/rockchip-0034-rockchip-odroid-go2-Select-board-FDT-from-FIT-in-SPL.patch index 97f86a8278..09212651da 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0065-rockchip-odroid-go2-Select-board-FDT-from-FIT-in-SPL.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0034-rockchip-odroid-go2-Select-board-FDT-from-FIT-in-SPL.patch @@ -1,7 +1,7 @@ -From 01c2dbb5ca0d85541a3261c06abb65ef326fed85 Mon Sep 17 00:00:00 2001 +From 91b9e02a41ae9e41fa6d05281cb79af5f58f19be Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 13 Jul 2025 23:33:59 +0000 -Subject: [PATCH 65/84] rockchip: odroid-go2: Select board FDT from FIT in SPL +Subject: [PATCH 34/51] rockchip: odroid-go2: Select board FDT from FIT in SPL Include FDTs for all three board variants in the FIT image and adjust the board selection code to use correct FDT in U-Boot proper. diff --git a/projects/Rockchip/patches/u-boot/rockchip-0066-rockchip-odroid-go2-Use-env-from-same-storage-FIT-wa.patch b/projects/Rockchip/patches/u-boot/rockchip-0035-rockchip-odroid-go2-Use-env-from-same-storage-FIT-wa.patch similarity index 95% rename from projects/Rockchip/patches/u-boot/rockchip-0066-rockchip-odroid-go2-Use-env-from-same-storage-FIT-wa.patch rename to projects/Rockchip/patches/u-boot/rockchip-0035-rockchip-odroid-go2-Use-env-from-same-storage-FIT-wa.patch index 66c501706e..d6ea42b3b8 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0066-rockchip-odroid-go2-Use-env-from-same-storage-FIT-wa.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0035-rockchip-odroid-go2-Use-env-from-same-storage-FIT-wa.patch @@ -1,7 +1,7 @@ -From d7124db56d3addd0a7ef6aa5741003a24ec55f7a Mon Sep 17 00:00:00 2001 +From 7277465cbe51e0bad8f6301625dbcac817c9e9b4 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 13 Jul 2025 23:34:00 +0000 -Subject: [PATCH 66/84] rockchip: odroid-go2: Use env from same storage FIT was +Subject: [PATCH 35/51] rockchip: odroid-go2: Use env from same storage FIT was loaded from Change to dynamically select what storage media to use for the U-Boot diff --git a/projects/Rockchip/patches/u-boot/rockchip-0067-rockchip-odroid-go2-Enable-RockUSB-button-LED-and-RN.patch b/projects/Rockchip/patches/u-boot/rockchip-0036-rockchip-odroid-go2-Enable-RockUSB-button-LED-and-RN.patch similarity index 92% rename from projects/Rockchip/patches/u-boot/rockchip-0067-rockchip-odroid-go2-Enable-RockUSB-button-LED-and-RN.patch rename to projects/Rockchip/patches/u-boot/rockchip-0036-rockchip-odroid-go2-Enable-RockUSB-button-LED-and-RN.patch index 254bc1b597..e21496652e 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0067-rockchip-odroid-go2-Enable-RockUSB-button-LED-and-RN.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0036-rockchip-odroid-go2-Enable-RockUSB-button-LED-and-RN.patch @@ -1,7 +1,7 @@ -From 399ac4e2e05dbed42d023c38e4227263c3a97cb7 Mon Sep 17 00:00:00 2001 +From 476c60e9347488ef2fc92dab98afd9e10be68fb4 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 13 Jul 2025 23:34:01 +0000 -Subject: [PATCH 67/84] rockchip: odroid-go2: Enable RockUSB, button, LED and +Subject: [PATCH 36/51] rockchip: odroid-go2: Enable RockUSB, button, LED and RNG support Enable Kconfig options to support RockUSB, buttons, LEDs and RNG diff --git a/projects/Rockchip/patches/u-boot/rockchip-0037-rng-rockchip_rng-Add-compatible-for-RK3576.patch b/projects/Rockchip/patches/u-boot/rockchip-0037-rng-rockchip_rng-Add-compatible-for-RK3576.patch deleted file mode 100644 index 1f0cf872fe..0000000000 --- a/projects/Rockchip/patches/u-boot/rockchip-0037-rng-rockchip_rng-Add-compatible-for-RK3576.patch +++ /dev/null @@ -1,42 +0,0 @@ -From 90a310f17ea0f5066a957f3f4c94b7566135a1ba Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Fri, 11 Jul 2025 22:21:17 +0000 -Subject: [PATCH 37/84] rng: rockchip_rng: Add compatible for RK3576 - -The RK3576 SoC contains a RKRNG block that can be used to generate -random numbers using the rockchip_rng driver. - -Add compatible for RK3576 to support random numbers: - - => rng list - RNG #0 - rng@2a410000 - - => rng - 00000000: 36 dd ab 98 ec fb fe d1 cf 36 b3 e1 9b 3d 00 90 6........6...=.. - 00000010: f5 84 de 75 6b 27 48 9e 13 62 12 6c 50 ca 47 1a ...uk'H..b.lP.G. - 00000020: b3 4d fc 43 c5 b5 2d be 07 27 03 26 bb 69 61 2a .M.C..-..'.&.ia* - 00000030: 6f 70 01 83 4e ce 91 7a 5a 6c 7c 00 43 87 3e c5 op..N..zZl|.C.>. - -Signed-off-by: Jonas Karlman ---- - drivers/rng/rockchip_rng.c | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/drivers/rng/rockchip_rng.c b/drivers/rng/rockchip_rng.c -index d854ea90044..8cf750e043c 100644 ---- a/drivers/rng/rockchip_rng.c -+++ b/drivers/rng/rockchip_rng.c -@@ -393,6 +393,10 @@ static const struct udevice_id rockchip_rng_match[] = { - .compatible = "rockchip,rk3588-rng", - .data = (ulong)&rk_trngv1_soc_data, - }, -+ { -+ .compatible = "rockchip,rk3576-rng", -+ .data = (ulong)&rkrng_soc_data, -+ }, - { - .compatible = "rockchip,rkrng", - .data = (ulong)&rkrng_soc_data, --- -2.34.1 - diff --git a/projects/Rockchip/patches/u-boot/rockchip-0068-rockchip-odroid-go2-Turn-on-the-blue-LED-at-boot.patch b/projects/Rockchip/patches/u-boot/rockchip-0037-rockchip-odroid-go2-Turn-on-the-blue-LED-at-boot.patch similarity index 85% rename from projects/Rockchip/patches/u-boot/rockchip-0068-rockchip-odroid-go2-Turn-on-the-blue-LED-at-boot.patch rename to projects/Rockchip/patches/u-boot/rockchip-0037-rockchip-odroid-go2-Turn-on-the-blue-LED-at-boot.patch index 2cf4619c7c..093fd38ec7 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0068-rockchip-odroid-go2-Turn-on-the-blue-LED-at-boot.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0037-rockchip-odroid-go2-Turn-on-the-blue-LED-at-boot.patch @@ -1,7 +1,7 @@ -From 5153c47f925ee11d1407df82b2787a909a6be8e9 Mon Sep 17 00:00:00 2001 +From 35cab2f4625df7b30b461a0661eb0bb0c7629e7d Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 13 Jul 2025 23:34:02 +0000 -Subject: [PATCH 68/84] rockchip: odroid-go2: Turn on the blue LED at boot +Subject: [PATCH 37/51] rockchip: odroid-go2: Turn on the blue LED at boot Use default-state prop to ensure that the blue heartbeat LED turns on at boot to inticate that U-Boot proper has been reached. diff --git a/projects/Rockchip/patches/u-boot/rockchip-0038-rockchip-Add-default-USB_GADGET_PRODUCT_NUM-for-RK35.patch b/projects/Rockchip/patches/u-boot/rockchip-0038-rockchip-Add-default-USB_GADGET_PRODUCT_NUM-for-RK35.patch deleted file mode 100644 index f4a5958b76..0000000000 --- a/projects/Rockchip/patches/u-boot/rockchip-0038-rockchip-Add-default-USB_GADGET_PRODUCT_NUM-for-RK35.patch +++ /dev/null @@ -1,28 +0,0 @@ -From faefa832fa5e175ff2c548469dcc148b12ac9c6a Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Fri, 11 Jul 2025 22:21:18 +0000 -Subject: [PATCH 38/84] rockchip: Add default USB_GADGET_PRODUCT_NUM for RK3576 - -Use 0x350e as the default USB Product ID for Rockchip RK3576, same PID -being used by the BootROM when the device is in MASKROM mode. - -Signed-off-by: Jonas Karlman ---- - drivers/usb/gadget/Kconfig | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig -index 46a83141481..bab88567ea6 100644 ---- a/drivers/usb/gadget/Kconfig -+++ b/drivers/usb/gadget/Kconfig -@@ -86,6 +86,7 @@ config USB_GADGET_PRODUCT_NUM - default 0x350a if ROCKCHIP_RK3568 - default 0x350b if ROCKCHIP_RK3588 - default 0x350c if ROCKCHIP_RK3528 -+ default 0x350e if ROCKCHIP_RK3576 - default 0x0 - help - Product ID of the USB device emulated, reported to the host device. --- -2.34.1 - diff --git a/projects/Rockchip/patches/u-boot/rockchip-0069-rockchip-odroid-go2-Enable-more-commands.patch b/projects/Rockchip/patches/u-boot/rockchip-0038-rockchip-odroid-go2-Enable-more-commands.patch similarity index 91% rename from projects/Rockchip/patches/u-boot/rockchip-0069-rockchip-odroid-go2-Enable-more-commands.patch rename to projects/Rockchip/patches/u-boot/rockchip-0038-rockchip-odroid-go2-Enable-more-commands.patch index 4f000c874f..ae8945654b 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0069-rockchip-odroid-go2-Enable-more-commands.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0038-rockchip-odroid-go2-Enable-more-commands.patch @@ -1,7 +1,7 @@ -From 48faf6188d73d0f83937c6e36946c2fc6b722958 Mon Sep 17 00:00:00 2001 +From 5aa466b19506ef075494d9392101ffcd8bdb11dc Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 13 Jul 2025 23:34:03 +0000 -Subject: [PATCH 69/84] rockchip: odroid-go2: Enable more commands +Subject: [PATCH 38/51] rockchip: odroid-go2: Enable more commands Enable the default commands and some more useful commands that can be useful to determin the state of the board from U-Boot CLI. diff --git a/projects/Rockchip/patches/u-boot/rockchip-0039-board-rockchip-Add-minimal-generic-RK3576-board.patch b/projects/Rockchip/patches/u-boot/rockchip-0039-board-rockchip-Add-minimal-generic-RK3576-board.patch deleted file mode 100644 index 0e05db9642..0000000000 --- a/projects/Rockchip/patches/u-boot/rockchip-0039-board-rockchip-Add-minimal-generic-RK3576-board.patch +++ /dev/null @@ -1,190 +0,0 @@ -From 2a37796ed7fb46db2f44ce296e9d5c15781161b3 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Fri, 11 Jul 2025 22:21:19 +0000 -Subject: [PATCH 39/84] board: rockchip: Add minimal generic RK3576 board - -Add a minimal generic RK3576 board that only have eMMC, SDMMC and USB -OTG enabled. This defconfig can be used to boot from eMMC or SD-card on -most RK3576 boards that follow reference board design. - -eMMC and SD-card boot tested on: -- ArmSoM CM5 -- ArmSoM Sige5 -- FriendlyElec NanoPi M5 -- Luckfox Omni3576 -- Toybrick TB-RK3576D - -Signed-off-by: Jonas Karlman -Reviewed-by: Kever Yang ---- - arch/arm/dts/rk3576-generic-u-boot.dtsi | 3 ++ - arch/arm/dts/rk3576-generic.dts | 63 +++++++++++++++++++++++ - arch/arm/mach-rockchip/rk3576/MAINTAINERS | 5 ++ - configs/generic-rk3576_defconfig | 50 ++++++++++++++++++ - doc/board/rockchip/rockchip.rst | 1 + - 5 files changed, 122 insertions(+) - create mode 100644 arch/arm/dts/rk3576-generic-u-boot.dtsi - create mode 100644 arch/arm/dts/rk3576-generic.dts - create mode 100644 arch/arm/mach-rockchip/rk3576/MAINTAINERS - create mode 100644 configs/generic-rk3576_defconfig - -diff --git a/arch/arm/dts/rk3576-generic-u-boot.dtsi b/arch/arm/dts/rk3576-generic-u-boot.dtsi -new file mode 100644 -index 00000000000..632fabb6af5 ---- /dev/null -+++ b/arch/arm/dts/rk3576-generic-u-boot.dtsi -@@ -0,0 +1,3 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+ -+#include "rk3576-u-boot.dtsi" -diff --git a/arch/arm/dts/rk3576-generic.dts b/arch/arm/dts/rk3576-generic.dts -new file mode 100644 -index 00000000000..123be5378d9 ---- /dev/null -+++ b/arch/arm/dts/rk3576-generic.dts -@@ -0,0 +1,63 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Minimal generic DT for RK3576 with eMMC, SD-card and USB OTG enabled -+ */ -+ -+/dts-v1/; -+ -+#include -+#include "rk3576.dtsi" -+ -+/ { -+ model = "Generic RK3576"; -+ compatible = "rockchip,rk3576"; -+ -+ aliases { -+ mmc0 = &sdhci; -+ mmc1 = &sdmmc; -+ }; -+ -+ chosen { -+ stdout-path = "serial0:1500000n8"; -+ }; -+}; -+ -+&sdhci { -+ bus-width = <8>; -+ cap-mmc-highspeed; -+ mmc-hs200-1_8v; -+ no-sd; -+ no-sdio; -+ non-removable; -+ status = "okay"; -+}; -+ -+&sdmmc { -+ bus-width = <4>; -+ cap-sd-highspeed; -+ disable-wp; -+ no-mmc; -+ no-sdio; -+ status = "okay"; -+}; -+ -+&u2phy0 { -+ status = "okay"; -+}; -+ -+&u2phy0_otg { -+ status = "okay"; -+}; -+ -+&uart0 { -+ pinctrl-0 = <&uart0m0_xfer>; -+ status = "okay"; -+}; -+ -+&usb_drd0_dwc3 { -+ dr_mode = "peripheral"; -+ maximum-speed = "high-speed"; -+ phys = <&u2phy0_otg>; -+ phy-names = "usb2-phy"; -+ status = "okay"; -+}; -diff --git a/arch/arm/mach-rockchip/rk3576/MAINTAINERS b/arch/arm/mach-rockchip/rk3576/MAINTAINERS -new file mode 100644 -index 00000000000..b5190c81846 ---- /dev/null -+++ b/arch/arm/mach-rockchip/rk3576/MAINTAINERS -@@ -0,0 +1,5 @@ -+GENERIC-RK3576 -+M: Jonas Karlman -+S: Maintained -+F: arch/arm/dts/rk3576-generic* -+F: configs/generic-rk3576_defconfig -diff --git a/configs/generic-rk3576_defconfig b/configs/generic-rk3576_defconfig -new file mode 100644 -index 00000000000..5e25653820c ---- /dev/null -+++ b/configs/generic-rk3576_defconfig -@@ -0,0 +1,50 @@ -+CONFIG_ARM=y -+CONFIG_SKIP_LOWLEVEL_INIT=y -+CONFIG_COUNTER_FREQUENCY=24000000 -+CONFIG_ARCH_ROCKCHIP=y -+CONFIG_DEFAULT_DEVICE_TREE="rk3576-generic" -+CONFIG_ROCKCHIP_RK3576=y -+CONFIG_SYS_LOAD_ADDR=0x40c00800 -+CONFIG_DEBUG_UART_BASE=0x2AD40000 -+CONFIG_DEBUG_UART_CLOCK=24000000 -+CONFIG_DEBUG_UART=y -+# CONFIG_BOOTMETH_VBE is not set -+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3576-generic.dtb" -+# CONFIG_DISPLAY_CPUINFO is not set -+CONFIG_SPL_MAX_SIZE=0x40000 -+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -+CONFIG_CMD_MEMINFO=y -+CONFIG_CMD_MEMINFO_MAP=y -+CONFIG_CMD_GPIO=y -+CONFIG_CMD_GPT=y -+CONFIG_CMD_MISC=y -+CONFIG_CMD_MMC=y -+CONFIG_CMD_ROCKUSB=y -+CONFIG_CMD_USB_MASS_STORAGE=y -+# CONFIG_CMD_SETEXPR is not set -+CONFIG_CMD_RNG=y -+# CONFIG_SPL_DOS_PARTITION is not set -+# CONFIG_OF_UPSTREAM is not set -+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" -+CONFIG_NO_NET=y -+# CONFIG_ADC is not set -+# CONFIG_USB_FUNCTION_FASTBOOT is not set -+CONFIG_ROCKCHIP_GPIO=y -+CONFIG_SUPPORT_EMMC_RPMB=y -+CONFIG_MMC_DW=y -+CONFIG_MMC_DW_ROCKCHIP=y -+CONFIG_MMC_SDHCI=y -+CONFIG_MMC_SDHCI_SDMA=y -+CONFIG_MMC_SDHCI_ROCKCHIP=y -+CONFIG_PHY_ROCKCHIP_INNO_USB2=y -+CONFIG_BAUDRATE=1500000 -+CONFIG_DEBUG_UART_SHIFT=2 -+CONFIG_SYS_NS16550_MEM32=y -+CONFIG_SYSRESET_PSCI=y -+CONFIG_USB=y -+CONFIG_USB_DWC3=y -+CONFIG_USB_DWC3_GENERIC=y -+CONFIG_USB_GADGET=y -+CONFIG_USB_GADGET_DOWNLOAD=y -+CONFIG_USB_FUNCTION_ROCKUSB=y -+CONFIG_ERRNO_STR=y -diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst -index 347c344a7c5..54fa941f236 100644 ---- a/doc/board/rockchip/rockchip.rst -+++ b/doc/board/rockchip/rockchip.rst -@@ -139,6 +139,7 @@ List of mainline supported Rockchip boards: - - * rk3576 - - Firefly ROC-RK3576-PC (roc-pc-rk3576) -+ - Generic RK3576 (generic-rk3576) - - * rk3588 - - ArmSoM Sige7 (sige7-rk3588) --- -2.34.1 - diff --git a/projects/Rockchip/patches/u-boot/rockchip-0070-rockchip-odroid-go2-Add-myself-as-a-reviewer.patch b/projects/Rockchip/patches/u-boot/rockchip-0039-rockchip-odroid-go2-Add-myself-as-a-reviewer.patch similarity index 87% rename from projects/Rockchip/patches/u-boot/rockchip-0070-rockchip-odroid-go2-Add-myself-as-a-reviewer.patch rename to projects/Rockchip/patches/u-boot/rockchip-0039-rockchip-odroid-go2-Add-myself-as-a-reviewer.patch index d13c07e48c..6ceb9bc75c 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0070-rockchip-odroid-go2-Add-myself-as-a-reviewer.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0039-rockchip-odroid-go2-Add-myself-as-a-reviewer.patch @@ -1,7 +1,7 @@ -From bb596d4d3071aef91c84098b033fe9839e69842b Mon Sep 17 00:00:00 2001 +From cccdc00c7825a3f53224a7c621398987b4a84039 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 13 Jul 2025 23:34:04 +0000 -Subject: [PATCH 70/84] rockchip: odroid-go2: Add myself as a reviewer +Subject: [PATCH 39/51] rockchip: odroid-go2: Add myself as a reviewer I have the ORDOID-GO Super variant of this board. Add myself as a reviewer to help review future patches targeting this device. diff --git a/projects/Rockchip/patches/u-boot/rockchip-0071-arm-dts-rockchip-Include-OTP-in-U-Boot-pre-reloc-pha.patch b/projects/Rockchip/patches/u-boot/rockchip-0040-arm-dts-rockchip-Include-OTP-in-U-Boot-pre-reloc-pha.patch similarity index 87% rename from projects/Rockchip/patches/u-boot/rockchip-0071-arm-dts-rockchip-Include-OTP-in-U-Boot-pre-reloc-pha.patch rename to projects/Rockchip/patches/u-boot/rockchip-0040-arm-dts-rockchip-Include-OTP-in-U-Boot-pre-reloc-pha.patch index 3db3a6516f..161ba46cf0 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0071-arm-dts-rockchip-Include-OTP-in-U-Boot-pre-reloc-pha.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0040-arm-dts-rockchip-Include-OTP-in-U-Boot-pre-reloc-pha.patch @@ -1,7 +1,7 @@ -From 2408339af2bb95cca72c43a51709e59a9d75cae2 Mon Sep 17 00:00:00 2001 +From 524a10fa7e649adc015768e958a8e1737221fd53 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 13 Jul 2025 23:34:05 +0000 -Subject: [PATCH 71/84] arm: dts: rockchip: Include OTP in U-Boot pre-reloc +Subject: [PATCH 40/51] arm: dts: rockchip: Include OTP in U-Boot pre-reloc phase for RK3326 Update rk3326-u-boot.dtsi to include OTP in U-Boot pre-reloc phase for diff --git a/projects/Rockchip/patches/u-boot/rockchip-0040-rockchip-rk3576-Implement-checkboard-to-print-SoC-va.patch b/projects/Rockchip/patches/u-boot/rockchip-0040-rockchip-rk3576-Implement-checkboard-to-print-SoC-va.patch deleted file mode 100644 index 4ebf18b1c9..0000000000 --- a/projects/Rockchip/patches/u-boot/rockchip-0040-rockchip-rk3576-Implement-checkboard-to-print-SoC-va.patch +++ /dev/null @@ -1,88 +0,0 @@ -From 9cebb3ad5497aba16f3b2575cafe17fd9477e8f7 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Fri, 11 Jul 2025 22:21:20 +0000 -Subject: [PATCH 40/84] rockchip: rk3576: Implement checkboard() to print SoC - variant - -Implement checkboard() to print current SoC model used by a board when -U-Boot proper is running. - - U-Boot 2025.04 (Apr 22 2025 - 20:43:17 +0000) - - Model: Generic RK3576 - SoC: RK3576 - DRAM: 8 GiB - -Information about the SoC model and variant is read from OTP. - -Signed-off-by: Jonas Karlman ---- - arch/arm/mach-rockchip/rk3576/rk3576.c | 48 ++++++++++++++++++++++++++ - 1 file changed, 48 insertions(+) - -diff --git a/arch/arm/mach-rockchip/rk3576/rk3576.c b/arch/arm/mach-rockchip/rk3576/rk3576.c -index dc53941ab2f..a6c2fbdc484 100644 ---- a/arch/arm/mach-rockchip/rk3576/rk3576.c -+++ b/arch/arm/mach-rockchip/rk3576/rk3576.c -@@ -3,6 +3,10 @@ - * Copyright (c) 2024 Rockchip Electronics Co., Ltd - */ - -+#define LOG_CATEGORY LOGC_ARCH -+ -+#include -+#include - #include - #include - #include -@@ -159,3 +163,47 @@ int arch_cpu_init(void) - - return 0; - } -+ -+#define RK3576_OTP_CPU_CODE_OFFSET 0x02 -+#define RK3576_OTP_SPECIFICATION_OFFSET 0x08 -+ -+int checkboard(void) -+{ -+ u8 cpu_code[2], specification; -+ struct udevice *dev; -+ char suffix[2]; -+ int ret; -+ -+ if (!IS_ENABLED(CONFIG_ROCKCHIP_OTP) || !CONFIG_IS_ENABLED(MISC)) -+ return 0; -+ -+ ret = uclass_get_device_by_driver(UCLASS_MISC, -+ DM_DRIVER_GET(rockchip_otp), &dev); -+ if (ret) { -+ log_debug("Could not find otp device, ret=%d\n", ret); -+ return 0; -+ } -+ -+ /* cpu-code: SoC model, e.g. 0x35 0x76 */ -+ ret = misc_read(dev, RK3576_OTP_CPU_CODE_OFFSET, cpu_code, 2); -+ if (ret < 0) { -+ log_debug("Could not read cpu-code, ret=%d\n", ret); -+ return 0; -+ } -+ -+ /* specification: SoC variant, e.g. 0xA for RK3576J */ -+ ret = misc_read(dev, RK3576_OTP_SPECIFICATION_OFFSET, &specification, 1); -+ if (ret < 0) { -+ log_debug("Could not read specification, ret=%d\n", ret); -+ return 0; -+ } -+ specification &= 0x1f; -+ -+ /* for RK3576J i.e. '@' + 0xA = 'J' */ -+ suffix[0] = specification > 1 ? '@' + specification : '\0'; -+ suffix[1] = '\0'; -+ -+ printf("SoC: RK%02x%02x%s\n", cpu_code[0], cpu_code[1], suffix); -+ -+ return 0; -+} --- -2.34.1 - diff --git a/projects/Rockchip/patches/u-boot/rockchip-0041-arm-dts-rockchip-Include-OTP-in-U-Boot-pre-reloc-pha.patch b/projects/Rockchip/patches/u-boot/rockchip-0041-arm-dts-rockchip-Include-OTP-in-U-Boot-pre-reloc-pha.patch deleted file mode 100644 index 3ff78df8a1..0000000000 --- a/projects/Rockchip/patches/u-boot/rockchip-0041-arm-dts-rockchip-Include-OTP-in-U-Boot-pre-reloc-pha.patch +++ /dev/null @@ -1,39 +0,0 @@ -From 069af748f2441fac896b353b1d009d57c216a609 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Fri, 11 Jul 2025 22:21:21 +0000 -Subject: [PATCH 41/84] arm: dts: rockchip: Include OTP in U-Boot pre-reloc - phase for RK3576 - -Update rk3576-u-boot.dtsi to include OTP in U-Boot pre-reloc phase for -checkboard() to be able to read information about the running SoC model -and variant from OTP and print it during boot: - - U-Boot 2025.04 (Apr 22 2025 - 20:43:17 +0000) - - Model: Generic RK3576 - SoC: RK3576 - DRAM: 8 GiB - -Signed-off-by: Jonas Karlman ---- - arch/arm/dts/rk3576-u-boot.dtsi | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/arch/arm/dts/rk3576-u-boot.dtsi b/arch/arm/dts/rk3576-u-boot.dtsi -index be99a48a630..fb5a107f47d 100644 ---- a/arch/arm/dts/rk3576-u-boot.dtsi -+++ b/arch/arm/dts/rk3576-u-boot.dtsi -@@ -49,6 +49,10 @@ - bootph-all; - }; - -+&otp { -+ bootph-some-ram; -+}; -+ - &pcfg_pull_none { - bootph-all; - }; --- -2.34.1 - diff --git a/projects/Rockchip/patches/u-boot/rockchip-0072-rockchip-mkimage-Split-size_and_off-and-size_and_nim.patch b/projects/Rockchip/patches/u-boot/rockchip-0041-rockchip-mkimage-Split-size_and_off-and-size_and_nim.patch similarity index 97% rename from projects/Rockchip/patches/u-boot/rockchip-0072-rockchip-mkimage-Split-size_and_off-and-size_and_nim.patch rename to projects/Rockchip/patches/u-boot/rockchip-0041-rockchip-mkimage-Split-size_and_off-and-size_and_nim.patch index b9b589504f..745cf9ec87 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0072-rockchip-mkimage-Split-size_and_off-and-size_and_nim.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0041-rockchip-mkimage-Split-size_and_off-and-size_and_nim.patch @@ -1,7 +1,7 @@ -From bef74902961b6ecc08b188016d7d60ca68d4efb0 Mon Sep 17 00:00:00 2001 +From 3421116bf43b5e04c2ef6e4fecde88ff886f03dd Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Wed, 29 Jan 2025 22:36:27 +0000 -Subject: [PATCH 72/84] rockchip: mkimage: Split size_and_off and +Subject: [PATCH 41/51] rockchip: mkimage: Split size_and_off and size_and_nimage Split 32-bit size_and_off and size_and_nimage fields of the v2 image diff --git a/projects/Rockchip/patches/u-boot/rockchip-0073-rockchip-mkimage-Print-image-information-for-all-emb.patch b/projects/Rockchip/patches/u-boot/rockchip-0042-rockchip-mkimage-Print-image-information-for-all-emb.patch similarity index 96% rename from projects/Rockchip/patches/u-boot/rockchip-0073-rockchip-mkimage-Print-image-information-for-all-emb.patch rename to projects/Rockchip/patches/u-boot/rockchip-0042-rockchip-mkimage-Print-image-information-for-all-emb.patch index ef94646b60..16462794a4 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0073-rockchip-mkimage-Print-image-information-for-all-emb.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0042-rockchip-mkimage-Print-image-information-for-all-emb.patch @@ -1,7 +1,7 @@ -From a1a3a2d00251f392274251225e266673dd3fbeca Mon Sep 17 00:00:00 2001 +From efab191eb144a44817258ef06f584241ee583235 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Wed, 29 Jan 2025 22:36:28 +0000 -Subject: [PATCH 73/84] rockchip: mkimage: Print image information for all +Subject: [PATCH 42/51] rockchip: mkimage: Print image information for all embedded images The v2 image format can embed up to 4 data files compared to the two diff --git a/projects/Rockchip/patches/u-boot/rockchip-0042-usb-dwc3-generic-Use-combined-glue-and-ctrl-node-for.patch b/projects/Rockchip/patches/u-boot/rockchip-0042-usb-dwc3-generic-Use-combined-glue-and-ctrl-node-for.patch deleted file mode 100644 index ff8d5eb2e4..0000000000 --- a/projects/Rockchip/patches/u-boot/rockchip-0042-usb-dwc3-generic-Use-combined-glue-and-ctrl-node-for.patch +++ /dev/null @@ -1,31 +0,0 @@ -From efb11d2b75da04c2e5ddc257989881248adb9f65 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Sun, 16 Feb 2025 19:17:20 +0000 -Subject: [PATCH 42/84] usb: dwc3-generic: Use combined glue and ctrl node for - RK3576 - -Like Rockchip RK3328, RK3568 and RK3588, the RK3576 also have a single -node to represent the glue and ctrl for USB 3.0. - -Use rk_ops as driver data to select correct ctrl node for RK3576 DWC3. - -Signed-off-by: Jonas Karlman ---- - drivers/usb/dwc3/dwc3-generic.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c -index 6b2016c0cd3..c09014aec60 100644 ---- a/drivers/usb/dwc3/dwc3-generic.c -+++ b/drivers/usb/dwc3/dwc3-generic.c -@@ -700,6 +700,7 @@ static const struct udevice_id dwc3_glue_ids[] = { - { .compatible = "rockchip,rk3399-dwc3" }, - { .compatible = "rockchip,rk3528-dwc3", .data = (ulong)&rk_ops }, - { .compatible = "rockchip,rk3568-dwc3", .data = (ulong)&rk_ops }, -+ { .compatible = "rockchip,rk3576-dwc3", .data = (ulong)&rk_ops }, - { .compatible = "rockchip,rk3588-dwc3", .data = (ulong)&rk_ops }, - { .compatible = "qcom,dwc3", .data = (ulong)&qcom_ops }, - { .compatible = "fsl,imx8mp-dwc3", .data = (ulong)&imx8mp_ops }, --- -2.34.1 - diff --git a/projects/Rockchip/patches/u-boot/rockchip-0043-phy-rockchip-inno-usb2-Add-support-for-RK3576.patch b/projects/Rockchip/patches/u-boot/rockchip-0043-phy-rockchip-inno-usb2-Add-support-for-RK3576.patch deleted file mode 100644 index 9dc3ec13f3..0000000000 --- a/projects/Rockchip/patches/u-boot/rockchip-0043-phy-rockchip-inno-usb2-Add-support-for-RK3576.patch +++ /dev/null @@ -1,62 +0,0 @@ -From 8f79cc0dc08fe79eec426dbf15d48ff71e848749 Mon Sep 17 00:00:00 2001 -From: Frank Wang -Date: Wed, 5 Feb 2025 01:00:33 +0000 -Subject: [PATCH 43/84] phy: rockchip-inno-usb2: Add support for RK3576 - -Add support for the USB2.0 PHYs used in the RK3576 SoC. - -Config values are taken from vendor U-Boot linux-6.1-stan-rkr5 tag. - -Signed-off-by: Frank Wang -Signed-off-by: Jonas Karlman ---- - drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 26 +++++++++++++++++++ - 1 file changed, 26 insertions(+) - -diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c -index a3222138b9d..4ea6600ce7f 100644 ---- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c -+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c -@@ -465,6 +465,28 @@ static const struct rockchip_usb2phy_cfg rk3568_phy_cfgs[] = { - { /* sentinel */ } - }; - -+static const struct rockchip_usb2phy_cfg rk3576_phy_cfgs[] = { -+ { -+ .reg = 0x0000, -+ .clkout_ctl = { 0x0008, 0, 0, 1, 0 }, -+ .port_cfgs = { -+ [USB2PHY_PORT_OTG] = { -+ .phy_sus = { 0x0000, 1, 0, 2, 1 }, -+ } -+ }, -+ }, -+ { -+ .reg = 0x2000, -+ .clkout_ctl = { 0x2008, 0, 0, 1, 0 }, -+ .port_cfgs = { -+ [USB2PHY_PORT_OTG] = { -+ .phy_sus = { 0x2000, 1, 0, 2, 1 }, -+ } -+ }, -+ }, -+ { /* sentinel */ } -+}; -+ - static const struct rockchip_usb2phy_cfg rk3588_phy_cfgs[] = { - { - .reg = 0x0000, -@@ -526,6 +548,10 @@ static const struct udevice_id rockchip_usb2phy_ids[] = { - .compatible = "rockchip,rk3568-usb2phy", - .data = (ulong)&rk3568_phy_cfgs, - }, -+ { -+ .compatible = "rockchip,rk3576-usb2phy", -+ .data = (ulong)&rk3576_phy_cfgs, -+ }, - { - .compatible = "rockchip,rk3588-usb2phy", - .data = (ulong)&rk3588_phy_cfgs, --- -2.34.1 - diff --git a/projects/Rockchip/patches/u-boot/rockchip-0074-rockchip-mkimage-Print-boot0-and-boot1-parameters.patch b/projects/Rockchip/patches/u-boot/rockchip-0043-rockchip-mkimage-Print-boot0-and-boot1-parameters.patch similarity index 94% rename from projects/Rockchip/patches/u-boot/rockchip-0074-rockchip-mkimage-Print-boot0-and-boot1-parameters.patch rename to projects/Rockchip/patches/u-boot/rockchip-0043-rockchip-mkimage-Print-boot0-and-boot1-parameters.patch index ed88576c36..caffd6c579 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0074-rockchip-mkimage-Print-boot0-and-boot1-parameters.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0043-rockchip-mkimage-Print-boot0-and-boot1-parameters.patch @@ -1,7 +1,7 @@ -From f7f5be20cf184817a7d26801012cc4d439064217 Mon Sep 17 00:00:00 2001 +From 37395f3e04361de2e142d242a4b00dd5cd35d54c Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Wed, 29 Jan 2025 22:36:29 +0000 -Subject: [PATCH 74/84] rockchip: mkimage: Print boot0 and boot1 parameters +Subject: [PATCH 43/51] rockchip: mkimage: Print boot0 and boot1 parameters The v2 image format embeds boot0 and boot1 parameters, the vendor tool boot_merger may write these parameters based on the rkboot miniall.ini diff --git a/projects/Rockchip/patches/u-boot/rockchip-0044-phy-rockchip-usbdp-Add-support-for-RK3576.patch b/projects/Rockchip/patches/u-boot/rockchip-0044-phy-rockchip-usbdp-Add-support-for-RK3576.patch deleted file mode 100644 index 7eb6649ce4..0000000000 --- a/projects/Rockchip/patches/u-boot/rockchip-0044-phy-rockchip-usbdp-Add-support-for-RK3576.patch +++ /dev/null @@ -1,62 +0,0 @@ -From c239806d4c322c24938880467e30eb1244955a73 Mon Sep 17 00:00:00 2001 -From: Frank Wang -Date: Thu, 10 Jul 2025 20:33:58 +0000 -Subject: [PATCH 44/84] phy: rockchip: usbdp: Add support for RK3576 - -Add support for the USB3.0+DP PHY used in the RK3576 SoC. - -Config values are taken from vendor U-Boot linux-6.1-stan-rkr5 tag. - -Signed-off-by: Frank Wang -Signed-off-by: Jonas Karlman ---- - drivers/phy/rockchip/phy-rockchip-usbdp.c | 26 +++++++++++++++++++++++ - 1 file changed, 26 insertions(+) - -diff --git a/drivers/phy/rockchip/phy-rockchip-usbdp.c b/drivers/phy/rockchip/phy-rockchip-usbdp.c -index 6cfbef02b4a..cca67dd3611 100644 ---- a/drivers/phy/rockchip/phy-rockchip-usbdp.c -+++ b/drivers/phy/rockchip/phy-rockchip-usbdp.c -@@ -762,6 +762,28 @@ static const char * const rk3588_udphy_rst_l[] = { - "init", "cmn", "lane", "pcs_apb", "pma_apb" - }; - -+static const struct rockchip_udphy_cfg rk3576_udphy_cfgs = { -+ .num_phys = 1, -+ .phy_ids = { -+ 0x2b010000, -+ }, -+ .num_rsts = ARRAY_SIZE(rk3588_udphy_rst_l), -+ .rst_list = rk3588_udphy_rst_l, -+ .grfcfg = { -+ /* u2phy-grf */ -+ .bvalid_phy_con = { 0x0010, 1, 0, 0x2, 0x3 }, -+ .bvalid_grf_con = { 0x0000, 15, 14, 0x1, 0x3 }, -+ -+ /* usb-grf */ -+ .usb3otg0_cfg = { 0x0030, 15, 0, 0x1100, 0x0188 }, -+ -+ /* usbdpphy-grf */ -+ .low_pwrn = { 0x0004, 13, 13, 0, 1 }, -+ .rx_lfps = { 0x0004, 14, 14, 0, 1 }, -+ }, -+ .combophy_init = rk3588_udphy_init, -+}; -+ - static const struct rockchip_udphy_cfg rk3588_udphy_cfgs = { - .num_phys = 2, - .phy_ids = { -@@ -787,6 +809,10 @@ static const struct rockchip_udphy_cfg rk3588_udphy_cfgs = { - }; - - static const struct udevice_id rockchip_udphy_dt_match[] = { -+ { -+ .compatible = "rockchip,rk3576-usbdp-phy", -+ .data = (ulong)&rk3576_udphy_cfgs -+ }, - { - .compatible = "rockchip,rk3588-usbdp-phy", - .data = (ulong)&rk3588_udphy_cfgs --- -2.34.1 - diff --git a/projects/Rockchip/patches/u-boot/rockchip-0075-rockchip-mkimage-Add-option-to-change-image-offset-a.patch b/projects/Rockchip/patches/u-boot/rockchip-0044-rockchip-mkimage-Add-option-to-change-image-offset-a.patch similarity index 98% rename from projects/Rockchip/patches/u-boot/rockchip-0075-rockchip-mkimage-Add-option-to-change-image-offset-a.patch rename to projects/Rockchip/patches/u-boot/rockchip-0044-rockchip-mkimage-Add-option-to-change-image-offset-a.patch index 3a55e9ccc0..9610225a23 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0075-rockchip-mkimage-Add-option-to-change-image-offset-a.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0044-rockchip-mkimage-Add-option-to-change-image-offset-a.patch @@ -1,7 +1,7 @@ -From d036163270cb7572898de8872c6074dbb49117d3 Mon Sep 17 00:00:00 2001 +From 45311d3682bf06ca3d05906531c1aa68d2fe0ec7 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Wed, 29 Jan 2025 22:36:30 +0000 -Subject: [PATCH 75/84] rockchip: mkimage: Add option to change image offset +Subject: [PATCH 44/51] rockchip: mkimage: Add option to change image offset alignment The vendor boot_merger tool support a ALIGN parameter that is used to diff --git a/projects/Rockchip/patches/u-boot/rockchip-0045-rockchip-clk-clk_rk3576-Add-dummy-CLK_REF_PCIEx_PHY-.patch b/projects/Rockchip/patches/u-boot/rockchip-0045-rockchip-clk-clk_rk3576-Add-dummy-CLK_REF_PCIEx_PHY-.patch deleted file mode 100644 index c9ea649080..0000000000 --- a/projects/Rockchip/patches/u-boot/rockchip-0045-rockchip-clk-clk_rk3576-Add-dummy-CLK_REF_PCIEx_PHY-.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 59e0942f5cb2c61521bf740e6fcd1270072cf65a Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Fri, 11 Jul 2025 22:44:34 +0000 -Subject: [PATCH 45/84] rockchip: clk: clk_rk3576: Add dummy CLK_REF_PCIEx_PHY - support - -Add dummy support for the CLK_REF_PCIEx_PHY clocks to allow probe of the -phy-rockchip-naneng-combphy driver on RK3576. - -Signed-off-by: Jonas Karlman ---- - drivers/clk/rockchip/clk_rk3576.c | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/drivers/clk/rockchip/clk_rk3576.c b/drivers/clk/rockchip/clk_rk3576.c -index e84a0943a94..125b08ee832 100644 ---- a/drivers/clk/rockchip/clk_rk3576.c -+++ b/drivers/clk/rockchip/clk_rk3576.c -@@ -2168,6 +2168,8 @@ static ulong rk3576_clk_set_rate(struct clk *clk, ulong rate) - case CLK_CPLL_DIV10: - case FCLK_DDR_CM0_CORE: - case ACLK_PHP_ROOT: -+ case CLK_REF_PCIE0_PHY: -+ case CLK_REF_PCIE1_PHY: - ret = 0; - break; - #ifndef CONFIG_SPL_BUILD --- -2.34.1 - diff --git a/projects/Rockchip/patches/u-boot/rockchip-0076-rockchip-mkimage-Add-support-for-up-to-4-input-files.patch b/projects/Rockchip/patches/u-boot/rockchip-0045-rockchip-mkimage-Add-support-for-up-to-4-input-files.patch similarity index 98% rename from projects/Rockchip/patches/u-boot/rockchip-0076-rockchip-mkimage-Add-support-for-up-to-4-input-files.patch rename to projects/Rockchip/patches/u-boot/rockchip-0045-rockchip-mkimage-Add-support-for-up-to-4-input-files.patch index eed3646876..3f9f44bcf1 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0076-rockchip-mkimage-Add-support-for-up-to-4-input-files.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0045-rockchip-mkimage-Add-support-for-up-to-4-input-files.patch @@ -1,7 +1,7 @@ -From 2fca780304046185284f223fd41de20a7199004e Mon Sep 17 00:00:00 2001 +From f96bb3b450a8503bce8863dbf25af1b8f5de88da Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Wed, 29 Jan 2025 22:36:31 +0000 -Subject: [PATCH 76/84] rockchip: mkimage: Add support for up to 4 input files +Subject: [PATCH 45/51] rockchip: mkimage: Add support for up to 4 input files The v2 image format can support up to 4 embedded images that can be loaded by the BootROM using the back-to-bootrom method. diff --git a/projects/Rockchip/patches/u-boot/rockchip-0046-phy-rockchip-naneng-combphy-Add-support-for-RK3576.patch b/projects/Rockchip/patches/u-boot/rockchip-0046-phy-rockchip-naneng-combphy-Add-support-for-RK3576.patch deleted file mode 100644 index 79448f5e7e..0000000000 --- a/projects/Rockchip/patches/u-boot/rockchip-0046-phy-rockchip-naneng-combphy-Add-support-for-RK3576.patch +++ /dev/null @@ -1,183 +0,0 @@ -From cd325d4d441c7d4ee44b157b45f14f12b2f814df Mon Sep 17 00:00:00 2001 -From: Jon Lin -Date: Fri, 11 Jul 2025 22:44:35 +0000 -Subject: [PATCH 46/84] phy: rockchip: naneng-combphy: Add support for RK3576 - -Add support for the PCIe/USB3/SATA combo PHYs used in the RK3576 SoC. - -Config values are taken from vendor U-Boot linux-6.1-stan-rkr5 tag. - -Signed-off-by: Jon Lin -Signed-off-by: Jonas Karlman ---- - .../rockchip/phy-rockchip-naneng-combphy.c | 147 ++++++++++++++++++ - 1 file changed, 147 insertions(+) - -diff --git a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c -index 432a8f8e03a..82353ae7678 100644 ---- a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c -+++ b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c -@@ -494,6 +494,149 @@ static const struct rockchip_combphy_cfg rk3568_combphy_cfgs = { - .combphy_cfg = rk3568_combphy_cfg, - }; - -+static int rk3576_combphy_cfg(struct rockchip_combphy_priv *priv) -+{ -+ const struct rockchip_combphy_grfcfg *cfg = priv->cfg->grfcfg; -+ u32 val; -+ -+ switch (priv->mode) { -+ case PHY_TYPE_PCIE: -+ param_write(priv->phy_grf, &cfg->con0_for_pcie, true); -+ param_write(priv->phy_grf, &cfg->con1_for_pcie, true); -+ param_write(priv->phy_grf, &cfg->con2_for_pcie, true); -+ param_write(priv->phy_grf, &cfg->con3_for_pcie, true); -+ break; -+ case PHY_TYPE_USB3: -+ /* Set SSC downward spread spectrum */ -+ val = readl(priv->mmio + (0x1f << 2)); -+ val &= ~GENMASK(5, 4); -+ val |= 0x01 << 4; -+ writel(val, priv->mmio + 0x7c); -+ -+ /* Enable adaptive CTLE for USB3.0 Rx */ -+ val = readl(priv->mmio + (0x0e << 2)); -+ val &= ~GENMASK(0, 0); -+ val |= 0x01; -+ writel(val, priv->mmio + (0x0e << 2)); -+ -+ /* Set PLL KVCO fine tuning signals */ -+ val = readl(priv->mmio + (0x20 << 2)); -+ val &= ~(0x7 << 2); -+ val |= 0x2 << 2; -+ writel(val, priv->mmio + (0x20 << 2)); -+ -+ /* Set PLL LPF R1 to su_trim[10:7]=1001 */ -+ writel(0x4, priv->mmio + (0xb << 2)); -+ -+ /* Set PLL input clock divider 1/2 */ -+ val = readl(priv->mmio + (0x5 << 2)); -+ val &= ~(0x3 << 6); -+ val |= 0x1 << 6; -+ writel(val, priv->mmio + (0x5 << 2)); -+ -+ /* Set PLL loop divider */ -+ writel(0x32, priv->mmio + (0x11 << 2)); -+ -+ /* Set PLL KVCO to min and set PLL charge pump current to max */ -+ writel(0xf0, priv->mmio + (0xa << 2)); -+ -+ /* Set Rx squelch input filler bandwidth */ -+ writel(0x0d, priv->mmio + (0x14 << 2)); -+ -+ param_write(priv->phy_grf, &cfg->pipe_txcomp_sel, false); -+ param_write(priv->phy_grf, &cfg->pipe_txelec_sel, false); -+ param_write(priv->phy_grf, &cfg->usb_mode_set, true); -+ param_write(priv->pipe_grf, &cfg->u3otg1_port_en, true); -+ break; -+ case PHY_TYPE_SATA: -+ /* Enable adaptive CTLE for SATA Rx */ -+ val = readl(priv->mmio + (0x0e << 2)); -+ val &= ~GENMASK(0, 0); -+ val |= 0x01; -+ writel(val, priv->mmio + (0x0e << 2)); -+ /* Set tx_rterm = 50 ohm and rx_rterm = 43.5 ohm */ -+ writel(0x8F, priv->mmio + (0x06 << 2)); -+ -+ param_write(priv->phy_grf, &cfg->con0_for_sata, true); -+ param_write(priv->phy_grf, &cfg->con1_for_sata, true); -+ param_write(priv->phy_grf, &cfg->con2_for_sata, true); -+ param_write(priv->phy_grf, &cfg->con3_for_sata, true); -+ param_write(priv->pipe_grf, &cfg->pipe_con0_for_sata, true); -+ param_write(priv->pipe_grf, &cfg->pipe_con1_for_sata, true); -+ break; -+ case PHY_TYPE_SGMII: -+ case PHY_TYPE_QSGMII: -+ default: -+ dev_err(priv->dev, "incompatible PHY type\n"); -+ return -EINVAL; -+ } -+ -+ /* 100MHz refclock signal is good */ -+ clk_set_rate(&priv->ref_clk, 100000000); -+ param_write(priv->phy_grf, &cfg->pipe_clk_100m, true); -+ if (priv->mode == PHY_TYPE_PCIE) { -+ /* gate_tx_pck_sel length select work for L1SS */ -+ writel(0xc0, priv->mmio + 0x74); -+ -+ /* PLL KVCO tuning fine */ -+ val = readl(priv->mmio + (0x20 << 2)); -+ val &= ~(0x7 << 2); -+ val |= 0x2 << 2; -+ writel(val, priv->mmio + (0x20 << 2)); -+ -+ /* Set up rx_trim: PLL LPF C1 85pf R1 1.25kohm */ -+ writel(0x4c, priv->mmio + (0x1b << 2)); -+ -+ /* Set up su_trim: T3_P1 650mv */ -+ writel(0x90, priv->mmio + (0xa << 2)); -+ writel(0x43, priv->mmio + (0xb << 2)); -+ writel(0x88, priv->mmio + (0xc << 2)); -+ writel(0x56, priv->mmio + (0xd << 2)); -+ } -+ -+ return 0; -+} -+ -+static const struct rockchip_combphy_grfcfg rk3576_combphy_grfcfgs = { -+ /* pipe-phy-grf */ -+ .pcie_mode_set = { 0x0000, 5, 0, 0x00, 0x11 }, -+ .usb_mode_set = { 0x0000, 5, 0, 0x00, 0x04 }, -+ .pipe_rxterm_set = { 0x0000, 12, 12, 0x00, 0x01 }, -+ .pipe_txelec_set = { 0x0004, 1, 1, 0x00, 0x01 }, -+ .pipe_txcomp_set = { 0x0004, 4, 4, 0x00, 0x01 }, -+ .pipe_clk_25m = { 0x0004, 14, 13, 0x00, 0x01 }, -+ .pipe_clk_100m = { 0x0004, 14, 13, 0x00, 0x02 }, -+ .pipe_phymode_sel = { 0x0008, 1, 1, 0x00, 0x01 }, -+ .pipe_rate_sel = { 0x0008, 2, 2, 0x00, 0x01 }, -+ .pipe_rxterm_sel = { 0x0008, 8, 8, 0x00, 0x01 }, -+ .pipe_txelec_sel = { 0x0008, 12, 12, 0x00, 0x01 }, -+ .pipe_txcomp_sel = { 0x0008, 15, 15, 0x00, 0x01 }, -+ .pipe_clk_ext = { 0x000c, 9, 8, 0x02, 0x01 }, -+ .pipe_phy_status = { 0x0034, 6, 6, 0x01, 0x00 }, -+ .con0_for_pcie = { 0x0000, 15, 0, 0x00, 0x1000 }, -+ .con1_for_pcie = { 0x0004, 15, 0, 0x00, 0x0000 }, -+ .con2_for_pcie = { 0x0008, 15, 0, 0x00, 0x0101 }, -+ .con3_for_pcie = { 0x000c, 15, 0, 0x00, 0x0200 }, -+ .con0_for_sata = { 0x0000, 15, 0, 0x00, 0x0129 }, -+ .con1_for_sata = { 0x0004, 15, 0, 0x00, 0x0000 }, -+ .con2_for_sata = { 0x0008, 15, 0, 0x00, 0x80c1 }, -+ .con3_for_sata = { 0x000c, 15, 0, 0x00, 0x0407 }, -+ /* php-grf */ -+ .pipe_con0_for_sata = { 0x001C, 2, 0, 0x00, 0x2 }, -+ .pipe_con1_for_sata = { 0x0020, 2, 0, 0x00, 0x2 }, -+ .u3otg1_port_en = { 0x0038, 15, 0, 0x0181, 0x1100 }, -+}; -+ -+static const struct rockchip_combphy_cfg rk3576_combphy_cfgs = { -+ .num_phys = 2, -+ .phy_ids = { -+ 0x2b050000, -+ 0x2b060000, -+ }, -+ .grfcfg = &rk3576_combphy_grfcfgs, -+ .combphy_cfg = rk3576_combphy_cfg, -+}; -+ - static int rk3588_combphy_cfg(struct rockchip_combphy_priv *priv) - { - const struct rockchip_combphy_grfcfg *cfg = priv->cfg->grfcfg; -@@ -609,6 +752,10 @@ static const struct udevice_id rockchip_combphy_ids[] = { - .compatible = "rockchip,rk3568-naneng-combphy", - .data = (ulong)&rk3568_combphy_cfgs - }, -+ { -+ .compatible = "rockchip,rk3576-naneng-combphy", -+ .data = (ulong)&rk3576_combphy_cfgs -+ }, - { - .compatible = "rockchip,rk3588-naneng-combphy", - .data = (ulong)&rk3588_combphy_cfgs --- -2.34.1 - diff --git a/projects/Rockchip/patches/u-boot/rockchip-0077-rockchip-mkimage-Add-option-for-image-load-address-a.patch b/projects/Rockchip/patches/u-boot/rockchip-0046-rockchip-mkimage-Add-option-for-image-load-address-a.patch similarity index 92% rename from projects/Rockchip/patches/u-boot/rockchip-0077-rockchip-mkimage-Add-option-for-image-load-address-a.patch rename to projects/Rockchip/patches/u-boot/rockchip-0046-rockchip-mkimage-Add-option-for-image-load-address-a.patch index aec0782525..72caa2347f 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0077-rockchip-mkimage-Add-option-for-image-load-address-a.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0046-rockchip-mkimage-Add-option-for-image-load-address-a.patch @@ -1,7 +1,7 @@ -From 5dc781bf680c34a57817b8ac1ab247497253c3d7 Mon Sep 17 00:00:00 2001 +From e7044c65dc50e4fd005d7262af4f6c5536cce038 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Wed, 29 Jan 2025 22:36:32 +0000 -Subject: [PATCH 77/84] rockchip: mkimage: Add option for image load address +Subject: [PATCH 46/51] rockchip: mkimage: Add option for image load address and flag The v2 image format supports defining a load address and flag for each diff --git a/projects/Rockchip/patches/u-boot/rockchip-0078-WIP-rockchip-mkimage-Add-rk3576-align-and-sd-card-wo.patch b/projects/Rockchip/patches/u-boot/rockchip-0047-WIP-rockchip-mkimage-Add-rk3576-align-and-sd-card-wo.patch similarity index 96% rename from projects/Rockchip/patches/u-boot/rockchip-0078-WIP-rockchip-mkimage-Add-rk3576-align-and-sd-card-wo.patch rename to projects/Rockchip/patches/u-boot/rockchip-0047-WIP-rockchip-mkimage-Add-rk3576-align-and-sd-card-wo.patch index 307b5d4dc5..22692aa190 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0078-WIP-rockchip-mkimage-Add-rk3576-align-and-sd-card-wo.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0047-WIP-rockchip-mkimage-Add-rk3576-align-and-sd-card-wo.patch @@ -1,7 +1,7 @@ -From b07ffc8797bbd19fab705b46751957b5d2160d72 Mon Sep 17 00:00:00 2001 +From 1de2afa953309c62ad0bfd5a0efb58bc5c59e763 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Tue, 28 Jan 2025 01:30:12 +0000 -Subject: [PATCH 78/84] WIP: rockchip: mkimage: Add rk3576 align and sd-card +Subject: [PATCH 47/51] WIP: rockchip: mkimage: Add rk3576 align and sd-card workaround The BootROM on RK3576 has an issue loading boot images from an SD-card. diff --git a/projects/Rockchip/patches/u-boot/rockchip-0047-board-rockchip-Add-ArmSoM-Sige5.patch b/projects/Rockchip/patches/u-boot/rockchip-0047-board-rockchip-Add-ArmSoM-Sige5.patch deleted file mode 100644 index d1bf4dceaf..0000000000 --- a/projects/Rockchip/patches/u-boot/rockchip-0047-board-rockchip-Add-ArmSoM-Sige5.patch +++ /dev/null @@ -1,153 +0,0 @@ -From e7ce0ba19940ca5750cf8ab420f93289e1f16417 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Fri, 11 Jul 2025 22:44:36 +0000 -Subject: [PATCH 47/84] board: rockchip: Add ArmSoM Sige5 - -ArmSoM-Sige5 adopts the second-generation 8nm high-performance AIOT -platform Rockchip RK3576, with a 6 TOPS computing power NPU and support -for up to 16GB of large memory. It supports 4K video encoding and -decoding, offers rich interfaces including dual gigabit Ethernet ports, -WiFi 6 & BT5, and various video outputs. - -Features tested on a ArmSoM Sige5 v1.1: -- SD-card boot -- eMMC boot -- Ethernet -- PCIe NVMe - -Signed-off-by: Jonas Karlman -Reviewed-by: Kever Yang ---- - arch/arm/dts/rk3576-armsom-sige5-u-boot.dtsi | 18 ++++++ - arch/arm/mach-rockchip/rk3576/MAINTAINERS | 6 ++ - configs/sige5-rk3576_defconfig | 66 ++++++++++++++++++++ - doc/board/rockchip/rockchip.rst | 1 + - 4 files changed, 91 insertions(+) - create mode 100644 arch/arm/dts/rk3576-armsom-sige5-u-boot.dtsi - create mode 100644 configs/sige5-rk3576_defconfig - -diff --git a/arch/arm/dts/rk3576-armsom-sige5-u-boot.dtsi b/arch/arm/dts/rk3576-armsom-sige5-u-boot.dtsi -new file mode 100644 -index 00000000000..7e0530d85d1 ---- /dev/null -+++ b/arch/arm/dts/rk3576-armsom-sige5-u-boot.dtsi -@@ -0,0 +1,18 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+ -+#include "rk3576-u-boot.dtsi" -+ -+/ { -+ aliases { -+ mmc0 = &sdhci; -+ mmc1 = &sdmmc; -+ }; -+}; -+ -+&red_led { -+ default-state = "on"; -+}; -+ -+&sdhci { -+ cap-mmc-highspeed; -+}; -diff --git a/arch/arm/mach-rockchip/rk3576/MAINTAINERS b/arch/arm/mach-rockchip/rk3576/MAINTAINERS -index b5190c81846..94ef74d429f 100644 ---- a/arch/arm/mach-rockchip/rk3576/MAINTAINERS -+++ b/arch/arm/mach-rockchip/rk3576/MAINTAINERS -@@ -3,3 +3,9 @@ M: Jonas Karlman - S: Maintained - F: arch/arm/dts/rk3576-generic* - F: configs/generic-rk3576_defconfig -+ -+SIGE5-RK3576 -+M: Jonas Karlman -+S: Maintained -+F: arch/arm/dts/rk3576-armsom-sige5* -+F: configs/sige5-rk3576_defconfig -diff --git a/configs/sige5-rk3576_defconfig b/configs/sige5-rk3576_defconfig -new file mode 100644 -index 00000000000..c515e145595 ---- /dev/null -+++ b/configs/sige5-rk3576_defconfig -@@ -0,0 +1,66 @@ -+CONFIG_ARM=y -+CONFIG_SKIP_LOWLEVEL_INIT=y -+CONFIG_COUNTER_FREQUENCY=24000000 -+CONFIG_ARCH_ROCKCHIP=y -+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3576-armsom-sige5" -+CONFIG_ROCKCHIP_RK3576=y -+CONFIG_SYS_LOAD_ADDR=0x40c00800 -+CONFIG_DEBUG_UART_BASE=0x2AD40000 -+CONFIG_DEBUG_UART_CLOCK=24000000 -+CONFIG_PCI=y -+CONFIG_DEBUG_UART=y -+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3576-armsom-sige5.dtb" -+# CONFIG_DISPLAY_CPUINFO is not set -+CONFIG_SPL_MAX_SIZE=0x40000 -+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -+CONFIG_CMD_MEMINFO=y -+CONFIG_CMD_MEMINFO_MAP=y -+CONFIG_CMD_ADC=y -+CONFIG_CMD_GPIO=y -+CONFIG_CMD_GPT=y -+CONFIG_CMD_I2C=y -+CONFIG_CMD_MISC=y -+CONFIG_CMD_MMC=y -+CONFIG_CMD_PCI=y -+CONFIG_CMD_USB=y -+CONFIG_CMD_ROCKUSB=y -+CONFIG_CMD_USB_MASS_STORAGE=y -+# CONFIG_CMD_SETEXPR is not set -+CONFIG_CMD_RNG=y -+CONFIG_CMD_REGULATOR=y -+# CONFIG_SPL_DOS_PARTITION is not set -+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" -+# CONFIG_USB_FUNCTION_FASTBOOT is not set -+CONFIG_ROCKCHIP_GPIO=y -+CONFIG_SYS_I2C_ROCKCHIP=y -+CONFIG_LED=y -+CONFIG_LED_GPIO=y -+CONFIG_SUPPORT_EMMC_RPMB=y -+CONFIG_MMC_DW=y -+CONFIG_MMC_DW_ROCKCHIP=y -+CONFIG_MMC_SDHCI=y -+CONFIG_MMC_SDHCI_SDMA=y -+CONFIG_MMC_SDHCI_ROCKCHIP=y -+CONFIG_PHY_REALTEK=y -+CONFIG_DWC_ETH_QOS=y -+CONFIG_DWC_ETH_QOS_ROCKCHIP=y -+CONFIG_NVME_PCI=y -+CONFIG_PCIE_DW_ROCKCHIP=y -+CONFIG_PHY_ROCKCHIP_INNO_USB2=y -+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y -+CONFIG_PHY_ROCKCHIP_USBDP=y -+CONFIG_DM_PMIC=y -+CONFIG_PMIC_RK8XX=y -+CONFIG_REGULATOR_RK8XX=y -+CONFIG_BAUDRATE=1500000 -+CONFIG_DEBUG_UART_SHIFT=2 -+CONFIG_SYS_NS16550_MEM32=y -+CONFIG_SYSRESET_PSCI=y -+CONFIG_USB=y -+CONFIG_USB_XHCI_HCD=y -+CONFIG_USB_DWC3=y -+CONFIG_USB_DWC3_GENERIC=y -+CONFIG_USB_GADGET=y -+CONFIG_USB_GADGET_DOWNLOAD=y -+CONFIG_USB_FUNCTION_ROCKUSB=y -+CONFIG_ERRNO_STR=y -diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst -index 54fa941f236..e50dde2ccb1 100644 ---- a/doc/board/rockchip/rockchip.rst -+++ b/doc/board/rockchip/rockchip.rst -@@ -138,6 +138,7 @@ List of mainline supported Rockchip boards: - - Radxa ROCK 3B (rock-3b-rk3568) - - * rk3576 -+ - ArmSoM Sige5 (sige5-rk3576) - - Firefly ROC-RK3576-PC (roc-pc-rk3576) - - Generic RK3576 (generic-rk3576) - --- -2.34.1 - diff --git a/projects/Rockchip/patches/u-boot/rockchip-0079-HACK-rockchip-dts-upstream-use-v6.17-rockchip-dts64-.patch b/projects/Rockchip/patches/u-boot/rockchip-0048-HACK-rockchip-dts-upstream-use-v6.17-rockchip-dts64-.patch similarity index 99% rename from projects/Rockchip/patches/u-boot/rockchip-0079-HACK-rockchip-dts-upstream-use-v6.17-rockchip-dts64-.patch rename to projects/Rockchip/patches/u-boot/rockchip-0048-HACK-rockchip-dts-upstream-use-v6.17-rockchip-dts64-.patch index 567fac6dda..e3e4ab96fe 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0079-HACK-rockchip-dts-upstream-use-v6.17-rockchip-dts64-.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0048-HACK-rockchip-dts-upstream-use-v6.17-rockchip-dts64-.patch @@ -1,7 +1,7 @@ -From e87a7def725875f5f036d13f5704c688fcc918ce Mon Sep 17 00:00:00 2001 +From 52da058f1cd55cc14709cadc6ac3cb1a40dc8fb4 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 11 Jul 2025 10:16:13 +0000 -Subject: [PATCH 79/84] HACK: rockchip: dts/upstream: use +Subject: [PATCH 48/51] HACK: rockchip: dts/upstream: use v6.17-rockchip-dts64-2 RK3576 DTs Signed-off-by: Jonas Karlman diff --git a/projects/Rockchip/patches/u-boot/rockchip-0080-WIP-board-rockchip-Add-Luckfox-Omni3576.patch b/projects/Rockchip/patches/u-boot/rockchip-0049-WIP-board-rockchip-Add-Luckfox-Omni3576.patch similarity index 96% rename from projects/Rockchip/patches/u-boot/rockchip-0080-WIP-board-rockchip-Add-Luckfox-Omni3576.patch rename to projects/Rockchip/patches/u-boot/rockchip-0049-WIP-board-rockchip-Add-Luckfox-Omni3576.patch index 6ee1c77ba1..1f62a4c44c 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0080-WIP-board-rockchip-Add-Luckfox-Omni3576.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0049-WIP-board-rockchip-Add-Luckfox-Omni3576.patch @@ -1,7 +1,7 @@ -From 3523f73954d4d6194739d1cd8b0e2e9c35889741 Mon Sep 17 00:00:00 2001 +From 0bb6c3cbe39776ef5327e375a7f2b6f89593aeb0 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 11 Jul 2025 11:05:55 +0000 -Subject: [PATCH 80/84] WIP: board: rockchip: Add Luckfox Omni3576 +Subject: [PATCH 49/51] WIP: board: rockchip: Add Luckfox Omni3576 Features tested with a Core3576 Rev1.1 on a Omni3576 carrier board: - SD-card boot @@ -124,7 +124,7 @@ index 00000000000..13ef3112f1b +CONFIG_USB_FUNCTION_ROCKUSB=y +CONFIG_ERRNO_STR=y diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst -index 97266d370bf..e751bac9ca7 100644 +index 2b902002f66..5dff856f6f5 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -141,6 +141,7 @@ List of mainline supported Rockchip boards: diff --git a/projects/Rockchip/patches/u-boot/rockchip-0081-WIP-board-rockchip-Add-FriendlyElec-NanoPi-M5.patch b/projects/Rockchip/patches/u-boot/rockchip-0050-WIP-board-rockchip-Add-FriendlyElec-NanoPi-M5.patch similarity index 96% rename from projects/Rockchip/patches/u-boot/rockchip-0081-WIP-board-rockchip-Add-FriendlyElec-NanoPi-M5.patch rename to projects/Rockchip/patches/u-boot/rockchip-0050-WIP-board-rockchip-Add-FriendlyElec-NanoPi-M5.patch index f50b5c1f4e..b63da7d5c6 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0081-WIP-board-rockchip-Add-FriendlyElec-NanoPi-M5.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0050-WIP-board-rockchip-Add-FriendlyElec-NanoPi-M5.patch @@ -1,7 +1,7 @@ -From d337711a255fd3c6953f2a86ac242fabc5d419c2 Mon Sep 17 00:00:00 2001 +From 46589839cfb3f9be217dabf242dd2a121ff37856 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 11 Jul 2025 11:05:19 +0000 -Subject: [PATCH 81/84] WIP: board: rockchip: Add FriendlyElec NanoPi M5 +Subject: [PATCH 50/51] WIP: board: rockchip: Add FriendlyElec NanoPi M5 Features tested on a NanoPi M5 2411: - SD-card boot @@ -162,7 +162,7 @@ index 00000000000..28427390a62 +CONFIG_USB_FUNCTION_ROCKUSB=y +CONFIG_ERRNO_STR=y diff --git a/doc/board/rockchip/rockchip.rst b/doc/board/rockchip/rockchip.rst -index e751bac9ca7..ffd8671bbc8 100644 +index 5dff856f6f5..03d3284c650 100644 --- a/doc/board/rockchip/rockchip.rst +++ b/doc/board/rockchip/rockchip.rst @@ -140,6 +140,7 @@ List of mainline supported Rockchip boards: diff --git a/projects/Rockchip/patches/u-boot/rockchip-0084-KNAERZCHE-rockchip-rk3288-Pick-SD-card-as-first-boot.patch b/projects/Rockchip/patches/u-boot/rockchip-0051-KNAERZCHE-rockchip-rk3288-Pick-SD-card-as-first-boot.patch similarity index 84% rename from projects/Rockchip/patches/u-boot/rockchip-0084-KNAERZCHE-rockchip-rk3288-Pick-SD-card-as-first-boot.patch rename to projects/Rockchip/patches/u-boot/rockchip-0051-KNAERZCHE-rockchip-rk3288-Pick-SD-card-as-first-boot.patch index dce74f373e..b9c09ba4d7 100644 --- a/projects/Rockchip/patches/u-boot/rockchip-0084-KNAERZCHE-rockchip-rk3288-Pick-SD-card-as-first-boot.patch +++ b/projects/Rockchip/patches/u-boot/rockchip-0051-KNAERZCHE-rockchip-rk3288-Pick-SD-card-as-first-boot.patch @@ -1,7 +1,7 @@ -From 8220d7fe1068fbcca2d587e1315503a70c498961 Mon Sep 17 00:00:00 2001 +From b442081dea79bfe373ea14a50ca13a8c86c67a0e Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Mon, 31 Oct 2022 17:13:47 +0100 -Subject: [PATCH 84/84] KNAERZCHE: rockchip: rk3288: Pick SD card as first boot +Subject: [PATCH 51/51] KNAERZCHE: rockchip: rk3288: Pick SD card as first boot device In order to be able to boot from SD card at SPL level, always check diff --git a/projects/Rockchip/patches/u-boot/rockchip-0054-rockchip-px30-rk3326-Implement-checkboard-to-print-S.patch b/projects/Rockchip/patches/u-boot/rockchip-0054-rockchip-px30-rk3326-Implement-checkboard-to-print-S.patch deleted file mode 100644 index c0a571dfdd..0000000000 --- a/projects/Rockchip/patches/u-boot/rockchip-0054-rockchip-px30-rk3326-Implement-checkboard-to-print-S.patch +++ /dev/null @@ -1,167 +0,0 @@ -From 24fc7c42d539648a107ab7096d45cfdab0647707 Mon Sep 17 00:00:00 2001 -From: Quentin Schulz -Date: Tue, 10 Jun 2025 11:42:50 +0200 -Subject: [PATCH 54/84] rockchip: px30/rk3326: Implement checkboard() to print - SoC variant - -This implements checkboard() to print the current SoC model used by a -board, e.g. one of: - -SoC: PX30 -SoC: PX30S -SoC: PX30K -SoC: RK3326 -SoC: RK3326S - -when U-Boot proper is running. - -The information is read from the OTP and also the DDR_GRF. There's no -public information as far as I know about the layout and stored -information on OTP but this was provided by Rockchip themselves through -their support channel. - -The OTP stores the information of whether the SoC is PX30K or something -else. To differentiate between PX30/RK3326 and PX30S/RK3326S, one needs -to read some undocumented bitfield in a DDR_GRF register as done in -vendor kernel, -c.f. https://github.com/armbian/linux-rockchip/blob/rk-6.1-rkr5.1/drivers/soc/rockchip/rockchip-cpuinfo.c#L118-L133. - -I do not own a PX30S, nor RK3326/RK3326S so cannot test it works -properly. - -Also add the OTP node to the pre-relocation phase of U-Boot proper so -that the SoC variant can be printed when DISPLAY_BOARDINFO is enabled. -This is not required if DISPLAY_BOARDINFO_LATE is enabled because this -happens after relocation. If both are enabled, then the SoC variant will -be printed twice in the boot log, e.g.: - -U-Boot 2025.07-rc3-00014-g7cb731574ae6-dirty (May 28 2025 - 13:52:47 +0200) - -Model: Theobroma Systems PX30-uQ7 SoM on Haikou devkit -SoC: PX30 <---- due to DISPLAY_BOARDINFO -DRAM: 2 GiB -PMIC: RK809 (on=0x40, off=0x00) -Core: 293 devices, 27 uclasses, devicetree: separate -MMC: mmc@ff370000: 1, mmc@ff390000: 0 -Loading Environment from MMC... Reading from MMC(1)... OK - -In: serial@ff030000 -Out: serial@ff030000 -Err: serial@ff030000 -Model: Theobroma Systems PX30-uQ7 SoM on Haikou devkit -SoC: PX30 <----- due to DISPLAY_BOARDINFO_LATE -Net: eth0: ethernet@ff360000 - -Signed-off-by: Quentin Schulz -Reviewed-by: Jonas Karlman -Reviewed-by: Kever Yang ---- - arch/arm/dts/px30-u-boot.dtsi | 4 ++ - arch/arm/mach-rockchip/px30/px30.c | 61 ++++++++++++++++++++++++++++++ - 2 files changed, 65 insertions(+) - -diff --git a/arch/arm/dts/px30-u-boot.dtsi b/arch/arm/dts/px30-u-boot.dtsi -index 157d0ea6930..2f726b0aaba 100644 ---- a/arch/arm/dts/px30-u-boot.dtsi -+++ b/arch/arm/dts/px30-u-boot.dtsi -@@ -27,6 +27,10 @@ - }; - }; - -+&otp { -+ bootph-some-ram; -+}; -+ - &uart2 { - clock-frequency = <24000000>; - bootph-all; -diff --git a/arch/arm/mach-rockchip/px30/px30.c b/arch/arm/mach-rockchip/px30/px30.c -index 8ce9ac561f0..5a5c119328f 100644 ---- a/arch/arm/mach-rockchip/px30/px30.c -+++ b/arch/arm/mach-rockchip/px30/px30.c -@@ -2,10 +2,14 @@ - /* - * Copyright (c) 2017 Rockchip Electronics Co., Ltd - */ -+ -+#define LOG_CATEGORY LOGC_ARCH -+ - #include - #include - #include - #include -+#include - #include - #include - #include -@@ -15,6 +19,7 @@ - #include - #include - #include -+#include - - const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = { - [BROM_BOOTSOURCE_EMMC] = "/mmc@ff390000", -@@ -442,3 +447,59 @@ void board_debug_uart_init(void) - #endif /* CONFIG_DEBUG_UART_BASE && CONFIG_DEBUG_UART_BASE == ... */ - } - #endif /* CONFIG_DEBUG_UART_BOARD_INIT */ -+ -+#define PX30_OTP_SPECIFICATION_OFFSET 0x06 -+ -+#define DDR_GRF_BASE_ADDR 0xff630000 -+#define DDR_GRF_CON(n) (0 + (n) * 4) -+ -+int checkboard(void) -+{ -+ struct udevice *dev; -+ u8 specification; -+ u32 base_soc; -+ int ret; -+ -+ if (!IS_ENABLED(CONFIG_ROCKCHIP_OTP) || !CONFIG_IS_ENABLED(MISC)) -+ return 0; -+ -+ ret = uclass_get_device_by_driver(UCLASS_MISC, -+ DM_DRIVER_GET(rockchip_otp), &dev); -+ if (ret) { -+ log_debug("Could not find otp device, ret=%d\n", ret); -+ return 0; -+ } -+ -+ /* base SoC: 0x26334b52 for RK3326; 0x30335850 for PX30 */ -+ ret = misc_read(dev, 0, &base_soc, 4); -+ if (ret < 0) { -+ log_debug("Could not read specification, ret=%d\n", ret); -+ return 0; -+ } -+ -+ if (base_soc != 0x26334b52 && base_soc != 0x30335850) { -+ log_debug("Could not identify SoC, got 0x%04x in OTP\n", base_soc); -+ return 0; -+ } -+ -+ /* SoC variant: 0x21 for PX30/PX30S/RK3326/RK3326S; 0x2b for PX30K */ -+ ret = misc_read(dev, PX30_OTP_SPECIFICATION_OFFSET, &specification, 1); -+ if (ret < 0) { -+ log_debug("Could not read specification, ret=%d\n", ret); -+ return 0; -+ } -+ -+ if (specification == 0x2b) { -+ printf("SoC: PX30K\n"); -+ return 0; -+ } -+ -+ /* From vendor kernel: drivers/soc/rockchip/rockchip-cpuinfo.c */ -+ specification = FIELD_GET(GENMASK(15, 14), -+ readl(DDR_GRF_BASE_ADDR + DDR_GRF_CON(1))); -+ log_debug("DDR specification is %d\n", specification); -+ printf("SoC: %s%s\n", base_soc == 0x26334b52 ? "RK3326" : "PX30", -+ specification == 0x3 ? "S" : ""); -+ -+ return 0; -+} --- -2.34.1 - diff --git a/projects/Rockchip/patches/u-boot/rockchip-0082-FROMLIST-v1-ram-rk3328-add-ddr4-1600-sdram-timing.patch b/projects/Rockchip/patches/u-boot/rockchip-0082-FROMLIST-v1-ram-rk3328-add-ddr4-1600-sdram-timing.patch deleted file mode 100644 index 6c73de0660..0000000000 --- a/projects/Rockchip/patches/u-boot/rockchip-0082-FROMLIST-v1-ram-rk3328-add-ddr4-1600-sdram-timing.patch +++ /dev/null @@ -1,250 +0,0 @@ -From 04e581a594e65a6e401bdfc7458bb8b2de3ab6f0 Mon Sep 17 00:00:00 2001 -From: Da Xue -Date: Tue, 10 Jun 2025 19:08:19 +0000 -Subject: [PATCH 82/84] FROMLIST(v1): ram: rk3328: add ddr4-1600 sdram timing - -Add DDR4 1600MHz SDRAM timing data from LibreComputer u-boot sources -for the ROC-3328-CC board. - -Signed-off-by: Da Xue -Signed-off-by: Christian Hewitt ---- - arch/arm/dts/rk3328-sdram-ddr4-1600.dtsi | 226 +++++++++++++++++++++++ - 1 file changed, 226 insertions(+) - create mode 100644 arch/arm/dts/rk3328-sdram-ddr4-1600.dtsi - -diff --git a/arch/arm/dts/rk3328-sdram-ddr4-1600.dtsi b/arch/arm/dts/rk3328-sdram-ddr4-1600.dtsi -new file mode 100644 -index 00000000000..9594bb42839 ---- /dev/null -+++ b/arch/arm/dts/rk3328-sdram-ddr4-1600.dtsi -@@ -0,0 +1,226 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+// Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd. -+ -+&dmc { -+ rockchip,sdram-params = < -+ 0x1 -+ 0xA -+ 0x2 -+ 0x1 -+ 0x0 -+ 0x0 -+ 0x11 -+ 0x0 -+ 0x11 -+ 0x0 -+ 0 -+ -+ 0x94496354 -+ 0x00000000 -+ 0x0000002a -+ 0x000004e2 -+ 0x00000015 -+ 0x0000034a -+ 0x000000ff -+ -+ 800 -+ 0 -+ 1 -+ 0 -+ 0 -+ -+ 0x00000000 -+ 0x43041010 -+ 0x00000064 -+ 0x0061008c -+ 0x000000d0 -+ 0x000200c5 -+ 0x000000d4 -+ 0x00500000 -+ 0x000000d8 -+ 0x00000100 -+ 0x000000dc -+ 0x03140401 -+ 0x000000e0 -+ 0x00000000 -+ 0x000000e4 -+ 0x00110000 -+ 0x000000e8 -+ 0x00000420 -+ 0x000000ec -+ 0x00000400 -+ 0x000000f4 -+ 0x000f011f -+ 0x00000100 -+ 0x0c0e1b0e -+ 0x00000104 -+ 0x00030314 -+ 0x00000108 -+ 0x0506050b -+ 0x0000010c -+ 0x0040400c -+ 0x00000110 -+ 0x06030307 -+ 0x00000114 -+ 0x04040302 -+ 0x00000120 -+ 0x06060b06 -+ 0x00000124 -+ 0x00020308 -+ 0x00000180 -+ 0x01000040 -+ 0x00000184 -+ 0x00000000 -+ 0x00000190 -+ 0x07040003 -+ 0x00000198 -+ 0x05001100 -+ 0x000001a0 -+ 0xc0400003 -+ 0x00000240 -+ 0x0600060c -+ 0x00000244 -+ 0x00000201 -+ 0x00000250 -+ 0x00000f00 -+ 0x00000490 -+ 0x00000001 -+ 0xffffffff -+ 0xffffffff -+ 0xffffffff -+ 0xffffffff -+ 0xffffffff -+ 0xffffffff -+ 0xffffffff -+ 0xffffffff -+ 0xffffffff -+ 0xffffffff -+ 0xffffffff -+ 0xffffffff -+ 0xffffffff -+ 0xffffffff -+ -+ 0x00000004 -+ 0x0000000c -+ 0x00000028 -+ 0x0000000c -+ 0x0000002c -+ 0x00000000 -+ 0x00000030 -+ 0x00000009 -+ 0xffffffff -+ 0xffffffff -+ -+ 0x77 -+ 0x88 -+ 0x79 -+ 0x79 -+ 0x87 -+ 0x97 -+ 0x87 -+ 0x78 -+ 0x77 -+ 0x78 -+ 0x87 -+ 0x88 -+ 0x87 -+ 0x87 -+ 0x77 -+ -+ 0x78 -+ 0x78 -+ 0x78 -+ 0x78 -+ 0x78 -+ 0x78 -+ 0x78 -+ 0x78 -+ 0x78 -+ 0x69 -+ 0x9 -+ -+ 0x77 -+ 0x78 -+ 0x77 -+ 0x78 -+ 0x77 -+ 0x78 -+ 0x77 -+ 0x78 -+ 0x77 -+ 0x79 -+ 0x9 -+ -+ 0x78 -+ 0x78 -+ 0x78 -+ 0x78 -+ 0x78 -+ 0x78 -+ 0x78 -+ 0x78 -+ 0x78 -+ 0x69 -+ 0x9 -+ -+ 0x77 -+ 0x78 -+ 0x77 -+ 0x77 -+ 0x77 -+ 0x77 -+ 0x77 -+ 0x77 -+ 0x77 -+ 0x79 -+ 0x9 -+ -+ 0x78 -+ 0x78 -+ 0x78 -+ 0x78 -+ 0x78 -+ 0x78 -+ 0x78 -+ 0x78 -+ 0x78 -+ 0x69 -+ 0x9 -+ -+ 0x77 -+ 0x78 -+ 0x77 -+ 0x78 -+ 0x77 -+ 0x78 -+ 0x77 -+ 0x78 -+ 0x77 -+ 0x79 -+ 0x9 -+ -+ 0x78 -+ 0x78 -+ 0x78 -+ 0x78 -+ 0x78 -+ 0x78 -+ 0x78 -+ 0x78 -+ 0x78 -+ 0x69 -+ 0x9 -+ -+ 0x77 -+ 0x78 -+ 0x77 -+ 0x77 -+ 0x77 -+ 0x77 -+ 0x77 -+ 0x77 -+ 0x77 -+ 0x79 -+ 0x9 -+ >; -+}; --- -2.34.1 - diff --git a/projects/Rockchip/patches/u-boot/rockchip-0083-FROMLIST-v1-arm64-dts-rockchip-roc-3328-cc-use-1600-.patch b/projects/Rockchip/patches/u-boot/rockchip-0083-FROMLIST-v1-arm64-dts-rockchip-roc-3328-cc-use-1600-.patch deleted file mode 100644 index 31821d6326..0000000000 --- a/projects/Rockchip/patches/u-boot/rockchip-0083-FROMLIST-v1-arm64-dts-rockchip-roc-3328-cc-use-1600-.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 13151018751bf8ded0ed0148526106853a1a60ba Mon Sep 17 00:00:00 2001 -From: Da Xue -Date: Tue, 10 Jun 2025 19:08:20 +0000 -Subject: [PATCH 83/84] FROMLIST(v1): arm64: dts: rockchip: roc-3328-cc: use - 1600 ddr4 timing - -Swap the ROC-3328-CC from DDR4 666 to 1600 timing to boost performance. - -Signed-off-by: Da Xue -Signed-off-by: Christian Hewitt ---- - arch/arm/dts/rk3328-roc-cc-u-boot.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi -index 582d6ba49b4..c47d29c59de 100644 ---- a/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi -+++ b/arch/arm/dts/rk3328-roc-cc-u-boot.dtsi -@@ -4,7 +4,7 @@ - */ - - #include "rk3328-u-boot.dtsi" --#include "rk3328-sdram-ddr4-666.dtsi" -+#include "rk3328-sdram-ddr4-1600.dtsi" - - / { - smbios { --- -2.34.1 - From 16d8875e4f9bb192d0dda7571f7b8c18c0ddd04c Mon Sep 17 00:00:00 2001 From: Christian Hewitt Date: Fri, 12 Sep 2025 14:17:23 +0000 Subject: [PATCH 2/3] linux: update rockchip-old to Linux 6.16.7 Signed-off-by: Christian Hewitt --- ...chip-0001-LOCAL-arm64-fix-Kodi-sysinfo-CPU-information.patch | 2 +- ...2-FROMLIST-v1-mmc-core-set-initial-signal-voltage-on-p.patch | 2 +- ...0003-WIP-1000-drm-rockchip-vop-filter-interlaced-modes.patch | 2 +- ...4-WIP-1000-drm-rockchip-dw-hdmi-encoder-error-handling.patch | 2 +- ...ckchip-0005-WIP-1000-drm-rockchip-vop-split-rk3288-vop.patch | 2 +- ...ckchip-0006-WIP-1000-ARM-dts-rockchip-split-rk3288-vop.patch | 2 +- ...7-WIP-1000-drm-bridge-dw-hdmi-add-mtmdsclock-parameter.patch | 2 +- ...8-WIP-1000-drm-bridge-dw-hdmi-support-configuring-phy-.patch | 2 +- ...9-WIP-1000-drm-bridge-dw-hdmi-add-mpll_cfg_420-for-ycb.patch | 2 +- ...0-WIP-1000-drm-rockchip-dw-hdmi-add-YCbCr420-mpll-cfg-.patch | 2 +- ...1-WIP-1000-drm-rockchip-dw-hdmi-add-YCbCr420-mpll-cfg-.patch | 2 +- ...2-WIP-1000-drm-rockchip-dw-hdmi-add-bridge-and-switch-.patch | 2 +- ...3-WIP-1000-drm-rockchip-vop-add-immutable-zpos-propert.patch | 2 +- ...4-WIP-1000-drm-rockchip-vop-add-plane-color-properties.patch | 2 +- ...5-WIP-1000-HACK-clk-rockchip-rk3288-dedicate-npll-for-.patch | 2 +- ...6-WIP-1000-HACK-clk-rockchip-rk3288-use-npll-table-to-.patch | 2 +- ...7-WIP-1000-HACK-clk-rockchip-rk3399-dedicate-vpll-for-.patch | 2 +- ...18-WIP-1000-HACK-dts-rockchip-do-not-use-vopl-for-hdmi.patch | 2 +- ...9-WIP-1000-drm-bridge-dw-hdmi-limit-mode-and-bus-forma.patch | 2 +- ...0-WIP-1000-drm-rockchip-dw_hdmi-add-10-bit-rgb-bus-for.patch | 2 +- ...1-WIP-1000-drm-dw-hdmi-add-content-type-connector-prop.patch | 2 +- ...rockchip-0022-WIP-1000-drm-rockchip-add-yuv444-support.patch | 2 +- ...rockchip-0023-WIP-1000-drm-rockchip-add-yuv420-support.patch | 2 +- ...4-WIP-1000-drm-rockchip-enable-ycbcr_420_allowed-and-y.patch | 2 +- ...5-WIP-1000-drm-bridge-dw-hdmi-fix-RGB-to-YUV-color-spa.patch | 2 +- ...6-WIP-1000-media-cec-adap-add-debounce-support-when-se.patch | 2 +- ...7-WIP-1000-drm-bridge-synopsys-Fix-CEC-not-working-aft.patch | 2 +- ...8-WIP-1000-drm-rockchip-vop-create-planes-in-window-or.patch | 2 +- ...9-WIP-1001-media-rkvdec-pm-runtime-dont-use-autosuspen.patch | 2 +- ...0-WIP-1001-soc-rockchip-power-domain-export-idle-reque.patch | 2 +- ...ip-0031-WIP-1001-media-rkvdec-implement-reset-controls.patch | 2 +- ...-0032-WIP-1001-arm64-dts-add-resets-to-vdec-for-RK3399.patch | 2 +- ...3-WIP-1001-media-hantro-rockchip-Increase-RK3288-s-max.patch | 2 +- ...4-WIP-1001-media-rkvdec-disable-QoS-for-VP9-corruption.patch | 2 +- ...-0035-WIP-1001-arm64-dts-add-resets-to-vdec-for-RK3328.patch | 2 +- ...6-WIP-1002-arm64-dts-rockchip-add-gpu-powerdomain-gpu-.patch | 2 +- ...0037-WIP-1002-ARM-dts-RK3288-miqi-add-hdmi-sound-nodes.patch | 2 +- ...8-WIP-1002-ARM-arm64-dts-rockchip-align-sound-card-nam.patch | 2 +- ...9-WIP-1002-arm64-dts-rockchip-add-SPDIF-nodes-for-RK33.patch | 2 +- ...0-WIP-1002-arm64-dts-rockchip-Add-ir-receiver-node-for.patch | 2 +- ...1-WIP-1002-ARM-dts-add-cec-pinctrl-for-RK3288-miqi-boa.patch | 2 +- ...2-WIP-1002-HACK-arm64-dts-enable-FE-phy-for-Beelink-A1.patch | 2 +- ...ockchip-0043-WIP-1002-dw-hdmi-cec-sleep-100ms-on-error.patch | 2 +- ...4-WIP-1002-arm64-boot-dts-Increase-ACLK_PERILP0-clock-.patch | 2 +- ...5-WIP-1002-arm64-dts-rockchip-Enable-USB3-for-rk3328-B.patch | 2 +- ...6-WIP-1002-drm-bridge-dw-hdmi-switch-from-.hw_parmas-t.patch | 2 +- ...7-WIP-1002-arm64-dts-rockchip-disable-fusb-for-rk3399-.patch | 2 +- .../rockchip-0048-WIP-2000-media-rkvdec-add-HEVC-backend.patch | 2 +- ...ckchip-0049-WIP-2000-media-rkvdec-add-variants-support.patch | 2 +- ...rockchip-0050-WIP-2000-media-rkvdec-add-RK3288-variant.patch | 2 +- .../rockchip-0051-WIP-2000-ARM-dts-RK3288-add-hevc-node.patch | 2 +- ...ip-0052-WIP-2000-media-rkvdec-Fix-HEVC-RPS-bit-offsets.patch | 2 +- ...3-WIP-2000-media-rkvdec-Fix-number-of-HEVC-references-.patch | 2 +- ...54-WIP-2001-dt-bindings-media-Add-Rockchip-IEP-binding.patch | 2 +- ...p-0055-WIP-2001-media-rockchip-Add-Rockchip-IEP-driver.patch | 2 +- ...56-WIP-2001-ARM64-dts-rockchip-Add-IEP-node-for-RK3328.patch | 2 +- ...57-WIP-2001-ARM64-dts-rockchip-Add-IEP-node-for-RK3399.patch | 2 +- ...0058-WIP-2001-ARM-dts-rockchip-Add-IEP-node-for-RK3288.patch | 2 +- ...-0059-WIP-9000-arm64-rockchip-rk3288-disable-VPU-iommu.patch | 2 +- 59 files changed, 59 insertions(+), 59 deletions(-) diff --git a/packages/linux/patches/rockchip-old/rockchip-0001-LOCAL-arm64-fix-Kodi-sysinfo-CPU-information.patch b/packages/linux/patches/rockchip-old/rockchip-0001-LOCAL-arm64-fix-Kodi-sysinfo-CPU-information.patch index 833f26386c..9e46f4fe0f 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0001-LOCAL-arm64-fix-Kodi-sysinfo-CPU-information.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0001-LOCAL-arm64-fix-Kodi-sysinfo-CPU-information.patch @@ -1,4 +1,4 @@ -From 4b43cee6fc356dc6ad47528ccdafa015bac834e0 Mon Sep 17 00:00:00 2001 +From f311f5386233d5f574cd8777c7a18cb921c180e6 Mon Sep 17 00:00:00 2001 From: Christian Hewitt Date: Sat, 13 Apr 2019 05:45:18 +0000 Subject: [PATCH 01/59] LOCAL: arm64: fix Kodi sysinfo CPU information diff --git a/packages/linux/patches/rockchip-old/rockchip-0002-FROMLIST-v1-mmc-core-set-initial-signal-voltage-on-p.patch b/packages/linux/patches/rockchip-old/rockchip-0002-FROMLIST-v1-mmc-core-set-initial-signal-voltage-on-p.patch index dc00e2dff6..4fc610164b 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0002-FROMLIST-v1-mmc-core-set-initial-signal-voltage-on-p.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0002-FROMLIST-v1-mmc-core-set-initial-signal-voltage-on-p.patch @@ -1,4 +1,4 @@ -From fdf810f853ce77ca62c68689aad383651bbffcfb Mon Sep 17 00:00:00 2001 +From 64442a9eb4e10f764ed49f3de41cd656c80340c3 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 17 Feb 2019 22:14:38 +0000 Subject: [PATCH 02/59] FROMLIST(v1): mmc: core: set initial signal voltage on diff --git a/packages/linux/patches/rockchip-old/rockchip-0003-WIP-1000-drm-rockchip-vop-filter-interlaced-modes.patch b/packages/linux/patches/rockchip-old/rockchip-0003-WIP-1000-drm-rockchip-vop-filter-interlaced-modes.patch index a332e1d09c..73eaa0ff08 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0003-WIP-1000-drm-rockchip-vop-filter-interlaced-modes.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0003-WIP-1000-drm-rockchip-vop-filter-interlaced-modes.patch @@ -1,4 +1,4 @@ -From e94e5e51e9f5de58dfa6ef2c556117302003db54 Mon Sep 17 00:00:00 2001 +From 6146aa86c7a35fec1c8cdcfbdeeb097090411c53 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Mon, 20 Jul 2020 15:15:50 +0000 Subject: [PATCH 03/59] WIP/1000: drm/rockchip: vop: filter interlaced modes diff --git a/packages/linux/patches/rockchip-old/rockchip-0004-WIP-1000-drm-rockchip-dw-hdmi-encoder-error-handling.patch b/packages/linux/patches/rockchip-old/rockchip-0004-WIP-1000-drm-rockchip-dw-hdmi-encoder-error-handling.patch index 0295eec133..78e26773ec 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0004-WIP-1000-drm-rockchip-dw-hdmi-encoder-error-handling.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0004-WIP-1000-drm-rockchip-dw-hdmi-encoder-error-handling.patch @@ -1,4 +1,4 @@ -From ad4a904ac2fb081ba0e389a4c09520e7b33ee63a Mon Sep 17 00:00:00 2001 +From 2a238271293660f065c9a11d0cd31d30bb2d9b54 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sat, 10 Oct 2020 10:16:32 +0000 Subject: [PATCH 04/59] WIP/1000: drm/rockchip: dw-hdmi: encoder error handling diff --git a/packages/linux/patches/rockchip-old/rockchip-0005-WIP-1000-drm-rockchip-vop-split-rk3288-vop.patch b/packages/linux/patches/rockchip-old/rockchip-0005-WIP-1000-drm-rockchip-vop-split-rk3288-vop.patch index 116348d5a1..246dfd4260 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0005-WIP-1000-drm-rockchip-vop-split-rk3288-vop.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0005-WIP-1000-drm-rockchip-vop-split-rk3288-vop.patch @@ -1,4 +1,4 @@ -From ea062a001e32bafc832eb0d903f1dad0981d2f8a Mon Sep 17 00:00:00 2001 +From 0fbbf353a95c18faa91efec738c37b329406e1d7 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sat, 10 Oct 2020 14:32:21 +0000 Subject: [PATCH 05/59] WIP/1000: drm/rockchip: vop: split rk3288 vop diff --git a/packages/linux/patches/rockchip-old/rockchip-0006-WIP-1000-ARM-dts-rockchip-split-rk3288-vop.patch b/packages/linux/patches/rockchip-old/rockchip-0006-WIP-1000-ARM-dts-rockchip-split-rk3288-vop.patch index 4bb0bd3bb2..eb0dd9761d 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0006-WIP-1000-ARM-dts-rockchip-split-rk3288-vop.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0006-WIP-1000-ARM-dts-rockchip-split-rk3288-vop.patch @@ -1,4 +1,4 @@ -From 93bbd545a8d3226afddac5c556e55727c21cc93a Mon Sep 17 00:00:00 2001 +From 053591126dc7fbd19d58f7beff13881362cd1bc0 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sat, 10 Oct 2020 14:33:30 +0000 Subject: [PATCH 06/59] WIP/1000: ARM: dts: rockchip: split rk3288 vop diff --git a/packages/linux/patches/rockchip-old/rockchip-0007-WIP-1000-drm-bridge-dw-hdmi-add-mtmdsclock-parameter.patch b/packages/linux/patches/rockchip-old/rockchip-0007-WIP-1000-drm-bridge-dw-hdmi-add-mtmdsclock-parameter.patch index 4e0ccef4c8..c794c1590d 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0007-WIP-1000-drm-bridge-dw-hdmi-add-mtmdsclock-parameter.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0007-WIP-1000-drm-bridge-dw-hdmi-add-mtmdsclock-parameter.patch @@ -1,4 +1,4 @@ -From 9083fb44e20e507b6182537a8fab356b540a3afe Mon Sep 17 00:00:00 2001 +From f8378d43f679c4f05b689af3fa9cf9acbe87f576 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Mon, 20 Jul 2020 18:00:44 +0000 Subject: [PATCH 07/59] WIP/1000: drm/bridge: dw-hdmi: add mtmdsclock parameter diff --git a/packages/linux/patches/rockchip-old/rockchip-0008-WIP-1000-drm-bridge-dw-hdmi-support-configuring-phy-.patch b/packages/linux/patches/rockchip-old/rockchip-0008-WIP-1000-drm-bridge-dw-hdmi-support-configuring-phy-.patch index c4479e5211..67cb576a4a 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0008-WIP-1000-drm-bridge-dw-hdmi-support-configuring-phy-.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0008-WIP-1000-drm-bridge-dw-hdmi-support-configuring-phy-.patch @@ -1,4 +1,4 @@ -From 3f5ec049285b42b587f67b7d06ae3dacad340443 Mon Sep 17 00:00:00 2001 +From 33fd88e87eb934f9478e3d530c9ee751add46d7c Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Mon, 20 Jul 2020 21:34:48 +0000 Subject: [PATCH 08/59] WIP/1000: drm/bridge: dw-hdmi: support configuring phy diff --git a/packages/linux/patches/rockchip-old/rockchip-0009-WIP-1000-drm-bridge-dw-hdmi-add-mpll_cfg_420-for-ycb.patch b/packages/linux/patches/rockchip-old/rockchip-0009-WIP-1000-drm-bridge-dw-hdmi-add-mpll_cfg_420-for-ycb.patch index 47e2f72a76..914da2cf58 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0009-WIP-1000-drm-bridge-dw-hdmi-add-mpll_cfg_420-for-ycb.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0009-WIP-1000-drm-bridge-dw-hdmi-add-mpll_cfg_420-for-ycb.patch @@ -1,4 +1,4 @@ -From e607320d74784d71236d70e32b63fbf5f7a7b636 Mon Sep 17 00:00:00 2001 +From e199f9abbf1d416567c0be7583778916e77d169f Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Mon, 20 Jul 2020 22:25:15 +0000 Subject: [PATCH 09/59] WIP/1000: drm/bridge: dw-hdmi: add mpll_cfg_420 for diff --git a/packages/linux/patches/rockchip-old/rockchip-0010-WIP-1000-drm-rockchip-dw-hdmi-add-YCbCr420-mpll-cfg-.patch b/packages/linux/patches/rockchip-old/rockchip-0010-WIP-1000-drm-rockchip-dw-hdmi-add-YCbCr420-mpll-cfg-.patch index f0077f1762..034a77db7f 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0010-WIP-1000-drm-rockchip-dw-hdmi-add-YCbCr420-mpll-cfg-.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0010-WIP-1000-drm-rockchip-dw-hdmi-add-YCbCr420-mpll-cfg-.patch @@ -1,4 +1,4 @@ -From aaf29a7a0aec22f0e4181824dbd3f813cb400ec4 Mon Sep 17 00:00:00 2001 +From 7379939d3faafef210d299191d181cde13d724e3 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Mon, 20 Jul 2020 22:26:19 +0000 Subject: [PATCH 10/59] WIP/1000: drm/rockchip: dw-hdmi: add YCbCr420 mpll cfg diff --git a/packages/linux/patches/rockchip-old/rockchip-0011-WIP-1000-drm-rockchip-dw-hdmi-add-YCbCr420-mpll-cfg-.patch b/packages/linux/patches/rockchip-old/rockchip-0011-WIP-1000-drm-rockchip-dw-hdmi-add-YCbCr420-mpll-cfg-.patch index 006597b211..859778f5e3 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0011-WIP-1000-drm-rockchip-dw-hdmi-add-YCbCr420-mpll-cfg-.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0011-WIP-1000-drm-rockchip-dw-hdmi-add-YCbCr420-mpll-cfg-.patch @@ -1,4 +1,4 @@ -From debd69140c65ab39e3723c0a82865510763539de Mon Sep 17 00:00:00 2001 +From 093248792fb5ee6442bc12276139978f73a1d1c4 Mon Sep 17 00:00:00 2001 From: Shunqing Chen Date: Wed, 15 Jul 2020 15:19:11 +0800 Subject: [PATCH 11/59] WIP/1000: drm/rockchip: dw-hdmi: add YCbCr420 mpll cfg diff --git a/packages/linux/patches/rockchip-old/rockchip-0012-WIP-1000-drm-rockchip-dw-hdmi-add-bridge-and-switch-.patch b/packages/linux/patches/rockchip-old/rockchip-0012-WIP-1000-drm-rockchip-dw-hdmi-add-bridge-and-switch-.patch index e82fde95b4..b0929c8f93 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0012-WIP-1000-drm-rockchip-dw-hdmi-add-bridge-and-switch-.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0012-WIP-1000-drm-rockchip-dw-hdmi-add-bridge-and-switch-.patch @@ -1,4 +1,4 @@ -From 588d403becca3bbf4e6e32c9bab9d15a6967c9f7 Mon Sep 17 00:00:00 2001 +From 2dae3de105101f59c449419add1b1b1f04beb69b Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 20 Dec 2019 08:12:42 +0000 Subject: [PATCH 12/59] WIP/1000: drm/rockchip: dw-hdmi: add bridge and switch diff --git a/packages/linux/patches/rockchip-old/rockchip-0013-WIP-1000-drm-rockchip-vop-add-immutable-zpos-propert.patch b/packages/linux/patches/rockchip-old/rockchip-0013-WIP-1000-drm-rockchip-vop-add-immutable-zpos-propert.patch index 7b9bc51910..05cea4ed22 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0013-WIP-1000-drm-rockchip-vop-add-immutable-zpos-propert.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0013-WIP-1000-drm-rockchip-vop-add-immutable-zpos-propert.patch @@ -1,4 +1,4 @@ -From 530254cb68fb1733fa7d5908b411083bad418ae9 Mon Sep 17 00:00:00 2001 +From fa51fbf4ac526cc7c9d1a49a02ab7989fbd9502e Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 9 Oct 2020 15:29:27 +0000 Subject: [PATCH 13/59] WIP/1000: drm/rockchip: vop: add immutable zpos diff --git a/packages/linux/patches/rockchip-old/rockchip-0014-WIP-1000-drm-rockchip-vop-add-plane-color-properties.patch b/packages/linux/patches/rockchip-old/rockchip-0014-WIP-1000-drm-rockchip-vop-add-plane-color-properties.patch index 932b14696f..38e40169d3 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0014-WIP-1000-drm-rockchip-vop-add-plane-color-properties.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0014-WIP-1000-drm-rockchip-vop-add-plane-color-properties.patch @@ -1,4 +1,4 @@ -From 3578549f1b2797596ff3a04697918246ded5dcc7 Mon Sep 17 00:00:00 2001 +From 16cb660f5a5aaa052600418d9a7ce156dfb2e805 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sat, 10 Oct 2020 09:20:44 +0000 Subject: [PATCH 14/59] WIP/1000: drm/rockchip: vop: add plane color properties diff --git a/packages/linux/patches/rockchip-old/rockchip-0015-WIP-1000-HACK-clk-rockchip-rk3288-dedicate-npll-for-.patch b/packages/linux/patches/rockchip-old/rockchip-0015-WIP-1000-HACK-clk-rockchip-rk3288-dedicate-npll-for-.patch index 9acb9923bb..e2a62a9bb1 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0015-WIP-1000-HACK-clk-rockchip-rk3288-dedicate-npll-for-.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0015-WIP-1000-HACK-clk-rockchip-rk3288-dedicate-npll-for-.patch @@ -1,4 +1,4 @@ -From 56e811120c24e4c91bcb00948ea3fc6e39b90a74 Mon Sep 17 00:00:00 2001 +From c20e1b5c2f77e5831e2abbde16994885c3687fec Mon Sep 17 00:00:00 2001 From: Nickey Yang Date: Mon, 17 Jul 2017 16:35:34 +0800 Subject: [PATCH 15/59] WIP/1000: HACK: clk: rockchip: rk3288: dedicate npll diff --git a/packages/linux/patches/rockchip-old/rockchip-0016-WIP-1000-HACK-clk-rockchip-rk3288-use-npll-table-to-.patch b/packages/linux/patches/rockchip-old/rockchip-0016-WIP-1000-HACK-clk-rockchip-rk3288-use-npll-table-to-.patch index cd93f34d9d..4264119dab 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0016-WIP-1000-HACK-clk-rockchip-rk3288-use-npll-table-to-.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0016-WIP-1000-HACK-clk-rockchip-rk3288-use-npll-table-to-.patch @@ -1,4 +1,4 @@ -From bf04a56d11d5691a02576a23c555b3aed84fb03f Mon Sep 17 00:00:00 2001 +From 3dc11e262582cf71d734af3e123f12483a97942a Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sat, 4 Aug 2018 14:51:14 +0200 Subject: [PATCH 16/59] WIP/1000: HACK: clk: rockchip: rk3288: use npll table diff --git a/packages/linux/patches/rockchip-old/rockchip-0017-WIP-1000-HACK-clk-rockchip-rk3399-dedicate-vpll-for-.patch b/packages/linux/patches/rockchip-old/rockchip-0017-WIP-1000-HACK-clk-rockchip-rk3399-dedicate-vpll-for-.patch index 491c067308..16c3770678 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0017-WIP-1000-HACK-clk-rockchip-rk3399-dedicate-vpll-for-.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0017-WIP-1000-HACK-clk-rockchip-rk3399-dedicate-vpll-for-.patch @@ -1,4 +1,4 @@ -From 10c63cc34f478c0265233b4a9911287940d29b05 Mon Sep 17 00:00:00 2001 +From ed694c5dd001424e07813b9a8d733798722e4cea Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Mon, 25 May 2020 20:36:45 +0000 Subject: [PATCH 17/59] WIP/1000: HACK: clk: rockchip: rk3399: dedicate vpll diff --git a/packages/linux/patches/rockchip-old/rockchip-0018-WIP-1000-HACK-dts-rockchip-do-not-use-vopl-for-hdmi.patch b/packages/linux/patches/rockchip-old/rockchip-0018-WIP-1000-HACK-dts-rockchip-do-not-use-vopl-for-hdmi.patch index 6c2dddfc54..5a27e8a46c 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0018-WIP-1000-HACK-dts-rockchip-do-not-use-vopl-for-hdmi.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0018-WIP-1000-HACK-dts-rockchip-do-not-use-vopl-for-hdmi.patch @@ -1,4 +1,4 @@ -From 157ab827903e68cfb141f5bc600096ca822fffdf Mon Sep 17 00:00:00 2001 +From c70b95e502a82f9e8beb906be0b4123bd7856473 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 19 Jul 2020 16:35:11 +0000 Subject: [PATCH 18/59] WIP/1000: HACK: dts: rockchip: do not use vopl for hdmi diff --git a/packages/linux/patches/rockchip-old/rockchip-0019-WIP-1000-drm-bridge-dw-hdmi-limit-mode-and-bus-forma.patch b/packages/linux/patches/rockchip-old/rockchip-0019-WIP-1000-drm-bridge-dw-hdmi-limit-mode-and-bus-forma.patch index 1e4a2112a3..d49889404f 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0019-WIP-1000-drm-bridge-dw-hdmi-limit-mode-and-bus-forma.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0019-WIP-1000-drm-bridge-dw-hdmi-limit-mode-and-bus-forma.patch @@ -1,4 +1,4 @@ -From f0edc32c73f5f47c134dcd1f461f7e446fc67406 Mon Sep 17 00:00:00 2001 +From 29d2e827b617cf73f445ad75d20298f482c42b3d Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 20 Dec 2019 08:12:43 +0000 Subject: [PATCH 19/59] WIP/1000: drm/bridge: dw-hdmi: limit mode and bus diff --git a/packages/linux/patches/rockchip-old/rockchip-0020-WIP-1000-drm-rockchip-dw_hdmi-add-10-bit-rgb-bus-for.patch b/packages/linux/patches/rockchip-old/rockchip-0020-WIP-1000-drm-rockchip-dw_hdmi-add-10-bit-rgb-bus-for.patch index d685d6c3b9..90ab2a771d 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0020-WIP-1000-drm-rockchip-dw_hdmi-add-10-bit-rgb-bus-for.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0020-WIP-1000-drm-rockchip-dw_hdmi-add-10-bit-rgb-bus-for.patch @@ -1,4 +1,4 @@ -From 867633919b4c29eb75abf3b61099d59b946c6318 Mon Sep 17 00:00:00 2001 +From a8e24570969b2f9f491890e493a01e299d554436 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 20 Dec 2019 08:12:42 +0000 Subject: [PATCH 20/59] WIP/1000: drm/rockchip: dw_hdmi: add 10-bit rgb bus diff --git a/packages/linux/patches/rockchip-old/rockchip-0021-WIP-1000-drm-dw-hdmi-add-content-type-connector-prop.patch b/packages/linux/patches/rockchip-old/rockchip-0021-WIP-1000-drm-dw-hdmi-add-content-type-connector-prop.patch index 2f115c5e37..8a24b59b38 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0021-WIP-1000-drm-dw-hdmi-add-content-type-connector-prop.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0021-WIP-1000-drm-dw-hdmi-add-content-type-connector-prop.patch @@ -1,4 +1,4 @@ -From 3f52eff8a27b76c970ad115392f7ec7ca66883d6 Mon Sep 17 00:00:00 2001 +From fd321c78f651164b69512b8bee53cd972cbc23b4 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 8 Dec 2019 23:42:44 +0000 Subject: [PATCH 21/59] WIP/1000: drm: dw-hdmi: add content type connector diff --git a/packages/linux/patches/rockchip-old/rockchip-0022-WIP-1000-drm-rockchip-add-yuv444-support.patch b/packages/linux/patches/rockchip-old/rockchip-0022-WIP-1000-drm-rockchip-add-yuv444-support.patch index 354a6acab4..b70bf5a7e1 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0022-WIP-1000-drm-rockchip-add-yuv444-support.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0022-WIP-1000-drm-rockchip-add-yuv444-support.patch @@ -1,4 +1,4 @@ -From c5e477f27cb0d69f8f4e6c3c2c8209cbc6b54db5 Mon Sep 17 00:00:00 2001 +From 40e1477f3aec58161f90a476a2672500dac9ecf6 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 20 Dec 2019 08:12:43 +0000 Subject: [PATCH 22/59] WIP/1000: drm/rockchip: add yuv444 support diff --git a/packages/linux/patches/rockchip-old/rockchip-0023-WIP-1000-drm-rockchip-add-yuv420-support.patch b/packages/linux/patches/rockchip-old/rockchip-0023-WIP-1000-drm-rockchip-add-yuv420-support.patch index 8bcfe3502b..94fd0b4643 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0023-WIP-1000-drm-rockchip-add-yuv420-support.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0023-WIP-1000-drm-rockchip-add-yuv420-support.patch @@ -1,4 +1,4 @@ -From cf6bdd17cce3027d0e77ffa46ff79fb6e5005e15 Mon Sep 17 00:00:00 2001 +From cf39b59fbeb63f27ce30a18f137ac3f009f08d87 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 20 Dec 2019 08:12:43 +0000 Subject: [PATCH 23/59] WIP/1000: drm/rockchip: add yuv420 support diff --git a/packages/linux/patches/rockchip-old/rockchip-0024-WIP-1000-drm-rockchip-enable-ycbcr_420_allowed-and-y.patch b/packages/linux/patches/rockchip-old/rockchip-0024-WIP-1000-drm-rockchip-enable-ycbcr_420_allowed-and-y.patch index 331f8ce8a1..d831c107ce 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0024-WIP-1000-drm-rockchip-enable-ycbcr_420_allowed-and-y.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0024-WIP-1000-drm-rockchip-enable-ycbcr_420_allowed-and-y.patch @@ -1,4 +1,4 @@ -From 69ef0f7cf190874d23b9b39ef978147f3d363938 Mon Sep 17 00:00:00 2001 +From 6534132ad93304c92bccce42c77e6d5a56e9eba0 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Sat, 15 Aug 2020 23:20:34 +0200 Subject: [PATCH 24/59] WIP/1000: drm/rockchip: enable ycbcr_420_allowed and diff --git a/packages/linux/patches/rockchip-old/rockchip-0025-WIP-1000-drm-bridge-dw-hdmi-fix-RGB-to-YUV-color-spa.patch b/packages/linux/patches/rockchip-old/rockchip-0025-WIP-1000-drm-bridge-dw-hdmi-fix-RGB-to-YUV-color-spa.patch index b00dafab4d..437480543f 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0025-WIP-1000-drm-bridge-dw-hdmi-fix-RGB-to-YUV-color-spa.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0025-WIP-1000-drm-bridge-dw-hdmi-fix-RGB-to-YUV-color-spa.patch @@ -1,4 +1,4 @@ -From f657ba02a56f7148c56fcc92d542949b7397a1b2 Mon Sep 17 00:00:00 2001 +From e5f15ece47d76fabf4ae845a812ce92e2bf8dc82 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Sat, 10 Apr 2021 16:54:26 +0200 Subject: [PATCH 25/59] WIP/1000: drm/bridge: dw-hdmi: fix RGB to YUV color diff --git a/packages/linux/patches/rockchip-old/rockchip-0026-WIP-1000-media-cec-adap-add-debounce-support-when-se.patch b/packages/linux/patches/rockchip-old/rockchip-0026-WIP-1000-media-cec-adap-add-debounce-support-when-se.patch index 8714297d76..b3b9429f1b 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0026-WIP-1000-media-cec-adap-add-debounce-support-when-se.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0026-WIP-1000-media-cec-adap-add-debounce-support-when-se.patch @@ -1,4 +1,4 @@ -From 47cfcb55dc96df812538b733a56a8ca5b9340cac Mon Sep 17 00:00:00 2001 +From 41b3118b9f5773b26126331f865df7465be007ad Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Tue, 1 Oct 2019 20:52:42 +0000 Subject: [PATCH 26/59] WIP/1000: media: cec-adap: add debounce support when diff --git a/packages/linux/patches/rockchip-old/rockchip-0027-WIP-1000-drm-bridge-synopsys-Fix-CEC-not-working-aft.patch b/packages/linux/patches/rockchip-old/rockchip-0027-WIP-1000-drm-bridge-synopsys-Fix-CEC-not-working-aft.patch index 78263c8b12..e3bd78b698 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0027-WIP-1000-drm-bridge-synopsys-Fix-CEC-not-working-aft.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0027-WIP-1000-drm-bridge-synopsys-Fix-CEC-not-working-aft.patch @@ -1,4 +1,4 @@ -From c8c43f15ad546daaf3d2cbd13c3ca4e4fa6604af Mon Sep 17 00:00:00 2001 +From b0905a09604d6474e4156cb563937821ec523104 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Fri, 22 Oct 2021 11:17:30 +0200 Subject: [PATCH 27/59] WIP/1000: drm/bridge: synopsys: Fix CEC not working diff --git a/packages/linux/patches/rockchip-old/rockchip-0028-WIP-1000-drm-rockchip-vop-create-planes-in-window-or.patch b/packages/linux/patches/rockchip-old/rockchip-0028-WIP-1000-drm-rockchip-vop-create-planes-in-window-or.patch index 4b5fce56b4..dba7328611 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0028-WIP-1000-drm-rockchip-vop-create-planes-in-window-or.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0028-WIP-1000-drm-rockchip-vop-create-planes-in-window-or.patch @@ -1,4 +1,4 @@ -From d0cb5362ec2336f048606ebae2dcb05a53d9dd3a Mon Sep 17 00:00:00 2001 +From 3fc7233c5a98ef8000fdfe3467fd890664b5f72a Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 9 Oct 2020 15:24:53 +0000 Subject: [PATCH 28/59] WIP/1000: drm/rockchip: vop: create planes in window diff --git a/packages/linux/patches/rockchip-old/rockchip-0029-WIP-1001-media-rkvdec-pm-runtime-dont-use-autosuspen.patch b/packages/linux/patches/rockchip-old/rockchip-0029-WIP-1001-media-rkvdec-pm-runtime-dont-use-autosuspen.patch index 5e402918bd..c412c8e6e4 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0029-WIP-1001-media-rkvdec-pm-runtime-dont-use-autosuspen.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0029-WIP-1001-media-rkvdec-pm-runtime-dont-use-autosuspen.patch @@ -1,4 +1,4 @@ -From f0fa00d4cd4f08067189713707ce9012a4a9e7b7 Mon Sep 17 00:00:00 2001 +From 7aeb1dcc4f3949cb50f127ca3135fe58cb2cca5c Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sat, 23 May 2020 10:16:01 +0000 Subject: [PATCH 29/59] WIP/1001: media: rkvdec: pm runtime dont use diff --git a/packages/linux/patches/rockchip-old/rockchip-0030-WIP-1001-soc-rockchip-power-domain-export-idle-reque.patch b/packages/linux/patches/rockchip-old/rockchip-0030-WIP-1001-soc-rockchip-power-domain-export-idle-reque.patch index 22fb5e107b..ae58bc86e3 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0030-WIP-1001-soc-rockchip-power-domain-export-idle-reque.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0030-WIP-1001-soc-rockchip-power-domain-export-idle-reque.patch @@ -1,4 +1,4 @@ -From 6c3752e2e7a3b8204cb8f5c6fa884c7ec089cf84 Mon Sep 17 00:00:00 2001 +From 55cfa664c6e07b2902ac3666fdf9d00c6ebeac70 Mon Sep 17 00:00:00 2001 From: Randy Li Date: Sun, 6 Jan 2019 01:48:37 +0800 Subject: [PATCH 30/59] WIP/1001: soc: rockchip: power-domain: export idle diff --git a/packages/linux/patches/rockchip-old/rockchip-0031-WIP-1001-media-rkvdec-implement-reset-controls.patch b/packages/linux/patches/rockchip-old/rockchip-0031-WIP-1001-media-rkvdec-implement-reset-controls.patch index 54e325ec35..a7ce77df02 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0031-WIP-1001-media-rkvdec-implement-reset-controls.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0031-WIP-1001-media-rkvdec-implement-reset-controls.patch @@ -1,4 +1,4 @@ -From e820bdd484faa4af32620e4c8a07c92de3d1d096 Mon Sep 17 00:00:00 2001 +From c4bddd4da7b748579bd337e38873af5087c31090 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Wed, 20 May 2020 17:04:47 +0200 Subject: [PATCH 31/59] WIP/1001: media: rkvdec: implement reset controls diff --git a/packages/linux/patches/rockchip-old/rockchip-0032-WIP-1001-arm64-dts-add-resets-to-vdec-for-RK3399.patch b/packages/linux/patches/rockchip-old/rockchip-0032-WIP-1001-arm64-dts-add-resets-to-vdec-for-RK3399.patch index ef72e7be71..007ef67ece 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0032-WIP-1001-arm64-dts-add-resets-to-vdec-for-RK3399.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0032-WIP-1001-arm64-dts-add-resets-to-vdec-for-RK3399.patch @@ -1,4 +1,4 @@ -From c5ccfb8981662498ead114cfc284c9d4f01ce78b Mon Sep 17 00:00:00 2001 +From 811c46dd1b32a9f86492875231a8c50593d37c05 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Tue, 18 Aug 2020 11:38:04 +0200 Subject: [PATCH 32/59] WIP/1001: arm64: dts: add resets to vdec for RK3399 diff --git a/packages/linux/patches/rockchip-old/rockchip-0033-WIP-1001-media-hantro-rockchip-Increase-RK3288-s-max.patch b/packages/linux/patches/rockchip-old/rockchip-0033-WIP-1001-media-hantro-rockchip-Increase-RK3288-s-max.patch index 0ecab9f7a0..b8498fb565 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0033-WIP-1001-media-hantro-rockchip-Increase-RK3288-s-max.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0033-WIP-1001-media-hantro-rockchip-Increase-RK3288-s-max.patch @@ -1,4 +1,4 @@ -From 00bb174583f859081e899ed397df0b5939553730 Mon Sep 17 00:00:00 2001 +From 98692155629740e372a2eb1967a217c66e18328f Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Sat, 21 Aug 2021 16:12:36 +0200 Subject: [PATCH 33/59] WIP/1001: media: hantro: rockchip: Increase RK3288's diff --git a/packages/linux/patches/rockchip-old/rockchip-0034-WIP-1001-media-rkvdec-disable-QoS-for-VP9-corruption.patch b/packages/linux/patches/rockchip-old/rockchip-0034-WIP-1001-media-rkvdec-disable-QoS-for-VP9-corruption.patch index 4c8a5f11f6..571f40d567 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0034-WIP-1001-media-rkvdec-disable-QoS-for-VP9-corruption.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0034-WIP-1001-media-rkvdec-disable-QoS-for-VP9-corruption.patch @@ -1,4 +1,4 @@ -From ff4a4fce9ca0066d67e4b88bd24f9e5afff16652 Mon Sep 17 00:00:00 2001 +From a85f156bdf40aecd9f308e96bd0ffeb6e06077d4 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Sun, 4 Jul 2021 15:19:44 +0200 Subject: [PATCH 34/59] WIP/1001: media: rkvdec: disable QoS for VP9 diff --git a/packages/linux/patches/rockchip-old/rockchip-0035-WIP-1001-arm64-dts-add-resets-to-vdec-for-RK3328.patch b/packages/linux/patches/rockchip-old/rockchip-0035-WIP-1001-arm64-dts-add-resets-to-vdec-for-RK3328.patch index 0140bf2e3d..c6d86e708a 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0035-WIP-1001-arm64-dts-add-resets-to-vdec-for-RK3328.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0035-WIP-1001-arm64-dts-add-resets-to-vdec-for-RK3328.patch @@ -1,4 +1,4 @@ -From 128a568ff04e52754baa359ce62446777745f6e4 Mon Sep 17 00:00:00 2001 +From 4e5449c57e0818df9003d6ee56bd0b332fdf3c88 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Thu, 16 Jun 2022 13:18:22 +0200 Subject: [PATCH 35/59] WIP/1001: arm64: dts: add resets to vdec for RK3328 diff --git a/packages/linux/patches/rockchip-old/rockchip-0036-WIP-1002-arm64-dts-rockchip-add-gpu-powerdomain-gpu-.patch b/packages/linux/patches/rockchip-old/rockchip-0036-WIP-1002-arm64-dts-rockchip-add-gpu-powerdomain-gpu-.patch index 8fd19638c2..133dfee565 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0036-WIP-1002-arm64-dts-rockchip-add-gpu-powerdomain-gpu-.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0036-WIP-1002-arm64-dts-rockchip-add-gpu-powerdomain-gpu-.patch @@ -1,4 +1,4 @@ -From bce0ff837523f2cde25f52812d09415d556b6dac Mon Sep 17 00:00:00 2001 +From a77b197930d1b8c2890c12b9d128eba23361c067 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Wed, 2 Sep 2020 19:52:02 +0200 Subject: [PATCH 36/59] WIP/1002: arm64: dts: rockchip: add gpu powerdomain, diff --git a/packages/linux/patches/rockchip-old/rockchip-0037-WIP-1002-ARM-dts-RK3288-miqi-add-hdmi-sound-nodes.patch b/packages/linux/patches/rockchip-old/rockchip-0037-WIP-1002-ARM-dts-RK3288-miqi-add-hdmi-sound-nodes.patch index 1a76f6488c..8f0f03c784 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0037-WIP-1002-ARM-dts-RK3288-miqi-add-hdmi-sound-nodes.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0037-WIP-1002-ARM-dts-RK3288-miqi-add-hdmi-sound-nodes.patch @@ -1,4 +1,4 @@ -From b5d839cc33801f7d4793a8eb40c2bd3bc90e71cf Mon Sep 17 00:00:00 2001 +From 8b00b228a75382ee9fca6cb1dee0b89a8e959ed8 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Tue, 2 Feb 2021 17:22:21 +0200 Subject: [PATCH 37/59] WIP/1002: ARM: dts: RK3288 miqi add hdmi sound nodes diff --git a/packages/linux/patches/rockchip-old/rockchip-0038-WIP-1002-ARM-arm64-dts-rockchip-align-sound-card-nam.patch b/packages/linux/patches/rockchip-old/rockchip-0038-WIP-1002-ARM-arm64-dts-rockchip-align-sound-card-nam.patch index eb095de139..7f5ee2ab61 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0038-WIP-1002-ARM-arm64-dts-rockchip-align-sound-card-nam.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0038-WIP-1002-ARM-arm64-dts-rockchip-align-sound-card-nam.patch @@ -1,4 +1,4 @@ -From ca832abe5bd81104aa5d2d193f9c279be4b15ee4 Mon Sep 17 00:00:00 2001 +From 6b3c5d1f1812c97b47a395a75c0ce360879277b6 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Fri, 2 Apr 2021 17:54:22 +0200 Subject: [PATCH 38/59] WIP/1002: ARM/arm64: dts: rockchip: align sound card diff --git a/packages/linux/patches/rockchip-old/rockchip-0039-WIP-1002-arm64-dts-rockchip-add-SPDIF-nodes-for-RK33.patch b/packages/linux/patches/rockchip-old/rockchip-0039-WIP-1002-arm64-dts-rockchip-add-SPDIF-nodes-for-RK33.patch index 5621da9250..a5643cb08e 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0039-WIP-1002-arm64-dts-rockchip-add-SPDIF-nodes-for-RK33.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0039-WIP-1002-arm64-dts-rockchip-add-SPDIF-nodes-for-RK33.patch @@ -1,4 +1,4 @@ -From 4c6ede1bdbe16a4bb6ce2518c55b9612477db966 Mon Sep 17 00:00:00 2001 +From 0162f62ed5caaecbba522c1d00b18c46c9568dbd Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Sat, 27 Feb 2021 17:52:02 +0100 Subject: [PATCH 39/59] WIP/1002: arm64: dts: rockchip: add SPDIF nodes for diff --git a/packages/linux/patches/rockchip-old/rockchip-0040-WIP-1002-arm64-dts-rockchip-Add-ir-receiver-node-for.patch b/packages/linux/patches/rockchip-old/rockchip-0040-WIP-1002-arm64-dts-rockchip-Add-ir-receiver-node-for.patch index 57c9a3d733..0a799e8cb6 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0040-WIP-1002-arm64-dts-rockchip-Add-ir-receiver-node-for.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0040-WIP-1002-arm64-dts-rockchip-Add-ir-receiver-node-for.patch @@ -1,4 +1,4 @@ -From 3bd9c85894e889f86176850f5f31e3009b637037 Mon Sep 17 00:00:00 2001 +From f4d11b0e7f35b2cf9a5f864410e1f9e081d21329 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Sat, 27 Feb 2021 18:01:13 +0100 Subject: [PATCH 40/59] WIP/1002: arm64: dts: rockchip: Add ir-receiver node diff --git a/packages/linux/patches/rockchip-old/rockchip-0041-WIP-1002-ARM-dts-add-cec-pinctrl-for-RK3288-miqi-boa.patch b/packages/linux/patches/rockchip-old/rockchip-0041-WIP-1002-ARM-dts-add-cec-pinctrl-for-RK3288-miqi-boa.patch index 0a0492b581..8e544584eb 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0041-WIP-1002-ARM-dts-add-cec-pinctrl-for-RK3288-miqi-boa.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0041-WIP-1002-ARM-dts-add-cec-pinctrl-for-RK3288-miqi-boa.patch @@ -1,4 +1,4 @@ -From 5d0117163c35c896fca347fb2391b1f16251a35b Mon Sep 17 00:00:00 2001 +From 1d41d49f343ea955b414fc8b365acabbb6fcc425 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Mon, 1 Mar 2021 21:24:15 +0100 Subject: [PATCH 41/59] WIP/1002: ARM: dts: add cec pinctrl for RK3288 miqi diff --git a/packages/linux/patches/rockchip-old/rockchip-0042-WIP-1002-HACK-arm64-dts-enable-FE-phy-for-Beelink-A1.patch b/packages/linux/patches/rockchip-old/rockchip-0042-WIP-1002-HACK-arm64-dts-enable-FE-phy-for-Beelink-A1.patch index a0afc1da4d..a39945ce29 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0042-WIP-1002-HACK-arm64-dts-enable-FE-phy-for-Beelink-A1.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0042-WIP-1002-HACK-arm64-dts-enable-FE-phy-for-Beelink-A1.patch @@ -1,4 +1,4 @@ -From a5b67cd0fd28b9557c9b9011a98e2c0a85b4c90f Mon Sep 17 00:00:00 2001 +From 2e39e206b05bd9727b0832d95a431688b8df50e2 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Mon, 1 Mar 2021 19:22:15 +0100 Subject: [PATCH 42/59] WIP/1002: HACK: arm64: dts: enable FE phy for Beelink diff --git a/packages/linux/patches/rockchip-old/rockchip-0043-WIP-1002-dw-hdmi-cec-sleep-100ms-on-error.patch b/packages/linux/patches/rockchip-old/rockchip-0043-WIP-1002-dw-hdmi-cec-sleep-100ms-on-error.patch index c8308e646d..9b511a6e4a 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0043-WIP-1002-dw-hdmi-cec-sleep-100ms-on-error.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0043-WIP-1002-dw-hdmi-cec-sleep-100ms-on-error.patch @@ -1,4 +1,4 @@ -From 5f75e2b8b93aa36a3ef563220e05012bf6ee1637 Mon Sep 17 00:00:00 2001 +From f3707568b6b2775f34545f809810eb0970475769 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Tue, 26 Feb 2019 20:45:14 +0000 Subject: [PATCH 43/59] WIP/1002: dw-hdmi-cec: sleep 100ms on error diff --git a/packages/linux/patches/rockchip-old/rockchip-0044-WIP-1002-arm64-boot-dts-Increase-ACLK_PERILP0-clock-.patch b/packages/linux/patches/rockchip-old/rockchip-0044-WIP-1002-arm64-boot-dts-Increase-ACLK_PERILP0-clock-.patch index 364f645750..1fbe4bed4f 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0044-WIP-1002-arm64-boot-dts-Increase-ACLK_PERILP0-clock-.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0044-WIP-1002-arm64-boot-dts-Increase-ACLK_PERILP0-clock-.patch @@ -1,4 +1,4 @@ -From d3f81ed48b5f275372fc0a7f083dd1af0b5bef0a Mon Sep 17 00:00:00 2001 +From 483ceaa9876d414186d9ce7978223cd2720d6f7b Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Wed, 5 May 2021 19:11:12 +0200 Subject: [PATCH 44/59] WIP/1002: arm64: boot: dts: Increase ACLK_PERILP0 clock diff --git a/packages/linux/patches/rockchip-old/rockchip-0045-WIP-1002-arm64-dts-rockchip-Enable-USB3-for-rk3328-B.patch b/packages/linux/patches/rockchip-old/rockchip-0045-WIP-1002-arm64-dts-rockchip-Enable-USB3-for-rk3328-B.patch index 357bdc78ce..545844288d 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0045-WIP-1002-arm64-dts-rockchip-Enable-USB3-for-rk3328-B.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0045-WIP-1002-arm64-dts-rockchip-Enable-USB3-for-rk3328-B.patch @@ -1,4 +1,4 @@ -From a11c3b6c96c3be4f3dc6d14eca1c6f6f41297da7 Mon Sep 17 00:00:00 2001 +From e69fac2d053a9e7c9707c39e9ca0bba926011808 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Sat, 21 Aug 2021 17:04:46 +0200 Subject: [PATCH 45/59] WIP/1002: arm64: dts: rockchip: Enable USB3 for rk3328 diff --git a/packages/linux/patches/rockchip-old/rockchip-0046-WIP-1002-drm-bridge-dw-hdmi-switch-from-.hw_parmas-t.patch b/packages/linux/patches/rockchip-old/rockchip-0046-WIP-1002-drm-bridge-dw-hdmi-switch-from-.hw_parmas-t.patch index 816407644c..7171440154 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0046-WIP-1002-drm-bridge-dw-hdmi-switch-from-.hw_parmas-t.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0046-WIP-1002-drm-bridge-dw-hdmi-switch-from-.hw_parmas-t.patch @@ -1,4 +1,4 @@ -From 81a61b1534afbfa6805c40df3e8e1b0635b05fb2 Mon Sep 17 00:00:00 2001 +From f0c8b2eb56560cf14c1582cef7a03d9a4a85cedf Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Sat, 30 Oct 2021 12:19:19 +0200 Subject: [PATCH 46/59] WIP/1002: drm: bridge: dw-hdmi: switch from .hw_parmas diff --git a/packages/linux/patches/rockchip-old/rockchip-0047-WIP-1002-arm64-dts-rockchip-disable-fusb-for-rk3399-.patch b/packages/linux/patches/rockchip-old/rockchip-0047-WIP-1002-arm64-dts-rockchip-disable-fusb-for-rk3399-.patch index f86c493f4a..387b2b621c 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0047-WIP-1002-arm64-dts-rockchip-disable-fusb-for-rk3399-.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0047-WIP-1002-arm64-dts-rockchip-disable-fusb-for-rk3399-.patch @@ -1,4 +1,4 @@ -From 0202435665464cbf0bf9a3bb59e0da36aab17385 Mon Sep 17 00:00:00 2001 +From b9ca0fa8a68c1d2e551636bbabcfa27570ec6708 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Sun, 18 Sep 2022 10:35:52 +0200 Subject: [PATCH 47/59] WIP/1002: arm64: dts: rockchip: disable fusb for diff --git a/packages/linux/patches/rockchip-old/rockchip-0048-WIP-2000-media-rkvdec-add-HEVC-backend.patch b/packages/linux/patches/rockchip-old/rockchip-0048-WIP-2000-media-rkvdec-add-HEVC-backend.patch index 3f76595971..a207cd0e2a 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0048-WIP-2000-media-rkvdec-add-HEVC-backend.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0048-WIP-2000-media-rkvdec-add-HEVC-backend.patch @@ -1,4 +1,4 @@ -From f17202a6531a100aaddc67dd8f9dba365bf0c231 Mon Sep 17 00:00:00 2001 +From 30e739fb78dea37050d5bb0bf865f14522ae88f8 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sat, 23 May 2020 15:17:45 +0000 Subject: [PATCH 48/59] WIP/2000: media: rkvdec: add HEVC backend diff --git a/packages/linux/patches/rockchip-old/rockchip-0049-WIP-2000-media-rkvdec-add-variants-support.patch b/packages/linux/patches/rockchip-old/rockchip-0049-WIP-2000-media-rkvdec-add-variants-support.patch index fb130b956b..04c3a66773 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0049-WIP-2000-media-rkvdec-add-variants-support.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0049-WIP-2000-media-rkvdec-add-variants-support.patch @@ -1,4 +1,4 @@ -From 0166134b07694d9256193f254932fc92f282bc03 Mon Sep 17 00:00:00 2001 +From 9a53a1a9900c2da36df434ccd7b08ecdc986d6a5 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Sat, 30 Jan 2021 18:16:39 +0100 Subject: [PATCH 49/59] WIP/2000: media: rkvdec: add variants support diff --git a/packages/linux/patches/rockchip-old/rockchip-0050-WIP-2000-media-rkvdec-add-RK3288-variant.patch b/packages/linux/patches/rockchip-old/rockchip-0050-WIP-2000-media-rkvdec-add-RK3288-variant.patch index 5dc3f6a4ab..950e76e217 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0050-WIP-2000-media-rkvdec-add-RK3288-variant.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0050-WIP-2000-media-rkvdec-add-RK3288-variant.patch @@ -1,4 +1,4 @@ -From df2c88e56a2d2e2cae8689e2fe3a60375aa1c31b Mon Sep 17 00:00:00 2001 +From 95e9a197220a9e780a957c8520effc137e3a3f70 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Sat, 30 Jan 2021 18:21:59 +0100 Subject: [PATCH 50/59] WIP/2000: media: rkvdec: add RK3288 variant diff --git a/packages/linux/patches/rockchip-old/rockchip-0051-WIP-2000-ARM-dts-RK3288-add-hevc-node.patch b/packages/linux/patches/rockchip-old/rockchip-0051-WIP-2000-ARM-dts-RK3288-add-hevc-node.patch index a72d148022..0d13739764 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0051-WIP-2000-ARM-dts-RK3288-add-hevc-node.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0051-WIP-2000-ARM-dts-RK3288-add-hevc-node.patch @@ -1,4 +1,4 @@ -From d3a694f344c3a2aa600a47cb44cb95827d95d23f Mon Sep 17 00:00:00 2001 +From 5fed19731f3305ef99b80dc7f9d33f8f35918246 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Sat, 30 Jan 2021 18:27:30 +0100 Subject: [PATCH 51/59] WIP/2000: ARM: dts: RK3288: add hevc node diff --git a/packages/linux/patches/rockchip-old/rockchip-0052-WIP-2000-media-rkvdec-Fix-HEVC-RPS-bit-offsets.patch b/packages/linux/patches/rockchip-old/rockchip-0052-WIP-2000-media-rkvdec-Fix-HEVC-RPS-bit-offsets.patch index e6607dd9c9..b6f01107cd 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0052-WIP-2000-media-rkvdec-Fix-HEVC-RPS-bit-offsets.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0052-WIP-2000-media-rkvdec-Fix-HEVC-RPS-bit-offsets.patch @@ -1,4 +1,4 @@ -From 70843319d3ed20b0621011355f0bc2db625ffd4a Mon Sep 17 00:00:00 2001 +From 57b57ee7fbfca3ed448c15804cbdde80d3ad7bc6 Mon Sep 17 00:00:00 2001 From: Nicolas Dufresne Date: Tue, 10 May 2022 14:37:29 -0400 Subject: [PATCH 52/59] WIP/2000: media: rkvdec: Fix HEVC RPS bit offsets diff --git a/packages/linux/patches/rockchip-old/rockchip-0053-WIP-2000-media-rkvdec-Fix-number-of-HEVC-references-.patch b/packages/linux/patches/rockchip-old/rockchip-0053-WIP-2000-media-rkvdec-Fix-number-of-HEVC-references-.patch index 80ca0417dc..93e9b9ecc4 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0053-WIP-2000-media-rkvdec-Fix-number-of-HEVC-references-.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0053-WIP-2000-media-rkvdec-Fix-number-of-HEVC-references-.patch @@ -1,4 +1,4 @@ -From 926527e77cc261449875af78e9e52c0b20af7f46 Mon Sep 17 00:00:00 2001 +From dd20aa39966a3a342cdeedded4081a24e7365f18 Mon Sep 17 00:00:00 2001 From: Nicolas Dufresne Date: Tue, 10 May 2022 15:12:03 -0400 Subject: [PATCH 53/59] WIP/2000: media: rkvdec: Fix number of HEVC references diff --git a/packages/linux/patches/rockchip-old/rockchip-0054-WIP-2001-dt-bindings-media-Add-Rockchip-IEP-binding.patch b/packages/linux/patches/rockchip-old/rockchip-0054-WIP-2001-dt-bindings-media-Add-Rockchip-IEP-binding.patch index ed92c3880b..ba73c1af08 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0054-WIP-2001-dt-bindings-media-Add-Rockchip-IEP-binding.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0054-WIP-2001-dt-bindings-media-Add-Rockchip-IEP-binding.patch @@ -1,4 +1,4 @@ -From 73427ab019d92c8063dbc55766a659be3c61c97c Mon Sep 17 00:00:00 2001 +From ab880080a3b2c3a9c41c904cb4f8f2e3601c7148 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Sun, 11 Oct 2020 17:03:12 +0200 Subject: [PATCH 54/59] WIP/2001: dt-bindings: media: Add Rockchip IEP binding diff --git a/packages/linux/patches/rockchip-old/rockchip-0055-WIP-2001-media-rockchip-Add-Rockchip-IEP-driver.patch b/packages/linux/patches/rockchip-old/rockchip-0055-WIP-2001-media-rockchip-Add-Rockchip-IEP-driver.patch index fa982c07af..39d8969190 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0055-WIP-2001-media-rockchip-Add-Rockchip-IEP-driver.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0055-WIP-2001-media-rockchip-Add-Rockchip-IEP-driver.patch @@ -1,4 +1,4 @@ -From ed377549c4b8c1cacc4146e3b47cda38fa3df5da Mon Sep 17 00:00:00 2001 +From 7f18b13921db7e248f1734537d69fac5d93ed1a1 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Sun, 11 Oct 2020 21:24:10 +0200 Subject: [PATCH 55/59] WIP/2001: media: rockchip: Add Rockchip IEP driver diff --git a/packages/linux/patches/rockchip-old/rockchip-0056-WIP-2001-ARM64-dts-rockchip-Add-IEP-node-for-RK3328.patch b/packages/linux/patches/rockchip-old/rockchip-0056-WIP-2001-ARM64-dts-rockchip-Add-IEP-node-for-RK3328.patch index abb21b9b67..41290bb730 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0056-WIP-2001-ARM64-dts-rockchip-Add-IEP-node-for-RK3328.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0056-WIP-2001-ARM64-dts-rockchip-Add-IEP-node-for-RK3328.patch @@ -1,4 +1,4 @@ -From b489e58fe7cbc0cd2432314447b59316ec3a8ab5 Mon Sep 17 00:00:00 2001 +From 0fc898079e420f01b693642e253f91e50dbb6442 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Wed, 14 Oct 2020 20:22:38 +0200 Subject: [PATCH 56/59] WIP/2001: ARM64: dts: rockchip: Add IEP node for RK3328 diff --git a/packages/linux/patches/rockchip-old/rockchip-0057-WIP-2001-ARM64-dts-rockchip-Add-IEP-node-for-RK3399.patch b/packages/linux/patches/rockchip-old/rockchip-0057-WIP-2001-ARM64-dts-rockchip-Add-IEP-node-for-RK3399.patch index 4b97b97d49..79402888b5 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0057-WIP-2001-ARM64-dts-rockchip-Add-IEP-node-for-RK3399.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0057-WIP-2001-ARM64-dts-rockchip-Add-IEP-node-for-RK3399.patch @@ -1,4 +1,4 @@ -From 319bec9d8c6e78d6caa2f31922c82cc188192635 Mon Sep 17 00:00:00 2001 +From d827d9add7e06e2ffc13a7dd352ffa8233a45772 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Wed, 14 Oct 2020 20:43:12 +0200 Subject: [PATCH 57/59] WIP/2001: ARM64: dts: rockchip: Add IEP node for RK3399 diff --git a/packages/linux/patches/rockchip-old/rockchip-0058-WIP-2001-ARM-dts-rockchip-Add-IEP-node-for-RK3288.patch b/packages/linux/patches/rockchip-old/rockchip-0058-WIP-2001-ARM-dts-rockchip-Add-IEP-node-for-RK3288.patch index 49d041139e..7d6870969d 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0058-WIP-2001-ARM-dts-rockchip-Add-IEP-node-for-RK3288.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0058-WIP-2001-ARM-dts-rockchip-Add-IEP-node-for-RK3288.patch @@ -1,4 +1,4 @@ -From 64554c7fe9941ce1896256e46155f1483ad0b4e8 Mon Sep 17 00:00:00 2001 +From 92d5a90ba490ef4e4ec91b380533f6075dd84055 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Wed, 14 Oct 2020 20:53:56 +0200 Subject: [PATCH 58/59] WIP/2001: ARM: dts: rockchip: Add IEP node for RK3288 diff --git a/packages/linux/patches/rockchip-old/rockchip-0059-WIP-9000-arm64-rockchip-rk3288-disable-VPU-iommu.patch b/packages/linux/patches/rockchip-old/rockchip-0059-WIP-9000-arm64-rockchip-rk3288-disable-VPU-iommu.patch index 6bfcde2e90..fe58f18d07 100644 --- a/packages/linux/patches/rockchip-old/rockchip-0059-WIP-9000-arm64-rockchip-rk3288-disable-VPU-iommu.patch +++ b/packages/linux/patches/rockchip-old/rockchip-0059-WIP-9000-arm64-rockchip-rk3288-disable-VPU-iommu.patch @@ -1,4 +1,4 @@ -From 7febf2c5fa24b27be17a528e8d74a2ccd5759ab8 Mon Sep 17 00:00:00 2001 +From 9953e604ceb7c17a82cd6b457a4bbb1438d2dc75 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Sun, 15 Dec 2024 12:53:18 +0100 Subject: [PATCH 59/59] WIP/9000: arm64: rockchip: rk3288: disable VPU iommu From f490093c51dd78d24320c1bca7ecf73fe4de2b64 Mon Sep 17 00:00:00 2001 From: Christian Hewitt Date: Wed, 17 Sep 2025 15:28:46 +0000 Subject: [PATCH 3/3] linux: update rockchip Linux 6.17.y patchset Signed-off-by: Christian Hewitt --- packages/linux/package.mk | 4 +- ...m64-fix-Kodi-sysinfo-CPU-information.patch | 4 +- ...ts-rockchip-rock5b-disable-sdio-node.patch | 4 +- ...ip-vop2-rk3588-change-Esmart-Cluster.patch | 4 +- ...ip-vop2-rk3568-change-Esmart-Cluster.patch | 95 + ...a-uapi-HEVC-Add-v4l2_ctrl_hevc_ext_.patch} | 4 +- ...a-v4l2-ctrls-Add-hevc_ext_sps_-ls-t.patch} | 4 +- ...4-dts-rockchip-Add-the-vdpu381-Vide.patch} | 4 +- ...4-dts-rockchip-Add-the-vdpu383-Vide.patch} | 4 +- ...4-dts-rockchip-Enable-HDMI-audio-ou.patch} | 4 +- ...4-dts-rockchip-Enable-the-NPU-on-Na.patch} | 4 +- ...8-accel-rocket-Add-registers-header.patch} | 4 +- ...l-rocket-Add-a-new-driver-for-Rockc.patch} | 6 +- ...el-rocket-Add-IOCTL-for-BO-creation.patch} | 4 +- ...cel-rocket-Add-job-submission-IOCTL.patch} | 4 +- ...l-rocket-Add-IOCTLs-for-synchronizi.patch} | 4 +- ...indings-npu-rockchip-rknn-Add-bindi.patch} | 4 +- ...4-dts-rockchip-add-pd_npu-label-for.patch} | 4 +- ...4-dts-rockchip-Add-nodes-for-NPU-an.patch} | 4 +- ...4-dts-rockchip-Enable-the-NPU-on-qu.patch} | 4 +- ...4-dts-rockchip-enable-NPU-on-ROCK-5.patch} | 4 +- ...4-dts-rockchip-Enable-HDMI-receiver.patch} | 4 +- ...4-dts-rockchip-Enable-the-NPU-on-th.patch} | 4 +- ...4-dts-rockchip-rk3588s-rock-5a-Add-.patch} | 4 +- ...4-dts-rockchip-Enable-RK3576-watchd.patch} | 4 +- ...4-dts-rockchip-add-SPDIF-audio-to-B.patch} | 4 +- ...4-dts-rockchip-add-USB3-on-Beelink-.patch} | 4 +- ...4-dts-rockchip-add-IR-receiver-to-r.patch} | 4 +- ...4-dts-rockchip-add-GPU-powerdomain-.patch} | 4 +- ...4-dts-rockchip-enable-the-Mali-GPU-.patch} | 4 +- ...dts-rockchip-add-HDMI-audio-to-rk32.patch} | 4 +- ...dts-rockchip-add-CEC-pinctrl-to-rk3.patch} | 4 +- ...ore-set-initial-signal-voltage-on-p.patch} | 4 +- ...ndings-vendor-prefixes-Add-Verisili.patch} | 4 +- ...ndings-iommu-verisilicon-Add-bindin.patch} | 4 +- ...-iommu-Add-verisilicon-IOMMU-driver.patch} | 4 +- ...-verisilicon-AV1-Restore-IOMMU-cont.patch} | 4 +- ...-dts-rockchip-Add-verisilicon-IOMMU.patch} | 4 +- ...ridge-dw-hdmi-qp-Return-0-in-audio-.patch} | 4 +- ...ridge-synopsys-Do-not-warn-about-au.patch} | 4 +- ...-dts-rockchip-use-MAC-TX-delay-for-.patch} | 4 +- ...-dts-rockchip-Fix-sound-output-from.patch} | 4 +- ...al-rockchip-unify-struct-rockchip_t.patch} | 4 +- ...hermal-rockchip-shut-up-GRF-warning.patch} | 4 +- ...ndings-thermal-rockchip-tighten-grf.patch} | 4 +- ...ST-v3-media-rkvdec-Add-HEVC-backend.patch} | 4 +- ...3-media-rkvdec-Add-variants-support.patch} | 4 +- ...-rkvdec-Implement-capability-filter.patch} | 4 +- ...-v3-media-rkvdec-Add-RK3288-variant.patch} | 4 +- ...-rkvdec-Disable-QoS-for-HEVC-and-VP.patch} | 4 +- ...-dt-bindings-rockchip-vdec-Add-RK32.patch} | 4 +- ...ts-rockchip-Add-vdec-node-for-RK328.patch} | 4 +- ...m-bridge-dw-hdmi-qp-Add-CEC-support.patch} | 4 +- ...ridge-dw-hdmi-qp-Fixup-timer-base-s.patch} | 4 +- ...ockchip-dw_hdmi_qp-Improve-error-ha.patch} | 4 +- ...ockchip-dw_hdmi_qp-Provide-CEC-IRQ-.patch} | 4 +- ...ockchip-dw_hdmi_qp-Provide-ref-cloc.patch} | 4 +- ...-defconfig-Enable-DW-HDMI-QP-CEC-su.patch} | 4 +- ...ockchip-vop2-Check-bpc-before-switc.patch} | 4 +- ...ridge-dw-hdmi-qp-Handle-platform-su.patch} | 4 +- ...ockchip-dw_hdmi_qp-Switch-to-phy_co.patch} | 4 +- ...ockchip-dw_hdmi_qp-Use-bit-macros-f.patch} | 4 +- ...ockchip-dw_hdmi_qp-Add-high-color-d.patch} | 4 +- ...ockchip-vop2-Add-delay-between-poll.patch} | 6 +- ...ockchip-vop2-Only-wait-for-changed-.patch} | 6 +- ...-verisilicon-Export-only-needed-pix.patch} | 4 +- ...-verisilicon-Explicitly-disable-sel.patch} | 4 +- ...introduce-hardware-specific-bitfiel.patch} | 6 +- ...kvdec-Switch-to-using-structs-inste.patch} | 4 +- ...kvdec-Move-cabac-tables-to-their-ow.patch} | 4 +- ...kvdec-Use-structs-to-represent-the-.patch} | 4 +- ...kvdec-Move-h264-functions-to-common.patch} | 4 +- ...kvdec-Move-hevc-functions-to-common.patch} | 4 +- ...kvdec-Add-per-variant-configuration.patch} | 4 +- ...dia-rkvdec-Add-RCB-and-SRAM-support.patch} | 4 +- ...kvdec-Support-per-variant-interrupt.patch} | 4 +- ...rkvdec-Add-H264-support-for-the-VDPU.patch | 1260 -------- ...kvdec-Enable-all-clocks-without-nam.patch} | 4 +- ...rkvdec-Add-H264-support-for-the-VDPU.patch | 2756 +++++------------ ...rkvdec-Add-H264-support-for-the-VDPU.patch | 2520 +++++++++++++++ ...kvdec-Add-HEVC-support-for-the-VDPU.patch} | 4 +- ...ockchip-samsung-hdptx-Fix-reported-.patch} | 4 +- ...ockchip-samsung-hdptx-Reduce-ROPLL-.patch} | 4 +- ...ockchip-samsung-hdptx-Prevent-Inter.patch} | 4 +- ...dmi-Add-HDMI-2.1-FRL-configuration-.patch} | 4 +- ...ockchip-samsung-hdptx-Use-usleep_ra.patch} | 4 +- ...ockchip-samsung-hdptx-Fix-coding-st.patch} | 4 +- ...ockchip-samsung-hdptx-Consistently-.patch} | 4 +- ...ockchip-samsung-hdptx-Enable-lane-o.patch} | 4 +- ...ockchip-samsung-hdptx-Cleanup-_cmn_.patch} | 4 +- ...ockchip-samsung-hdptx-Compute-clk-r.patch} | 4 +- ...ockchip-samsung-hdptx-Drop-hw_rate-.patch} | 4 +- ...ockchip-samsung-hdptx-Switch-to-dri.patch} | 4 +- ...ockchip-samsung-hdptx-Extend-rk_hdp.patch} | 4 +- ...ockchip-samsung-hdptx-Add-HDMI-2.1-.patch} | 4 +- ...-Add-CRTC-background-color-property.patch} | 4 +- ...ockchip-vop2-Support-setting-custom.patch} | 4 +- ...RAMB-drm-bridge-Add-detect_ctx-hook.patch} | 4 +- ...idge-connector-Switch-from-detect-t.patch} | 4 +- ...idge-dw-hdmi-qp-Add-high-TMDS-clock.patch} | 4 +- ...ckchip-vop2-Add-YUV420-output-forma.patch} | 4 +- ...ckchip-dw_hdmi_qp-Add-YUV420-output.patch} | 4 +- ...gs-display-rockchip-Add-tmds-enable.patch} | 4 +- ...hip-dw_hdmi_qp-Fixup-usage-of-enabl.patch} | 4 +- ...-rockchip-Add-tmds-enable-gpios-to-.patch} | 4 +- ...-rockchip-Assign-ACLK_VOP-to-750-MH.patch} | 4 +- ...ctor-hdmi-Handle-FRL-in-hdmi_clock_.patch} | 4 +- ...e-dw-hdmi-qp-Add-HDMI-2.1-FRL-suppo.patch} | 4 +- ...hip-dw_hdmi_qp-Add-HDMI-2.1-FRL-sup.patch} | 4 +- ...kchip-vop2-Add-HDMI-2.1-FRL-support.patch} | 6 +- ...main-core-Restore-behaviour-for-disa.patch | 127 - ...kchip-add-pcie-wifi-support-to-Oran.patch} | 4 +- ...main-rockchip-Fix-regulator-dependen.patch | 52 - ...dings-rockchip-Add-RK3568-Video-Deco.patch | 38 + ...-Add-support-for-the-VDPU346-variant.patch | 182 ++ ...ckchip-Add-the-vdpu346-Video-Decoder.patch | 87 + ...nor-fixes-for-current-DETLEV-patches.patch | 57 + projects/Rockchip/linux/linux.aarch64.conf | 20 +- 118 files changed, 3963 insertions(+), 3669 deletions(-) create mode 100644 packages/linux/patches/rockchip/rockchip-0004-LOCAL-drm-rockchip-vop2-rk3568-change-Esmart-Cluster.patch rename packages/linux/patches/rockchip/{rockchip-0004-FROMGIT-6.18-media-uapi-HEVC-Add-v4l2_ctrl_hevc_ext_.patch => rockchip-0005-FROMGIT-6.18-media-uapi-HEVC-Add-v4l2_ctrl_hevc_ext_.patch} (98%) rename packages/linux/patches/rockchip/{rockchip-0005-FROMGIT-6.18-media-v4l2-ctrls-Add-hevc_ext_sps_-ls-t.patch => rockchip-0006-FROMGIT-6.18-media-v4l2-ctrls-Add-hevc_ext_sps_-ls-t.patch} (98%) rename packages/linux/patches/rockchip/{rockchip-0006-FROMGIT-6.18-arm64-dts-rockchip-Add-the-vdpu381-Vide.patch => rockchip-0007-FROMGIT-6.18-arm64-dts-rockchip-Add-the-vdpu381-Vide.patch} (96%) rename packages/linux/patches/rockchip/{rockchip-0007-FROMGIT-6.18-arm64-dts-rockchip-Add-the-vdpu383-Vide.patch => rockchip-0008-FROMGIT-6.18-arm64-dts-rockchip-Add-the-vdpu383-Vide.patch} (95%) rename packages/linux/patches/rockchip/{rockchip-0008-FROMGIT-6.18-arm64-dts-rockchip-Enable-HDMI-audio-ou.patch => rockchip-0009-FROMGIT-6.18-arm64-dts-rockchip-Enable-HDMI-audio-ou.patch} (88%) rename packages/linux/patches/rockchip/{rockchip-0009-FROMGIT-6.18-arm64-dts-rockchip-Enable-the-NPU-on-Na.patch => rockchip-0010-FROMGIT-6.18-arm64-dts-rockchip-Enable-the-NPU-on-Na.patch} (91%) rename packages/linux/patches/rockchip/{rockchip-0010-FROMGIT-6.18-accel-rocket-Add-registers-header.patch => rockchip-0011-FROMGIT-6.18-accel-rocket-Add-registers-header.patch} (99%) rename packages/linux/patches/rockchip/{rockchip-0011-FROMGIT-6.18-accel-rocket-Add-a-new-driver-for-Rockc.patch => rockchip-0012-FROMGIT-6.18-accel-rocket-Add-a-new-driver-for-Rockc.patch} (99%) rename packages/linux/patches/rockchip/{rockchip-0012-FROMGIT-6.18-accel-rocket-Add-IOCTL-for-BO-creation.patch => rockchip-0013-FROMGIT-6.18-accel-rocket-Add-IOCTL-for-BO-creation.patch} (98%) rename packages/linux/patches/rockchip/{rockchip-0013-FROMGIT-6.18-accel-rocket-Add-job-submission-IOCTL.patch => rockchip-0014-FROMGIT-6.18-accel-rocket-Add-job-submission-IOCTL.patch} (99%) rename packages/linux/patches/rockchip/{rockchip-0014-FROMGIT-6.18-accel-rocket-Add-IOCTLs-for-synchronizi.patch => rockchip-0015-FROMGIT-6.18-accel-rocket-Add-IOCTLs-for-synchronizi.patch} (97%) rename packages/linux/patches/rockchip/{rockchip-0015-FROMGIT-6.18-dt-bindings-npu-rockchip-rknn-Add-bindi.patch => rockchip-0016-FROMGIT-6.18-dt-bindings-npu-rockchip-rknn-Add-bindi.patch} (96%) rename packages/linux/patches/rockchip/{rockchip-0016-FROMGIT-6.18-arm64-dts-rockchip-add-pd_npu-label-for.patch => rockchip-0017-FROMGIT-6.18-arm64-dts-rockchip-add-pd_npu-label-for.patch} (91%) rename packages/linux/patches/rockchip/{rockchip-0017-FROMGIT-6.18-arm64-dts-rockchip-Add-nodes-for-NPU-an.patch => rockchip-0018-FROMGIT-6.18-arm64-dts-rockchip-Add-nodes-for-NPU-an.patch} (97%) rename packages/linux/patches/rockchip/{rockchip-0018-FROMGIT-6.18-arm64-dts-rockchip-Enable-the-NPU-on-qu.patch => rockchip-0019-FROMGIT-6.18-arm64-dts-rockchip-Enable-the-NPU-on-qu.patch} (90%) rename packages/linux/patches/rockchip/{rockchip-0019-FROMGIT-6.18-arm64-dts-rockchip-enable-NPU-on-ROCK-5.patch => rockchip-0020-FROMGIT-6.18-arm64-dts-rockchip-enable-NPU-on-ROCK-5.patch} (94%) rename packages/linux/patches/rockchip/{rockchip-0020-FROMGIT-6.18-arm64-dts-rockchip-Enable-HDMI-receiver.patch => rockchip-0021-FROMGIT-6.18-arm64-dts-rockchip-Enable-HDMI-receiver.patch} (91%) rename packages/linux/patches/rockchip/{rockchip-0021-FROMGIT-6.18-arm64-dts-rockchip-Enable-the-NPU-on-th.patch => rockchip-0022-FROMGIT-6.18-arm64-dts-rockchip-Enable-the-NPU-on-th.patch} (93%) rename packages/linux/patches/rockchip/{rockchip-0022-FROMGIT-6.18-arm64-dts-rockchip-rk3588s-rock-5a-Add-.patch => rockchip-0023-FROMGIT-6.18-arm64-dts-rockchip-rk3588s-rock-5a-Add-.patch} (91%) rename packages/linux/patches/rockchip/{rockchip-0023-FROMGIT-6.18-arm64-dts-rockchip-Enable-RK3576-watchd.patch => rockchip-0024-FROMGIT-6.18-arm64-dts-rockchip-Enable-RK3576-watchd.patch} (87%) rename packages/linux/patches/rockchip/{rockchip-0024-FROMGIT-6.18-arm64-dts-rockchip-add-SPDIF-audio-to-B.patch => rockchip-0025-FROMGIT-6.18-arm64-dts-rockchip-add-SPDIF-audio-to-B.patch} (91%) rename packages/linux/patches/rockchip/{rockchip-0025-FROMGIT-6.18-arm64-dts-rockchip-add-USB3-on-Beelink-.patch => rockchip-0026-FROMGIT-6.18-arm64-dts-rockchip-add-USB3-on-Beelink-.patch} (85%) rename packages/linux/patches/rockchip/{rockchip-0026-FROMGIT-6.18-arm64-dts-rockchip-add-IR-receiver-to-r.patch => rockchip-0027-FROMGIT-6.18-arm64-dts-rockchip-add-IR-receiver-to-r.patch} (90%) rename packages/linux/patches/rockchip/{rockchip-0027-FROMGIT-6.18-arm64-dts-rockchip-add-GPU-powerdomain-.patch => rockchip-0028-FROMGIT-6.18-arm64-dts-rockchip-add-GPU-powerdomain-.patch} (94%) rename packages/linux/patches/rockchip/{rockchip-0028-FROMGIT-6.18-arm64-dts-rockchip-enable-the-Mali-GPU-.patch => rockchip-0029-FROMGIT-6.18-arm64-dts-rockchip-enable-the-Mali-GPU-.patch} (93%) rename packages/linux/patches/rockchip/{rockchip-0029-FROMGIT-6.18-ARM-dts-rockchip-add-HDMI-audio-to-rk32.patch => rockchip-0030-FROMGIT-6.18-ARM-dts-rockchip-add-HDMI-audio-to-rk32.patch} (90%) rename packages/linux/patches/rockchip/{rockchip-0030-FROMGIT-6.18-ARM-dts-rockchip-add-CEC-pinctrl-to-rk3.patch => rockchip-0031-FROMGIT-6.18-ARM-dts-rockchip-add-CEC-pinctrl-to-rk3.patch} (85%) rename packages/linux/patches/rockchip/{rockchip-0031-FROMLIST-v1-mmc-core-set-initial-signal-voltage-on-p.patch => rockchip-0032-FROMLIST-v1-mmc-core-set-initial-signal-voltage-on-p.patch} (92%) rename packages/linux/patches/rockchip/{rockchip-0032-FROMLIST-v7-dt-bindings-vendor-prefixes-Add-Verisili.patch => rockchip-0033-FROMLIST-v7-dt-bindings-vendor-prefixes-Add-Verisili.patch} (89%) rename packages/linux/patches/rockchip/{rockchip-0033-FROMLIST-v7-dt-bindings-iommu-verisilicon-Add-bindin.patch => rockchip-0034-FROMLIST-v7-dt-bindings-iommu-verisilicon-Add-bindin.patch} (95%) rename packages/linux/patches/rockchip/{rockchip-0034-FROMLIST-v7-iommu-Add-verisilicon-IOMMU-driver.patch => rockchip-0035-FROMLIST-v7-iommu-Add-verisilicon-IOMMU-driver.patch} (99%) rename packages/linux/patches/rockchip/{rockchip-0035-FROMLIST-v7-media-verisilicon-AV1-Restore-IOMMU-cont.patch => rockchip-0036-FROMLIST-v7-media-verisilicon-AV1-Restore-IOMMU-cont.patch} (96%) rename packages/linux/patches/rockchip/{rockchip-0036-FROMLIST-v7-arm64-dts-rockchip-Add-verisilicon-IOMMU.patch => rockchip-0037-FROMLIST-v7-arm64-dts-rockchip-Add-verisilicon-IOMMU.patch} (91%) rename packages/linux/patches/rockchip/{rockchip-0037-FROMLIST-v1-drm-bridge-dw-hdmi-qp-Return-0-in-audio-.patch => rockchip-0038-FROMLIST-v1-drm-bridge-dw-hdmi-qp-Return-0-in-audio-.patch} (94%) rename packages/linux/patches/rockchip/{rockchip-0038-FROMLIST-v1-drm-bridge-synopsys-Do-not-warn-about-au.patch => rockchip-0039-FROMLIST-v1-drm-bridge-synopsys-Do-not-warn-about-au.patch} (88%) rename packages/linux/patches/rockchip/{rockchip-0039-FROMLIST-v1-arm64-dts-rockchip-use-MAC-TX-delay-for-.patch => rockchip-0040-FROMLIST-v1-arm64-dts-rockchip-use-MAC-TX-delay-for-.patch} (94%) rename packages/linux/patches/rockchip/{rockchip-0040-FROMLIST-v2-arm64-dts-rockchip-Fix-sound-output-from.patch => rockchip-0041-FROMLIST-v2-arm64-dts-rockchip-Fix-sound-output-from.patch} (90%) rename packages/linux/patches/rockchip/{rockchip-0041-FROMLIST-v2-thermal-rockchip-unify-struct-rockchip_t.patch => rockchip-0042-FROMLIST-v2-thermal-rockchip-unify-struct-rockchip_t.patch} (98%) rename packages/linux/patches/rockchip/{rockchip-0042-FROMLIST-v2-thermal-rockchip-shut-up-GRF-warning.patch => rockchip-0043-FROMLIST-v2-thermal-rockchip-shut-up-GRF-warning.patch} (97%) rename packages/linux/patches/rockchip/{rockchip-0043-FROMLIST-v2-dt-bindings-thermal-rockchip-tighten-grf.patch => rockchip-0044-FROMLIST-v2-dt-bindings-thermal-rockchip-tighten-grf.patch} (91%) rename packages/linux/patches/rockchip/{rockchip-0044-FROMLIST-v3-media-rkvdec-Add-HEVC-backend.patch => rockchip-0045-FROMLIST-v3-media-rkvdec-Add-HEVC-backend.patch} (99%) rename packages/linux/patches/rockchip/{rockchip-0045-FROMLIST-v3-media-rkvdec-Add-variants-support.patch => rockchip-0046-FROMLIST-v3-media-rkvdec-Add-variants-support.patch} (97%) rename packages/linux/patches/rockchip/{rockchip-0046-FROMLIST-v3-media-rkvdec-Implement-capability-filter.patch => rockchip-0047-FROMLIST-v3-media-rkvdec-Implement-capability-filter.patch} (97%) rename packages/linux/patches/rockchip/{rockchip-0047-FROMLIST-v3-media-rkvdec-Add-RK3288-variant.patch => rockchip-0048-FROMLIST-v3-media-rkvdec-Add-RK3288-variant.patch} (91%) rename packages/linux/patches/rockchip/{rockchip-0048-FROMLIST-v3-media-rkvdec-Disable-QoS-for-HEVC-and-VP.patch => rockchip-0049-FROMLIST-v3-media-rkvdec-Disable-QoS-for-HEVC-and-VP.patch} (97%) rename packages/linux/patches/rockchip/{rockchip-0049-FROMLIST-v3-media-dt-bindings-rockchip-vdec-Add-RK32.patch => rockchip-0050-FROMLIST-v3-media-dt-bindings-rockchip-vdec-Add-RK32.patch} (88%) rename packages/linux/patches/rockchip/{rockchip-0050-FROMLIST-v3-ARM-dts-rockchip-Add-vdec-node-for-RK328.patch => rockchip-0051-FROMLIST-v3-ARM-dts-rockchip-Add-vdec-node-for-RK328.patch} (93%) rename packages/linux/patches/rockchip/{rockchip-0051-FROMLIST-v4-drm-bridge-dw-hdmi-qp-Add-CEC-support.patch => rockchip-0052-FROMLIST-v4-drm-bridge-dw-hdmi-qp-Add-CEC-support.patch} (98%) rename packages/linux/patches/rockchip/{rockchip-0052-FROMLIST-v4-drm-bridge-dw-hdmi-qp-Fixup-timer-base-s.patch => rockchip-0053-FROMLIST-v4-drm-bridge-dw-hdmi-qp-Fixup-timer-base-s.patch} (95%) rename packages/linux/patches/rockchip/{rockchip-0053-FROMLIST-v4-drm-rockchip-dw_hdmi_qp-Improve-error-ha.patch => rockchip-0054-FROMLIST-v4-drm-rockchip-dw_hdmi_qp-Improve-error-ha.patch} (97%) rename packages/linux/patches/rockchip/{rockchip-0054-FROMLIST-v4-drm-rockchip-dw_hdmi_qp-Provide-CEC-IRQ-.patch => rockchip-0055-FROMLIST-v4-drm-rockchip-dw_hdmi_qp-Provide-CEC-IRQ-.patch} (89%) rename packages/linux/patches/rockchip/{rockchip-0055-FROMLIST-v4-drm-rockchip-dw_hdmi_qp-Provide-ref-cloc.patch => rockchip-0056-FROMLIST-v4-drm-rockchip-dw_hdmi_qp-Provide-ref-cloc.patch} (93%) rename packages/linux/patches/rockchip/{rockchip-0056-FROMLIST-v4-arm64-defconfig-Enable-DW-HDMI-QP-CEC-su.patch => rockchip-0057-FROMLIST-v4-arm64-defconfig-Enable-DW-HDMI-QP-CEC-su.patch} (86%) rename packages/linux/patches/rockchip/{rockchip-0057-FROMLIST-v2-drm-rockchip-vop2-Check-bpc-before-switc.patch => rockchip-0058-FROMLIST-v2-drm-rockchip-vop2-Check-bpc-before-switc.patch} (96%) rename packages/linux/patches/rockchip/{rockchip-0058-FROMLIST-v2-drm-bridge-dw-hdmi-qp-Handle-platform-su.patch => rockchip-0059-FROMLIST-v2-drm-bridge-dw-hdmi-qp-Handle-platform-su.patch} (95%) rename packages/linux/patches/rockchip/{rockchip-0059-FROMLIST-v2-drm-rockchip-dw_hdmi_qp-Switch-to-phy_co.patch => rockchip-0060-FROMLIST-v2-drm-rockchip-dw_hdmi_qp-Switch-to-phy_co.patch} (96%) rename packages/linux/patches/rockchip/{rockchip-0060-FROMLIST-v2-drm-rockchip-dw_hdmi_qp-Use-bit-macros-f.patch => rockchip-0061-FROMLIST-v2-drm-rockchip-dw_hdmi_qp-Use-bit-macros-f.patch} (93%) rename packages/linux/patches/rockchip/{rockchip-0061-FROMLIST-v2-drm-rockchip-dw_hdmi_qp-Add-high-color-d.patch => rockchip-0062-FROMLIST-v2-drm-rockchip-dw_hdmi_qp-Add-high-color-d.patch} (97%) rename packages/linux/patches/rockchip/{rockchip-0062-FROMLIST-v1-drm-rockchip-vop2-Add-delay-between-poll.patch => rockchip-0063-FROMLIST-v1-drm-rockchip-vop2-Add-delay-between-poll.patch} (91%) rename packages/linux/patches/rockchip/{rockchip-0063-FROMLIST-v1-drm-rockchip-vop2-Only-wait-for-changed-.patch => rockchip-0064-FROMLIST-v1-drm-rockchip-vop2-Only-wait-for-changed-.patch} (92%) rename packages/linux/patches/rockchip/{rockchip-0064-FROMLIST-v1-media-verisilicon-Export-only-needed-pix.patch => rockchip-0065-FROMLIST-v1-media-verisilicon-Export-only-needed-pix.patch} (94%) rename packages/linux/patches/rockchip/{rockchip-0065-FROMLIST-v2-media-verisilicon-Explicitly-disable-sel.patch => rockchip-0066-FROMLIST-v2-media-verisilicon-Explicitly-disable-sel.patch} (94%) rename packages/linux/patches/rockchip/{rockchip-0066-DETLEV-v3-bitmap-introduce-hardware-specific-bitfiel.patch => rockchip-0067-DETLEV-v3-bitmap-introduce-hardware-specific-bitfiel.patch} (96%) rename packages/linux/patches/rockchip/{rockchip-0067-DETLEV-v3-media-rkvdec-Switch-to-using-structs-inste.patch => rockchip-0068-DETLEV-v3-media-rkvdec-Switch-to-using-structs-inste.patch} (99%) rename packages/linux/patches/rockchip/{rockchip-0068-DETLEV-v3-media-rkvdec-Move-cabac-tables-to-their-ow.patch => rockchip-0069-DETLEV-v3-media-rkvdec-Move-cabac-tables-to-their-ow.patch} (99%) rename packages/linux/patches/rockchip/{rockchip-0069-DETLEV-v3-media-rkvdec-Use-structs-to-represent-the-.patch => rockchip-0070-DETLEV-v3-media-rkvdec-Use-structs-to-represent-the-.patch} (97%) rename packages/linux/patches/rockchip/{rockchip-0070-DETLEV-v3-media-rkvdec-Move-h264-functions-to-common.patch => rockchip-0071-DETLEV-v3-media-rkvdec-Move-h264-functions-to-common.patch} (99%) rename packages/linux/patches/rockchip/{rockchip-0071-DETLEV-v3-media-rkvdec-Move-hevc-functions-to-common.patch => rockchip-0072-DETLEV-v3-media-rkvdec-Move-hevc-functions-to-common.patch} (99%) rename packages/linux/patches/rockchip/{rockchip-0072-DETLEV-v3-media-rkvdec-Add-per-variant-configuration.patch => rockchip-0073-DETLEV-v3-media-rkvdec-Add-per-variant-configuration.patch} (97%) rename packages/linux/patches/rockchip/{rockchip-0073-DETLEV-v3-media-rkvdec-Add-RCB-and-SRAM-support.patch => rockchip-0074-DETLEV-v3-media-rkvdec-Add-RCB-and-SRAM-support.patch} (98%) rename packages/linux/patches/rockchip/{rockchip-0074-DETLEV-v3-media-rkvdec-Support-per-variant-interrupt.patch => rockchip-0075-DETLEV-v3-media-rkvdec-Support-per-variant-interrupt.patch} (94%) delete mode 100644 packages/linux/patches/rockchip/rockchip-0076-DETLEV-v3-media-rkvdec-Add-H264-support-for-the-VDPU.patch rename packages/linux/patches/rockchip/{rockchip-0075-DETLEV-v3-media-rkvdec-Enable-all-clocks-without-nam.patch => rockchip-0076-DETLEV-v3-media-rkvdec-Enable-all-clocks-without-nam.patch} (96%) create mode 100644 packages/linux/patches/rockchip/rockchip-0078-DETLEV-v3-media-rkvdec-Add-H264-support-for-the-VDPU.patch rename packages/linux/patches/rockchip/{rockchip-0078-DETLEV-v3-media-rkvdec-Add-HEVC-support-for-the-VDPU.patch => rockchip-0079-DETLEV-v3-media-rkvdec-Add-HEVC-support-for-the-VDPU.patch} (99%) rename packages/linux/patches/rockchip/{rockchip-0079-FROMLIST-v1-phy-rockchip-samsung-hdptx-Fix-reported-.patch => rockchip-0080-FROMLIST-v1-phy-rockchip-samsung-hdptx-Fix-reported-.patch} (95%) rename packages/linux/patches/rockchip/{rockchip-0080-FROMLIST-v1-phy-rockchip-samsung-hdptx-Reduce-ROPLL-.patch => rockchip-0081-FROMLIST-v1-phy-rockchip-samsung-hdptx-Reduce-ROPLL-.patch} (93%) rename packages/linux/patches/rockchip/{rockchip-0081-FROMLIST-v1-phy-rockchip-samsung-hdptx-Prevent-Inter.patch => rockchip-0082-FROMLIST-v1-phy-rockchip-samsung-hdptx-Prevent-Inter.patch} (93%) rename packages/linux/patches/rockchip/{rockchip-0082-FROMLIST-v4-phy-hdmi-Add-HDMI-2.1-FRL-configuration-.patch => rockchip-0083-FROMLIST-v4-phy-hdmi-Add-HDMI-2.1-FRL-configuration-.patch} (93%) rename packages/linux/patches/rockchip/{rockchip-0083-FROMLIST-v4-phy-rockchip-samsung-hdptx-Use-usleep_ra.patch => rockchip-0084-FROMLIST-v4-phy-rockchip-samsung-hdptx-Use-usleep_ra.patch} (89%) rename packages/linux/patches/rockchip/{rockchip-0084-FROMLIST-v4-phy-rockchip-samsung-hdptx-Fix-coding-st.patch => rockchip-0085-FROMLIST-v4-phy-rockchip-samsung-hdptx-Fix-coding-st.patch} (95%) rename packages/linux/patches/rockchip/{rockchip-0085-FROMLIST-v4-phy-rockchip-samsung-hdptx-Consistently-.patch => rockchip-0086-FROMLIST-v4-phy-rockchip-samsung-hdptx-Consistently-.patch} (98%) rename packages/linux/patches/rockchip/{rockchip-0086-FROMLIST-v4-phy-rockchip-samsung-hdptx-Enable-lane-o.patch => rockchip-0087-FROMLIST-v4-phy-rockchip-samsung-hdptx-Enable-lane-o.patch} (93%) rename packages/linux/patches/rockchip/{rockchip-0087-FROMLIST-v4-phy-rockchip-samsung-hdptx-Cleanup-_cmn_.patch => rockchip-0088-FROMLIST-v4-phy-rockchip-samsung-hdptx-Cleanup-_cmn_.patch} (97%) rename packages/linux/patches/rockchip/{rockchip-0088-FROMLIST-v4-phy-rockchip-samsung-hdptx-Compute-clk-r.patch => rockchip-0089-FROMLIST-v4-phy-rockchip-samsung-hdptx-Compute-clk-r.patch} (96%) rename packages/linux/patches/rockchip/{rockchip-0089-FROMLIST-v4-phy-rockchip-samsung-hdptx-Drop-hw_rate-.patch => rockchip-0090-FROMLIST-v4-phy-rockchip-samsung-hdptx-Drop-hw_rate-.patch} (94%) rename packages/linux/patches/rockchip/{rockchip-0090-FROMLIST-v4-phy-rockchip-samsung-hdptx-Switch-to-dri.patch => rockchip-0091-FROMLIST-v4-phy-rockchip-samsung-hdptx-Switch-to-dri.patch} (98%) rename packages/linux/patches/rockchip/{rockchip-0091-FROMLIST-v4-phy-rockchip-samsung-hdptx-Extend-rk_hdp.patch => rockchip-0092-FROMLIST-v4-phy-rockchip-samsung-hdptx-Extend-rk_hdp.patch} (96%) rename packages/linux/patches/rockchip/{rockchip-0092-FROMLIST-v4-phy-rockchip-samsung-hdptx-Add-HDMI-2.1-.patch => rockchip-0093-FROMLIST-v4-phy-rockchip-samsung-hdptx-Add-HDMI-2.1-.patch} (99%) rename packages/linux/patches/rockchip/{rockchip-0093-FROMLIST-v1-drm-Add-CRTC-background-color-property.patch => rockchip-0094-FROMLIST-v1-drm-Add-CRTC-background-color-property.patch} (98%) rename packages/linux/patches/rockchip/{rockchip-0094-FROMLIST-v1-drm-rockchip-vop2-Support-setting-custom.patch => rockchip-0095-FROMLIST-v1-drm-rockchip-vop2-Support-setting-custom.patch} (96%) rename packages/linux/patches/rockchip/{rockchip-0095-WIP-SCRAMB-drm-bridge-Add-detect_ctx-hook.patch => rockchip-0096-WIP-SCRAMB-drm-bridge-Add-detect_ctx-hook.patch} (93%) rename packages/linux/patches/rockchip/{rockchip-0096-WIP-SCRAMB-drm-bridge-connector-Switch-from-detect-t.patch => rockchip-0097-WIP-SCRAMB-drm-bridge-connector-Switch-from-detect-t.patch} (97%) rename packages/linux/patches/rockchip/{rockchip-0097-WIP-SCRAMB-drm-bridge-dw-hdmi-qp-Add-high-TMDS-clock.patch => rockchip-0098-WIP-SCRAMB-drm-bridge-dw-hdmi-qp-Add-high-TMDS-clock.patch} (98%) rename packages/linux/patches/rockchip/{rockchip-0098-WIP-YUV420-drm-rockchip-vop2-Add-YUV420-output-forma.patch => rockchip-0099-WIP-YUV420-drm-rockchip-vop2-Add-YUV420-output-forma.patch} (97%) rename packages/linux/patches/rockchip/{rockchip-0099-WIP-YUV420-drm-rockchip-dw_hdmi_qp-Add-YUV420-output.patch => rockchip-0100-WIP-YUV420-drm-rockchip-dw_hdmi_qp-Add-YUV420-output.patch} (96%) rename packages/linux/patches/rockchip/{rockchip-0100-WIP-FRL-dt-bindings-display-rockchip-Add-tmds-enable.patch => rockchip-0101-WIP-FRL-dt-bindings-display-rockchip-Add-tmds-enable.patch} (94%) rename packages/linux/patches/rockchip/{rockchip-0101-WIP-FRL-drm-rockchip-dw_hdmi_qp-Fixup-usage-of-enabl.patch => rockchip-0102-WIP-FRL-drm-rockchip-dw_hdmi_qp-Fixup-usage-of-enabl.patch} (95%) rename packages/linux/patches/rockchip/{rockchip-0102-WIP-FRL-arm64-dts-rockchip-Add-tmds-enable-gpios-to-.patch => rockchip-0103-WIP-FRL-arm64-dts-rockchip-Add-tmds-enable-gpios-to-.patch} (90%) rename packages/linux/patches/rockchip/{rockchip-0103-WIP-FRL-arm64-dts-rockchip-Assign-ACLK_VOP-to-750-MH.patch => rockchip-0104-WIP-FRL-arm64-dts-rockchip-Assign-ACLK_VOP-to-750-MH.patch} (91%) rename packages/linux/patches/rockchip/{rockchip-0104-WIP-FRL-drm-connector-hdmi-Handle-FRL-in-hdmi_clock_.patch => rockchip-0105-WIP-FRL-drm-connector-hdmi-Handle-FRL-in-hdmi_clock_.patch} (90%) rename packages/linux/patches/rockchip/{rockchip-0105-WIP-FRL-drm-bridge-dw-hdmi-qp-Add-HDMI-2.1-FRL-suppo.patch => rockchip-0106-WIP-FRL-drm-bridge-dw-hdmi-qp-Add-HDMI-2.1-FRL-suppo.patch} (99%) rename packages/linux/patches/rockchip/{rockchip-0106-WIP-FRL-drm-rockchip-dw_hdmi_qp-Add-HDMI-2.1-FRL-sup.patch => rockchip-0107-WIP-FRL-drm-rockchip-dw_hdmi_qp-Add-HDMI-2.1-FRL-sup.patch} (98%) rename packages/linux/patches/rockchip/{rockchip-0107-WIP-FRL-drm-rockchip-vop2-Add-HDMI-2.1-FRL-support.patch => rockchip-0108-WIP-FRL-drm-rockchip-vop2-Add-HDMI-2.1-FRL-support.patch} (85%) delete mode 100644 packages/linux/patches/rockchip/rockchip-0109-FROMLIST-v1-pmdomain-core-Restore-behaviour-for-disa.patch rename packages/linux/patches/rockchip/{rockchip-0108-WIP-arm64-dts-rockchip-add-pcie-wifi-support-to-Oran.patch => rockchip-0109-WIP-arm64-dts-rockchip-add-pcie-wifi-support-to-Oran.patch} (92%) delete mode 100644 packages/linux/patches/rockchip/rockchip-0110-FROMLIST-v1-pmdomain-rockchip-Fix-regulator-dependen.patch create mode 100644 packages/linux/patches/rockchip/rockchip-0110-WIP-media-dt-bindings-rockchip-Add-RK3568-Video-Deco.patch create mode 100644 packages/linux/patches/rockchip/rockchip-0111-WIP-media-rkvdec-Add-support-for-the-VDPU346-variant.patch create mode 100644 packages/linux/patches/rockchip/rockchip-0112-WIP-arm64-dts-rockchip-Add-the-vdpu346-Video-Decoder.patch create mode 100644 packages/linux/patches/rockchip/rockchip-0113-media-rkvdec-minor-fixes-for-current-DETLEV-patches.patch diff --git a/packages/linux/package.mk b/packages/linux/package.mk index c8fd0209ee..8001bcbb5c 100644 --- a/packages/linux/package.mk +++ b/packages/linux/package.mk @@ -30,8 +30,8 @@ case "${LINUX}" in PKG_PATCH_DIRS="raspberrypi rtlwifi/6.13 rtlwifi/6.14 rtlwifi/6.15 rtlwifi/6.17" ;; rockchip) - PKG_VERSION="f83ec76bf285bea5727f478a68b894f5543ca76e" # 6.17-rc6 - PKG_SHA256="e3fc0d538db1085d756041190b5245b49a10e9b665a633c2539ea1515c328fb6" + PKG_VERSION="07e27ad16399afcd693be20211b0dfae63e0615f" # 6.17-rc7 + PKG_SHA256="098609cc94a84dd05e1054d43f9a7c335a61edb06093d4f23bcdefa7be24c1ec" PKG_URL="https://github.com/chewitt/linux/archive/${PKG_VERSION}.tar.gz" PKG_SOURCE_NAME="linux-${LINUX}-${PKG_VERSION}.tar.gz" PKG_PATCH_DIRS="default rockchip rtlwifi/6.17" diff --git a/packages/linux/patches/rockchip/rockchip-0001-LOCAL-arm64-fix-Kodi-sysinfo-CPU-information.patch b/packages/linux/patches/rockchip/rockchip-0001-LOCAL-arm64-fix-Kodi-sysinfo-CPU-information.patch index a62c31bd23..15d092e6ff 100644 --- a/packages/linux/patches/rockchip/rockchip-0001-LOCAL-arm64-fix-Kodi-sysinfo-CPU-information.patch +++ b/packages/linux/patches/rockchip/rockchip-0001-LOCAL-arm64-fix-Kodi-sysinfo-CPU-information.patch @@ -1,7 +1,7 @@ -From e2b420ac5392f83c7998d613af6bc4da1b3af596 Mon Sep 17 00:00:00 2001 +From b8b378bfe4e9d40d4e9801682147a845590da92e Mon Sep 17 00:00:00 2001 From: Christian Hewitt Date: Sat, 13 Apr 2019 05:45:18 +0000 -Subject: [PATCH 001/110] LOCAL: arm64: fix Kodi sysinfo CPU information +Subject: [PATCH 001/113] LOCAL: arm64: fix Kodi sysinfo CPU information This allows the CPU information to show in the Kodi sysinfo screen, e.g. diff --git a/packages/linux/patches/rockchip/rockchip-0002-LOCAL-arm64-dts-rockchip-rock5b-disable-sdio-node.patch b/packages/linux/patches/rockchip/rockchip-0002-LOCAL-arm64-dts-rockchip-rock5b-disable-sdio-node.patch index b8818ff106..cf137c3156 100644 --- a/packages/linux/patches/rockchip/rockchip-0002-LOCAL-arm64-dts-rockchip-rock5b-disable-sdio-node.patch +++ b/packages/linux/patches/rockchip/rockchip-0002-LOCAL-arm64-dts-rockchip-rock5b-disable-sdio-node.patch @@ -1,7 +1,7 @@ -From 65cbc57d995a081c9298f3b8e192435a5141f712 Mon Sep 17 00:00:00 2001 +From 9014a9ff589593c21b9550c1f367561fcf14e0cb Mon Sep 17 00:00:00 2001 From: Christian Hewitt Date: Wed, 16 Jul 2025 11:03:09 +0000 -Subject: [PATCH 002/110] LOCAL: arm64: dts: rockchip: rock5b: disable sdio +Subject: [PATCH 002/113] LOCAL: arm64: dts: rockchip: rock5b: disable sdio node Radxa ships an M2 compatible WiFi module with PCIe wired RTL8852BE diff --git a/packages/linux/patches/rockchip/rockchip-0003-LOCAL-drm-rockchip-vop2-rk3588-change-Esmart-Cluster.patch b/packages/linux/patches/rockchip/rockchip-0003-LOCAL-drm-rockchip-vop2-rk3588-change-Esmart-Cluster.patch index a0fdb9afda..11b76f1176 100644 --- a/packages/linux/patches/rockchip/rockchip-0003-LOCAL-drm-rockchip-vop2-rk3588-change-Esmart-Cluster.patch +++ b/packages/linux/patches/rockchip/rockchip-0003-LOCAL-drm-rockchip-vop2-rk3588-change-Esmart-Cluster.patch @@ -1,7 +1,7 @@ -From ce0673810ea6c224a5ea5afafd3b6c3f24011bb5 Mon Sep 17 00:00:00 2001 +From 7208a81ed270156cca1df8ed6e7c4d5c2510d070 Mon Sep 17 00:00:00 2001 From: Christian Hewitt Date: Wed, 16 Jul 2025 05:09:07 +0000 -Subject: [PATCH 003/110] LOCAL: drm/rockchip: vop2: rk3588: change +Subject: [PATCH 003/113] LOCAL: drm/rockchip: vop2: rk3588: change Esmart/Cluster ordering Order Esmart planes before Cluster planes so Kodi (which currently diff --git a/packages/linux/patches/rockchip/rockchip-0004-LOCAL-drm-rockchip-vop2-rk3568-change-Esmart-Cluster.patch b/packages/linux/patches/rockchip/rockchip-0004-LOCAL-drm-rockchip-vop2-rk3568-change-Esmart-Cluster.patch new file mode 100644 index 0000000000..3af524ddfa --- /dev/null +++ b/packages/linux/patches/rockchip/rockchip-0004-LOCAL-drm-rockchip-vop2-rk3568-change-Esmart-Cluster.patch @@ -0,0 +1,95 @@ +From 6c92a6c587ea30abd4eeab4e787ec537ce7f4279 Mon Sep 17 00:00:00 2001 +From: Christian Hewitt +Date: Wed, 17 Sep 2025 11:17:20 +0000 +Subject: [PATCH 004/113] LOCAL: drm/rockchip: vop2: rk3568: change + Esmart/Cluster/Smart ordering + +Order Esmart planes before Cluster planes and Smart planes so Kodi +(which currently lacks the ability to dymanically order planes using +zpos) can show the OSD on-top of Video rather then behind. + +Suggested-by: Jonas Karlman +Signed-off-by: Christian Hewitt +--- + drivers/gpu/drm/rockchip/rockchip_vop2_reg.c | 58 ++++++++++---------- + 1 file changed, 29 insertions(+), 29 deletions(-) + +diff --git a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c +index 42a4833a90a3..e11df91b90a6 100644 +--- a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c ++++ b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c +@@ -594,35 +594,6 @@ static const struct vop2_video_port_data rk3568_vop_video_ports[] = { + */ + static const struct vop2_win_data rk3568_vop_win_data[] = { + { +- .name = "Smart0-win0", +- .phys_id = ROCKCHIP_VOP2_SMART0, +- .base = 0x1c00, +- .possible_vp_mask = BIT(0) | BIT(1) | BIT(2), +- .formats = formats_smart, +- .nformats = ARRAY_SIZE(formats_smart), +- .format_modifiers = format_modifiers, +- /* 0xf means this layer can't attached to this VP */ +- .layer_sel_id = { 3, 3, 3, 0xf }, +- .supported_rotations = DRM_MODE_REFLECT_Y, +- .type = DRM_PLANE_TYPE_PRIMARY, +- .max_upscale_factor = 8, +- .max_downscale_factor = 8, +- .dly = { 20, 47, 41 }, +- }, { +- .name = "Smart1-win0", +- .phys_id = ROCKCHIP_VOP2_SMART1, +- .possible_vp_mask = BIT(0) | BIT(1) | BIT(2), +- .formats = formats_smart, +- .nformats = ARRAY_SIZE(formats_smart), +- .format_modifiers = format_modifiers, +- .base = 0x1e00, +- .layer_sel_id = { 7, 7, 7, 0xf }, +- .supported_rotations = DRM_MODE_REFLECT_Y, +- .type = DRM_PLANE_TYPE_PRIMARY, +- .max_upscale_factor = 8, +- .max_downscale_factor = 8, +- .dly = { 20, 47, 41 }, +- }, { + .name = "Esmart1-win0", + .phys_id = ROCKCHIP_VOP2_ESMART1, + .possible_vp_mask = BIT(0) | BIT(1) | BIT(2), +@@ -682,6 +653,35 @@ static const struct vop2_win_data rk3568_vop_win_data[] = { + .max_downscale_factor = 4, + .dly = { 0, 27, 21 }, + .feature = WIN_FEATURE_AFBDC | WIN_FEATURE_CLUSTER, ++ }, { ++ .name = "Smart0-win0", ++ .phys_id = ROCKCHIP_VOP2_SMART0, ++ .base = 0x1c00, ++ .possible_vp_mask = BIT(0) | BIT(1) | BIT(2), ++ .formats = formats_smart, ++ .nformats = ARRAY_SIZE(formats_smart), ++ .format_modifiers = format_modifiers, ++ /* 0xf means this layer can't attached to this VP */ ++ .layer_sel_id = { 3, 3, 3, 0xf }, ++ .supported_rotations = DRM_MODE_REFLECT_Y, ++ .type = DRM_PLANE_TYPE_PRIMARY, ++ .max_upscale_factor = 8, ++ .max_downscale_factor = 8, ++ .dly = { 20, 47, 41 }, ++ }, { ++ .name = "Smart1-win0", ++ .phys_id = ROCKCHIP_VOP2_SMART1, ++ .possible_vp_mask = BIT(0) | BIT(1) | BIT(2), ++ .formats = formats_smart, ++ .nformats = ARRAY_SIZE(formats_smart), ++ .format_modifiers = format_modifiers, ++ .base = 0x1e00, ++ .layer_sel_id = { 7, 7, 7, 0xf }, ++ .supported_rotations = DRM_MODE_REFLECT_Y, ++ .type = DRM_PLANE_TYPE_PRIMARY, ++ .max_upscale_factor = 8, ++ .max_downscale_factor = 8, ++ .dly = { 20, 47, 41 }, + }, + }; + +-- +2.34.1 + diff --git a/packages/linux/patches/rockchip/rockchip-0004-FROMGIT-6.18-media-uapi-HEVC-Add-v4l2_ctrl_hevc_ext_.patch b/packages/linux/patches/rockchip/rockchip-0005-FROMGIT-6.18-media-uapi-HEVC-Add-v4l2_ctrl_hevc_ext_.patch similarity index 98% rename from packages/linux/patches/rockchip/rockchip-0004-FROMGIT-6.18-media-uapi-HEVC-Add-v4l2_ctrl_hevc_ext_.patch rename to packages/linux/patches/rockchip/rockchip-0005-FROMGIT-6.18-media-uapi-HEVC-Add-v4l2_ctrl_hevc_ext_.patch index ff1c4064d3..7190fef85c 100644 --- a/packages/linux/patches/rockchip/rockchip-0004-FROMGIT-6.18-media-uapi-HEVC-Add-v4l2_ctrl_hevc_ext_.patch +++ b/packages/linux/patches/rockchip/rockchip-0005-FROMGIT-6.18-media-uapi-HEVC-Add-v4l2_ctrl_hevc_ext_.patch @@ -1,7 +1,7 @@ -From d2b936034b54c68dad7ea5a992516f00fcf25872 Mon Sep 17 00:00:00 2001 +From b5292c1fca4b9523d224ac947261173f73136fd4 Mon Sep 17 00:00:00 2001 From: Detlev Casanova Date: Thu, 24 Jul 2025 14:10:18 -0400 -Subject: [PATCH 004/110] FROMGIT(6.18): media: uapi: HEVC: Add +Subject: [PATCH 005/113] FROMGIT(6.18): media: uapi: HEVC: Add v4l2_ctrl_hevc_ext_sps_[ls]t_rps controls Some hardware (e.g.: Rockchip's rk3588 hevc decoder) need the diff --git a/packages/linux/patches/rockchip/rockchip-0005-FROMGIT-6.18-media-v4l2-ctrls-Add-hevc_ext_sps_-ls-t.patch b/packages/linux/patches/rockchip/rockchip-0006-FROMGIT-6.18-media-v4l2-ctrls-Add-hevc_ext_sps_-ls-t.patch similarity index 98% rename from packages/linux/patches/rockchip/rockchip-0005-FROMGIT-6.18-media-v4l2-ctrls-Add-hevc_ext_sps_-ls-t.patch rename to packages/linux/patches/rockchip/rockchip-0006-FROMGIT-6.18-media-v4l2-ctrls-Add-hevc_ext_sps_-ls-t.patch index 1bffac3e0d..f2a8821921 100644 --- a/packages/linux/patches/rockchip/rockchip-0005-FROMGIT-6.18-media-v4l2-ctrls-Add-hevc_ext_sps_-ls-t.patch +++ b/packages/linux/patches/rockchip/rockchip-0006-FROMGIT-6.18-media-v4l2-ctrls-Add-hevc_ext_sps_-ls-t.patch @@ -1,7 +1,7 @@ -From 05f5cd65c1561cc55cf6ec54023f88466d286028 Mon Sep 17 00:00:00 2001 +From 081a347e0bd349cd7c1cfcec1b0610e86f5f128c Mon Sep 17 00:00:00 2001 From: Detlev Casanova Date: Thu, 24 Jul 2025 14:10:19 -0400 -Subject: [PATCH 005/110] FROMGIT(6.18): media: v4l2-ctrls: Add +Subject: [PATCH 006/113] FROMGIT(6.18): media: v4l2-ctrls: Add hevc_ext_sps_[ls]t_rps controls The vdpu381 decoder found on newer Rockchip SoC need the information diff --git a/packages/linux/patches/rockchip/rockchip-0006-FROMGIT-6.18-arm64-dts-rockchip-Add-the-vdpu381-Vide.patch b/packages/linux/patches/rockchip/rockchip-0007-FROMGIT-6.18-arm64-dts-rockchip-Add-the-vdpu381-Vide.patch similarity index 96% rename from packages/linux/patches/rockchip/rockchip-0006-FROMGIT-6.18-arm64-dts-rockchip-Add-the-vdpu381-Vide.patch rename to packages/linux/patches/rockchip/rockchip-0007-FROMGIT-6.18-arm64-dts-rockchip-Add-the-vdpu381-Vide.patch index d1fed85233..03dca4f000 100644 --- a/packages/linux/patches/rockchip/rockchip-0006-FROMGIT-6.18-arm64-dts-rockchip-Add-the-vdpu381-Vide.patch +++ b/packages/linux/patches/rockchip/rockchip-0007-FROMGIT-6.18-arm64-dts-rockchip-Add-the-vdpu381-Vide.patch @@ -1,7 +1,7 @@ -From bc692341b1da628b580b01a9fd5ae59bf6d1da22 Mon Sep 17 00:00:00 2001 +From a8c11ce34a3526c1f1bd528e700ac4ffab28a821 Mon Sep 17 00:00:00 2001 From: Detlev Casanova Date: Mon, 23 Jun 2025 12:07:17 -0400 -Subject: [PATCH 006/110] FROMGIT(6.18): arm64: dts: rockchip: Add the vdpu381 +Subject: [PATCH 007/113] FROMGIT(6.18): arm64: dts: rockchip: Add the vdpu381 Video Decoders on RK3588 Add the vdpu381 Video Decoders to the rk3588-base devicetree. diff --git a/packages/linux/patches/rockchip/rockchip-0007-FROMGIT-6.18-arm64-dts-rockchip-Add-the-vdpu383-Vide.patch b/packages/linux/patches/rockchip/rockchip-0008-FROMGIT-6.18-arm64-dts-rockchip-Add-the-vdpu383-Vide.patch similarity index 95% rename from packages/linux/patches/rockchip/rockchip-0007-FROMGIT-6.18-arm64-dts-rockchip-Add-the-vdpu383-Vide.patch rename to packages/linux/patches/rockchip/rockchip-0008-FROMGIT-6.18-arm64-dts-rockchip-Add-the-vdpu383-Vide.patch index 0cab1fbc8c..f31a36dce9 100644 --- a/packages/linux/patches/rockchip/rockchip-0007-FROMGIT-6.18-arm64-dts-rockchip-Add-the-vdpu383-Vide.patch +++ b/packages/linux/patches/rockchip/rockchip-0008-FROMGIT-6.18-arm64-dts-rockchip-Add-the-vdpu383-Vide.patch @@ -1,7 +1,7 @@ -From d5f7dbd36b24426c2b826f25ebd1016ecc7ce066 Mon Sep 17 00:00:00 2001 +From 720d2af42c13b1da8e9a3974697e9906d2535b6c Mon Sep 17 00:00:00 2001 From: Detlev Casanova Date: Mon, 23 Jun 2025 12:07:18 -0400 -Subject: [PATCH 007/110] FROMGIT(6.18): arm64: dts: rockchip: Add the vdpu383 +Subject: [PATCH 008/113] FROMGIT(6.18): arm64: dts: rockchip: Add the vdpu383 Video Decoder on rk3576 Add the vdpu383 Video Decoder variant to the RK3576 device tree. diff --git a/packages/linux/patches/rockchip/rockchip-0008-FROMGIT-6.18-arm64-dts-rockchip-Enable-HDMI-audio-ou.patch b/packages/linux/patches/rockchip/rockchip-0009-FROMGIT-6.18-arm64-dts-rockchip-Enable-HDMI-audio-ou.patch similarity index 88% rename from packages/linux/patches/rockchip/rockchip-0008-FROMGIT-6.18-arm64-dts-rockchip-Enable-HDMI-audio-ou.patch rename to packages/linux/patches/rockchip/rockchip-0009-FROMGIT-6.18-arm64-dts-rockchip-Enable-HDMI-audio-ou.patch index beb5efe46a..5d3e757b72 100644 --- a/packages/linux/patches/rockchip/rockchip-0008-FROMGIT-6.18-arm64-dts-rockchip-Enable-HDMI-audio-ou.patch +++ b/packages/linux/patches/rockchip/rockchip-0009-FROMGIT-6.18-arm64-dts-rockchip-Enable-HDMI-audio-ou.patch @@ -1,7 +1,7 @@ -From e6f16c9515b560a3a96d73c1bcf3171adebf690f Mon Sep 17 00:00:00 2001 +From bb3b472271a88205c003910c06021164934f8cc0 Mon Sep 17 00:00:00 2001 From: Anton Kirilov Date: Thu, 7 Aug 2025 18:00:11 +0100 -Subject: [PATCH 008/110] FROMGIT(6.18): arm64: dts: rockchip: Enable HDMI +Subject: [PATCH 009/113] FROMGIT(6.18): arm64: dts: rockchip: Enable HDMI audio output for NanoPi R6C/R6S Enable HDMI audio output for FriendlyElec NanoPi R6C/R6S boards. diff --git a/packages/linux/patches/rockchip/rockchip-0009-FROMGIT-6.18-arm64-dts-rockchip-Enable-the-NPU-on-Na.patch b/packages/linux/patches/rockchip/rockchip-0010-FROMGIT-6.18-arm64-dts-rockchip-Enable-the-NPU-on-Na.patch similarity index 91% rename from packages/linux/patches/rockchip/rockchip-0009-FROMGIT-6.18-arm64-dts-rockchip-Enable-the-NPU-on-Na.patch rename to packages/linux/patches/rockchip/rockchip-0010-FROMGIT-6.18-arm64-dts-rockchip-Enable-the-NPU-on-Na.patch index 58a5142eb1..5e46f71e55 100644 --- a/packages/linux/patches/rockchip/rockchip-0009-FROMGIT-6.18-arm64-dts-rockchip-Enable-the-NPU-on-Na.patch +++ b/packages/linux/patches/rockchip/rockchip-0010-FROMGIT-6.18-arm64-dts-rockchip-Enable-the-NPU-on-Na.patch @@ -1,7 +1,7 @@ -From ff036ee4ef16c474a987237522fdfc1beab0d332 Mon Sep 17 00:00:00 2001 +From aec7c78207833afedef46bae72f2596bed0c9ba0 Mon Sep 17 00:00:00 2001 From: Anton Kirilov Date: Wed, 27 Aug 2025 15:22:10 +0100 -Subject: [PATCH 009/110] FROMGIT(6.18): arm64: dts: rockchip: Enable the NPU +Subject: [PATCH 010/113] FROMGIT(6.18): arm64: dts: rockchip: Enable the NPU on NanoPi R6C/R6S Enable the NPU on FriendlyElec NanoPi R6C/R6S boards. diff --git a/packages/linux/patches/rockchip/rockchip-0010-FROMGIT-6.18-accel-rocket-Add-registers-header.patch b/packages/linux/patches/rockchip/rockchip-0011-FROMGIT-6.18-accel-rocket-Add-registers-header.patch similarity index 99% rename from packages/linux/patches/rockchip/rockchip-0010-FROMGIT-6.18-accel-rocket-Add-registers-header.patch rename to packages/linux/patches/rockchip/rockchip-0011-FROMGIT-6.18-accel-rocket-Add-registers-header.patch index a9bcd9278e..bc5c6052ec 100644 --- a/packages/linux/patches/rockchip/rockchip-0010-FROMGIT-6.18-accel-rocket-Add-registers-header.patch +++ b/packages/linux/patches/rockchip/rockchip-0011-FROMGIT-6.18-accel-rocket-Add-registers-header.patch @@ -1,7 +1,7 @@ -From 0a1f97d8603d3ab28fbca990d9fb3b6acab9f70f Mon Sep 17 00:00:00 2001 +From 1bfa0435b166d9ab892fe5319b41afa4a34f7644 Mon Sep 17 00:00:00 2001 From: Tomeu Vizoso Date: Mon, 21 Jul 2025 11:17:28 +0200 -Subject: [PATCH 010/110] FROMGIT(6.18): accel/rocket: Add registers header +Subject: [PATCH 011/113] FROMGIT(6.18): accel/rocket: Add registers header A XML file was generated with the data from the TRM, and then this header was generated from it. diff --git a/packages/linux/patches/rockchip/rockchip-0011-FROMGIT-6.18-accel-rocket-Add-a-new-driver-for-Rockc.patch b/packages/linux/patches/rockchip/rockchip-0012-FROMGIT-6.18-accel-rocket-Add-a-new-driver-for-Rockc.patch similarity index 99% rename from packages/linux/patches/rockchip/rockchip-0011-FROMGIT-6.18-accel-rocket-Add-a-new-driver-for-Rockc.patch rename to packages/linux/patches/rockchip/rockchip-0012-FROMGIT-6.18-accel-rocket-Add-a-new-driver-for-Rockc.patch index 47ec8a9f3a..b4a454a700 100644 --- a/packages/linux/patches/rockchip/rockchip-0011-FROMGIT-6.18-accel-rocket-Add-a-new-driver-for-Rockc.patch +++ b/packages/linux/patches/rockchip/rockchip-0012-FROMGIT-6.18-accel-rocket-Add-a-new-driver-for-Rockc.patch @@ -1,7 +1,7 @@ -From 07ed07d49bf8fb709a4e06fb98b50325fa38c6b4 Mon Sep 17 00:00:00 2001 +From 5d8fb8343951f599a0a4096e667e177452408beb Mon Sep 17 00:00:00 2001 From: Tomeu Vizoso Date: Mon, 21 Jul 2025 11:17:29 +0200 -Subject: [PATCH 011/110] FROMGIT(6.18): accel/rocket: Add a new driver for +Subject: [PATCH 012/113] FROMGIT(6.18): accel/rocket: Add a new driver for Rockchip's NPU This initial version supports the NPU as shipped in the RK3588 SoC and @@ -79,7 +79,7 @@ index 000000000000..70f97bccf100 + +* RK3588 diff --git a/MAINTAINERS b/MAINTAINERS -index f6206963efbf..8e1c8da14af1 100644 +index 520fb4e379a3..afddc0e6dba3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -7497,6 +7497,16 @@ T: git https://gitlab.freedesktop.org/drm/misc/kernel.git diff --git a/packages/linux/patches/rockchip/rockchip-0012-FROMGIT-6.18-accel-rocket-Add-IOCTL-for-BO-creation.patch b/packages/linux/patches/rockchip/rockchip-0013-FROMGIT-6.18-accel-rocket-Add-IOCTL-for-BO-creation.patch similarity index 98% rename from packages/linux/patches/rockchip/rockchip-0012-FROMGIT-6.18-accel-rocket-Add-IOCTL-for-BO-creation.patch rename to packages/linux/patches/rockchip/rockchip-0013-FROMGIT-6.18-accel-rocket-Add-IOCTL-for-BO-creation.patch index 14427bf37d..a0a4345354 100644 --- a/packages/linux/patches/rockchip/rockchip-0012-FROMGIT-6.18-accel-rocket-Add-IOCTL-for-BO-creation.patch +++ b/packages/linux/patches/rockchip/rockchip-0013-FROMGIT-6.18-accel-rocket-Add-IOCTL-for-BO-creation.patch @@ -1,7 +1,7 @@ -From 0bd0e1ec74a2e2fcf9bb7b0ba22bc747ad4cbb29 Mon Sep 17 00:00:00 2001 +From 813a3301bcdc5ef460031f278923cac4ee2e23af Mon Sep 17 00:00:00 2001 From: Tomeu Vizoso Date: Mon, 21 Jul 2025 11:17:30 +0200 -Subject: [PATCH 012/110] FROMGIT(6.18): accel/rocket: Add IOCTL for BO +Subject: [PATCH 013/113] FROMGIT(6.18): accel/rocket: Add IOCTL for BO creation This uses the SHMEM DRM helpers and we map right away to the CPU and NPU diff --git a/packages/linux/patches/rockchip/rockchip-0013-FROMGIT-6.18-accel-rocket-Add-job-submission-IOCTL.patch b/packages/linux/patches/rockchip/rockchip-0014-FROMGIT-6.18-accel-rocket-Add-job-submission-IOCTL.patch similarity index 99% rename from packages/linux/patches/rockchip/rockchip-0013-FROMGIT-6.18-accel-rocket-Add-job-submission-IOCTL.patch rename to packages/linux/patches/rockchip/rockchip-0014-FROMGIT-6.18-accel-rocket-Add-job-submission-IOCTL.patch index f31ea9b131..dd96b3353f 100644 --- a/packages/linux/patches/rockchip/rockchip-0013-FROMGIT-6.18-accel-rocket-Add-job-submission-IOCTL.patch +++ b/packages/linux/patches/rockchip/rockchip-0014-FROMGIT-6.18-accel-rocket-Add-job-submission-IOCTL.patch @@ -1,7 +1,7 @@ -From e316e0fb36f7c86f2153ab0c41aa352510bb851e Mon Sep 17 00:00:00 2001 +From 5dbbb8b2d787514846fa3eae7a6cc71f44cecea2 Mon Sep 17 00:00:00 2001 From: Tomeu Vizoso Date: Mon, 21 Jul 2025 11:17:31 +0200 -Subject: [PATCH 013/110] FROMGIT(6.18): accel/rocket: Add job submission IOCTL +Subject: [PATCH 014/113] FROMGIT(6.18): accel/rocket: Add job submission IOCTL Using the DRM GPU scheduler infrastructure, with a scheduler for each core. diff --git a/packages/linux/patches/rockchip/rockchip-0014-FROMGIT-6.18-accel-rocket-Add-IOCTLs-for-synchronizi.patch b/packages/linux/patches/rockchip/rockchip-0015-FROMGIT-6.18-accel-rocket-Add-IOCTLs-for-synchronizi.patch similarity index 97% rename from packages/linux/patches/rockchip/rockchip-0014-FROMGIT-6.18-accel-rocket-Add-IOCTLs-for-synchronizi.patch rename to packages/linux/patches/rockchip/rockchip-0015-FROMGIT-6.18-accel-rocket-Add-IOCTLs-for-synchronizi.patch index 052fc37532..65712d54a7 100644 --- a/packages/linux/patches/rockchip/rockchip-0014-FROMGIT-6.18-accel-rocket-Add-IOCTLs-for-synchronizi.patch +++ b/packages/linux/patches/rockchip/rockchip-0015-FROMGIT-6.18-accel-rocket-Add-IOCTLs-for-synchronizi.patch @@ -1,7 +1,7 @@ -From 931a81d1237851c708cc491fbec6bb89427e3ece Mon Sep 17 00:00:00 2001 +From ac1953e73acf76881f50b99c4ab2fa32a650d9c0 Mon Sep 17 00:00:00 2001 From: Tomeu Vizoso Date: Mon, 21 Jul 2025 11:17:32 +0200 -Subject: [PATCH 014/110] FROMGIT(6.18): accel/rocket: Add IOCTLs for +Subject: [PATCH 015/113] FROMGIT(6.18): accel/rocket: Add IOCTLs for synchronizing memory accesses The NPU cores have their own access to the memory bus, and this isn't diff --git a/packages/linux/patches/rockchip/rockchip-0015-FROMGIT-6.18-dt-bindings-npu-rockchip-rknn-Add-bindi.patch b/packages/linux/patches/rockchip/rockchip-0016-FROMGIT-6.18-dt-bindings-npu-rockchip-rknn-Add-bindi.patch similarity index 96% rename from packages/linux/patches/rockchip/rockchip-0015-FROMGIT-6.18-dt-bindings-npu-rockchip-rknn-Add-bindi.patch rename to packages/linux/patches/rockchip/rockchip-0016-FROMGIT-6.18-dt-bindings-npu-rockchip-rknn-Add-bindi.patch index d1de70a360..dc19f2a83e 100644 --- a/packages/linux/patches/rockchip/rockchip-0015-FROMGIT-6.18-dt-bindings-npu-rockchip-rknn-Add-bindi.patch +++ b/packages/linux/patches/rockchip/rockchip-0016-FROMGIT-6.18-dt-bindings-npu-rockchip-rknn-Add-bindi.patch @@ -1,7 +1,7 @@ -From fcb2dac8a2a8889747b13efd52bc695c41016593 Mon Sep 17 00:00:00 2001 +From 3bfdfe881fc39e2751951854267b45394633879e Mon Sep 17 00:00:00 2001 From: Tomeu Vizoso Date: Mon, 21 Jul 2025 11:17:33 +0200 -Subject: [PATCH 015/110] FROMGIT(6.18): dt-bindings: npu: rockchip,rknn: Add +Subject: [PATCH 016/113] FROMGIT(6.18): dt-bindings: npu: rockchip,rknn: Add bindings Add the bindings for the Neural Processing Unit IP from Rockchip. diff --git a/packages/linux/patches/rockchip/rockchip-0016-FROMGIT-6.18-arm64-dts-rockchip-add-pd_npu-label-for.patch b/packages/linux/patches/rockchip/rockchip-0017-FROMGIT-6.18-arm64-dts-rockchip-add-pd_npu-label-for.patch similarity index 91% rename from packages/linux/patches/rockchip/rockchip-0016-FROMGIT-6.18-arm64-dts-rockchip-add-pd_npu-label-for.patch rename to packages/linux/patches/rockchip/rockchip-0017-FROMGIT-6.18-arm64-dts-rockchip-add-pd_npu-label-for.patch index 811c043097..875d58fa10 100644 --- a/packages/linux/patches/rockchip/rockchip-0016-FROMGIT-6.18-arm64-dts-rockchip-add-pd_npu-label-for.patch +++ b/packages/linux/patches/rockchip/rockchip-0017-FROMGIT-6.18-arm64-dts-rockchip-add-pd_npu-label-for.patch @@ -1,7 +1,7 @@ -From 51c66e8a09312dfea8ef89237114aba928307fc7 Mon Sep 17 00:00:00 2001 +From a76b0fbce71cb154723a0e164f4b435d9ede6f3d Mon Sep 17 00:00:00 2001 From: Nicolas Frattaroli Date: Mon, 21 Jul 2025 11:17:34 +0200 -Subject: [PATCH 016/110] FROMGIT(6.18): arm64: dts: rockchip: add pd_npu label +Subject: [PATCH 017/113] FROMGIT(6.18): arm64: dts: rockchip: add pd_npu label for RK3588 power domains The NPU of the RK3588 has an external supply. This supply also affects diff --git a/packages/linux/patches/rockchip/rockchip-0017-FROMGIT-6.18-arm64-dts-rockchip-Add-nodes-for-NPU-an.patch b/packages/linux/patches/rockchip/rockchip-0018-FROMGIT-6.18-arm64-dts-rockchip-Add-nodes-for-NPU-an.patch similarity index 97% rename from packages/linux/patches/rockchip/rockchip-0017-FROMGIT-6.18-arm64-dts-rockchip-Add-nodes-for-NPU-an.patch rename to packages/linux/patches/rockchip/rockchip-0018-FROMGIT-6.18-arm64-dts-rockchip-Add-nodes-for-NPU-an.patch index 5b8164d881..8ce3c567f2 100644 --- a/packages/linux/patches/rockchip/rockchip-0017-FROMGIT-6.18-arm64-dts-rockchip-Add-nodes-for-NPU-an.patch +++ b/packages/linux/patches/rockchip/rockchip-0018-FROMGIT-6.18-arm64-dts-rockchip-Add-nodes-for-NPU-an.patch @@ -1,7 +1,7 @@ -From 5bd6f7efb942d73f95ec7d384c6ef6fecdabf226 Mon Sep 17 00:00:00 2001 +From 29765f5282144d4dbf1d32de6a68b0c44a46c64a Mon Sep 17 00:00:00 2001 From: Tomeu Vizoso Date: Mon, 21 Jul 2025 11:17:35 +0200 -Subject: [PATCH 017/110] FROMGIT(6.18): arm64: dts: rockchip: Add nodes for +Subject: [PATCH 018/113] FROMGIT(6.18): arm64: dts: rockchip: Add nodes for NPU and its MMU to rk3588-base See Chapter 36 "RKNN" from the RK3588 TRM (Part 1). diff --git a/packages/linux/patches/rockchip/rockchip-0018-FROMGIT-6.18-arm64-dts-rockchip-Enable-the-NPU-on-qu.patch b/packages/linux/patches/rockchip/rockchip-0019-FROMGIT-6.18-arm64-dts-rockchip-Enable-the-NPU-on-qu.patch similarity index 90% rename from packages/linux/patches/rockchip/rockchip-0018-FROMGIT-6.18-arm64-dts-rockchip-Enable-the-NPU-on-qu.patch rename to packages/linux/patches/rockchip/rockchip-0019-FROMGIT-6.18-arm64-dts-rockchip-Enable-the-NPU-on-qu.patch index f319c679c7..e7904641bd 100644 --- a/packages/linux/patches/rockchip/rockchip-0018-FROMGIT-6.18-arm64-dts-rockchip-Enable-the-NPU-on-qu.patch +++ b/packages/linux/patches/rockchip/rockchip-0019-FROMGIT-6.18-arm64-dts-rockchip-Enable-the-NPU-on-qu.patch @@ -1,7 +1,7 @@ -From 56a5dcf2f424197a29676adcd46cc7ffb826c4a9 Mon Sep 17 00:00:00 2001 +From b59b36b24b31976982f01055372b9b522284f4f7 Mon Sep 17 00:00:00 2001 From: Tomeu Vizoso Date: Mon, 21 Jul 2025 11:17:36 +0200 -Subject: [PATCH 018/110] FROMGIT(6.18): arm64: dts: rockchip: Enable the NPU +Subject: [PATCH 019/113] FROMGIT(6.18): arm64: dts: rockchip: Enable the NPU on quartzpro64 Enable the nodes added in a previous commit to the rk3588s device tree. diff --git a/packages/linux/patches/rockchip/rockchip-0019-FROMGIT-6.18-arm64-dts-rockchip-enable-NPU-on-ROCK-5.patch b/packages/linux/patches/rockchip/rockchip-0020-FROMGIT-6.18-arm64-dts-rockchip-enable-NPU-on-ROCK-5.patch similarity index 94% rename from packages/linux/patches/rockchip/rockchip-0019-FROMGIT-6.18-arm64-dts-rockchip-enable-NPU-on-ROCK-5.patch rename to packages/linux/patches/rockchip/rockchip-0020-FROMGIT-6.18-arm64-dts-rockchip-enable-NPU-on-ROCK-5.patch index 9ec4d93ecc..dabe9a67ae 100644 --- a/packages/linux/patches/rockchip/rockchip-0019-FROMGIT-6.18-arm64-dts-rockchip-enable-NPU-on-ROCK-5.patch +++ b/packages/linux/patches/rockchip/rockchip-0020-FROMGIT-6.18-arm64-dts-rockchip-enable-NPU-on-ROCK-5.patch @@ -1,7 +1,7 @@ -From 24b189f1fb6eb178da2aeccc51dd408ebd1d74f4 Mon Sep 17 00:00:00 2001 +From 4c41bac5057293ba1e191069e16299bca6734b64 Mon Sep 17 00:00:00 2001 From: Nicolas Frattaroli Date: Mon, 21 Jul 2025 09:17:00 +0000 -Subject: [PATCH 019/110] FROMGIT(6.18): arm64: dts: rockchip: enable NPU on +Subject: [PATCH 020/113] FROMGIT(6.18): arm64: dts: rockchip: enable NPU on ROCK 5B/5B+/5T The NPU on the ROCK5B uses the same regulator for both the sram-supply diff --git a/packages/linux/patches/rockchip/rockchip-0020-FROMGIT-6.18-arm64-dts-rockchip-Enable-HDMI-receiver.patch b/packages/linux/patches/rockchip/rockchip-0021-FROMGIT-6.18-arm64-dts-rockchip-Enable-HDMI-receiver.patch similarity index 91% rename from packages/linux/patches/rockchip/rockchip-0020-FROMGIT-6.18-arm64-dts-rockchip-Enable-HDMI-receiver.patch rename to packages/linux/patches/rockchip/rockchip-0021-FROMGIT-6.18-arm64-dts-rockchip-Enable-HDMI-receiver.patch index f54f518b08..76b040c717 100644 --- a/packages/linux/patches/rockchip/rockchip-0020-FROMGIT-6.18-arm64-dts-rockchip-Enable-HDMI-receiver.patch +++ b/packages/linux/patches/rockchip/rockchip-0021-FROMGIT-6.18-arm64-dts-rockchip-Enable-HDMI-receiver.patch @@ -1,7 +1,7 @@ -From dbc2525099295ec6864e83016d755933fe295146 Mon Sep 17 00:00:00 2001 +From c13c281a5bd4e4a8d94d01becc92d784b45c7b47 Mon Sep 17 00:00:00 2001 From: Maud Spierings Date: Sat, 23 Aug 2025 14:43:51 +0200 -Subject: [PATCH 020/110] FROMGIT(6.18): arm64: dts: rockchip: Enable HDMI +Subject: [PATCH 021/113] FROMGIT(6.18): arm64: dts: rockchip: Enable HDMI receiver on orangepi 5 plus MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 diff --git a/packages/linux/patches/rockchip/rockchip-0021-FROMGIT-6.18-arm64-dts-rockchip-Enable-the-NPU-on-th.patch b/packages/linux/patches/rockchip/rockchip-0022-FROMGIT-6.18-arm64-dts-rockchip-Enable-the-NPU-on-th.patch similarity index 93% rename from packages/linux/patches/rockchip/rockchip-0021-FROMGIT-6.18-arm64-dts-rockchip-Enable-the-NPU-on-th.patch rename to packages/linux/patches/rockchip/rockchip-0022-FROMGIT-6.18-arm64-dts-rockchip-Enable-the-NPU-on-th.patch index 7d9e5dbf01..c5540268ea 100644 --- a/packages/linux/patches/rockchip/rockchip-0021-FROMGIT-6.18-arm64-dts-rockchip-Enable-the-NPU-on-th.patch +++ b/packages/linux/patches/rockchip/rockchip-0022-FROMGIT-6.18-arm64-dts-rockchip-Enable-the-NPU-on-th.patch @@ -1,7 +1,7 @@ -From 0d402d84d1e3afb656d6261fa53bf877c14aa996 Mon Sep 17 00:00:00 2001 +From e1d82aa3b8bb263ba0203d9c42dc1644402dce45 Mon Sep 17 00:00:00 2001 From: Maud Spierings Date: Sat, 23 Aug 2025 14:43:52 +0200 -Subject: [PATCH 021/110] FROMGIT(6.18): arm64: dts: rockchip: Enable the NPU +Subject: [PATCH 022/113] FROMGIT(6.18): arm64: dts: rockchip: Enable the NPU on the orangepi 5 boards MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 diff --git a/packages/linux/patches/rockchip/rockchip-0022-FROMGIT-6.18-arm64-dts-rockchip-rk3588s-rock-5a-Add-.patch b/packages/linux/patches/rockchip/rockchip-0023-FROMGIT-6.18-arm64-dts-rockchip-rk3588s-rock-5a-Add-.patch similarity index 91% rename from packages/linux/patches/rockchip/rockchip-0022-FROMGIT-6.18-arm64-dts-rockchip-rk3588s-rock-5a-Add-.patch rename to packages/linux/patches/rockchip/rockchip-0023-FROMGIT-6.18-arm64-dts-rockchip-rk3588s-rock-5a-Add-.patch index b13960cb56..d0b825399f 100644 --- a/packages/linux/patches/rockchip/rockchip-0022-FROMGIT-6.18-arm64-dts-rockchip-rk3588s-rock-5a-Add-.patch +++ b/packages/linux/patches/rockchip/rockchip-0023-FROMGIT-6.18-arm64-dts-rockchip-rk3588s-rock-5a-Add-.patch @@ -1,7 +1,7 @@ -From e57ce0b593e2b92db338700386877451af5ef286 Mon Sep 17 00:00:00 2001 +From f6efd29768d6c2376cd56c0b7d88bf3abf8ab621 Mon Sep 17 00:00:00 2001 From: "kylepzak@projectinitiative.io" Date: Tue, 19 Aug 2025 21:30:12 -0500 -Subject: [PATCH 022/110] FROMGIT(6.18): arm64: dts: rockchip: rk3588s-rock-5a: +Subject: [PATCH 023/113] FROMGIT(6.18): arm64: dts: rockchip: rk3588s-rock-5a: Add green power LED The Radxa ROCK 5A board includes a green power LED that is defined in diff --git a/packages/linux/patches/rockchip/rockchip-0023-FROMGIT-6.18-arm64-dts-rockchip-Enable-RK3576-watchd.patch b/packages/linux/patches/rockchip/rockchip-0024-FROMGIT-6.18-arm64-dts-rockchip-Enable-RK3576-watchd.patch similarity index 87% rename from packages/linux/patches/rockchip/rockchip-0023-FROMGIT-6.18-arm64-dts-rockchip-Enable-RK3576-watchd.patch rename to packages/linux/patches/rockchip/rockchip-0024-FROMGIT-6.18-arm64-dts-rockchip-Enable-RK3576-watchd.patch index 0afc4892b7..45c35040b1 100644 --- a/packages/linux/patches/rockchip/rockchip-0023-FROMGIT-6.18-arm64-dts-rockchip-Enable-RK3576-watchd.patch +++ b/packages/linux/patches/rockchip/rockchip-0024-FROMGIT-6.18-arm64-dts-rockchip-Enable-RK3576-watchd.patch @@ -1,7 +1,7 @@ -From 805baf97875dfc3402c2d0921b4b7de1bc1cc851 Mon Sep 17 00:00:00 2001 +From d16813b1b07478fd4c7a13015b2a2e655769d3be Mon Sep 17 00:00:00 2001 From: Sebastian Reichel Date: Mon, 18 Aug 2025 19:18:40 +0200 -Subject: [PATCH 023/110] FROMGIT(6.18): arm64: dts: rockchip: Enable RK3576 +Subject: [PATCH 024/113] FROMGIT(6.18): arm64: dts: rockchip: Enable RK3576 watchdog The RK3576 watchdog does not need any board specific resources, so diff --git a/packages/linux/patches/rockchip/rockchip-0024-FROMGIT-6.18-arm64-dts-rockchip-add-SPDIF-audio-to-B.patch b/packages/linux/patches/rockchip/rockchip-0025-FROMGIT-6.18-arm64-dts-rockchip-add-SPDIF-audio-to-B.patch similarity index 91% rename from packages/linux/patches/rockchip/rockchip-0024-FROMGIT-6.18-arm64-dts-rockchip-add-SPDIF-audio-to-B.patch rename to packages/linux/patches/rockchip/rockchip-0025-FROMGIT-6.18-arm64-dts-rockchip-add-SPDIF-audio-to-B.patch index bea5cf230b..deda10052c 100644 --- a/packages/linux/patches/rockchip/rockchip-0024-FROMGIT-6.18-arm64-dts-rockchip-add-SPDIF-audio-to-B.patch +++ b/packages/linux/patches/rockchip/rockchip-0025-FROMGIT-6.18-arm64-dts-rockchip-add-SPDIF-audio-to-B.patch @@ -1,7 +1,7 @@ -From e0e0e91a7ab46c827517332c71ac7641b232bbc2 Mon Sep 17 00:00:00 2001 +From a2c60f67d1b9a2260d0cede6b5d4dd7ac4e6e08a Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Sat, 27 Feb 2021 17:52:02 +0100 -Subject: [PATCH 024/110] FROMGIT(6.18): arm64: dts: rockchip: add SPDIF audio +Subject: [PATCH 025/113] FROMGIT(6.18): arm64: dts: rockchip: add SPDIF audio to Beelink A1 Add the required nodes to enable SPDIF audio output on diff --git a/packages/linux/patches/rockchip/rockchip-0025-FROMGIT-6.18-arm64-dts-rockchip-add-USB3-on-Beelink-.patch b/packages/linux/patches/rockchip/rockchip-0026-FROMGIT-6.18-arm64-dts-rockchip-add-USB3-on-Beelink-.patch similarity index 85% rename from packages/linux/patches/rockchip/rockchip-0025-FROMGIT-6.18-arm64-dts-rockchip-add-USB3-on-Beelink-.patch rename to packages/linux/patches/rockchip/rockchip-0026-FROMGIT-6.18-arm64-dts-rockchip-add-USB3-on-Beelink-.patch index fd5243d20d..e83f94b699 100644 --- a/packages/linux/patches/rockchip/rockchip-0025-FROMGIT-6.18-arm64-dts-rockchip-add-USB3-on-Beelink-.patch +++ b/packages/linux/patches/rockchip/rockchip-0026-FROMGIT-6.18-arm64-dts-rockchip-add-USB3-on-Beelink-.patch @@ -1,7 +1,7 @@ -From c2025213c46129c162b9c2b86616df5847da5f0e Mon Sep 17 00:00:00 2001 +From b936852059e45b5016707026f99e7d8b6ad86450 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Sat, 21 Aug 2021 17:04:46 +0200 -Subject: [PATCH 025/110] FROMGIT(6.18): arm64: dts: rockchip: add USB3 on +Subject: [PATCH 026/113] FROMGIT(6.18): arm64: dts: rockchip: add USB3 on Beelink A1 Enable USB3 for the Beelink A1 set-top box. diff --git a/packages/linux/patches/rockchip/rockchip-0026-FROMGIT-6.18-arm64-dts-rockchip-add-IR-receiver-to-r.patch b/packages/linux/patches/rockchip/rockchip-0027-FROMGIT-6.18-arm64-dts-rockchip-add-IR-receiver-to-r.patch similarity index 90% rename from packages/linux/patches/rockchip/rockchip-0026-FROMGIT-6.18-arm64-dts-rockchip-add-IR-receiver-to-r.patch rename to packages/linux/patches/rockchip/rockchip-0027-FROMGIT-6.18-arm64-dts-rockchip-add-IR-receiver-to-r.patch index 557fb0b98c..2e0e379392 100644 --- a/packages/linux/patches/rockchip/rockchip-0026-FROMGIT-6.18-arm64-dts-rockchip-add-IR-receiver-to-r.patch +++ b/packages/linux/patches/rockchip/rockchip-0027-FROMGIT-6.18-arm64-dts-rockchip-add-IR-receiver-to-r.patch @@ -1,7 +1,7 @@ -From 669015f790e761358a220dc54709dc390a19b95b Mon Sep 17 00:00:00 2001 +From ed0575e542fa52ce31403b3e2523a23dcfe48368 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Sat, 27 Feb 2021 18:01:13 +0100 -Subject: [PATCH 026/110] FROMGIT(6.18): arm64: dts: rockchip: add IR receiver +Subject: [PATCH 027/113] FROMGIT(6.18): arm64: dts: rockchip: add IR receiver to rk3328-roc Add the ir-receiver and ir pinctrl nodes to enable the IR receiver diff --git a/packages/linux/patches/rockchip/rockchip-0027-FROMGIT-6.18-arm64-dts-rockchip-add-GPU-powerdomain-.patch b/packages/linux/patches/rockchip/rockchip-0028-FROMGIT-6.18-arm64-dts-rockchip-add-GPU-powerdomain-.patch similarity index 94% rename from packages/linux/patches/rockchip/rockchip-0027-FROMGIT-6.18-arm64-dts-rockchip-add-GPU-powerdomain-.patch rename to packages/linux/patches/rockchip/rockchip-0028-FROMGIT-6.18-arm64-dts-rockchip-add-GPU-powerdomain-.patch index 8293e2912c..3672646e21 100644 --- a/packages/linux/patches/rockchip/rockchip-0027-FROMGIT-6.18-arm64-dts-rockchip-add-GPU-powerdomain-.patch +++ b/packages/linux/patches/rockchip/rockchip-0028-FROMGIT-6.18-arm64-dts-rockchip-add-GPU-powerdomain-.patch @@ -1,7 +1,7 @@ -From 7c979b574c428a062ddaec3a916104ce65043c87 Mon Sep 17 00:00:00 2001 +From 882c66e959e66d6acc8b93f5e73b077858f61d47 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Wed, 2 Sep 2020 19:52:02 +0200 -Subject: [PATCH 027/110] FROMGIT(6.18): arm64: dts: rockchip: add GPU +Subject: [PATCH 028/113] FROMGIT(6.18): arm64: dts: rockchip: add GPU powerdomain, opps, and cooling to rk3328 Add GPU powerdomain, opp-table, and cooling map nodes for the Mali diff --git a/packages/linux/patches/rockchip/rockchip-0028-FROMGIT-6.18-arm64-dts-rockchip-enable-the-Mali-GPU-.patch b/packages/linux/patches/rockchip/rockchip-0029-FROMGIT-6.18-arm64-dts-rockchip-enable-the-Mali-GPU-.patch similarity index 93% rename from packages/linux/patches/rockchip/rockchip-0028-FROMGIT-6.18-arm64-dts-rockchip-enable-the-Mali-GPU-.patch rename to packages/linux/patches/rockchip/rockchip-0029-FROMGIT-6.18-arm64-dts-rockchip-enable-the-Mali-GPU-.patch index 3d60123fe3..7dd5f61e4a 100644 --- a/packages/linux/patches/rockchip/rockchip-0028-FROMGIT-6.18-arm64-dts-rockchip-enable-the-Mali-GPU-.patch +++ b/packages/linux/patches/rockchip/rockchip-0029-FROMGIT-6.18-arm64-dts-rockchip-enable-the-Mali-GPU-.patch @@ -1,7 +1,7 @@ -From 8ba373036e302c7ef351b851af57e6ff71c4af74 Mon Sep 17 00:00:00 2001 +From 4b074bf9d6f76d7a80a54bd80b540bda6b419412 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Wed, 2 Sep 2020 19:52:02 +0200 -Subject: [PATCH 028/110] FROMGIT(6.18): arm64: dts: rockchip: enable the Mali +Subject: [PATCH 029/113] FROMGIT(6.18): arm64: dts: rockchip: enable the Mali GPU on RK3328 boards Add a gpu node to the rock64 board to enable the Mali GPU and diff --git a/packages/linux/patches/rockchip/rockchip-0029-FROMGIT-6.18-ARM-dts-rockchip-add-HDMI-audio-to-rk32.patch b/packages/linux/patches/rockchip/rockchip-0030-FROMGIT-6.18-ARM-dts-rockchip-add-HDMI-audio-to-rk32.patch similarity index 90% rename from packages/linux/patches/rockchip/rockchip-0029-FROMGIT-6.18-ARM-dts-rockchip-add-HDMI-audio-to-rk32.patch rename to packages/linux/patches/rockchip/rockchip-0030-FROMGIT-6.18-ARM-dts-rockchip-add-HDMI-audio-to-rk32.patch index a7692713fa..4527ee392b 100644 --- a/packages/linux/patches/rockchip/rockchip-0029-FROMGIT-6.18-ARM-dts-rockchip-add-HDMI-audio-to-rk32.patch +++ b/packages/linux/patches/rockchip/rockchip-0030-FROMGIT-6.18-ARM-dts-rockchip-add-HDMI-audio-to-rk32.patch @@ -1,7 +1,7 @@ -From c6a6443498cca81191ac1181bd4411aeb146893b Mon Sep 17 00:00:00 2001 +From 1ab8f921435f1d6b63981d267582917fd5097e8f Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Tue, 2 Feb 2021 17:22:21 +0200 -Subject: [PATCH 029/110] FROMGIT(6.18): ARM: dts: rockchip: add HDMI audio to +Subject: [PATCH 030/113] FROMGIT(6.18): ARM: dts: rockchip: add HDMI audio to rk3288-miqi Add the sound and i2s nodes to enable HDMI audio output on diff --git a/packages/linux/patches/rockchip/rockchip-0030-FROMGIT-6.18-ARM-dts-rockchip-add-CEC-pinctrl-to-rk3.patch b/packages/linux/patches/rockchip/rockchip-0031-FROMGIT-6.18-ARM-dts-rockchip-add-CEC-pinctrl-to-rk3.patch similarity index 85% rename from packages/linux/patches/rockchip/rockchip-0030-FROMGIT-6.18-ARM-dts-rockchip-add-CEC-pinctrl-to-rk3.patch rename to packages/linux/patches/rockchip/rockchip-0031-FROMGIT-6.18-ARM-dts-rockchip-add-CEC-pinctrl-to-rk3.patch index c260f90a86..d24863e45e 100644 --- a/packages/linux/patches/rockchip/rockchip-0030-FROMGIT-6.18-ARM-dts-rockchip-add-CEC-pinctrl-to-rk3.patch +++ b/packages/linux/patches/rockchip/rockchip-0031-FROMGIT-6.18-ARM-dts-rockchip-add-CEC-pinctrl-to-rk3.patch @@ -1,7 +1,7 @@ -From 641e13fef535582ac47437d54878f5e88c52db27 Mon Sep 17 00:00:00 2001 +From eeb2a21bb307f837a1461ab04acb83a248bb22c3 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Mon, 1 Mar 2021 21:24:15 +0100 -Subject: [PATCH 030/110] FROMGIT(6.18): ARM: dts: rockchip: add CEC pinctrl to +Subject: [PATCH 031/113] FROMGIT(6.18): ARM: dts: rockchip: add CEC pinctrl to rk3288-miqi Enable CEC control on the HDMI port for MiQi. diff --git a/packages/linux/patches/rockchip/rockchip-0031-FROMLIST-v1-mmc-core-set-initial-signal-voltage-on-p.patch b/packages/linux/patches/rockchip/rockchip-0032-FROMLIST-v1-mmc-core-set-initial-signal-voltage-on-p.patch similarity index 92% rename from packages/linux/patches/rockchip/rockchip-0031-FROMLIST-v1-mmc-core-set-initial-signal-voltage-on-p.patch rename to packages/linux/patches/rockchip/rockchip-0032-FROMLIST-v1-mmc-core-set-initial-signal-voltage-on-p.patch index 5b09ef4ba4..a22b3bafd7 100644 --- a/packages/linux/patches/rockchip/rockchip-0031-FROMLIST-v1-mmc-core-set-initial-signal-voltage-on-p.patch +++ b/packages/linux/patches/rockchip/rockchip-0032-FROMLIST-v1-mmc-core-set-initial-signal-voltage-on-p.patch @@ -1,7 +1,7 @@ -From da6306572e0fef5ed438d867ea40b767e4533589 Mon Sep 17 00:00:00 2001 +From 3c2a1b56da4d4a137c79450977f8f66ede38235a Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 17 Feb 2019 22:14:38 +0000 -Subject: [PATCH 031/110] FROMLIST(v1): mmc: core: set initial signal voltage +Subject: [PATCH 032/113] FROMLIST(v1): mmc: core: set initial signal voltage on power off Some boards have SD card connectors where the power rail cannot be switched diff --git a/packages/linux/patches/rockchip/rockchip-0032-FROMLIST-v7-dt-bindings-vendor-prefixes-Add-Verisili.patch b/packages/linux/patches/rockchip/rockchip-0033-FROMLIST-v7-dt-bindings-vendor-prefixes-Add-Verisili.patch similarity index 89% rename from packages/linux/patches/rockchip/rockchip-0032-FROMLIST-v7-dt-bindings-vendor-prefixes-Add-Verisili.patch rename to packages/linux/patches/rockchip/rockchip-0033-FROMLIST-v7-dt-bindings-vendor-prefixes-Add-Verisili.patch index 13e84dfab2..6337d120b5 100644 --- a/packages/linux/patches/rockchip/rockchip-0032-FROMLIST-v7-dt-bindings-vendor-prefixes-Add-Verisili.patch +++ b/packages/linux/patches/rockchip/rockchip-0033-FROMLIST-v7-dt-bindings-vendor-prefixes-Add-Verisili.patch @@ -1,7 +1,7 @@ -From 94d53a720aa06fd7fb86ebe87f3dc1fae1ab170e Mon Sep 17 00:00:00 2001 +From e46c50bfa09554ebc5646e958789b0288a69be67 Mon Sep 17 00:00:00 2001 From: Benjamin Gaignard Date: Mon, 25 Aug 2025 17:34:40 +0200 -Subject: [PATCH 032/110] FROMLIST(v7): dt-bindings: vendor-prefixes: Add +Subject: [PATCH 033/113] FROMLIST(v7): dt-bindings: vendor-prefixes: Add Verisilicon Verisilicon Microelectronics is a company based in Shanghai, China, diff --git a/packages/linux/patches/rockchip/rockchip-0033-FROMLIST-v7-dt-bindings-iommu-verisilicon-Add-bindin.patch b/packages/linux/patches/rockchip/rockchip-0034-FROMLIST-v7-dt-bindings-iommu-verisilicon-Add-bindin.patch similarity index 95% rename from packages/linux/patches/rockchip/rockchip-0033-FROMLIST-v7-dt-bindings-iommu-verisilicon-Add-bindin.patch rename to packages/linux/patches/rockchip/rockchip-0034-FROMLIST-v7-dt-bindings-iommu-verisilicon-Add-bindin.patch index 5c244185c2..addc7c5a8a 100644 --- a/packages/linux/patches/rockchip/rockchip-0033-FROMLIST-v7-dt-bindings-iommu-verisilicon-Add-bindin.patch +++ b/packages/linux/patches/rockchip/rockchip-0034-FROMLIST-v7-dt-bindings-iommu-verisilicon-Add-bindin.patch @@ -1,7 +1,7 @@ -From b3caf49b53de106f291a65d591c7f2a0738332b0 Mon Sep 17 00:00:00 2001 +From dc89a8432a8cc971cd5be8d50bb63688b247683f Mon Sep 17 00:00:00 2001 From: Benjamin Gaignard Date: Mon, 25 Aug 2025 17:34:41 +0200 -Subject: [PATCH 033/110] FROMLIST(v7): dt-bindings: iommu: verisilicon: Add +Subject: [PATCH 034/113] FROMLIST(v7): dt-bindings: iommu: verisilicon: Add binding for VSI IOMMU Add a device tree binding for the Verisilicon (VSI) IOMMU. diff --git a/packages/linux/patches/rockchip/rockchip-0034-FROMLIST-v7-iommu-Add-verisilicon-IOMMU-driver.patch b/packages/linux/patches/rockchip/rockchip-0035-FROMLIST-v7-iommu-Add-verisilicon-IOMMU-driver.patch similarity index 99% rename from packages/linux/patches/rockchip/rockchip-0034-FROMLIST-v7-iommu-Add-verisilicon-IOMMU-driver.patch rename to packages/linux/patches/rockchip/rockchip-0035-FROMLIST-v7-iommu-Add-verisilicon-IOMMU-driver.patch index 10ce94a11b..7386bff2cd 100644 --- a/packages/linux/patches/rockchip/rockchip-0034-FROMLIST-v7-iommu-Add-verisilicon-IOMMU-driver.patch +++ b/packages/linux/patches/rockchip/rockchip-0035-FROMLIST-v7-iommu-Add-verisilicon-IOMMU-driver.patch @@ -1,7 +1,7 @@ -From 5edfdf32ae4468577441665eba1cf9dbf76e508a Mon Sep 17 00:00:00 2001 +From d4c6a68a8b3959e9b95be0ae460d40c588ae5f56 Mon Sep 17 00:00:00 2001 From: Benjamin Gaignard Date: Mon, 25 Aug 2025 17:34:42 +0200 -Subject: [PATCH 034/110] FROMLIST(v7): iommu: Add verisilicon IOMMU driver +Subject: [PATCH 035/113] FROMLIST(v7): iommu: Add verisilicon IOMMU driver The Verisilicon IOMMU hardware block can be found in combination with Verisilicon hardware video codecs (encoders or decoders) on diff --git a/packages/linux/patches/rockchip/rockchip-0035-FROMLIST-v7-media-verisilicon-AV1-Restore-IOMMU-cont.patch b/packages/linux/patches/rockchip/rockchip-0036-FROMLIST-v7-media-verisilicon-AV1-Restore-IOMMU-cont.patch similarity index 96% rename from packages/linux/patches/rockchip/rockchip-0035-FROMLIST-v7-media-verisilicon-AV1-Restore-IOMMU-cont.patch rename to packages/linux/patches/rockchip/rockchip-0036-FROMLIST-v7-media-verisilicon-AV1-Restore-IOMMU-cont.patch index b41905eb05..c95f5cdf58 100644 --- a/packages/linux/patches/rockchip/rockchip-0035-FROMLIST-v7-media-verisilicon-AV1-Restore-IOMMU-cont.patch +++ b/packages/linux/patches/rockchip/rockchip-0036-FROMLIST-v7-media-verisilicon-AV1-Restore-IOMMU-cont.patch @@ -1,7 +1,7 @@ -From 2e77e4cfca617998580231db0bfefea68729e3e3 Mon Sep 17 00:00:00 2001 +From 442d76f8e5c8200cb8cc0d52f4b4a8ece58e12c7 Mon Sep 17 00:00:00 2001 From: Benjamin Gaignard Date: Mon, 25 Aug 2025 17:34:43 +0200 -Subject: [PATCH 035/110] FROMLIST(v7): media: verisilicon: AV1: Restore IOMMU +Subject: [PATCH 036/113] FROMLIST(v7): media: verisilicon: AV1: Restore IOMMU context before decoding a frame AV1 is a stateless decoder and multiple AV1 bitstreams could be decoded diff --git a/packages/linux/patches/rockchip/rockchip-0036-FROMLIST-v7-arm64-dts-rockchip-Add-verisilicon-IOMMU.patch b/packages/linux/patches/rockchip/rockchip-0037-FROMLIST-v7-arm64-dts-rockchip-Add-verisilicon-IOMMU.patch similarity index 91% rename from packages/linux/patches/rockchip/rockchip-0036-FROMLIST-v7-arm64-dts-rockchip-Add-verisilicon-IOMMU.patch rename to packages/linux/patches/rockchip/rockchip-0037-FROMLIST-v7-arm64-dts-rockchip-Add-verisilicon-IOMMU.patch index 9ffaf99c85..e1a935e0d6 100644 --- a/packages/linux/patches/rockchip/rockchip-0036-FROMLIST-v7-arm64-dts-rockchip-Add-verisilicon-IOMMU.patch +++ b/packages/linux/patches/rockchip/rockchip-0037-FROMLIST-v7-arm64-dts-rockchip-Add-verisilicon-IOMMU.patch @@ -1,7 +1,7 @@ -From 673ae7d301fcfa6707a92b3346f96e119d86857e Mon Sep 17 00:00:00 2001 +From bf4de699e3ee6a75443c4d31979107a6a677ec42 Mon Sep 17 00:00:00 2001 From: Benjamin Gaignard Date: Mon, 25 Aug 2025 17:34:44 +0200 -Subject: [PATCH 036/110] FROMLIST(v7): arm64: dts: rockchip: Add verisilicon +Subject: [PATCH 037/113] FROMLIST(v7): arm64: dts: rockchip: Add verisilicon IOMMU node on RK3588 Add the device tree node for the Verisilicon IOMMU present diff --git a/packages/linux/patches/rockchip/rockchip-0037-FROMLIST-v1-drm-bridge-dw-hdmi-qp-Return-0-in-audio-.patch b/packages/linux/patches/rockchip/rockchip-0038-FROMLIST-v1-drm-bridge-dw-hdmi-qp-Return-0-in-audio-.patch similarity index 94% rename from packages/linux/patches/rockchip/rockchip-0037-FROMLIST-v1-drm-bridge-dw-hdmi-qp-Return-0-in-audio-.patch rename to packages/linux/patches/rockchip/rockchip-0038-FROMLIST-v1-drm-bridge-dw-hdmi-qp-Return-0-in-audio-.patch index 3a3fbf2919..90e2fccf3d 100644 --- a/packages/linux/patches/rockchip/rockchip-0037-FROMLIST-v1-drm-bridge-dw-hdmi-qp-Return-0-in-audio-.patch +++ b/packages/linux/patches/rockchip/rockchip-0038-FROMLIST-v1-drm-bridge-dw-hdmi-qp-Return-0-in-audio-.patch @@ -1,7 +1,7 @@ -From 63d1c224d08d3bccf107a3a3344630a814ac6e8b Mon Sep 17 00:00:00 2001 +From 64bebb0ebb38e8fce7814308a1c7591076521566 Mon Sep 17 00:00:00 2001 From: Detlev Casanova Date: Thu, 17 Jul 2025 17:56:18 -0400 -Subject: [PATCH 037/110] FROMLIST(v1): drm/bridge: dw-hdmi-qp: Return 0 in +Subject: [PATCH 038/113] FROMLIST(v1): drm/bridge: dw-hdmi-qp: Return 0 in audio prepare when disconnected To configure audio registers, the clock of the video port in use must be diff --git a/packages/linux/patches/rockchip/rockchip-0038-FROMLIST-v1-drm-bridge-synopsys-Do-not-warn-about-au.patch b/packages/linux/patches/rockchip/rockchip-0039-FROMLIST-v1-drm-bridge-synopsys-Do-not-warn-about-au.patch similarity index 88% rename from packages/linux/patches/rockchip/rockchip-0038-FROMLIST-v1-drm-bridge-synopsys-Do-not-warn-about-au.patch rename to packages/linux/patches/rockchip/rockchip-0039-FROMLIST-v1-drm-bridge-synopsys-Do-not-warn-about-au.patch index 7dcfb3f201..f5e6746530 100644 --- a/packages/linux/patches/rockchip/rockchip-0038-FROMLIST-v1-drm-bridge-synopsys-Do-not-warn-about-au.patch +++ b/packages/linux/patches/rockchip/rockchip-0039-FROMLIST-v1-drm-bridge-synopsys-Do-not-warn-about-au.patch @@ -1,7 +1,7 @@ -From 9a9185a1ad5f0a3ea9d79e915f905ef47b743c84 Mon Sep 17 00:00:00 2001 +From 3bdf145d17ea5487a0a0bc39ffdea1b92ea5bea1 Mon Sep 17 00:00:00 2001 From: Detlev Casanova Date: Thu, 26 Jun 2025 08:53:07 -0400 -Subject: [PATCH 038/110] FROMLIST(v1): drm/bridge: synopsys: Do not warn about +Subject: [PATCH 039/113] FROMLIST(v1): drm/bridge: synopsys: Do not warn about audio params computation There is no need to warn about non pre-computed values, just change it to diff --git a/packages/linux/patches/rockchip/rockchip-0039-FROMLIST-v1-arm64-dts-rockchip-use-MAC-TX-delay-for-.patch b/packages/linux/patches/rockchip/rockchip-0040-FROMLIST-v1-arm64-dts-rockchip-use-MAC-TX-delay-for-.patch similarity index 94% rename from packages/linux/patches/rockchip/rockchip-0039-FROMLIST-v1-arm64-dts-rockchip-use-MAC-TX-delay-for-.patch rename to packages/linux/patches/rockchip/rockchip-0040-FROMLIST-v1-arm64-dts-rockchip-use-MAC-TX-delay-for-.patch index d5c6fde269..8d319a0063 100644 --- a/packages/linux/patches/rockchip/rockchip-0039-FROMLIST-v1-arm64-dts-rockchip-use-MAC-TX-delay-for-.patch +++ b/packages/linux/patches/rockchip/rockchip-0040-FROMLIST-v1-arm64-dts-rockchip-use-MAC-TX-delay-for-.patch @@ -1,7 +1,7 @@ -From bb64767e3c5fb86eac1b2966ac21eccba3ed2ceb Mon Sep 17 00:00:00 2001 +From 17eeb58cbeadedfa75674e09e01bd0b44c624c29 Mon Sep 17 00:00:00 2001 From: Sebastian Reichel Date: Thu, 24 Jul 2025 16:31:25 +0200 -Subject: [PATCH 039/110] FROMLIST(v1): arm64: dts: rockchip: use MAC TX delay +Subject: [PATCH 040/113] FROMLIST(v1): arm64: dts: rockchip: use MAC TX delay for ROCK 4D According to the Ethernet controller device tree binding "rgmii-id" diff --git a/packages/linux/patches/rockchip/rockchip-0040-FROMLIST-v2-arm64-dts-rockchip-Fix-sound-output-from.patch b/packages/linux/patches/rockchip/rockchip-0041-FROMLIST-v2-arm64-dts-rockchip-Fix-sound-output-from.patch similarity index 90% rename from packages/linux/patches/rockchip/rockchip-0040-FROMLIST-v2-arm64-dts-rockchip-Fix-sound-output-from.patch rename to packages/linux/patches/rockchip/rockchip-0041-FROMLIST-v2-arm64-dts-rockchip-Fix-sound-output-from.patch index f7c28ad3e2..e1925be5cc 100644 --- a/packages/linux/patches/rockchip/rockchip-0040-FROMLIST-v2-arm64-dts-rockchip-Fix-sound-output-from.patch +++ b/packages/linux/patches/rockchip/rockchip-0041-FROMLIST-v2-arm64-dts-rockchip-Fix-sound-output-from.patch @@ -1,7 +1,7 @@ -From 282e8b359334658c4fcd32c3da67021fde413069 Mon Sep 17 00:00:00 2001 +From 12a84f76d413b22140e3e944099dce455eecf9eb Mon Sep 17 00:00:00 2001 From: Hide Hako Date: Tue, 26 Aug 2025 01:44:00 +0000 -Subject: [PATCH 040/110] FROMLIST(v2): arm64: dts: rockchip: Fix sound output +Subject: [PATCH 041/113] FROMLIST(v2): arm64: dts: rockchip: Fix sound output from the audio jack on OrangePI5 Plus Currently, analog sound is not output from the audio jack. diff --git a/packages/linux/patches/rockchip/rockchip-0041-FROMLIST-v2-thermal-rockchip-unify-struct-rockchip_t.patch b/packages/linux/patches/rockchip/rockchip-0042-FROMLIST-v2-thermal-rockchip-unify-struct-rockchip_t.patch similarity index 98% rename from packages/linux/patches/rockchip/rockchip-0041-FROMLIST-v2-thermal-rockchip-unify-struct-rockchip_t.patch rename to packages/linux/patches/rockchip/rockchip-0042-FROMLIST-v2-thermal-rockchip-unify-struct-rockchip_t.patch index fdec935406..0ac17bcac7 100644 --- a/packages/linux/patches/rockchip/rockchip-0041-FROMLIST-v2-thermal-rockchip-unify-struct-rockchip_t.patch +++ b/packages/linux/patches/rockchip/rockchip-0042-FROMLIST-v2-thermal-rockchip-unify-struct-rockchip_t.patch @@ -1,7 +1,7 @@ -From b70df618e8c160d014bf5fea0b79024392dbca14 Mon Sep 17 00:00:00 2001 +From 337495c081b07056d5de0133f6e3b6670acdf943 Mon Sep 17 00:00:00 2001 From: Sebastian Reichel Date: Wed, 20 Aug 2025 19:40:47 +0200 -Subject: [PATCH 041/110] FROMLIST(v2): thermal: rockchip: unify struct +Subject: [PATCH 042/113] FROMLIST(v2): thermal: rockchip: unify struct rockchip_tsadc_chip format Unify all chip descriptions to the version without any empty diff --git a/packages/linux/patches/rockchip/rockchip-0042-FROMLIST-v2-thermal-rockchip-shut-up-GRF-warning.patch b/packages/linux/patches/rockchip/rockchip-0043-FROMLIST-v2-thermal-rockchip-shut-up-GRF-warning.patch similarity index 97% rename from packages/linux/patches/rockchip/rockchip-0042-FROMLIST-v2-thermal-rockchip-shut-up-GRF-warning.patch rename to packages/linux/patches/rockchip/rockchip-0043-FROMLIST-v2-thermal-rockchip-shut-up-GRF-warning.patch index f7ccc9ec33..1f32b9e3da 100644 --- a/packages/linux/patches/rockchip/rockchip-0042-FROMLIST-v2-thermal-rockchip-shut-up-GRF-warning.patch +++ b/packages/linux/patches/rockchip/rockchip-0043-FROMLIST-v2-thermal-rockchip-shut-up-GRF-warning.patch @@ -1,7 +1,7 @@ -From 69a30622c1b1abe35cb257c453dfc9e1e1974fe9 Mon Sep 17 00:00:00 2001 +From 54166452c61a7d21d43a50e21c21792d0d385bcf Mon Sep 17 00:00:00 2001 From: Sebastian Reichel Date: Wed, 20 Aug 2025 19:40:48 +0200 -Subject: [PATCH 042/110] FROMLIST(v2): thermal: rockchip: shut up GRF warning +Subject: [PATCH 043/113] FROMLIST(v2): thermal: rockchip: shut up GRF warning Most of the recent Rockchip devices do not have a GRF associated with the tsadc IP. Let's avoid printing a warning on those devices. diff --git a/packages/linux/patches/rockchip/rockchip-0043-FROMLIST-v2-dt-bindings-thermal-rockchip-tighten-grf.patch b/packages/linux/patches/rockchip/rockchip-0044-FROMLIST-v2-dt-bindings-thermal-rockchip-tighten-grf.patch similarity index 91% rename from packages/linux/patches/rockchip/rockchip-0043-FROMLIST-v2-dt-bindings-thermal-rockchip-tighten-grf.patch rename to packages/linux/patches/rockchip/rockchip-0044-FROMLIST-v2-dt-bindings-thermal-rockchip-tighten-grf.patch index 0e7f977d47..0a1e18e680 100644 --- a/packages/linux/patches/rockchip/rockchip-0043-FROMLIST-v2-dt-bindings-thermal-rockchip-tighten-grf.patch +++ b/packages/linux/patches/rockchip/rockchip-0044-FROMLIST-v2-dt-bindings-thermal-rockchip-tighten-grf.patch @@ -1,7 +1,7 @@ -From 2398581c3a37209c66ca731da60bb998b593fccb Mon Sep 17 00:00:00 2001 +From 4e175c0b45625bda97e578684b0ddd49d5d8135d Mon Sep 17 00:00:00 2001 From: Sebastian Reichel Date: Wed, 20 Aug 2025 19:40:49 +0200 -Subject: [PATCH 043/110] FROMLIST(v2): dt-bindings: thermal: rockchip: tighten +Subject: [PATCH 044/113] FROMLIST(v2): dt-bindings: thermal: rockchip: tighten grf requirements Instead of having an optional rockchip,grf property, forbid using it on diff --git a/packages/linux/patches/rockchip/rockchip-0044-FROMLIST-v3-media-rkvdec-Add-HEVC-backend.patch b/packages/linux/patches/rockchip/rockchip-0045-FROMLIST-v3-media-rkvdec-Add-HEVC-backend.patch similarity index 99% rename from packages/linux/patches/rockchip/rockchip-0044-FROMLIST-v3-media-rkvdec-Add-HEVC-backend.patch rename to packages/linux/patches/rockchip/rockchip-0045-FROMLIST-v3-media-rkvdec-Add-HEVC-backend.patch index f5de10403f..f5f5f5e331 100644 --- a/packages/linux/patches/rockchip/rockchip-0044-FROMLIST-v3-media-rkvdec-Add-HEVC-backend.patch +++ b/packages/linux/patches/rockchip/rockchip-0045-FROMLIST-v3-media-rkvdec-Add-HEVC-backend.patch @@ -1,7 +1,7 @@ -From 1ebb1a9a4d278a2bfe0be2e531145663bc371347 Mon Sep 17 00:00:00 2001 +From f3738d58ce76f1cc1852b4c05f897abaf27ad6a6 Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Fri, 5 Sep 2025 16:19:19 +0000 -Subject: [PATCH 044/110] FROMLIST(v3): media: rkvdec: Add HEVC backend +Subject: [PATCH 045/113] FROMLIST(v3): media: rkvdec: Add HEVC backend The Rockchip VDEC supports the HEVC codec with the Main and Main10 Profile up to Level 5.1 High tier: 4096x2304@60 fps. diff --git a/packages/linux/patches/rockchip/rockchip-0045-FROMLIST-v3-media-rkvdec-Add-variants-support.patch b/packages/linux/patches/rockchip/rockchip-0046-FROMLIST-v3-media-rkvdec-Add-variants-support.patch similarity index 97% rename from packages/linux/patches/rockchip/rockchip-0045-FROMLIST-v3-media-rkvdec-Add-variants-support.patch rename to packages/linux/patches/rockchip/rockchip-0046-FROMLIST-v3-media-rkvdec-Add-variants-support.patch index 543b1e7760..b77278647e 100644 --- a/packages/linux/patches/rockchip/rockchip-0045-FROMLIST-v3-media-rkvdec-Add-variants-support.patch +++ b/packages/linux/patches/rockchip/rockchip-0046-FROMLIST-v3-media-rkvdec-Add-variants-support.patch @@ -1,7 +1,7 @@ -From 2a003c3f8d0becac41d5b213f2876b7cbf38374d Mon Sep 17 00:00:00 2001 +From 0f399549d6ad29ca704b040df3876442a5a1e339 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Fri, 5 Sep 2025 16:19:20 +0000 -Subject: [PATCH 045/110] FROMLIST(v3): media: rkvdec: Add variants support +Subject: [PATCH 046/113] FROMLIST(v3): media: rkvdec: Add variants support Different versions of the Rockchip VDEC IP exists and one way they can differ is what decoding formats are supported. diff --git a/packages/linux/patches/rockchip/rockchip-0046-FROMLIST-v3-media-rkvdec-Implement-capability-filter.patch b/packages/linux/patches/rockchip/rockchip-0047-FROMLIST-v3-media-rkvdec-Implement-capability-filter.patch similarity index 97% rename from packages/linux/patches/rockchip/rockchip-0046-FROMLIST-v3-media-rkvdec-Implement-capability-filter.patch rename to packages/linux/patches/rockchip/rockchip-0047-FROMLIST-v3-media-rkvdec-Implement-capability-filter.patch index 4b0c5fdecd..284539f404 100644 --- a/packages/linux/patches/rockchip/rockchip-0046-FROMLIST-v3-media-rkvdec-Implement-capability-filter.patch +++ b/packages/linux/patches/rockchip/rockchip-0047-FROMLIST-v3-media-rkvdec-Implement-capability-filter.patch @@ -1,7 +1,7 @@ -From 23f2468e1177c45cb0b4e38eb9ee4139895525b1 Mon Sep 17 00:00:00 2001 +From a546b39d18dbe347a8fca613e2516b5ab1455bab Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 10 Aug 2025 21:24:33 +0000 -Subject: [PATCH 046/110] FROMLIST(v3): media: rkvdec: Implement capability +Subject: [PATCH 047/113] FROMLIST(v3): media: rkvdec: Implement capability filtering Add filtering of coded formats and controls depending on a variant diff --git a/packages/linux/patches/rockchip/rockchip-0047-FROMLIST-v3-media-rkvdec-Add-RK3288-variant.patch b/packages/linux/patches/rockchip/rockchip-0048-FROMLIST-v3-media-rkvdec-Add-RK3288-variant.patch similarity index 91% rename from packages/linux/patches/rockchip/rockchip-0047-FROMLIST-v3-media-rkvdec-Add-RK3288-variant.patch rename to packages/linux/patches/rockchip/rockchip-0048-FROMLIST-v3-media-rkvdec-Add-RK3288-variant.patch index e879446441..976532ef4f 100644 --- a/packages/linux/patches/rockchip/rockchip-0047-FROMLIST-v3-media-rkvdec-Add-RK3288-variant.patch +++ b/packages/linux/patches/rockchip/rockchip-0048-FROMLIST-v3-media-rkvdec-Add-RK3288-variant.patch @@ -1,7 +1,7 @@ -From 4a51d808c4b8be543bd68e313c0add85060b9042 Mon Sep 17 00:00:00 2001 +From 185058a4eb3e7f94ae94d2cc8aba767abbf9c391 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Sun, 10 Aug 2025 21:24:34 +0000 -Subject: [PATCH 047/110] FROMLIST(v3): media: rkvdec: Add RK3288 variant +Subject: [PATCH 048/113] FROMLIST(v3): media: rkvdec: Add RK3288 variant Add a RK3288 variant, a version of the Rockchip VDEC IP that only support HEVC decoding. diff --git a/packages/linux/patches/rockchip/rockchip-0048-FROMLIST-v3-media-rkvdec-Disable-QoS-for-HEVC-and-VP.patch b/packages/linux/patches/rockchip/rockchip-0049-FROMLIST-v3-media-rkvdec-Disable-QoS-for-HEVC-and-VP.patch similarity index 97% rename from packages/linux/patches/rockchip/rockchip-0048-FROMLIST-v3-media-rkvdec-Disable-QoS-for-HEVC-and-VP.patch rename to packages/linux/patches/rockchip/rockchip-0049-FROMLIST-v3-media-rkvdec-Disable-QoS-for-HEVC-and-VP.patch index 6de39456a4..4bd1c68334 100644 --- a/packages/linux/patches/rockchip/rockchip-0048-FROMLIST-v3-media-rkvdec-Disable-QoS-for-HEVC-and-VP.patch +++ b/packages/linux/patches/rockchip/rockchip-0049-FROMLIST-v3-media-rkvdec-Disable-QoS-for-HEVC-and-VP.patch @@ -1,7 +1,7 @@ -From e41a90ac22dea18394bf08c84ad06fdf3acc627e Mon Sep 17 00:00:00 2001 +From 1331c13da64a5d6d1d1549915bd1095c4049aab4 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Sun, 10 Aug 2025 21:24:35 +0000 -Subject: [PATCH 048/110] FROMLIST(v3): media: rkvdec: Disable QoS for HEVC and +Subject: [PATCH 049/113] FROMLIST(v3): media: rkvdec: Disable QoS for HEVC and VP9 on RK3328 The RK3328 VDEC has a HW quirk that require QoS to be disabled when HEVC diff --git a/packages/linux/patches/rockchip/rockchip-0049-FROMLIST-v3-media-dt-bindings-rockchip-vdec-Add-RK32.patch b/packages/linux/patches/rockchip/rockchip-0050-FROMLIST-v3-media-dt-bindings-rockchip-vdec-Add-RK32.patch similarity index 88% rename from packages/linux/patches/rockchip/rockchip-0049-FROMLIST-v3-media-dt-bindings-rockchip-vdec-Add-RK32.patch rename to packages/linux/patches/rockchip/rockchip-0050-FROMLIST-v3-media-dt-bindings-rockchip-vdec-Add-RK32.patch index 06c74b10e7..f24ee3e515 100644 --- a/packages/linux/patches/rockchip/rockchip-0049-FROMLIST-v3-media-dt-bindings-rockchip-vdec-Add-RK32.patch +++ b/packages/linux/patches/rockchip/rockchip-0050-FROMLIST-v3-media-dt-bindings-rockchip-vdec-Add-RK32.patch @@ -1,7 +1,7 @@ -From 336f77e4ca577455cb4274381cd9a1afe3a8f52f Mon Sep 17 00:00:00 2001 +From ab90388d1569247b46cdec1d98085ebdb387708d Mon Sep 17 00:00:00 2001 From: Jonas Karlman Date: Sun, 10 Aug 2025 21:24:36 +0000 -Subject: [PATCH 049/110] FROMLIST(v3): media: dt-bindings: rockchip,vdec: Add +Subject: [PATCH 050/113] FROMLIST(v3): media: dt-bindings: rockchip,vdec: Add RK3288 compatible Add a RK3288 compatible for a version of the Rockchip VDEC IP that only diff --git a/packages/linux/patches/rockchip/rockchip-0050-FROMLIST-v3-ARM-dts-rockchip-Add-vdec-node-for-RK328.patch b/packages/linux/patches/rockchip/rockchip-0051-FROMLIST-v3-ARM-dts-rockchip-Add-vdec-node-for-RK328.patch similarity index 93% rename from packages/linux/patches/rockchip/rockchip-0050-FROMLIST-v3-ARM-dts-rockchip-Add-vdec-node-for-RK328.patch rename to packages/linux/patches/rockchip/rockchip-0051-FROMLIST-v3-ARM-dts-rockchip-Add-vdec-node-for-RK328.patch index e91077a321..bb52323866 100644 --- a/packages/linux/patches/rockchip/rockchip-0050-FROMLIST-v3-ARM-dts-rockchip-Add-vdec-node-for-RK328.patch +++ b/packages/linux/patches/rockchip/rockchip-0051-FROMLIST-v3-ARM-dts-rockchip-Add-vdec-node-for-RK328.patch @@ -1,7 +1,7 @@ -From b0b5ea016e22fed212d60efac498ea0fe1f32513 Mon Sep 17 00:00:00 2001 +From e328a077d1580493ccb50d1ddbc4bba453faeed3 Mon Sep 17 00:00:00 2001 From: Alex Bee Date: Sun, 10 Aug 2025 21:24:37 +0000 -Subject: [PATCH 050/110] FROMLIST(v3): ARM: dts: rockchip: Add vdec node for +Subject: [PATCH 051/113] FROMLIST(v3): ARM: dts: rockchip: Add vdec node for RK3288 RK3288 contains a Rockchip VDEC block that only support HEVC diff --git a/packages/linux/patches/rockchip/rockchip-0051-FROMLIST-v4-drm-bridge-dw-hdmi-qp-Add-CEC-support.patch b/packages/linux/patches/rockchip/rockchip-0052-FROMLIST-v4-drm-bridge-dw-hdmi-qp-Add-CEC-support.patch similarity index 98% rename from packages/linux/patches/rockchip/rockchip-0051-FROMLIST-v4-drm-bridge-dw-hdmi-qp-Add-CEC-support.patch rename to packages/linux/patches/rockchip/rockchip-0052-FROMLIST-v4-drm-bridge-dw-hdmi-qp-Add-CEC-support.patch index 76a344f482..772ebcdf6e 100644 --- a/packages/linux/patches/rockchip/rockchip-0051-FROMLIST-v4-drm-bridge-dw-hdmi-qp-Add-CEC-support.patch +++ b/packages/linux/patches/rockchip/rockchip-0052-FROMLIST-v4-drm-bridge-dw-hdmi-qp-Add-CEC-support.patch @@ -1,7 +1,7 @@ -From 348914c07b7cf6c1e363448bfd6d9d7f0b777a00 Mon Sep 17 00:00:00 2001 +From 2821e9a052529c84f737797f364d8d9971234119 Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Wed, 3 Sep 2025 21:50:59 +0300 -Subject: [PATCH 051/110] FROMLIST(v4): drm/bridge: dw-hdmi-qp: Add CEC support +Subject: [PATCH 052/113] FROMLIST(v4): drm/bridge: dw-hdmi-qp: Add CEC support Add support for the CEC interface of the Synopsys DesignWare HDMI QP TX controller. diff --git a/packages/linux/patches/rockchip/rockchip-0052-FROMLIST-v4-drm-bridge-dw-hdmi-qp-Fixup-timer-base-s.patch b/packages/linux/patches/rockchip/rockchip-0053-FROMLIST-v4-drm-bridge-dw-hdmi-qp-Fixup-timer-base-s.patch similarity index 95% rename from packages/linux/patches/rockchip/rockchip-0052-FROMLIST-v4-drm-bridge-dw-hdmi-qp-Fixup-timer-base-s.patch rename to packages/linux/patches/rockchip/rockchip-0053-FROMLIST-v4-drm-bridge-dw-hdmi-qp-Fixup-timer-base-s.patch index 1bc8847246..5953291bc8 100644 --- a/packages/linux/patches/rockchip/rockchip-0052-FROMLIST-v4-drm-bridge-dw-hdmi-qp-Fixup-timer-base-s.patch +++ b/packages/linux/patches/rockchip/rockchip-0053-FROMLIST-v4-drm-bridge-dw-hdmi-qp-Fixup-timer-base-s.patch @@ -1,7 +1,7 @@ -From 767ba6b92dd6b409208540b8fe2e57361b20afb6 Mon Sep 17 00:00:00 2001 +From 035eda4e926172e50df888a1428a8efc78f0b368 Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Wed, 3 Sep 2025 21:51:00 +0300 -Subject: [PATCH 052/110] FROMLIST(v4): drm/bridge: dw-hdmi-qp: Fixup timer +Subject: [PATCH 053/113] FROMLIST(v4): drm/bridge: dw-hdmi-qp: Fixup timer base setup Currently the TIMER_BASE_CONFIG0 register gets initialized to a fixed diff --git a/packages/linux/patches/rockchip/rockchip-0053-FROMLIST-v4-drm-rockchip-dw_hdmi_qp-Improve-error-ha.patch b/packages/linux/patches/rockchip/rockchip-0054-FROMLIST-v4-drm-rockchip-dw_hdmi_qp-Improve-error-ha.patch similarity index 97% rename from packages/linux/patches/rockchip/rockchip-0053-FROMLIST-v4-drm-rockchip-dw_hdmi_qp-Improve-error-ha.patch rename to packages/linux/patches/rockchip/rockchip-0054-FROMLIST-v4-drm-rockchip-dw_hdmi_qp-Improve-error-ha.patch index 039ac3e4fe..6b65c72f8c 100644 --- a/packages/linux/patches/rockchip/rockchip-0053-FROMLIST-v4-drm-rockchip-dw_hdmi_qp-Improve-error-ha.patch +++ b/packages/linux/patches/rockchip/rockchip-0054-FROMLIST-v4-drm-rockchip-dw_hdmi_qp-Improve-error-ha.patch @@ -1,7 +1,7 @@ -From faaadd0ab0b18ee8d6b4c947557afb1945d49567 Mon Sep 17 00:00:00 2001 +From 8f2aaea3a01a5aec1e345b52e8cc42cc853a3560 Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Wed, 3 Sep 2025 21:51:01 +0300 -Subject: [PATCH 053/110] FROMLIST(v4): drm/rockchip: dw_hdmi_qp: Improve error +Subject: [PATCH 054/113] FROMLIST(v4): drm/rockchip: dw_hdmi_qp: Improve error handling with dev_err_probe() The error handling in dw_hdmi_qp_rockchip_bind() is quite inconsistent, diff --git a/packages/linux/patches/rockchip/rockchip-0054-FROMLIST-v4-drm-rockchip-dw_hdmi_qp-Provide-CEC-IRQ-.patch b/packages/linux/patches/rockchip/rockchip-0055-FROMLIST-v4-drm-rockchip-dw_hdmi_qp-Provide-CEC-IRQ-.patch similarity index 89% rename from packages/linux/patches/rockchip/rockchip-0054-FROMLIST-v4-drm-rockchip-dw_hdmi_qp-Provide-CEC-IRQ-.patch rename to packages/linux/patches/rockchip/rockchip-0055-FROMLIST-v4-drm-rockchip-dw_hdmi_qp-Provide-CEC-IRQ-.patch index 2ad0517cb1..9d39b6b997 100644 --- a/packages/linux/patches/rockchip/rockchip-0054-FROMLIST-v4-drm-rockchip-dw_hdmi_qp-Provide-CEC-IRQ-.patch +++ b/packages/linux/patches/rockchip/rockchip-0055-FROMLIST-v4-drm-rockchip-dw_hdmi_qp-Provide-CEC-IRQ-.patch @@ -1,7 +1,7 @@ -From 37289508c78629d0c52eb70ce608a86abef4bd61 Mon Sep 17 00:00:00 2001 +From 85d81d57e6a24ee6f91dde81ac6fed6746e9c1ad Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Wed, 3 Sep 2025 21:51:02 +0300 -Subject: [PATCH 054/110] FROMLIST(v4): drm/rockchip: dw_hdmi_qp: Provide CEC +Subject: [PATCH 055/113] FROMLIST(v4): drm/rockchip: dw_hdmi_qp: Provide CEC IRQ in dw_hdmi_qp_plat_data In order to support the CEC interface of the DesignWare HDMI QP IP diff --git a/packages/linux/patches/rockchip/rockchip-0055-FROMLIST-v4-drm-rockchip-dw_hdmi_qp-Provide-ref-cloc.patch b/packages/linux/patches/rockchip/rockchip-0056-FROMLIST-v4-drm-rockchip-dw_hdmi_qp-Provide-ref-cloc.patch similarity index 93% rename from packages/linux/patches/rockchip/rockchip-0055-FROMLIST-v4-drm-rockchip-dw_hdmi_qp-Provide-ref-cloc.patch rename to packages/linux/patches/rockchip/rockchip-0056-FROMLIST-v4-drm-rockchip-dw_hdmi_qp-Provide-ref-cloc.patch index 0a3a7ea2cd..e956471e45 100644 --- a/packages/linux/patches/rockchip/rockchip-0055-FROMLIST-v4-drm-rockchip-dw_hdmi_qp-Provide-ref-cloc.patch +++ b/packages/linux/patches/rockchip/rockchip-0056-FROMLIST-v4-drm-rockchip-dw_hdmi_qp-Provide-ref-cloc.patch @@ -1,7 +1,7 @@ -From afc0d2ce443fae831951445c9f819331815738a1 Mon Sep 17 00:00:00 2001 +From f0da02912d3614742821528f3fa88b37ff01235b Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Wed, 3 Sep 2025 21:51:03 +0300 -Subject: [PATCH 055/110] FROMLIST(v4): drm/rockchip: dw_hdmi_qp: Provide ref +Subject: [PATCH 056/113] FROMLIST(v4): drm/rockchip: dw_hdmi_qp: Provide ref clock rate in dw_hdmi_qp_plat_data In order to support correct initialization of the timer base in the HDMI diff --git a/packages/linux/patches/rockchip/rockchip-0056-FROMLIST-v4-arm64-defconfig-Enable-DW-HDMI-QP-CEC-su.patch b/packages/linux/patches/rockchip/rockchip-0057-FROMLIST-v4-arm64-defconfig-Enable-DW-HDMI-QP-CEC-su.patch similarity index 86% rename from packages/linux/patches/rockchip/rockchip-0056-FROMLIST-v4-arm64-defconfig-Enable-DW-HDMI-QP-CEC-su.patch rename to packages/linux/patches/rockchip/rockchip-0057-FROMLIST-v4-arm64-defconfig-Enable-DW-HDMI-QP-CEC-su.patch index ba0fa70d98..7102d15d1e 100644 --- a/packages/linux/patches/rockchip/rockchip-0056-FROMLIST-v4-arm64-defconfig-Enable-DW-HDMI-QP-CEC-su.patch +++ b/packages/linux/patches/rockchip/rockchip-0057-FROMLIST-v4-arm64-defconfig-Enable-DW-HDMI-QP-CEC-su.patch @@ -1,7 +1,7 @@ -From d61b410f5cdc63be3ef904c54b48c214f4cc5459 Mon Sep 17 00:00:00 2001 +From 8cb52b039896d9bba10c353cc8710301956024ac Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Wed, 3 Sep 2025 21:51:04 +0300 -Subject: [PATCH 056/110] FROMLIST(v4): arm64: defconfig: Enable DW HDMI QP CEC +Subject: [PATCH 057/113] FROMLIST(v4): arm64: defconfig: Enable DW HDMI QP CEC support Enable support for the CEC interface of the Synopsys DesignWare HDMI QP diff --git a/packages/linux/patches/rockchip/rockchip-0057-FROMLIST-v2-drm-rockchip-vop2-Check-bpc-before-switc.patch b/packages/linux/patches/rockchip/rockchip-0058-FROMLIST-v2-drm-rockchip-vop2-Check-bpc-before-switc.patch similarity index 96% rename from packages/linux/patches/rockchip/rockchip-0057-FROMLIST-v2-drm-rockchip-vop2-Check-bpc-before-switc.patch rename to packages/linux/patches/rockchip/rockchip-0058-FROMLIST-v2-drm-rockchip-vop2-Check-bpc-before-switc.patch index 75a9efaf91..5297beb387 100644 --- a/packages/linux/patches/rockchip/rockchip-0057-FROMLIST-v2-drm-rockchip-vop2-Check-bpc-before-switc.patch +++ b/packages/linux/patches/rockchip/rockchip-0058-FROMLIST-v2-drm-rockchip-vop2-Check-bpc-before-switc.patch @@ -1,7 +1,7 @@ -From 651996954ce004107887b35583cd9c8c3ea30ad2 Mon Sep 17 00:00:00 2001 +From e929fb875b5f8e89b18ef46936f60004ea69b2bf Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Mon, 25 Aug 2025 13:08:32 +0300 -Subject: [PATCH 057/110] FROMLIST(v2): drm/rockchip: vop2: Check bpc before +Subject: [PATCH 058/113] FROMLIST(v2): drm/rockchip: vop2: Check bpc before switching DCLK source When making use of the HDMI PHY PLL as a VOP2 DCLK source, it's output diff --git a/packages/linux/patches/rockchip/rockchip-0058-FROMLIST-v2-drm-bridge-dw-hdmi-qp-Handle-platform-su.patch b/packages/linux/patches/rockchip/rockchip-0059-FROMLIST-v2-drm-bridge-dw-hdmi-qp-Handle-platform-su.patch similarity index 95% rename from packages/linux/patches/rockchip/rockchip-0058-FROMLIST-v2-drm-bridge-dw-hdmi-qp-Handle-platform-su.patch rename to packages/linux/patches/rockchip/rockchip-0059-FROMLIST-v2-drm-bridge-dw-hdmi-qp-Handle-platform-su.patch index abb9da44a1..87fe02abf4 100644 --- a/packages/linux/patches/rockchip/rockchip-0058-FROMLIST-v2-drm-bridge-dw-hdmi-qp-Handle-platform-su.patch +++ b/packages/linux/patches/rockchip/rockchip-0059-FROMLIST-v2-drm-bridge-dw-hdmi-qp-Handle-platform-su.patch @@ -1,7 +1,7 @@ -From 597c148465e094c25109a997eff1ee17de63d3ef Mon Sep 17 00:00:00 2001 +From 59f83b7f89768445c82a4785eac9807160fbec26 Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Mon, 25 Aug 2025 13:08:33 +0300 -Subject: [PATCH 058/110] FROMLIST(v2): drm/bridge: dw-hdmi-qp: Handle platform +Subject: [PATCH 059/113] FROMLIST(v2): drm/bridge: dw-hdmi-qp: Handle platform supported formats and color depth Extend struct dw_hdmi_qp_plat_data to include the supported display diff --git a/packages/linux/patches/rockchip/rockchip-0059-FROMLIST-v2-drm-rockchip-dw_hdmi_qp-Switch-to-phy_co.patch b/packages/linux/patches/rockchip/rockchip-0060-FROMLIST-v2-drm-rockchip-dw_hdmi_qp-Switch-to-phy_co.patch similarity index 96% rename from packages/linux/patches/rockchip/rockchip-0059-FROMLIST-v2-drm-rockchip-dw_hdmi_qp-Switch-to-phy_co.patch rename to packages/linux/patches/rockchip/rockchip-0060-FROMLIST-v2-drm-rockchip-dw_hdmi_qp-Switch-to-phy_co.patch index d9e9de4f20..779a1b8dcb 100644 --- a/packages/linux/patches/rockchip/rockchip-0059-FROMLIST-v2-drm-rockchip-dw_hdmi_qp-Switch-to-phy_co.patch +++ b/packages/linux/patches/rockchip/rockchip-0060-FROMLIST-v2-drm-rockchip-dw_hdmi_qp-Switch-to-phy_co.patch @@ -1,7 +1,7 @@ -From 8dc2d1bbfacaa9848a62acd3c1efea6d2e97c8da Mon Sep 17 00:00:00 2001 +From 671efd7753fe87c1cc6be0bab8a2cfaca26e7ed8 Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Mon, 25 Aug 2025 13:08:34 +0300 -Subject: [PATCH 059/110] FROMLIST(v2): drm/rockchip: dw_hdmi_qp: Switch to +Subject: [PATCH 060/113] FROMLIST(v2): drm/rockchip: dw_hdmi_qp: Switch to phy_configure() Stop relying on phy_set_bus_width() based workaround to setup the TMDS diff --git a/packages/linux/patches/rockchip/rockchip-0060-FROMLIST-v2-drm-rockchip-dw_hdmi_qp-Use-bit-macros-f.patch b/packages/linux/patches/rockchip/rockchip-0061-FROMLIST-v2-drm-rockchip-dw_hdmi_qp-Use-bit-macros-f.patch similarity index 93% rename from packages/linux/patches/rockchip/rockchip-0060-FROMLIST-v2-drm-rockchip-dw_hdmi_qp-Use-bit-macros-f.patch rename to packages/linux/patches/rockchip/rockchip-0061-FROMLIST-v2-drm-rockchip-dw_hdmi_qp-Use-bit-macros-f.patch index f1453bd36b..d9c5ec4c63 100644 --- a/packages/linux/patches/rockchip/rockchip-0060-FROMLIST-v2-drm-rockchip-dw_hdmi_qp-Use-bit-macros-f.patch +++ b/packages/linux/patches/rockchip/rockchip-0061-FROMLIST-v2-drm-rockchip-dw_hdmi_qp-Use-bit-macros-f.patch @@ -1,7 +1,7 @@ -From 188311fd217fa841ed39d90faf1df996e9a2736a Mon Sep 17 00:00:00 2001 +From e1838fe1d781997c5bdc1254089e28d880930922 Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Mon, 25 Aug 2025 13:08:35 +0300 -Subject: [PATCH 060/110] FROMLIST(v2): drm/rockchip: dw_hdmi_qp: Use bit +Subject: [PATCH 061/113] FROMLIST(v2): drm/rockchip: dw_hdmi_qp: Use bit macros for RK3576 regs For consistency and improved readability, redefine a few RK3576 specific diff --git a/packages/linux/patches/rockchip/rockchip-0061-FROMLIST-v2-drm-rockchip-dw_hdmi_qp-Add-high-color-d.patch b/packages/linux/patches/rockchip/rockchip-0062-FROMLIST-v2-drm-rockchip-dw_hdmi_qp-Add-high-color-d.patch similarity index 97% rename from packages/linux/patches/rockchip/rockchip-0061-FROMLIST-v2-drm-rockchip-dw_hdmi_qp-Add-high-color-d.patch rename to packages/linux/patches/rockchip/rockchip-0062-FROMLIST-v2-drm-rockchip-dw_hdmi_qp-Add-high-color-d.patch index b2ad2209c6..8aa7356334 100644 --- a/packages/linux/patches/rockchip/rockchip-0061-FROMLIST-v2-drm-rockchip-dw_hdmi_qp-Add-high-color-d.patch +++ b/packages/linux/patches/rockchip/rockchip-0062-FROMLIST-v2-drm-rockchip-dw_hdmi_qp-Add-high-color-d.patch @@ -1,7 +1,7 @@ -From 2ec72fe626cc0884acd12846eebb9d45223af3e4 Mon Sep 17 00:00:00 2001 +From fd66808419f9d3e093a71d73814ec1472e740ede Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Mon, 25 Aug 2025 13:08:36 +0300 -Subject: [PATCH 061/110] FROMLIST(v2): drm/rockchip: dw_hdmi_qp: Add high +Subject: [PATCH 062/113] FROMLIST(v2): drm/rockchip: dw_hdmi_qp: Add high color depth support Since both RK3576 and RK3588 SoCs are capable of handling 10 bpc color diff --git a/packages/linux/patches/rockchip/rockchip-0062-FROMLIST-v1-drm-rockchip-vop2-Add-delay-between-poll.patch b/packages/linux/patches/rockchip/rockchip-0063-FROMLIST-v1-drm-rockchip-vop2-Add-delay-between-poll.patch similarity index 91% rename from packages/linux/patches/rockchip/rockchip-0062-FROMLIST-v1-drm-rockchip-vop2-Add-delay-between-poll.patch rename to packages/linux/patches/rockchip/rockchip-0063-FROMLIST-v1-drm-rockchip-vop2-Add-delay-between-poll.patch index f727666564..58eda95245 100644 --- a/packages/linux/patches/rockchip/rockchip-0062-FROMLIST-v1-drm-rockchip-vop2-Add-delay-between-poll.patch +++ b/packages/linux/patches/rockchip/rockchip-0063-FROMLIST-v1-drm-rockchip-vop2-Add-delay-between-poll.patch @@ -1,7 +1,7 @@ -From 96cd4543bdacaa418a90fe1562b6173e6c8010cb Mon Sep 17 00:00:00 2001 +From fd50358b5d74c9db6223463c474e319dd773a715 Mon Sep 17 00:00:00 2001 From: Andy Yan Date: Fri, 18 Jul 2025 14:41:13 +0800 -Subject: [PATCH 062/110] FROMLIST(v1): drm/rockchip: vop2: Add delay between +Subject: [PATCH 063/113] FROMLIST(v1): drm/rockchip: vop2: Add delay between poll registers According to the implementation of read_poll_timeout_atomic, if the @@ -17,7 +17,7 @@ Signed-off-by: Andy Yan 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c -index 42a4833a90a3..bf771b2f2188 100644 +index e11df91b90a6..928aff657d8c 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c @@ -2066,7 +2066,7 @@ static void rk3568_vop2_wait_for_port_mux_done(struct vop2 *vop2) diff --git a/packages/linux/patches/rockchip/rockchip-0063-FROMLIST-v1-drm-rockchip-vop2-Only-wait-for-changed-.patch b/packages/linux/patches/rockchip/rockchip-0064-FROMLIST-v1-drm-rockchip-vop2-Only-wait-for-changed-.patch similarity index 92% rename from packages/linux/patches/rockchip/rockchip-0063-FROMLIST-v1-drm-rockchip-vop2-Only-wait-for-changed-.patch rename to packages/linux/patches/rockchip/rockchip-0064-FROMLIST-v1-drm-rockchip-vop2-Only-wait-for-changed-.patch index f757971710..9ef0384a3d 100644 --- a/packages/linux/patches/rockchip/rockchip-0063-FROMLIST-v1-drm-rockchip-vop2-Only-wait-for-changed-.patch +++ b/packages/linux/patches/rockchip/rockchip-0064-FROMLIST-v1-drm-rockchip-vop2-Only-wait-for-changed-.patch @@ -1,7 +1,7 @@ -From 436116cd76f704a2578c0f06bf8dc648639e8948 Mon Sep 17 00:00:00 2001 +From a28c0ccd253ccfe71781c4874be2f82cfb5e1494 Mon Sep 17 00:00:00 2001 From: Andy Yan Date: Fri, 18 Jul 2025 14:41:14 +0800 -Subject: [PATCH 063/110] FROMLIST(v1): drm/rockchip: vop2: Only wait for +Subject: [PATCH 064/113] FROMLIST(v1): drm/rockchip: vop2: Only wait for changed layer cfg done when there is pending cfgdone bits The write of cfgdone bits always done at .atomic_flush. @@ -17,7 +17,7 @@ Signed-off-by: Andy Yan 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c -index bf771b2f2188..5a3d8c834ca9 100644 +index 928aff657d8c..f18ddf3240ab 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c @@ -2106,6 +2106,7 @@ static void rk3568_vop2_setup_layer_mixer(struct vop2_video_port *vp) diff --git a/packages/linux/patches/rockchip/rockchip-0064-FROMLIST-v1-media-verisilicon-Export-only-needed-pix.patch b/packages/linux/patches/rockchip/rockchip-0065-FROMLIST-v1-media-verisilicon-Export-only-needed-pix.patch similarity index 94% rename from packages/linux/patches/rockchip/rockchip-0064-FROMLIST-v1-media-verisilicon-Export-only-needed-pix.patch rename to packages/linux/patches/rockchip/rockchip-0065-FROMLIST-v1-media-verisilicon-Export-only-needed-pix.patch index 4c7e352ca3..5b250f848c 100644 --- a/packages/linux/patches/rockchip/rockchip-0064-FROMLIST-v1-media-verisilicon-Export-only-needed-pix.patch +++ b/packages/linux/patches/rockchip/rockchip-0065-FROMLIST-v1-media-verisilicon-Export-only-needed-pix.patch @@ -1,7 +1,7 @@ -From 06085c0d6f3ade9ac6d6fe657c52090367113810 Mon Sep 17 00:00:00 2001 +From 727dece5ed15a37ea74babe4c862a191316ed005 Mon Sep 17 00:00:00 2001 From: Benjamin Gaignard Date: Tue, 24 Jun 2025 14:29:38 +0200 -Subject: [PATCH 064/110] FROMLIST(v1): media: verisilicon: Export only needed +Subject: [PATCH 065/113] FROMLIST(v1): media: verisilicon: Export only needed pixels formats. When enumerating the pixels formats check if the context diff --git a/packages/linux/patches/rockchip/rockchip-0065-FROMLIST-v2-media-verisilicon-Explicitly-disable-sel.patch b/packages/linux/patches/rockchip/rockchip-0066-FROMLIST-v2-media-verisilicon-Explicitly-disable-sel.patch similarity index 94% rename from packages/linux/patches/rockchip/rockchip-0065-FROMLIST-v2-media-verisilicon-Explicitly-disable-sel.patch rename to packages/linux/patches/rockchip/rockchip-0066-FROMLIST-v2-media-verisilicon-Explicitly-disable-sel.patch index fbb215201a..5b8d88e281 100644 --- a/packages/linux/patches/rockchip/rockchip-0065-FROMLIST-v2-media-verisilicon-Explicitly-disable-sel.patch +++ b/packages/linux/patches/rockchip/rockchip-0066-FROMLIST-v2-media-verisilicon-Explicitly-disable-sel.patch @@ -1,7 +1,7 @@ -From d2762b029235ee2eae0e8967032c810a36a2032b Mon Sep 17 00:00:00 2001 +From 5b54b1f6ace36d92449924078e99c7948786264e Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Thu, 28 Aug 2025 01:49:00 +0000 -Subject: [PATCH 065/110] FROMLIST(v2): media: verisilicon: Explicitly disable +Subject: [PATCH 066/113] FROMLIST(v2): media: verisilicon: Explicitly disable selection api ioctls for decoders Call the dedicated v4l2_disable_ioctl helper instead of manually diff --git a/packages/linux/patches/rockchip/rockchip-0066-DETLEV-v3-bitmap-introduce-hardware-specific-bitfiel.patch b/packages/linux/patches/rockchip/rockchip-0067-DETLEV-v3-bitmap-introduce-hardware-specific-bitfiel.patch similarity index 96% rename from packages/linux/patches/rockchip/rockchip-0066-DETLEV-v3-bitmap-introduce-hardware-specific-bitfiel.patch rename to packages/linux/patches/rockchip/rockchip-0067-DETLEV-v3-bitmap-introduce-hardware-specific-bitfiel.patch index fb73bbc90d..8a106e00da 100644 --- a/packages/linux/patches/rockchip/rockchip-0066-DETLEV-v3-bitmap-introduce-hardware-specific-bitfiel.patch +++ b/packages/linux/patches/rockchip/rockchip-0067-DETLEV-v3-bitmap-introduce-hardware-specific-bitfiel.patch @@ -1,7 +1,7 @@ -From f68dca914c801c29aedaa9ce11e173be7e98d33b Mon Sep 17 00:00:00 2001 +From 304f4b351cf11ab58cc6635fbeb350572ff06145 Mon Sep 17 00:00:00 2001 From: Nicolas Frattaroli Date: Mon, 23 Jun 2025 18:05:29 +0200 -Subject: [PATCH 066/110] DETLEV(v3): bitmap: introduce hardware-specific +Subject: [PATCH 067/113] DETLEV(v3): bitmap: introduce hardware-specific bitfield operations Hardware of various vendors, but very notably Rockchip, often uses @@ -35,7 +35,7 @@ Signed-off-by: Nicolas Frattaroli create mode 100644 include/linux/hw_bitfield.h diff --git a/MAINTAINERS b/MAINTAINERS -index 8e1c8da14af1..7e0eff6c982c 100644 +index afddc0e6dba3..f544e6b390c0 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -4276,6 +4276,7 @@ F: include/linux/bits.h diff --git a/packages/linux/patches/rockchip/rockchip-0067-DETLEV-v3-media-rkvdec-Switch-to-using-structs-inste.patch b/packages/linux/patches/rockchip/rockchip-0068-DETLEV-v3-media-rkvdec-Switch-to-using-structs-inste.patch similarity index 99% rename from packages/linux/patches/rockchip/rockchip-0067-DETLEV-v3-media-rkvdec-Switch-to-using-structs-inste.patch rename to packages/linux/patches/rockchip/rockchip-0068-DETLEV-v3-media-rkvdec-Switch-to-using-structs-inste.patch index ea76c30d76..31f8bd576c 100644 --- a/packages/linux/patches/rockchip/rockchip-0067-DETLEV-v3-media-rkvdec-Switch-to-using-structs-inste.patch +++ b/packages/linux/patches/rockchip/rockchip-0068-DETLEV-v3-media-rkvdec-Switch-to-using-structs-inste.patch @@ -1,7 +1,7 @@ -From 782a01dbdaf289bfdd63b55c67a984956239d362 Mon Sep 17 00:00:00 2001 +From 70840b756a7b6da7ba727608c62f8f4acb49c348 Mon Sep 17 00:00:00 2001 From: Detlev Casanova Date: Tue, 27 May 2025 11:00:22 -0400 -Subject: [PATCH 067/110] DETLEV(v3): media: rkvdec: Switch to using structs +Subject: [PATCH 068/113] DETLEV(v3): media: rkvdec: Switch to using structs instead of writel In an effort to merge the rkvdec2 driver [1] with this one, switch from diff --git a/packages/linux/patches/rockchip/rockchip-0068-DETLEV-v3-media-rkvdec-Move-cabac-tables-to-their-ow.patch b/packages/linux/patches/rockchip/rockchip-0069-DETLEV-v3-media-rkvdec-Move-cabac-tables-to-their-ow.patch similarity index 99% rename from packages/linux/patches/rockchip/rockchip-0068-DETLEV-v3-media-rkvdec-Move-cabac-tables-to-their-ow.patch rename to packages/linux/patches/rockchip/rockchip-0069-DETLEV-v3-media-rkvdec-Move-cabac-tables-to-their-ow.patch index db57a19319..057665d4ef 100644 --- a/packages/linux/patches/rockchip/rockchip-0068-DETLEV-v3-media-rkvdec-Move-cabac-tables-to-their-ow.patch +++ b/packages/linux/patches/rockchip/rockchip-0069-DETLEV-v3-media-rkvdec-Move-cabac-tables-to-their-ow.patch @@ -1,7 +1,7 @@ -From ef5b5f945e283a8f77f60618534dd432a26e7da0 Mon Sep 17 00:00:00 2001 +From fd25bb5be59256183a78f714f6d78fee8aadde0a Mon Sep 17 00:00:00 2001 From: Detlev Casanova Date: Tue, 10 Jun 2025 10:34:55 -0400 -Subject: [PATCH 068/110] DETLEV(v3): media: rkvdec: Move cabac tables to their +Subject: [PATCH 069/113] DETLEV(v3): media: rkvdec: Move cabac tables to their own source file This is in preparation to add support for new variants that will use the diff --git a/packages/linux/patches/rockchip/rockchip-0069-DETLEV-v3-media-rkvdec-Use-structs-to-represent-the-.patch b/packages/linux/patches/rockchip/rockchip-0070-DETLEV-v3-media-rkvdec-Use-structs-to-represent-the-.patch similarity index 97% rename from packages/linux/patches/rockchip/rockchip-0069-DETLEV-v3-media-rkvdec-Use-structs-to-represent-the-.patch rename to packages/linux/patches/rockchip/rockchip-0070-DETLEV-v3-media-rkvdec-Use-structs-to-represent-the-.patch index 9649b2fdf3..3b990f8939 100644 --- a/packages/linux/patches/rockchip/rockchip-0069-DETLEV-v3-media-rkvdec-Use-structs-to-represent-the-.patch +++ b/packages/linux/patches/rockchip/rockchip-0070-DETLEV-v3-media-rkvdec-Use-structs-to-represent-the-.patch @@ -1,7 +1,7 @@ -From cd89d3ebe664b274a09fc71641bec93ea23153f7 Mon Sep 17 00:00:00 2001 +From f92e4fef12f5d0b74f35a2dcfb41cee998bd0596 Mon Sep 17 00:00:00 2001 From: Detlev Casanova Date: Wed, 11 Jun 2025 12:28:56 -0400 -Subject: [PATCH 069/110] DETLEV(v3): media: rkvdec: Use structs to represent +Subject: [PATCH 070/113] DETLEV(v3): media: rkvdec: Use structs to represent the HW RPS This is in preparation to add support for other variants of the decoder. diff --git a/packages/linux/patches/rockchip/rockchip-0070-DETLEV-v3-media-rkvdec-Move-h264-functions-to-common.patch b/packages/linux/patches/rockchip/rockchip-0071-DETLEV-v3-media-rkvdec-Move-h264-functions-to-common.patch similarity index 99% rename from packages/linux/patches/rockchip/rockchip-0070-DETLEV-v3-media-rkvdec-Move-h264-functions-to-common.patch rename to packages/linux/patches/rockchip/rockchip-0071-DETLEV-v3-media-rkvdec-Move-h264-functions-to-common.patch index fba6003914..fecab3133d 100644 --- a/packages/linux/patches/rockchip/rockchip-0070-DETLEV-v3-media-rkvdec-Move-h264-functions-to-common.patch +++ b/packages/linux/patches/rockchip/rockchip-0071-DETLEV-v3-media-rkvdec-Move-h264-functions-to-common.patch @@ -1,7 +1,7 @@ -From 69ee828d2be233b68c79c4f508d6301c5c6b46d2 Mon Sep 17 00:00:00 2001 +From 2905f7b94e83ab3fa86b4b4994301d426a2f61f9 Mon Sep 17 00:00:00 2001 From: Detlev Casanova Date: Tue, 10 Jun 2025 13:16:24 -0400 -Subject: [PATCH 070/110] DETLEV(v3): media: rkvdec: Move h264 functions to +Subject: [PATCH 071/113] DETLEV(v3): media: rkvdec: Move h264 functions to common file This is a preparation commit to add support for new variants of the diff --git a/packages/linux/patches/rockchip/rockchip-0071-DETLEV-v3-media-rkvdec-Move-hevc-functions-to-common.patch b/packages/linux/patches/rockchip/rockchip-0072-DETLEV-v3-media-rkvdec-Move-hevc-functions-to-common.patch similarity index 99% rename from packages/linux/patches/rockchip/rockchip-0071-DETLEV-v3-media-rkvdec-Move-hevc-functions-to-common.patch rename to packages/linux/patches/rockchip/rockchip-0072-DETLEV-v3-media-rkvdec-Move-hevc-functions-to-common.patch index b201d0e052..684cad8b66 100644 --- a/packages/linux/patches/rockchip/rockchip-0071-DETLEV-v3-media-rkvdec-Move-hevc-functions-to-common.patch +++ b/packages/linux/patches/rockchip/rockchip-0072-DETLEV-v3-media-rkvdec-Move-hevc-functions-to-common.patch @@ -1,7 +1,7 @@ -From 64bf8c3a0864e3965fd98cac14c2ef78a378487e Mon Sep 17 00:00:00 2001 +From f2fe86de819775aab379dbdffdcfa49bff5b1e8d Mon Sep 17 00:00:00 2001 From: Detlev Casanova Date: Fri, 15 Aug 2025 17:24:37 -0400 -Subject: [PATCH 071/110] DETLEV(v3): media: rkvdec: Move hevc functions to +Subject: [PATCH 072/113] DETLEV(v3): media: rkvdec: Move hevc functions to common file This is a preparation commit to add support for new variants of the diff --git a/packages/linux/patches/rockchip/rockchip-0072-DETLEV-v3-media-rkvdec-Add-per-variant-configuration.patch b/packages/linux/patches/rockchip/rockchip-0073-DETLEV-v3-media-rkvdec-Add-per-variant-configuration.patch similarity index 97% rename from packages/linux/patches/rockchip/rockchip-0072-DETLEV-v3-media-rkvdec-Add-per-variant-configuration.patch rename to packages/linux/patches/rockchip/rockchip-0073-DETLEV-v3-media-rkvdec-Add-per-variant-configuration.patch index 66d76a98c6..e1c79201e8 100644 --- a/packages/linux/patches/rockchip/rockchip-0072-DETLEV-v3-media-rkvdec-Add-per-variant-configuration.patch +++ b/packages/linux/patches/rockchip/rockchip-0073-DETLEV-v3-media-rkvdec-Add-per-variant-configuration.patch @@ -1,7 +1,7 @@ -From 5c670dd3e98cf211977ad8250374c3b930c74f69 Mon Sep 17 00:00:00 2001 +From b6bcd43f4184b6e127c48c88f4810a444fb6a3cf Mon Sep 17 00:00:00 2001 From: Detlev Casanova Date: Tue, 10 Jun 2025 14:05:08 -0400 -Subject: [PATCH 072/110] DETLEV(v3): media: rkvdec: Add per variant +Subject: [PATCH 073/113] DETLEV(v3): media: rkvdec: Add per variant configuration This is to prepare for adding different variants of the decoder and diff --git a/packages/linux/patches/rockchip/rockchip-0073-DETLEV-v3-media-rkvdec-Add-RCB-and-SRAM-support.patch b/packages/linux/patches/rockchip/rockchip-0074-DETLEV-v3-media-rkvdec-Add-RCB-and-SRAM-support.patch similarity index 98% rename from packages/linux/patches/rockchip/rockchip-0073-DETLEV-v3-media-rkvdec-Add-RCB-and-SRAM-support.patch rename to packages/linux/patches/rockchip/rockchip-0074-DETLEV-v3-media-rkvdec-Add-RCB-and-SRAM-support.patch index 6636cce253..9abc6a6684 100644 --- a/packages/linux/patches/rockchip/rockchip-0073-DETLEV-v3-media-rkvdec-Add-RCB-and-SRAM-support.patch +++ b/packages/linux/patches/rockchip/rockchip-0074-DETLEV-v3-media-rkvdec-Add-RCB-and-SRAM-support.patch @@ -1,7 +1,7 @@ -From 13c2fee823cc9eeffd89249f0d1514759e29ccfe Mon Sep 17 00:00:00 2001 +From 7fe9eeaee3d92649de595694906140e40786451e Mon Sep 17 00:00:00 2001 From: Detlev Casanova Date: Tue, 10 Jun 2025 14:53:27 -0400 -Subject: [PATCH 073/110] DETLEV(v3): media: rkvdec: Add RCB and SRAM support +Subject: [PATCH 074/113] DETLEV(v3): media: rkvdec: Add RCB and SRAM support The RCB (Rows and Cols Buffers) are a set of buffers used by other variations of the decoder to store temporary data. diff --git a/packages/linux/patches/rockchip/rockchip-0074-DETLEV-v3-media-rkvdec-Support-per-variant-interrupt.patch b/packages/linux/patches/rockchip/rockchip-0075-DETLEV-v3-media-rkvdec-Support-per-variant-interrupt.patch similarity index 94% rename from packages/linux/patches/rockchip/rockchip-0074-DETLEV-v3-media-rkvdec-Support-per-variant-interrupt.patch rename to packages/linux/patches/rockchip/rockchip-0075-DETLEV-v3-media-rkvdec-Support-per-variant-interrupt.patch index ad88eb223a..bf8ffcb3d6 100644 --- a/packages/linux/patches/rockchip/rockchip-0074-DETLEV-v3-media-rkvdec-Support-per-variant-interrupt.patch +++ b/packages/linux/patches/rockchip/rockchip-0075-DETLEV-v3-media-rkvdec-Support-per-variant-interrupt.patch @@ -1,7 +1,7 @@ -From b603c6be6c6cdbf838d820baf4a882a60608ee7c Mon Sep 17 00:00:00 2001 +From 1a2551d968c1a3568f11fe2dedc9d08d6f4272a2 Mon Sep 17 00:00:00 2001 From: Detlev Casanova Date: Tue, 10 Jun 2025 15:13:46 -0400 -Subject: [PATCH 074/110] DETLEV(v3): media: rkvdec: Support per-variant +Subject: [PATCH 075/113] DETLEV(v3): media: rkvdec: Support per-variant interrupt handler Preparation commit for supporting different variants with different diff --git a/packages/linux/patches/rockchip/rockchip-0076-DETLEV-v3-media-rkvdec-Add-H264-support-for-the-VDPU.patch b/packages/linux/patches/rockchip/rockchip-0076-DETLEV-v3-media-rkvdec-Add-H264-support-for-the-VDPU.patch deleted file mode 100644 index 953629f092..0000000000 --- a/packages/linux/patches/rockchip/rockchip-0076-DETLEV-v3-media-rkvdec-Add-H264-support-for-the-VDPU.patch +++ /dev/null @@ -1,1260 +0,0 @@ -From 06be75c794fa97a05db831e874baaef34fdc44ac Mon Sep 17 00:00:00 2001 -From: Detlev Casanova -Date: Tue, 10 Jun 2025 15:53:52 -0400 -Subject: [PATCH 076/110] DETLEV(v3): media: rkvdec: Add H264 support for the - VDPU381 variant - -This decoder variant is found in Rockchip RK3588 SoC family. - -Like for rkvdec on rk3399, it supports the NV12, NV15, NV16 and NV20 -output formats and level up to 5.1. - -The maximum width and height have been significantly increased -supporting up to 65520 pixels for both. - -Also make sure to only expose the first core and ignore the other -until mutli-core is supported. - -Fluster score for JVT-AVC_V1 is 129/135. - -Signed-off-by: Detlev Casanova ---- - .../media/platform/rockchip/rkvdec/Makefile | 1 + - .../rockchip/rkvdec/rkvdec-h264-common.h | 2 + - .../platform/rockchip/rkvdec/rkvdec-h264.c | 2 - - .../rockchip/rkvdec/rkvdec-vdpu381-h264.c | 469 ++++++++++++++++++ - .../rockchip/rkvdec/rkvdec-vdpu381-regs.h | 427 ++++++++++++++++ - .../media/platform/rockchip/rkvdec/rkvdec.c | 173 ++++++- - .../media/platform/rockchip/rkvdec/rkvdec.h | 6 + - 7 files changed, 1076 insertions(+), 4 deletions(-) - create mode 100644 drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu381-h264.c - create mode 100644 drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu381-regs.h - -diff --git a/drivers/media/platform/rockchip/rkvdec/Makefile b/drivers/media/platform/rockchip/rkvdec/Makefile -index 3b34f39b17d6..c4167eb6fc79 100644 ---- a/drivers/media/platform/rockchip/rkvdec/Makefile -+++ b/drivers/media/platform/rockchip/rkvdec/Makefile -@@ -7,4 +7,5 @@ rockchip-vdec-y += \ - rkvdec-h264-common.o \ - rkvdec-hevc.o \ - rkvdec-rcb.o \ -+ rkvdec-vdpu381-h264.o \ - rkvdec-vp9.o -diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec-h264-common.h b/drivers/media/platform/rockchip/rkvdec/rkvdec-h264-common.h -index df95a1678734..38446e2886e3 100644 ---- a/drivers/media/platform/rockchip/rkvdec/rkvdec-h264-common.h -+++ b/drivers/media/platform/rockchip/rkvdec/rkvdec-h264-common.h -@@ -66,6 +66,8 @@ struct rkvdec_rps { - u32 reserved1[66]; - } __packed; - -+extern const s8 rkvdec_h264_cabac_table[4][464][2]; -+ - void lookup_ref_buf_idx(struct rkvdec_ctx *ctx, struct rkvdec_h264_run *run); - void assemble_hw_rps(struct v4l2_h264_reflist_builder *builder, - struct rkvdec_h264_run *run, -diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec-h264.c b/drivers/media/platform/rockchip/rkvdec/rkvdec-h264.c -index a80b5b44a570..d50e985cff95 100644 ---- a/drivers/media/platform/rockchip/rkvdec/rkvdec-h264.c -+++ b/drivers/media/platform/rockchip/rkvdec/rkvdec-h264.c -@@ -16,8 +16,6 @@ - #include "rkvdec-regs.h" - #include "rkvdec-h264-common.h" - --extern const s8 rkvdec_h264_cabac_table[4][464][2]; -- - /* Size with u32 units. */ - #define RKV_CABAC_INIT_BUFFER_SIZE (3680 + 128) - #define RKV_ERROR_INFO_SIZE (256 * 144 * 4) -diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu381-h264.c b/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu381-h264.c -new file mode 100644 -index 000000000000..e65a56bc9c63 ---- /dev/null -+++ b/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu381-h264.c -@@ -0,0 +1,469 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Rockchip VDPU381 Video Decoder H264 backend -+ * -+ * Copyright (C) 2024 Collabora, Ltd. -+ * Detlev Casanova -+ */ -+ -+#include -+#include -+ -+#include "rkvdec.h" -+#include "rkvdec-rcb.h" -+#include "rkvdec-h264-common.h" -+#include "rkvdec-vdpu381-regs.h" -+ -+struct rkvdec_sps { -+ u16 seq_parameter_set_id: 4; -+ u16 profile_idc: 8; -+ u16 constraint_set3_flag: 1; -+ u16 chroma_format_idc: 2; -+ u16 bit_depth_luma: 3; -+ u16 bit_depth_chroma: 3; -+ u16 qpprime_y_zero_transform_bypass_flag: 1; -+ u16 log2_max_frame_num_minus4: 4; -+ u16 max_num_ref_frames: 5; -+ u16 pic_order_cnt_type: 2; -+ u16 log2_max_pic_order_cnt_lsb_minus4: 4; -+ u16 delta_pic_order_always_zero_flag: 1; -+ u16 pic_width_in_mbs: 12; -+ u16 pic_height_in_mbs: 12; -+ u16 frame_mbs_only_flag: 1; -+ u16 mb_adaptive_frame_field_flag: 1; -+ u16 direct_8x8_inference_flag: 1; -+ u16 mvc_extension_enable: 1; -+ u16 num_views: 2; -+ -+ u16 reserved_bits: 12; -+ u16 reserved[11]; -+} __packed; -+ -+struct rkvdec_pps { -+ u16 pic_parameter_set_id: 8; -+ u16 pps_seq_parameter_set_id: 5; -+ u16 entropy_coding_mode_flag: 1; -+ u16 bottom_field_pic_order_in_frame_present_flag: 1; -+ u16 num_ref_idx_l0_default_active_minus1: 5; -+ u16 num_ref_idx_l1_default_active_minus1: 5; -+ u16 weighted_pred_flag: 1; -+ u16 weighted_bipred_idc: 2; -+ u16 pic_init_qp_minus26: 7; -+ u16 pic_init_qs_minus26: 6; -+ u16 chroma_qp_index_offset: 5; -+ u16 deblocking_filter_control_present_flag: 1; -+ u16 constrained_intra_pred_flag: 1; -+ u16 redundant_pic_cnt_present: 1; -+ u16 transform_8x8_mode_flag: 1; -+ u16 second_chroma_qp_index_offset: 5; -+ u16 scaling_list_enable_flag: 1; -+ u32 scaling_list_address; -+ u16 is_longterm; -+ -+ u8 reserved[3]; -+} __packed; -+ -+struct rkvdec_sps_pps { -+ struct rkvdec_sps sps; -+ struct rkvdec_pps pps; -+} __packed; -+ -+/* Data structure describing auxiliary buffer format. */ -+struct rkvdec_h264_priv_tbl { -+ s8 cabac_table[4][464][2]; -+ struct rkvdec_h264_scaling_list scaling_list; -+ struct rkvdec_sps_pps param_set[256]; -+ struct rkvdec_rps rps; -+}; -+ -+struct rkvdec_h264_ctx { -+ struct rkvdec_aux_buf priv_tbl; -+ struct rkvdec_h264_reflists reflists; -+ struct rkvdec_vdpu381_regs_h264 regs; -+}; -+ -+static void assemble_hw_pps(struct rkvdec_ctx *ctx, -+ struct rkvdec_h264_run *run) -+{ -+ struct rkvdec_h264_ctx *h264_ctx = ctx->priv; -+ const struct v4l2_ctrl_h264_sps *sps = run->sps; -+ const struct v4l2_ctrl_h264_pps *pps = run->pps; -+ const struct v4l2_ctrl_h264_decode_params *dec_params = run->decode_params; -+ const struct v4l2_h264_dpb_entry *dpb = dec_params->dpb; -+ struct rkvdec_h264_priv_tbl *priv_tbl = h264_ctx->priv_tbl.cpu; -+ struct rkvdec_sps_pps *hw_ps; -+ dma_addr_t scaling_list_address; -+ u32 scaling_distance; -+ u32 i; -+ -+ /* -+ * HW read the SPS/PPS information from PPS packet index by PPS id. -+ * offset from the base can be calculated by PPS_id * 32 (size per PPS -+ * packet unit). so the driver copy SPS/PPS information to the exact PPS -+ * packet unit for HW accessing. -+ */ -+ hw_ps = &priv_tbl->param_set[pps->pic_parameter_set_id]; -+ memset(hw_ps, 0, sizeof(*hw_ps)); -+ -+ /* write sps */ -+ hw_ps->sps.seq_parameter_set_id = sps->seq_parameter_set_id; -+ hw_ps->sps.profile_idc = sps->profile_idc; -+ hw_ps->sps.constraint_set3_flag = !!(sps->constraint_set_flags & (1 << 3)); -+ hw_ps->sps.chroma_format_idc = sps->chroma_format_idc; -+ hw_ps->sps.bit_depth_luma = sps->bit_depth_luma_minus8; -+ hw_ps->sps.bit_depth_chroma = sps->bit_depth_chroma_minus8; -+ hw_ps->sps.qpprime_y_zero_transform_bypass_flag = -+ !!(sps->flags & V4L2_H264_SPS_FLAG_QPPRIME_Y_ZERO_TRANSFORM_BYPASS); -+ hw_ps->sps.log2_max_frame_num_minus4 = sps->log2_max_frame_num_minus4; -+ hw_ps->sps.max_num_ref_frames = sps->max_num_ref_frames; -+ hw_ps->sps.pic_order_cnt_type = sps->pic_order_cnt_type; -+ hw_ps->sps.log2_max_pic_order_cnt_lsb_minus4 = -+ sps->log2_max_pic_order_cnt_lsb_minus4; -+ hw_ps->sps.delta_pic_order_always_zero_flag = -+ !!(sps->flags & V4L2_H264_SPS_FLAG_DELTA_PIC_ORDER_ALWAYS_ZERO); -+ hw_ps->sps.mvc_extension_enable = 1; -+ hw_ps->sps.num_views = 1; -+ -+ /* -+ * Use the SPS values since they are already in macroblocks -+ * dimensions, height can be field height (halved) if -+ * V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY is not set and also it allows -+ * decoding smaller images into larger allocation which can be used -+ * to implementing SVC spatial layer support. -+ */ -+ hw_ps->sps.pic_width_in_mbs = sps->pic_width_in_mbs_minus1 + 1; -+ hw_ps->sps.pic_height_in_mbs = sps->pic_height_in_map_units_minus1 + 1; -+ hw_ps->sps.frame_mbs_only_flag = -+ !!(sps->flags & V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY); -+ hw_ps->sps.mb_adaptive_frame_field_flag = -+ !!(sps->flags & V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD); -+ hw_ps->sps.direct_8x8_inference_flag = -+ !!(sps->flags & V4L2_H264_SPS_FLAG_DIRECT_8X8_INFERENCE); -+ -+ /* write pps */ -+ hw_ps->pps.pic_parameter_set_id = pps->pic_parameter_set_id; -+ hw_ps->pps.pps_seq_parameter_set_id = pps->seq_parameter_set_id; -+ hw_ps->pps.entropy_coding_mode_flag = -+ !!(pps->flags & V4L2_H264_PPS_FLAG_ENTROPY_CODING_MODE); -+ hw_ps->pps.bottom_field_pic_order_in_frame_present_flag = -+ !!(pps->flags & V4L2_H264_PPS_FLAG_BOTTOM_FIELD_PIC_ORDER_IN_FRAME_PRESENT); -+ hw_ps->pps.num_ref_idx_l0_default_active_minus1 = -+ pps->num_ref_idx_l0_default_active_minus1; -+ hw_ps->pps.num_ref_idx_l1_default_active_minus1 = -+ pps->num_ref_idx_l1_default_active_minus1; -+ hw_ps->pps.weighted_pred_flag = -+ !!(pps->flags & V4L2_H264_PPS_FLAG_WEIGHTED_PRED); -+ hw_ps->pps.weighted_bipred_idc = pps->weighted_bipred_idc; -+ hw_ps->pps.pic_init_qp_minus26 = pps->pic_init_qp_minus26; -+ hw_ps->pps.pic_init_qs_minus26 = pps->pic_init_qs_minus26; -+ hw_ps->pps.chroma_qp_index_offset = pps->chroma_qp_index_offset; -+ hw_ps->pps.deblocking_filter_control_present_flag = -+ !!(pps->flags & V4L2_H264_PPS_FLAG_DEBLOCKING_FILTER_CONTROL_PRESENT); -+ hw_ps->pps.constrained_intra_pred_flag = -+ !!(pps->flags & V4L2_H264_PPS_FLAG_CONSTRAINED_INTRA_PRED); -+ hw_ps->pps.redundant_pic_cnt_present = -+ !!(pps->flags & V4L2_H264_PPS_FLAG_REDUNDANT_PIC_CNT_PRESENT); -+ hw_ps->pps.transform_8x8_mode_flag = -+ !!(pps->flags & V4L2_H264_PPS_FLAG_TRANSFORM_8X8_MODE); -+ hw_ps->pps.second_chroma_qp_index_offset = pps->second_chroma_qp_index_offset; -+ hw_ps->pps.scaling_list_enable_flag = -+ !!(pps->flags & V4L2_H264_PPS_FLAG_SCALING_MATRIX_PRESENT); -+ -+ /* -+ * To be on the safe side, program the scaling matrix address -+ */ -+ scaling_distance = offsetof(struct rkvdec_h264_priv_tbl, scaling_list); -+ scaling_list_address = h264_ctx->priv_tbl.dma + scaling_distance; -+ hw_ps->pps.scaling_list_address = scaling_list_address; -+ -+ for (i = 0; i < ARRAY_SIZE(dec_params->dpb); i++) { -+ if (dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM) -+ hw_ps->pps.is_longterm |= (1 << i); -+ } -+} -+ -+static void rkvdec_write_regs(struct rkvdec_ctx *ctx) -+{ -+ struct rkvdec_dev *rkvdec = ctx->dev; -+ struct rkvdec_h264_ctx *h264_ctx = ctx->priv; -+ -+ rkvdec_memcpy_toio(rkvdec->regs + OFFSET_COMMON_REGS, -+ &h264_ctx->regs.common, -+ sizeof(h264_ctx->regs.common)); -+ rkvdec_memcpy_toio(rkvdec->regs + OFFSET_CODEC_PARAMS_REGS, -+ &h264_ctx->regs.h264_param, -+ sizeof(h264_ctx->regs.h264_param)); -+ rkvdec_memcpy_toio(rkvdec->regs + OFFSET_COMMON_ADDR_REGS, -+ &h264_ctx->regs.common_addr, -+ sizeof(h264_ctx->regs.common_addr)); -+ rkvdec_memcpy_toio(rkvdec->regs + OFFSET_CODEC_ADDR_REGS, -+ &h264_ctx->regs.h264_addr, -+ sizeof(h264_ctx->regs.h264_addr)); -+ rkvdec_memcpy_toio(rkvdec->regs + OFFSET_POC_HIGHBIT_REGS, -+ &h264_ctx->regs.h264_highpoc, -+ sizeof(h264_ctx->regs.h264_highpoc)); -+} -+ -+static void config_registers(struct rkvdec_ctx *ctx, -+ struct rkvdec_h264_run *run) -+{ -+ const struct v4l2_ctrl_h264_decode_params *dec_params = run->decode_params; -+ const struct v4l2_h264_dpb_entry *dpb = dec_params->dpb; -+ struct rkvdec_h264_ctx *h264_ctx = ctx->priv; -+ dma_addr_t priv_start_addr = h264_ctx->priv_tbl.dma; -+ const struct v4l2_pix_format_mplane *dst_fmt; -+ struct vb2_v4l2_buffer *src_buf = run->base.bufs.src; -+ struct vb2_v4l2_buffer *dst_buf = run->base.bufs.dst; -+ struct rkvdec_vdpu381_regs_h264 *regs = &h264_ctx->regs; -+ const struct v4l2_format *f; -+ dma_addr_t rlc_addr; -+ dma_addr_t dst_addr; -+ u32 hor_virstride; -+ u32 ver_virstride; -+ u32 y_virstride; -+ u32 offset; -+ u32 pixels; -+ u32 i; -+ -+ memset(regs, 0, sizeof(*regs)); -+ -+ /* Set H264 mode */ -+ regs->common.reg009.dec_mode = VDPU381_MODE_H264; -+ -+ /* Set config */ -+ regs->common.reg011.buf_empty_en = 1; -+ regs->common.reg011.dec_clkgate_e = 1; -+ regs->common.reg011.dec_timeout_e = 1; -+ regs->common.reg011.pix_range_detection_e = 1; -+ -+ /* -+ * Even though the scan list address can be set in RPS, -+ * with some frames, it will try to use the address set in the register. -+ */ -+ regs->common.reg012.scanlist_addr_valid_en = 1; -+ -+ /* Set IDR flag */ -+ regs->common.reg013.cur_pic_is_idr = -+ !!(dec_params->flags & V4L2_H264_DECODE_PARAM_FLAG_IDR_PIC); -+ -+ /* Set input stream length */ -+ regs->common.stream_len = vb2_get_plane_payload(&src_buf->vb2_buf, 0); -+ -+ /* Set max slice number */ -+ regs->common.reg017.slice_num = MAX_SLICE_NUMBER; -+ -+ /* Set strides */ -+ f = &ctx->decoded_fmt; -+ dst_fmt = &f->fmt.pix_mp; -+ hor_virstride = dst_fmt->plane_fmt[0].bytesperline; -+ ver_virstride = dst_fmt->height; -+ y_virstride = hor_virstride * ver_virstride; -+ -+ pixels = dst_fmt->height * dst_fmt->width; -+ -+ regs->common.reg018.y_hor_virstride = hor_virstride / 16; -+ regs->common.reg019.uv_hor_virstride = hor_virstride / 16; -+ regs->common.reg020.y_virstride = y_virstride / 16; -+ -+ /* Activate block gating */ -+ regs->common.reg026.swreg_block_gating_e = 0xfffef; -+ regs->common.reg026.reg_cfg_gating_en = 1; -+ -+ /* Set timeout threshold */ -+ if (pixels < RKVDEC_1080P_PIXELS) -+ regs->common.timeout_threshold = RKVDEC_TIMEOUT_1080p; -+ else if (pixels < RKVDEC_4K_PIXELS) -+ regs->common.timeout_threshold = RKVDEC_TIMEOUT_4K; -+ else if (pixels < RKVDEC_8K_PIXELS) -+ regs->common.timeout_threshold = RKVDEC_TIMEOUT_8K; -+ else -+ regs->common.timeout_threshold = RKVDEC_TIMEOUT_MAX; -+ -+ /* Set TOP and BOTTOM POCs */ -+ regs->h264_param.cur_top_poc = dec_params->top_field_order_cnt; -+ regs->h264_param.cur_bot_poc = dec_params->bottom_field_order_cnt; -+ -+ /* Set ref pic address & poc */ -+ for (i = 0; i < ARRAY_SIZE(dec_params->dpb); i++) { -+ struct vb2_buffer *vb_buf = run->ref_buf[i]; -+ dma_addr_t buf_dma; -+ -+ /* -+ * If a DPB entry is unused or invalid, address of current destination -+ * buffer is returned. -+ */ -+ if (!vb_buf) -+ vb_buf = &dst_buf->vb2_buf; -+ -+ buf_dma = vb2_dma_contig_plane_dma_addr(vb_buf, 0); -+ -+ /* Set reference addresses */ -+ regs->h264_addr.ref_base[i] = buf_dma; -+ -+ /* Set COLMV addresses */ -+ regs->h264_addr.colmv_base[i] = buf_dma + ctx->colmv_offset; -+ -+ struct rkvdec_vdpu381_h264_ref_info *ref_info = -+ ®s->h264_param.ref_info_regs[i / 4].ref_info[i % 4]; -+ -+ ref_info->ref_field = -+ !!(dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_FIELD); -+ ref_info->ref_colmv_use_flag = -+ !!(dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_ACTIVE); -+ ref_info->ref_topfield_used = -+ !!(dpb[i].fields & V4L2_H264_TOP_FIELD_REF); -+ ref_info->ref_botfield_used = -+ !!(dpb[i].fields & V4L2_H264_BOTTOM_FIELD_REF); -+ -+ regs->h264_param.ref_pocs[i * 2] = -+ dpb[i].top_field_order_cnt; -+ regs->h264_param.ref_pocs[i * 2 + 1] = -+ dpb[i].bottom_field_order_cnt; -+ } -+ -+ /* Set rlc base address (input stream) */ -+ rlc_addr = vb2_dma_contig_plane_dma_addr(&src_buf->vb2_buf, 0); -+ regs->common_addr.rlc_base = rlc_addr; -+ regs->common_addr.rlcwrite_base = rlc_addr; -+ -+ /* Set output base address */ -+ dst_addr = vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0); -+ regs->common_addr.decout_base = dst_addr; -+ regs->common_addr.error_ref_base = dst_addr; -+ -+ /* Set colmv address */ -+ regs->common_addr.colmv_cur_base = dst_addr + ctx->colmv_offset; -+ -+ /* Set RCB addresses */ -+ for (i = 0; i < rkvdec_rcb_buf_count(ctx); i++) -+ regs->common_addr.rcb_base[i] = rkvdec_rcb_buf_dma_addr(ctx, i); -+ -+ /* Set hw pps address */ -+ offset = offsetof(struct rkvdec_h264_priv_tbl, param_set); -+ regs->h264_addr.pps_base = priv_start_addr + offset; -+ -+ /* Set hw rps address */ -+ offset = offsetof(struct rkvdec_h264_priv_tbl, rps); -+ regs->h264_addr.rps_base = priv_start_addr + offset; -+ -+ /* Set cabac table */ -+ offset = offsetof(struct rkvdec_h264_priv_tbl, cabac_table); -+ regs->h264_addr.cabactbl_base = priv_start_addr + offset; -+ -+ offset = offsetof(struct rkvdec_h264_priv_tbl, scaling_list); -+ regs->h264_addr.scanlist_addr = priv_start_addr + offset; -+ -+ rkvdec_write_regs(ctx); -+} -+ -+static int rkvdec_h264_start(struct rkvdec_ctx *ctx) -+{ -+ struct rkvdec_dev *rkvdec = ctx->dev; -+ struct rkvdec_h264_priv_tbl *priv_tbl; -+ struct rkvdec_h264_ctx *h264_ctx; -+ struct v4l2_ctrl *ctrl; -+ int ret; -+ -+ ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, -+ V4L2_CID_STATELESS_H264_SPS); -+ if (!ctrl) -+ return -EINVAL; -+ -+ ret = rkvdec_h264_validate_sps(ctx, ctrl->p_new.p_h264_sps); -+ if (ret) -+ return ret; -+ -+ h264_ctx = kzalloc(sizeof(*h264_ctx), GFP_KERNEL); -+ if (!h264_ctx) -+ return -ENOMEM; -+ -+ priv_tbl = dma_alloc_coherent(rkvdec->dev, sizeof(*priv_tbl), -+ &h264_ctx->priv_tbl.dma, GFP_KERNEL); -+ if (!priv_tbl) { -+ ret = -ENOMEM; -+ goto err_free_ctx; -+ } -+ -+ h264_ctx->priv_tbl.size = sizeof(*priv_tbl); -+ h264_ctx->priv_tbl.cpu = priv_tbl; -+ memcpy(priv_tbl->cabac_table, rkvdec_h264_cabac_table, -+ sizeof(rkvdec_h264_cabac_table)); -+ -+ ctx->priv = h264_ctx; -+ return 0; -+ -+err_free_ctx: -+ kfree(h264_ctx); -+ return ret; -+} -+ -+static void rkvdec_h264_stop(struct rkvdec_ctx *ctx) -+{ -+ struct rkvdec_h264_ctx *h264_ctx = ctx->priv; -+ struct rkvdec_dev *rkvdec = ctx->dev; -+ -+ dma_free_coherent(rkvdec->dev, h264_ctx->priv_tbl.size, -+ h264_ctx->priv_tbl.cpu, h264_ctx->priv_tbl.dma); -+ kfree(h264_ctx); -+} -+ -+static int rkvdec_h264_run(struct rkvdec_ctx *ctx) -+{ -+ struct v4l2_h264_reflist_builder reflist_builder; -+ struct rkvdec_dev *rkvdec = ctx->dev; -+ struct rkvdec_h264_ctx *h264_ctx = ctx->priv; -+ struct rkvdec_h264_priv_tbl *tbl = h264_ctx->priv_tbl.cpu; -+ struct rkvdec_h264_run run; -+ u32 watchdog_time; -+ -+ rkvdec_h264_run_preamble(ctx, &run); -+ -+ /* Build the P/B{0,1} ref lists. */ -+ v4l2_h264_init_reflist_builder(&reflist_builder, run.decode_params, -+ run.sps, run.decode_params->dpb); -+ v4l2_h264_build_p_ref_list(&reflist_builder, h264_ctx->reflists.p); -+ v4l2_h264_build_b_ref_lists(&reflist_builder, h264_ctx->reflists.b0, -+ h264_ctx->reflists.b1); -+ -+ assemble_hw_scaling_list(&run, &tbl->scaling_list); -+ assemble_hw_pps(ctx, &run); -+ lookup_ref_buf_idx(ctx, &run); -+ assemble_hw_rps(&reflist_builder, &run, &h264_ctx->reflists, &tbl->rps); -+ -+ config_registers(ctx, &run); -+ -+ rkvdec_run_postamble(ctx, &run.base); -+ -+ /* Set watchdog at 2 times the hardware timeout threshold */ -+ u64 timeout_threshold = h264_ctx->regs.common.timeout_threshold; -+ unsigned long axi_rate = clk_get_rate(rkvdec->axi_clk); -+ -+ if (axi_rate) -+ watchdog_time = 2 * (1000 * timeout_threshold) / axi_rate; -+ else -+ watchdog_time = 2000; -+ schedule_delayed_work(&rkvdec->watchdog_work, -+ msecs_to_jiffies(watchdog_time)); -+ -+ /* Start decoding! */ -+ writel(VDPU381_DEC_E_BIT, rkvdec->regs + VDPU381_REG_DEC_E); -+ -+ return 0; -+} -+ -+static int rkvdec_h264_try_ctrl(struct rkvdec_ctx *ctx, struct v4l2_ctrl *ctrl) -+{ -+ if (ctrl->id == V4L2_CID_STATELESS_H264_SPS) -+ return rkvdec_h264_validate_sps(ctx, ctrl->p_new.p_h264_sps); -+ -+ return 0; -+} -+ -+const struct rkvdec_coded_fmt_ops rkvdec_vdpu381_h264_fmt_ops = { -+ .adjust_fmt = rkvdec_h264_adjust_fmt, -+ .get_image_fmt = rkvdec_h264_get_image_fmt, -+ .start = rkvdec_h264_start, -+ .stop = rkvdec_h264_stop, -+ .run = rkvdec_h264_run, -+ .try_ctrl = rkvdec_h264_try_ctrl, -+}; -diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu381-regs.h b/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu381-regs.h -new file mode 100644 -index 000000000000..11b545e9ee7e ---- /dev/null -+++ b/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu381-regs.h -@@ -0,0 +1,427 @@ -+/* SPDX-License-Identifier: GPL-2.0 */ -+/* -+ * Rockchip VDPU381 Video Decoder driver registers description -+ * -+ * Copyright (C) 2024 Collabora, Ltd. -+ * Detlev Casanova -+ */ -+ -+#include -+ -+#ifndef _RKVDEC_REGS_H_ -+#define _RKVDEC_REGS_H_ -+ -+#define OFFSET_COMMON_REGS (8 * sizeof(u32)) -+#define OFFSET_CODEC_PARAMS_REGS (64 * sizeof(u32)) -+#define OFFSET_COMMON_ADDR_REGS (128 * sizeof(u32)) -+#define OFFSET_CODEC_ADDR_REGS (160 * sizeof(u32)) -+#define OFFSET_POC_HIGHBIT_REGS (200 * sizeof(u32)) -+ -+#define VDPU381_MODE_HEVC 0 -+#define VDPU381_MODE_H264 1 -+#define VDPU381_MODE_VP9 2 -+#define VDPU381_MODE_AVS2 3 -+ -+#define MAX_SLICE_NUMBER 0x3fff -+ -+#define RKVDEC_1080P_PIXELS (1920 * 1080) -+#define RKVDEC_4K_PIXELS (4096 * 2304) -+#define RKVDEC_8K_PIXELS (7680 * 4320) -+#define RKVDEC_TIMEOUT_1080p (0xefffff) -+#define RKVDEC_TIMEOUT_4K (0x2cfffff) -+#define RKVDEC_TIMEOUT_8K (0x4ffffff) -+#define RKVDEC_TIMEOUT_MAX (0xffffffff) -+ -+#define VDPU381_REG_DEC_E 0x028 -+#define VDPU381_DEC_E_BIT 1 -+ -+#define VDPU381_REG_IMPORTANT_EN 0x02c -+#define VDPU381_DEC_IRQ_DISABLE BIT(4) -+ -+#define VDPU381_REG_STA_INT 0x380 -+#define VDPU381_STA_INT_DEC_RDY_STA BIT(2) -+#define VDPU381_STA_INT_ERROR BIT(4) -+#define VDPU381_STA_INT_TIMEOUT BIT(5) -+#define VDPU381_STA_INT_SOFTRESET_RDY BIT(9) -+ -+/* base: OFFSET_COMMON_REGS */ -+struct rkvdec_vdpu381_regs_common { -+ struct rkvdec_vdpu381_in_out { -+ u32 in_endian : 1; -+ u32 in_swap32_e : 1; -+ u32 in_swap64_e : 1; -+ u32 str_endian : 1; -+ u32 str_swap32_e : 1; -+ u32 str_swap64_e : 1; -+ u32 out_endian : 1; -+ u32 out_swap32_e : 1; -+ u32 out_cbcr_swap : 1; -+ u32 out_swap64_e : 1; -+ u32 reserved : 22; -+ } reg008; -+ -+ struct rkvdec_vdpu381_dec_mode { -+ u32 dec_mode : 10; -+ u32 reserved : 22; -+ } reg009; -+ -+ struct rkvdec_vdpu381_dec_e { -+ u32 dec_e : 1; -+ u32 reserved : 31; -+ } reg010; -+ -+ struct rkvdec_vdpu381_important_en { -+ u32 reserved : 1; -+ u32 dec_clkgate_e : 1; -+ u32 dec_e_strmd_clkgate_dis : 1; -+ u32 reserved0 : 1; -+ -+ u32 dec_irq_dis : 1; -+ u32 dec_timeout_e : 1; -+ u32 buf_empty_en : 1; -+ u32 reserved1 : 3; -+ -+ u32 dec_e_rewrite_valid : 1; -+ u32 reserved2 : 9; -+ u32 softrst_en_p : 1; -+ u32 force_softreset_valid : 1; -+ u32 reserved3 : 2; -+ u32 pix_range_detection_e : 1; -+ u32 reserved4 : 7; -+ } reg011; -+ -+ struct rkvdec_vdpu381_sencodary_en { -+ u32 wr_ddr_align_en : 1; -+ u32 colmv_compress_en : 1; -+ u32 fbc_e : 1; -+ u32 reserved0 : 1; -+ -+ u32 buspr_slot_disable : 1; -+ u32 error_info_en : 1; -+ u32 info_collect_en : 1; -+ u32 wait_reset_en : 1; -+ -+ u32 scanlist_addr_valid_en : 1; -+ u32 scale_down_en : 1; -+ u32 error_cfg_wr_disable : 1; -+ u32 reserved1 : 21; -+ } reg012; -+ -+ struct rkvdec_vdpu381_en_mode_set { -+ u32 timeout_mode : 1; -+ u32 req_timeout_rst_sel : 1; -+ u32 reserved0 : 1; -+ u32 dec_commonirq_mode : 1; -+ u32 reserved1 : 2; -+ u32 stmerror_waitdecfifo_empty : 1; -+ u32 reserved2 : 2; -+ u32 h26x_streamd_error_mode : 1; -+ u32 reserved3 : 2; -+ u32 allow_not_wr_unref_bframe : 1; -+ u32 fbc_output_wr_disable : 1; -+ u32 reserved4 : 1; -+ u32 colmv_error_mode : 1; -+ -+ u32 reserved5 : 2; -+ u32 h26x_error_mode : 1; -+ u32 reserved6 : 2; -+ u32 ycacherd_prior : 1; -+ u32 reserved7 : 2; -+ u32 cur_pic_is_idr : 1; -+ u32 reserved8 : 1; -+ u32 right_auto_rst_disable : 1; -+ u32 frame_end_err_rst_flag : 1; -+ u32 rd_prior_mode : 1; -+ u32 rd_ctrl_prior_mode : 1; -+ u32 reserved9 : 1; -+ u32 filter_outbuf_mode : 1; -+ } reg013; -+ -+ struct rkvdec_vdpu381_fbc_param_set { -+ u32 fbc_force_uncompress : 1; -+ -+ u32 reserved0 : 2; -+ u32 allow_16x8_cp_flag : 1; -+ u32 reserved1 : 2; -+ -+ u32 fbc_h264_exten_4or8_flag : 1; -+ u32 reserved2 : 25; -+ } reg014; -+ -+ struct rkvdec_vdpu381_stream_param_set { -+ u32 rlc_mode_direct_write : 1; -+ u32 rlc_mode : 1; -+ u32 reserved0 : 3; -+ -+ u32 strm_start_bit : 7; -+ u32 reserved1 : 20; -+ } reg015; -+ -+ u32 stream_len; -+ -+ struct rkvdec_vdpu381_slice_number { -+ u32 slice_num : 25; -+ u32 reserved : 7; -+ } reg017; -+ -+ struct rkvdec_vdpu381_y_hor_stride { -+ u32 y_hor_virstride : 16; -+ u32 reserved : 16; -+ } reg018; -+ -+ struct rkvdec_vdpu381_uv_hor_stride { -+ u32 uv_hor_virstride : 16; -+ u32 reserved : 16; -+ } reg019; -+ -+ struct rkvdec_vdpu381_y_stride { -+ u32 y_virstride : 28; -+ u32 reserved : 4; -+ } reg020; -+ -+ struct rkvdec_vdpu381_error_ctrl_set { -+ u32 inter_error_prc_mode : 1; -+ u32 error_intra_mode : 1; -+ u32 error_deb_en : 1; -+ u32 picidx_replace : 5; -+ u32 error_spread_e : 1; -+ u32 reserved0 : 3; -+ u32 error_inter_pred_cross_slice : 1; -+ u32 reserved1 : 11; -+ u32 roi_error_ctu_cal_en : 1; -+ u32 reserved2 : 7; -+ } reg021; -+ -+ struct rkvdec_vdpu381_err_roi_ctu_offset_start { -+ u32 roi_x_ctu_offset_st : 12; -+ u32 reserved0 : 4; -+ u32 roi_y_ctu_offset_st : 12; -+ u32 reserved1 : 4; -+ } reg022; -+ -+ struct rkvdec_vdpu381_err_roi_ctu_offset_end { -+ u32 roi_x_ctu_offset_end : 12; -+ u32 reserved0 : 4; -+ u32 roi_y_ctu_offset_end : 12; -+ u32 reserved1 : 4; -+ } reg023; -+ -+ struct rkvdec_vdpu381_cabac_error_en_lowbits { -+ u32 cabac_err_en_lowbits : 32; -+ } reg024; -+ -+ struct rkvdec_vdpu381_cabac_error_en_highbits { -+ u32 cabac_err_en_highbits : 30; -+ u32 reserved : 2; -+ } reg025; -+ -+ struct rkvdec_vdpu381_block_gating_en { -+ u32 swreg_block_gating_e : 20; -+ u32 reserved : 11; -+ u32 reg_cfg_gating_en : 1; -+ } reg026; -+ -+ struct SW027_CORE_SAFE_PIXELS { -+ u32 core_safe_x_pixels : 16; -+ u32 core_safe_y_pixels : 16; -+ } reg027; -+ -+ struct rkvdec_vdpu381_multiply_core_ctrl { -+ u32 swreg_vp9_wr_prob_idx : 3; -+ u32 reserved0 : 1; -+ u32 swreg_vp9_rd_prob_idx : 3; -+ u32 reserved1 : 1; -+ -+ u32 swreg_ref_req_advance_flag : 1; -+ u32 sw_colmv_req_advance_flag : 1; -+ u32 sw_poc_only_highbit_flag : 1; -+ u32 sw_poc_arb_flag : 1; -+ -+ u32 reserved2 : 4; -+ u32 sw_film_idx : 10; -+ u32 reserved3 : 2; -+ u32 sw_pu_req_mismatch_dis : 1; -+ u32 sw_colmv_req_mismatch_dis : 1; -+ u32 reserved4 : 2; -+ } reg028; -+ -+ struct SW029_SCALE_DOWN_CTRL { -+ u32 scale_down_hor_ratio : 2; -+ u32 reserved0 : 6; -+ u32 scale_down_vrz_ratio : 2; -+ u32 reserved1 : 22; -+ } reg029; -+ -+ struct SW032_Y_SCALE_DOWN_TILE8x8_HOR_STRIDE { -+ u32 y_scale_down_hor_stride : 20; -+ u32 reserved0 : 12; -+ } reg030; -+ -+ struct SW031_UV_SCALE_DOWN_TILE8x8_HOR_STRIDE { -+ u32 uv_scale_down_hor_stride : 20; -+ u32 reserved0 : 12; -+ } reg031; -+ -+ u32 timeout_threshold; -+} __packed; -+ -+/* base: OFFSET_COMMON_ADDR_REGS */ -+struct rkvdec_vdpu381_regs_common_addr { -+ u32 rlc_base; -+ u32 rlcwrite_base; -+ u32 decout_base; -+ u32 colmv_cur_base; -+ u32 error_ref_base; -+ u32 rcb_base[10]; -+} __packed; -+ -+struct rkvdec_vdpu381_h26x_set { -+ u32 h26x_frame_orslice : 1; -+ u32 h26x_rps_mode : 1; -+ u32 h26x_stream_mode : 1; -+ u32 h26x_stream_lastpacket : 1; -+ u32 h264_firstslice_flag : 1; -+ u32 reserved : 27; -+} __packed; -+ -+/* base: OFFSET_CODEC_PARAMS_REGS */ -+struct rkvdec_vdpu381_regs_h264_params { -+ struct rkvdec_vdpu381_h26x_set reg064; -+ -+ u32 cur_top_poc; -+ u32 cur_bot_poc; -+ u32 ref_pocs[32]; -+ -+ struct rkvdec_vdpu381_h264_info { -+ struct rkvdec_vdpu381_h264_ref_info { -+ u32 ref_field : 1; -+ u32 ref_topfield_used : 1; -+ u32 ref_botfield_used : 1; -+ u32 ref_colmv_use_flag : 1; -+ u32 ref_reserved : 4; -+ } __packed ref_info[4]; -+ } __packed ref_info_regs[4]; -+ -+ u32 reserved_103_111[9]; -+ -+ struct rkvdec_vdpu381_error_ref_info { -+ u32 avs2_ref_error_field : 1; -+ u32 avs2_ref_error_topfield : 1; -+ u32 ref_error_topfield_used : 1; -+ u32 ref_error_botfield_used : 1; -+ u32 reserved : 28; -+ } reg112; -+} __packed; -+ -+struct rkvdec_vdpu381_regs_hevc_params { -+ struct rkvdec_vdpu381_h26x_set reg064; -+ -+ u32 cur_top_poc; -+ u32 cur_bot_poc; -+ -+ u32 reg067_082_ref_poc[16]; -+ -+ u32 reserved_083_098[16]; -+ -+ struct rkvdec_vdpu381_hevc_ref_valid { -+ u32 hevc_ref_valid_0 : 1; -+ u32 hevc_ref_valid_1 : 1; -+ u32 hevc_ref_valid_2 : 1; -+ u32 hevc_ref_valid_3 : 1; -+ u32 reserve0 : 4; -+ u32 hevc_ref_valid_4 : 1; -+ u32 hevc_ref_valid_5 : 1; -+ u32 hevc_ref_valid_6 : 1; -+ u32 hevc_ref_valid_7 : 1; -+ u32 reserve1 : 4; -+ u32 hevc_ref_valid_8 : 1; -+ u32 hevc_ref_valid_9 : 1; -+ u32 hevc_ref_valid_10 : 1; -+ u32 hevc_ref_valid_11 : 1; -+ u32 reserve2 : 4; -+ u32 hevc_ref_valid_12 : 1; -+ u32 hevc_ref_valid_13 : 1; -+ u32 hevc_ref_valid_14 : 1; -+ u32 reserve3 : 5; -+ } reg099; -+ -+ u32 reserved_100_102[3]; -+ -+ struct rkvdec_vdpu381_hevc_mvc0 { -+ u32 ref_pic_layer_same_with_cur : 16; -+ u32 reserve : 16; -+ } reg103; -+ -+ struct rkvdec_vdpu381_hevc_mvc1 { -+ u32 poc_lsb_not_present_flag : 1; -+ u32 num_direct_ref_layers : 6; -+ u32 reserve0 : 1; -+ -+ u32 num_reflayer_pics : 6; -+ u32 default_ref_layers_active_flag : 1; -+ u32 max_one_active_ref_layer_flag : 1; -+ -+ u32 poc_reset_info_present_flag : 1; -+ u32 vps_poc_lsb_aligned_flag : 1; -+ u32 mvc_poc15_valid_flag : 1; -+ u32 reserve1 : 13; -+ } reg104; -+ -+ u32 reserved_105_111[7]; -+ -+ struct rkvdec_vdpu381_hevc_ref_info { -+ u32 avs2_ref_error_field : 1; -+ u32 avs2_ref_error_topfield : 1; -+ u32 ref_error_topfield_used : 1; -+ u32 ref_error_botfield_used : 1; -+ u32 reserve : 28; -+ } reg112; -+ -+} __packed; -+ -+/* base: OFFSET_CODEC_ADDR_REGS */ -+struct rkvdec_vdpu381_regs_h26x_addr { -+ u32 reserved_160; -+ u32 pps_base; -+ u32 reserved_162; -+ u32 rps_base; -+ u32 ref_base[16]; -+ u32 scanlist_addr; -+ u32 colmv_base[16]; -+ u32 cabactbl_base; -+} __packed; -+ -+struct rkvdec_vdpu381_regs_h26x_highpoc { -+ struct rkvdec_vdpu381_ref_poc_highbit { -+ u32 ref0_poc_highbit : 4; -+ u32 ref1_poc_highbit : 4; -+ u32 ref2_poc_highbit : 4; -+ u32 ref3_poc_highbit : 4; -+ u32 ref4_poc_highbit : 4; -+ u32 ref5_poc_highbit : 4; -+ u32 ref6_poc_highbit : 4; -+ u32 ref7_poc_highbit : 4; -+ } reg200[4]; -+ struct rkvdec_vdpu381_cur_poc_highbit { -+ u32 cur_poc_highbit : 4; -+ u32 reserved : 28; -+ } reg204; -+} __packed; -+ -+struct rkvdec_vdpu381_regs_h264 { -+ struct rkvdec_vdpu381_regs_common common; -+ struct rkvdec_vdpu381_regs_h264_params h264_param; -+ struct rkvdec_vdpu381_regs_common_addr common_addr; -+ struct rkvdec_vdpu381_regs_h26x_addr h264_addr; -+ struct rkvdec_vdpu381_regs_h26x_highpoc h264_highpoc; -+} __packed; -+ -+struct rkvdec_vdpu381_regs_hevc { -+ struct rkvdec_vdpu381_regs_common common; -+ struct rkvdec_vdpu381_regs_hevc_params hevc_param; -+ struct rkvdec_vdpu381_regs_common_addr common_addr; -+ struct rkvdec_vdpu381_regs_h26x_addr hevc_addr; -+ struct rkvdec_vdpu381_regs_h26x_highpoc hevc_highpoc; -+} __packed; -+ -+#endif /* __RKVDEC_REGS_H__ */ -diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec.c b/drivers/media/platform/rockchip/rkvdec/rkvdec.c -index 3f9f2e8857f4..b8efee7af74c 100644 ---- a/drivers/media/platform/rockchip/rkvdec/rkvdec.c -+++ b/drivers/media/platform/rockchip/rkvdec/rkvdec.c -@@ -29,6 +29,7 @@ - - #include "rkvdec.h" - #include "rkvdec-regs.h" -+#include "rkvdec-vdpu381-regs.h" - #include "rkvdec-rcb.h" - - static bool rkvdec_image_fmt_match(enum rkvdec_image_fmt fmt1, -@@ -85,11 +86,50 @@ static bool rkvdec_is_valid_fmt(struct rkvdec_ctx *ctx, u32 fourcc, - return false; - } - -+#define VDPU38X_STRIDE_ALIGN 16 -+ -+/** -+ * The default v4l2_fill_pixfmt_mp() function doesn't allow for specific alignment values. -+ * As the VDPU381 and VDPU383 need lines to be aligned on 16, use our own implementation here. -+ */ -+static int vdpu38x_fill_pixfmt_mp(struct v4l2_pix_format_mplane *pix_mp, u32 pixelformat, -+ u32 width, u32 height) -+{ -+ const struct v4l2_format_info *info = v4l2_format_info(pix_mp->pixelformat); -+ struct v4l2_plane_pix_format *plane = &pix_mp->plane_fmt[0]; -+ -+ if (!info) -+ return -EINVAL; -+ -+ pix_mp->num_planes = 1; -+ -+ memset(plane, 0, sizeof(*plane)); -+ -+ plane->bytesperline = pix_mp->width * info->bpp[0] / info->bpp_div[0]; -+ plane->bytesperline = ALIGN(plane->bytesperline, VDPU38X_STRIDE_ALIGN); -+ -+ for (int i = 0; i < info->comp_planes; i++) { -+ unsigned int vdiv = i ? info->vdiv : 1; -+ unsigned int hdiv = i ? info->hdiv : 1; -+ unsigned int stride = DIV_ROUND_UP(pix_mp->width, hdiv) -+ * info->bpp[i] / info->bpp_div[i]; -+ unsigned int height = DIV_ROUND_UP(pix_mp->height, vdiv); -+ -+ plane->sizeimage += ALIGN(stride, VDPU38X_STRIDE_ALIGN) * height; -+ } -+ -+ return 0; -+} -+ - static void rkvdec_fill_decoded_pixfmt(struct rkvdec_ctx *ctx, - struct v4l2_pix_format_mplane *pix_mp) - { -- v4l2_fill_pixfmt_mp(pix_mp, pix_mp->pixelformat, -- pix_mp->width, pix_mp->height); -+ const struct rkvdec_config *cfg = ctx->dev->config; -+ -+ cfg->fill_pixfmt_mp(pix_mp, pix_mp->pixelformat, pix_mp->width, pix_mp->height); -+ -+ ctx->colmv_offset = pix_mp->plane_fmt[0].sizeimage; -+ - pix_mp->plane_fmt[0].sizeimage += 128 * - DIV_ROUND_UP(pix_mp->width, 16) * - DIV_ROUND_UP(pix_mp->height, 16); -@@ -367,6 +407,26 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = { - } - }; - -+static const struct rkvdec_coded_fmt_desc vdpu381_coded_fmts[] = { -+ { -+ .fourcc = V4L2_PIX_FMT_H264_SLICE, -+ .frmsize = { -+ .min_width = 64, -+ .max_width = 65520, -+ .step_width = 64, -+ .min_height = 16, -+ .max_height = 65520, -+ .step_height = 16, -+ }, -+ .ctrls = &rkvdec_h264_ctrls, -+ .ops = &rkvdec_vdpu381_h264_fmt_ops, -+ .num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_decoded_fmts), -+ .decoded_fmts = rkvdec_h264_decoded_fmts, -+ .subsystem_flags = VB2_V4L2_FL_SUPPORTS_M2M_HOLD_CAPTURE_BUF, -+ .capability = RKVDEC_CAPABILITY_H264, -+ }, -+}; -+ - static bool rkvdec_is_capable(struct rkvdec_ctx *ctx, unsigned int capability) - { - return (ctx->dev->variant->capabilities & capability) == capability; -@@ -1241,6 +1301,35 @@ static irqreturn_t rk3399_irq_handler(struct rkvdec_ctx *ctx) - return IRQ_HANDLED; - } - -+static irqreturn_t vdpu381_irq_handler(struct rkvdec_ctx *ctx) -+{ -+ struct rkvdec_dev *rkvdec = ctx->dev; -+ enum vb2_buffer_state state; -+ bool need_reset = 0; -+ u32 status; -+ -+ status = readl(rkvdec->regs + VDPU381_REG_STA_INT); -+ writel(0, rkvdec->regs + VDPU381_REG_STA_INT); -+ -+ if (status & VDPU381_STA_INT_DEC_RDY_STA) { -+ state = VB2_BUF_STATE_DONE; -+ } else { -+ state = VB2_BUF_STATE_ERROR; -+ if (status & (VDPU381_STA_INT_SOFTRESET_RDY | -+ VDPU381_STA_INT_TIMEOUT | -+ VDPU381_STA_INT_ERROR)) -+ rkvdec_iommu_restore(rkvdec); -+ } -+ -+ if (need_reset) -+ rkvdec_iommu_restore(rkvdec); -+ -+ if (cancel_delayed_work(&rkvdec->watchdog_work)) -+ rkvdec_job_finish(ctx, state); -+ -+ return IRQ_HANDLED; -+} -+ - static irqreturn_t rkvdec_irq_handler(int irq, void *priv) - { - struct rkvdec_dev *rkvdec = priv; -@@ -1265,10 +1354,76 @@ static void rkvdec_watchdog_func(struct work_struct *work) - } - } - -+/* -+ * Some SoCs, like RK3588 have multiple identical VDPU cores, but the -+ * kernel is currently missing support for multi-core handling. Exposing -+ * separate devices for each core to userspace is bad, since that does -+ * not allow scheduling tasks properly (and creates ABI). With this workaround -+ * the driver will only probe for the first core and early exit for the other -+ * cores. Once the driver gains multi-core support, the same technique -+ * for detecting the first core can be used to cluster all cores together. -+ */ -+static int rkvdec_disable_multicore(struct rkvdec_dev *rkvdec) -+{ -+ struct device_node *node = NULL; -+ const char *compatible; -+ bool is_first_core; -+ int ret; -+ -+ /* Intentionally ignores the fallback strings */ -+ ret = of_property_read_string(rkvdec->dev->of_node, "compatible", &compatible); -+ if (ret) -+ return ret; -+ -+ /* The first compatible and available node found is considered the main core */ -+ do { -+ node = of_find_compatible_node(node, NULL, compatible); -+ if (of_device_is_available(node)) -+ break; -+ } while (node); -+ -+ if (!node) -+ return -EINVAL; -+ -+ is_first_core = (rkvdec->dev->of_node == node); -+ -+ of_node_put(node); -+ -+ if (!is_first_core) { -+ dev_info(rkvdec->dev, "missing multi-core support, ignoring this instance\n"); -+ return -ENODEV; -+ } -+ -+ return 0; -+} -+ - static const struct rkvdec_config config_rkvdec = { - .coded_fmts = (struct rkvdec_coded_fmt_desc *)rkvdec_coded_fmts, - .coded_fmts_num = ARRAY_SIZE(rkvdec_coded_fmts), - .irq_handler = rk3399_irq_handler, -+ .fill_pixfmt_mp = v4l2_fill_pixfmt_mp, -+}; -+ -+static struct rcb_size_info vdpu381_rcb_sizes[] = { -+ {6, PIC_WIDTH}, // intrar -+ {1, PIC_WIDTH}, // transdr (Is actually 0.4*pic_width) -+ {1, PIC_HEIGHT}, // transdc (Is actually 0.1*pic_height) -+ {3, PIC_WIDTH}, // streamdr -+ {6, PIC_WIDTH}, // interr -+ {3, PIC_HEIGHT}, // interc -+ {22, PIC_WIDTH}, // dblkr -+ {6, PIC_WIDTH}, // saor -+ {11, PIC_WIDTH}, // fbcr -+ {67, PIC_HEIGHT}, // filtc col -+}; -+ -+static const struct rkvdec_config config_vdpu381 = { -+ .coded_fmts = (struct rkvdec_coded_fmt_desc *)vdpu381_coded_fmts, -+ .coded_fmts_num = ARRAY_SIZE(vdpu381_coded_fmts), -+ .rcb_size_info = vdpu381_rcb_sizes, -+ .rcb_num = ARRAY_SIZE(vdpu381_rcb_sizes), -+ .irq_handler = vdpu381_irq_handler, -+ .fill_pixfmt_mp = vdpu38x_fill_pixfmt_mp, - }; - - static const struct rkvdec_variant rk3288_rkvdec_variant = { -@@ -1294,6 +1449,11 @@ static const struct rkvdec_variant rk3399_rkvdec_variant = { - RKVDEC_CAPABILITY_VP9, - }; - -+static const struct rkvdec_variant rk3588_vdpu381_variant = { -+ .config = &config_vdpu381, -+ .capabilities = RKVDEC_CAPABILITY_H264, -+}; -+ - static const struct of_device_id of_rkvdec_match[] = { - { - .compatible = "rockchip,rk3288-vdec", -@@ -1307,6 +1467,10 @@ static const struct of_device_id of_rkvdec_match[] = { - .compatible = "rockchip,rk3399-vdec", - .data = &rk3399_rkvdec_variant, - }, -+ { -+ .compatible = "rockchip,rk3588-vdec", -+ .data = &rk3588_vdpu381_variant, -+ }, - { /* sentinel */ } - }; - MODULE_DEVICE_TABLE(of, of_rkvdec_match); -@@ -1334,11 +1498,16 @@ static int rkvdec_probe(struct platform_device *pdev) - mutex_init(&rkvdec->vdev_lock); - INIT_DELAYED_WORK(&rkvdec->watchdog_work, rkvdec_watchdog_func); - -+ ret = rkvdec_disable_multicore(rkvdec); -+ if (ret) -+ return ret; -+ - ret = devm_clk_bulk_get_all_enabled(&pdev->dev, &rkvdec->clocks); - if (ret < 0) - return ret; - - rkvdec->clk_count = ret; -+ rkvdec->axi_clk = devm_clk_get(&pdev->dev, "axi"); - - rkvdec->regs = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(rkvdec->regs)) -diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec.h b/drivers/media/platform/rockchip/rkvdec/rkvdec.h -index 5c238e443d7d..23c5237de5f7 100644 ---- a/drivers/media/platform/rockchip/rkvdec/rkvdec.h -+++ b/drivers/media/platform/rockchip/rkvdec/rkvdec.h -@@ -122,6 +122,8 @@ struct rkvdec_config { - struct rcb_size_info *rcb_size_info; - size_t rcb_num; - irqreturn_t (*irq_handler)(struct rkvdec_ctx *ctx); -+ int (*fill_pixfmt_mp)(struct v4l2_pix_format_mplane *pix_mp, u32 pixelformat, -+ u32 width, u32 height); - }; - - struct rkvdec_dev { -@@ -132,6 +134,7 @@ struct rkvdec_dev { - struct device *dev; - struct clk_bulk_data *clocks; - unsigned int clk_count; -+ struct clk *axi_clk; - void __iomem *regs; - struct mutex vdev_lock; /* serializes ioctls */ - struct delayed_work watchdog_work; -@@ -153,6 +156,7 @@ struct rkvdec_ctx { - struct rkvdec_dev *dev; - enum rkvdec_image_fmt image_fmt; - struct rkvdec_rcb_config *rcb_config; -+ u32 colmv_offset; - void *priv; - }; - -@@ -183,4 +187,6 @@ extern const struct rkvdec_coded_fmt_ops rkvdec_h264_fmt_ops; - extern const struct rkvdec_coded_fmt_ops rkvdec_hevc_fmt_ops; - extern const struct rkvdec_coded_fmt_ops rkvdec_vp9_fmt_ops; - -+extern const struct rkvdec_coded_fmt_ops rkvdec_vdpu381_h264_fmt_ops; -+ - #endif /* RKVDEC_H_ */ --- -2.34.1 - diff --git a/packages/linux/patches/rockchip/rockchip-0075-DETLEV-v3-media-rkvdec-Enable-all-clocks-without-nam.patch b/packages/linux/patches/rockchip/rockchip-0076-DETLEV-v3-media-rkvdec-Enable-all-clocks-without-nam.patch similarity index 96% rename from packages/linux/patches/rockchip/rockchip-0075-DETLEV-v3-media-rkvdec-Enable-all-clocks-without-nam.patch rename to packages/linux/patches/rockchip/rockchip-0076-DETLEV-v3-media-rkvdec-Enable-all-clocks-without-nam.patch index 9d3a3d0a50..cb281f7e59 100644 --- a/packages/linux/patches/rockchip/rockchip-0075-DETLEV-v3-media-rkvdec-Enable-all-clocks-without-nam.patch +++ b/packages/linux/patches/rockchip/rockchip-0076-DETLEV-v3-media-rkvdec-Enable-all-clocks-without-nam.patch @@ -1,7 +1,7 @@ -From 195838dda8a270d7d76a03b7d337f196713cc6d5 Mon Sep 17 00:00:00 2001 +From 530bfe6e2e279e18f6a80186382fcb5cd89ce337 Mon Sep 17 00:00:00 2001 From: Detlev Casanova Date: Tue, 10 Jun 2025 16:40:09 -0400 -Subject: [PATCH 075/110] DETLEV(v3): media: rkvdec: Enable all clocks without +Subject: [PATCH 076/113] DETLEV(v3): media: rkvdec: Enable all clocks without naming them For other variants, the clock names and number will differ. diff --git a/packages/linux/patches/rockchip/rockchip-0077-DETLEV-v3-media-rkvdec-Add-H264-support-for-the-VDPU.patch b/packages/linux/patches/rockchip/rockchip-0077-DETLEV-v3-media-rkvdec-Add-H264-support-for-the-VDPU.patch index 9c63c95dd1..e96a907b89 100644 --- a/packages/linux/patches/rockchip/rockchip-0077-DETLEV-v3-media-rkvdec-Add-H264-support-for-the-VDPU.patch +++ b/packages/linux/patches/rockchip/rockchip-0077-DETLEV-v3-media-rkvdec-Add-H264-support-for-the-VDPU.patch @@ -1,1296 +1,80 @@ -From 655aa94e79eee3a867cea8595454e6afece34d3c Mon Sep 17 00:00:00 2001 +From 913a2a709988a2c79d633d2580613033253d02d5 Mon Sep 17 00:00:00 2001 From: Detlev Casanova -Date: Tue, 10 Jun 2025 17:45:17 -0400 -Subject: [PATCH 077/110] DETLEV(v3): media: rkvdec: Add H264 support for the - VDPU383 variant +Date: Tue, 10 Jun 2025 15:53:52 -0400 +Subject: [PATCH 077/113] DETLEV(v3): media: rkvdec: Add H264 support for the + VDPU381 variant -This variant is used on the RK3576 SoC. +This decoder variant is found in Rockchip RK3588 SoC family. -The moving vectors size requirements are slightly different so support -for a colmv_size function per variant is added. +Like for rkvdec on rk3399, it supports the NV12, NV15, NV16 and NV20 +output formats and level up to 5.1. -Also, the link registers are used to start the decoder and read IRQ status. -Per variant support for named register sections is added. +The maximum width and height have been significantly increased +supporting up to 65520 pixels for both. -The fluster score is 128/135 for JVT-AVC_V1. -The other test suites are not supported yet. +Also make sure to only expose the first core and ignore the other +until mutli-core is supported. + +Fluster score for JVT-AVC_V1 is 129/135. Signed-off-by: Detlev Casanova --- - .../media/platform/rockchip/rkvdec/Kconfig | 1 + - .../media/platform/rockchip/rkvdec/Makefile | 3 + - .../rockchip/rkvdec/rkvdec-hevc-common.c | 413 ++++++++++-- - .../rockchip/rkvdec/rkvdec-hevc-common.h | 84 ++- - .../platform/rockchip/rkvdec/rkvdec-hevc.c | 5 +- - .../rockchip/rkvdec/rkvdec-vdpu381-hevc.c | 588 ++++++++++++++++++ - .../rockchip/rkvdec/rkvdec-vdpu383-h264.c | 582 +++++++++++++++++ - .../rockchip/rkvdec/rkvdec-vdpu383-regs.h | 284 +++++++++ - .../media/platform/rockchip/rkvdec/rkvdec.c | 212 ++++++- - .../media/platform/rockchip/rkvdec/rkvdec.h | 10 +- - 10 files changed, 2109 insertions(+), 73 deletions(-) - create mode 100644 drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu381-hevc.c - create mode 100644 drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu383-h264.c - create mode 100644 drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu383-regs.h + .../media/platform/rockchip/rkvdec/Makefile | 1 + + .../rockchip/rkvdec/rkvdec-h264-common.h | 2 + + .../platform/rockchip/rkvdec/rkvdec-h264.c | 2 - + .../rockchip/rkvdec/rkvdec-vdpu381-h264.c | 469 ++++++++++++++++++ + .../rockchip/rkvdec/rkvdec-vdpu381-regs.h | 427 ++++++++++++++++ + .../media/platform/rockchip/rkvdec/rkvdec.c | 173 ++++++- + .../media/platform/rockchip/rkvdec/rkvdec.h | 6 + + 7 files changed, 1076 insertions(+), 4 deletions(-) + create mode 100644 drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu381-h264.c + create mode 100644 drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu381-regs.h -diff --git a/drivers/media/platform/rockchip/rkvdec/Kconfig b/drivers/media/platform/rockchip/rkvdec/Kconfig -index 5f3bdd848a2c..3303b0ce3280 100644 ---- a/drivers/media/platform/rockchip/rkvdec/Kconfig -+++ b/drivers/media/platform/rockchip/rkvdec/Kconfig -@@ -8,6 +8,7 @@ config VIDEO_ROCKCHIP_VDEC - select VIDEOBUF2_VMALLOC - select V4L2_MEM2MEM_DEV - select V4L2_H264 -+ select V4L2_HEVC - select V4L2_VP9 - help - Support for the Rockchip Video Decoder IP present on Rockchip SoCs, diff --git a/drivers/media/platform/rockchip/rkvdec/Makefile b/drivers/media/platform/rockchip/rkvdec/Makefile -index c4167eb6fc79..e30fdd7d51c3 100644 +index 3b34f39b17d6..c4167eb6fc79 100644 --- a/drivers/media/platform/rockchip/rkvdec/Makefile +++ b/drivers/media/platform/rockchip/rkvdec/Makefile -@@ -6,6 +6,9 @@ rockchip-vdec-y += \ - rkvdec-h264.o \ +@@ -7,4 +7,5 @@ rockchip-vdec-y += \ rkvdec-h264-common.o \ rkvdec-hevc.o \ -+ rkvdec-hevc-common.o \ rkvdec-rcb.o \ - rkvdec-vdpu381-h264.o \ -+ rkvdec-vdpu381-hevc.o \ -+ rkvdec-vdpu383-h264.o \ ++ rkvdec-vdpu381-h264.o \ rkvdec-vp9.o -diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc-common.c b/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc-common.c -index 6fd3b703ac11..3646b3ce4ea0 100644 ---- a/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc-common.c -+++ b/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc-common.c -@@ -18,6 +18,143 @@ - #include "rkvdec.h" - #include "rkvdec-hevc-common.h" +diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec-h264-common.h b/drivers/media/platform/rockchip/rkvdec/rkvdec-h264-common.h +index df95a1678734..38446e2886e3 100644 +--- a/drivers/media/platform/rockchip/rkvdec/rkvdec-h264-common.h ++++ b/drivers/media/platform/rockchip/rkvdec/rkvdec-h264-common.h +@@ -66,6 +66,8 @@ struct rkvdec_rps { + u32 reserved1[66]; + } __packed; -+#define RKVDEC_HEVC_MAX_DEPTH_IN_BYTES 2 ++extern const s8 rkvdec_h264_cabac_table[4][464][2]; + -+/* Store the Short term ref pic set calculated values */ -+struct calculated_rps_st_set { -+ u8 num_delta_pocs; -+ u8 num_negative_pics; -+ u8 num_positive_pics; -+ u8 used_by_curr_pic_s0[16]; -+ u8 used_by_curr_pic_s1[16]; -+ s32 delta_poc_s0[16]; -+ s32 delta_poc_s1[16]; -+}; -+ -+enum rkvdec_image_fmt rkvdec_hevc_get_image_fmt(struct rkvdec_ctx *ctx, -+ struct v4l2_ctrl *ctrl) -+{ -+ const struct v4l2_ctrl_hevc_sps *sps = ctrl->p_new.p_hevc_sps; -+ -+ if (ctrl->id != V4L2_CID_STATELESS_HEVC_SPS) -+ return RKVDEC_IMG_FMT_ANY; -+ -+ if (sps->bit_depth_luma_minus8 == 0) -+ return RKVDEC_IMG_FMT_420_8BIT; -+ else if (sps->bit_depth_luma_minus8 == 2) -+ return RKVDEC_IMG_FMT_420_10BIT; -+ -+ return RKVDEC_IMG_FMT_ANY; -+} -+ -+void compute_tiles_uniform(struct rkvdec_hevc_run *run, u16 log2_min_cb_size, -+ u16 width, u16 height, s32 pic_in_cts_width, -+ s32 pic_in_cts_height, u16 *column_width, u16 *row_height) -+{ -+ const struct v4l2_ctrl_hevc_pps *pps = run->pps; -+ int i; -+ -+ for (i = 0; i < pps->num_tile_columns_minus1 + 1; i++) -+ column_width[i] = ((i + 1) * pic_in_cts_width) / -+ (pps->num_tile_columns_minus1 + 1) - -+ (i * pic_in_cts_width) / -+ (pps->num_tile_columns_minus1 + 1); -+ -+ for (i = 0; i < pps->num_tile_rows_minus1 + 1; i++) -+ row_height[i] = ((i + 1) * pic_in_cts_height) / -+ (pps->num_tile_rows_minus1 + 1) - -+ (i * pic_in_cts_height) / -+ (pps->num_tile_rows_minus1 + 1); -+} -+ -+void compute_tiles_non_uniform(struct rkvdec_hevc_run *run, u16 log2_min_cb_size, -+ u16 width, u16 height, s32 pic_in_cts_width, -+ s32 pic_in_cts_height, u16 *column_width, u16 *row_height) -+{ -+ const struct v4l2_ctrl_hevc_pps *pps = run->pps; -+ s32 sum = 0; -+ int i; -+ -+ for (i = 0; i < pps->num_tile_columns_minus1; i++) { -+ column_width[i] = pps->column_width_minus1[i] + 1; -+ sum += column_width[i]; -+ } -+ column_width[i] = pic_in_cts_width - sum; -+ -+ sum = 0; -+ for (i = 0; i < pps->num_tile_rows_minus1; i++) { -+ row_height[i] = pps->row_height_minus1[i] + 1; -+ sum += row_height[i]; -+ } -+ row_height[i] = pic_in_cts_height - sum; -+} -+ -+static void set_ref_poc(struct rkvdec_rps_short_term_ref_set *set, int poc, int value, int flag) -+{ -+ switch (poc) { -+ case 0: -+ set->delta_poc0 = value; -+ set->used_flag0 = flag; -+ break; -+ case 1: -+ set->delta_poc1 = value; -+ set->used_flag1 = flag; -+ break; -+ case 2: -+ set->delta_poc2 = value; -+ set->used_flag2 = flag; -+ break; -+ case 3: -+ set->delta_poc3 = value; -+ set->used_flag3 = flag; -+ break; -+ case 4: -+ set->delta_poc4 = value; -+ set->used_flag4 = flag; -+ break; -+ case 5: -+ set->delta_poc5 = value; -+ set->used_flag5 = flag; -+ break; -+ case 6: -+ set->delta_poc6 = value; -+ set->used_flag6 = flag; -+ break; -+ case 7: -+ set->delta_poc7 = value; -+ set->used_flag7 = flag; -+ break; -+ case 8: -+ set->delta_poc8 = value; -+ set->used_flag8 = flag; -+ break; -+ case 9: -+ set->delta_poc9 = value; -+ set->used_flag9 = flag; -+ break; -+ case 10: -+ set->delta_poc10 = value; -+ set->used_flag10 = flag; -+ break; -+ case 11: -+ set->delta_poc11 = value; -+ set->used_flag11 = flag; -+ break; -+ case 12: -+ set->delta_poc12 = value; -+ set->used_flag12 = flag; -+ break; -+ case 13: -+ set->delta_poc13 = value; -+ set->used_flag13 = flag; -+ break; -+ case 14: -+ set->delta_poc14 = value; -+ set->used_flag14 = flag; -+ break; -+ } -+} -+ - /* - * Flip one or more matrices along their main diagonal and flatten them - * before writing it to the memory. -@@ -50,13 +187,15 @@ static void transpose_and_flatten_matrices(u8 *output, const u8 *input, - } - } + void lookup_ref_buf_idx(struct rkvdec_ctx *ctx, struct rkvdec_h264_run *run); + void assemble_hw_rps(struct v4l2_h264_reflist_builder *builder, + struct rkvdec_h264_run *run, +diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec-h264.c b/drivers/media/platform/rockchip/rkvdec/rkvdec-h264.c +index a80b5b44a570..d50e985cff95 100644 +--- a/drivers/media/platform/rockchip/rkvdec/rkvdec-h264.c ++++ b/drivers/media/platform/rockchip/rkvdec/rkvdec-h264.c +@@ -16,8 +16,6 @@ + #include "rkvdec-regs.h" + #include "rkvdec-h264-common.h" --static void assemble_scalingfactor0(u8 *output, const struct v4l2_ctrl_hevc_scaling_matrix *input) -+static void assemble_scalingfactor0(struct rkvdec_dev *rkvdec, u8 *output, -+ const struct v4l2_ctrl_hevc_scaling_matrix *input) - { - int offset = 0; - - transpose_and_flatten_matrices(output, (const u8 *)input->scaling_list_4x4, 6, 4); - offset = 6 * 16 * sizeof(u8); -- transpose_and_flatten_matrices(output + offset, (const u8 *)input->scaling_list_8x8, 6, 8); -+ transpose_and_flatten_matrices(output + offset, -+ (const u8 *)input->scaling_list_8x8, 6, 8); - offset += 6 * 64 * sizeof(u8); - transpose_and_flatten_matrices(output + offset, - (const u8 *)input->scaling_list_16x16, 6, 8); -@@ -92,18 +231,19 @@ static void assemble_scalingdc(u8 *output, const struct v4l2_ctrl_hevc_scaling_m - memcpy(output + 6 * sizeof(u8), list_32x32, 6 * sizeof(u8)); - } - --static void translate_scaling_list(struct scaling_factor *output, -+static void translate_scaling_list(struct rkvdec_dev *rkvdec, struct scaling_factor *output, - const struct v4l2_ctrl_hevc_scaling_matrix *input) - { -- assemble_scalingfactor0(output->scalingfactor0, input); -+ assemble_scalingfactor0(rkvdec, output->scalingfactor0, input); - memcpy(output->scalingfactor1, (const u8 *)input->scaling_list_4x4, 96); - assemble_scalingdc(output->scalingdc, input); - memset(output->reserved, 0, 4 * sizeof(u8)); - } - --void assemble_hw_scaling_list(struct rkvdec_hevc_run *run, -- struct scaling_factor *scaling_factor, -- struct v4l2_ctrl_hevc_scaling_matrix *cache) -+void rkvdec_hevc_assemble_hw_scaling_list(struct rkvdec_dev *rkvdec, -+ struct rkvdec_hevc_run *run, -+ struct scaling_factor *scaling_list, -+ struct v4l2_ctrl_hevc_scaling_matrix *cache) - { - const struct v4l2_ctrl_hevc_scaling_matrix *scaling = run->scaling_matrix; - -@@ -111,15 +251,220 @@ void assemble_hw_scaling_list(struct rkvdec_hevc_run *run, - sizeof(struct v4l2_ctrl_hevc_scaling_matrix))) - return; - -- translate_scaling_list(scaling_factor, scaling); -+ translate_scaling_list(rkvdec, scaling_list, scaling); - - memcpy(cache, scaling, - sizeof(struct v4l2_ctrl_hevc_scaling_matrix)); - } - --struct vb2_buffer * --get_ref_buf(struct rkvdec_ctx *ctx, struct rkvdec_hevc_run *run, -- unsigned int dpb_idx) -+static void rkvdec_hevc_assemble_hw_lt_rps(struct rkvdec_hevc_run *run, struct rkvdec_rps *rps) -+{ -+ const struct v4l2_ctrl_hevc_sps *sps = run->sps; -+ -+ if (!run->ext_sps_lt_rps) -+ return; -+ -+ for (int i = 0; i < sps->num_long_term_ref_pics_sps; i++) { -+ rps->refs[i].lt_ref_pic_poc_lsb = -+ run->ext_sps_lt_rps[i].lt_ref_pic_poc_lsb_sps; -+ rps->refs[i].used_by_curr_pic_lt_flag = -+ !!(run->ext_sps_lt_rps[i].flags & V4L2_HEVC_EXT_SPS_LT_RPS_FLAG_USED_LT); -+ } -+} -+ -+static void rkvdec_hevc_assemble_hw_st_rps(struct rkvdec_hevc_run *run, struct rkvdec_rps *rps, -+ struct calculated_rps_st_set *calculated_rps_st_sets) -+{ -+ const struct v4l2_ctrl_hevc_sps *sps = run->sps; -+ -+ for (int i = 0; i < sps->num_short_term_ref_pic_sets; i++) { -+ int poc = 0; -+ int j = 0; -+ const struct calculated_rps_st_set *set = &calculated_rps_st_sets[i]; -+ -+ rps->short_term_ref_sets[i].num_negative = set->num_negative_pics; -+ rps->short_term_ref_sets[i].num_positive = set->num_positive_pics; -+ -+ for (; j < set->num_negative_pics; j++) { -+ set_ref_poc(&rps->short_term_ref_sets[i], j, -+ set->delta_poc_s0[j], set->used_by_curr_pic_s0[j]); -+ } -+ poc = j; -+ -+ for (j = 0; j < set->num_positive_pics; j++) { -+ set_ref_poc(&rps->short_term_ref_sets[i], poc + j, -+ set->delta_poc_s1[j], set->used_by_curr_pic_s1[j]); -+ } -+ } -+} -+ -+/* -+ * Compute the short term ref pic set parameters based on its reference short term ref pic -+ */ -+static void st_ref_pic_set_prediction(struct rkvdec_hevc_run *run, int idx, -+ struct calculated_rps_st_set *calculated_rps_st_sets) -+{ -+ const struct v4l2_ctrl_hevc_ext_sps_st_rps *rps_data = &run->ext_sps_st_rps[idx]; -+ struct calculated_rps_st_set *st_rps = &calculated_rps_st_sets[idx]; -+ struct calculated_rps_st_set *ref_rps; -+ u8 st_rps_idx = idx; -+ u8 ref_rps_idx = 0; -+ s16 delta_rps = 0; -+ u8 use_delta_flag[16] = { 0 }; -+ u8 used_by_curr_pic_flag[16] = { 0 }; -+ int i, j; -+ int dPoc; -+ -+ ref_rps_idx = st_rps_idx - (rps_data->delta_idx_minus1 + 1); /* 7-59 */ -+ delta_rps = (1 - 2 * rps_data->delta_rps_sign) * -+ (rps_data->abs_delta_rps_minus1 + 1); /* 7-60 */ -+ -+ ref_rps = &calculated_rps_st_sets[ref_rps_idx]; -+ -+ for (j = 0; j <= ref_rps->num_delta_pocs; j++) { -+ used_by_curr_pic_flag[j] = !!(rps_data->used_by_curr_pic & (1 << j)); -+ use_delta_flag[j] = !!(rps_data->use_delta_flag & (1 << j)); -+ } -+ -+ /* 7-61: calculate num_negative_pics, delta_poc_s0 and used_by_curr_pic_s0 */ -+ i = 0; -+ for (j = (ref_rps->num_positive_pics - 1); j >= 0; j--) { -+ dPoc = ref_rps->delta_poc_s1[j] + delta_rps; -+ if (dPoc < 0 && use_delta_flag[ref_rps->num_negative_pics + j]) { -+ st_rps->delta_poc_s0[i] = dPoc; -+ st_rps->used_by_curr_pic_s0[i++] = -+ used_by_curr_pic_flag[ref_rps->num_negative_pics + j]; -+ } -+ } -+ if (delta_rps < 0 && use_delta_flag[ref_rps->num_delta_pocs]) { -+ st_rps->delta_poc_s0[i] = delta_rps; -+ st_rps->used_by_curr_pic_s0[i++] = used_by_curr_pic_flag[ref_rps->num_delta_pocs]; -+ } -+ for (j = 0; j < ref_rps->num_negative_pics; j++) { -+ dPoc = ref_rps->delta_poc_s0[j] + delta_rps; -+ if (dPoc < 0 && use_delta_flag[j]) { -+ st_rps->delta_poc_s0[i] = dPoc; -+ st_rps->used_by_curr_pic_s0[i++] = used_by_curr_pic_flag[j]; -+ } -+ } -+ st_rps->num_negative_pics = i; -+ -+ /* 7-62: calculate num_positive_pics, delta_poc_s1 and used_by_curr_pic_s1 */ -+ i = 0; -+ for (j = (ref_rps->num_negative_pics - 1); j >= 0; j--) { -+ dPoc = ref_rps->delta_poc_s0[j] + delta_rps; -+ if (dPoc > 0 && use_delta_flag[j]) { -+ st_rps->delta_poc_s1[i] = dPoc; -+ st_rps->used_by_curr_pic_s1[i++] = used_by_curr_pic_flag[j]; -+ } -+ } -+ if (delta_rps > 0 && use_delta_flag[ref_rps->num_delta_pocs]) { -+ st_rps->delta_poc_s1[i] = delta_rps; -+ st_rps->used_by_curr_pic_s1[i++] = used_by_curr_pic_flag[ref_rps->num_delta_pocs]; -+ } -+ for (j = 0; j < ref_rps->num_positive_pics; j++) { -+ dPoc = ref_rps->delta_poc_s1[j] + delta_rps; -+ if (dPoc > 0 && use_delta_flag[ref_rps->num_negative_pics + j]) { -+ st_rps->delta_poc_s1[i] = dPoc; -+ st_rps->used_by_curr_pic_s1[i++] = -+ used_by_curr_pic_flag[ref_rps->num_negative_pics + j]; -+ } -+ } -+ st_rps->num_positive_pics = i; -+ -+ st_rps->num_delta_pocs = st_rps->num_positive_pics + st_rps->num_negative_pics; -+} -+ -+/* -+ * Compute the short term ref pic set parameters based on the control's data. -+ */ -+static void st_ref_pic_set_calculate(struct rkvdec_hevc_run *run, int idx, -+ struct calculated_rps_st_set *calculated_rps_st_sets) -+{ -+ const struct v4l2_ctrl_hevc_ext_sps_st_rps *rps_data = &run->ext_sps_st_rps[idx]; -+ struct calculated_rps_st_set *st_rps = &calculated_rps_st_sets[idx]; -+ int j, i = 0; -+ -+ /* 7-63 */ -+ st_rps->num_negative_pics = rps_data->num_negative_pics; -+ /* 7-64 */ -+ st_rps->num_positive_pics = rps_data->num_positive_pics; -+ -+ for (i = 0; i < st_rps->num_negative_pics; i++) { -+ /* 7-65 */ -+ st_rps->used_by_curr_pic_s0[i] = !!(rps_data->used_by_curr_pic & (1 << i)); -+ -+ if (i == 0) { -+ /* 7-67 */ -+ st_rps->delta_poc_s0[i] = -(rps_data->delta_poc_s0_minus1[i] + 1); -+ } else { -+ /* 7-69 */ -+ st_rps->delta_poc_s0[i] = -+ st_rps->delta_poc_s0[i - 1] - -+ (rps_data->delta_poc_s0_minus1[i] + 1); -+ } -+ } -+ -+ for (j = 0; j < st_rps->num_positive_pics; j++) { -+ /* 7-66 */ -+ st_rps->used_by_curr_pic_s1[j] = !!(rps_data->used_by_curr_pic & (1 << (i + j))); -+ -+ if (j == 0) { -+ /* 7-68 */ -+ st_rps->delta_poc_s1[j] = rps_data->delta_poc_s1_minus1[j] + 1; -+ } else { -+ /* 7-70 */ -+ st_rps->delta_poc_s1[j] = -+ st_rps->delta_poc_s1[j - 1] + -+ (rps_data->delta_poc_s1_minus1[j] + 1); -+ } -+ } -+ -+ /* 7-71 */ -+ st_rps->num_delta_pocs = st_rps->num_positive_pics + st_rps->num_negative_pics; -+} -+ -+static void rkvdec_hevc_prepare_hw_st_rps(struct rkvdec_hevc_run *run, struct rkvdec_rps *rps, -+ struct v4l2_ctrl_hevc_ext_sps_st_rps *cache) -+{ -+ int idx; -+ -+ if (!run->ext_sps_st_rps) -+ return; -+ -+ if (!memcmp(cache, run->ext_sps_st_rps, sizeof(struct v4l2_ctrl_hevc_ext_sps_st_rps))) -+ return; -+ -+ struct calculated_rps_st_set *calculated_rps_st_sets = -+ kzalloc(sizeof(struct calculated_rps_st_set) * -+ run->sps->num_short_term_ref_pic_sets, GFP_KERNEL); -+ -+ for (idx = 0; idx < run->sps->num_short_term_ref_pic_sets; idx++) { -+ const struct v4l2_ctrl_hevc_ext_sps_st_rps *rps_data = &run->ext_sps_st_rps[idx]; -+ -+ if (rps_data->flags & V4L2_HEVC_EXT_SPS_ST_RPS_FLAG_INTER_REF_PIC_SET_PRED) -+ st_ref_pic_set_prediction(run, idx, calculated_rps_st_sets); -+ else -+ st_ref_pic_set_calculate(run, idx, calculated_rps_st_sets); -+ } -+ -+ rkvdec_hevc_assemble_hw_st_rps(run, rps, calculated_rps_st_sets); -+ -+ kfree(calculated_rps_st_sets); -+ -+ memcpy(cache, run->ext_sps_st_rps, sizeof(struct v4l2_ctrl_hevc_ext_sps_st_rps)); -+} -+ -+void rkvdec_hevc_assemble_hw_rps(struct rkvdec_hevc_run *run, struct rkvdec_rps *rps, -+ struct v4l2_ctrl_hevc_ext_sps_st_rps *st_cache) -+{ -+ rkvdec_hevc_prepare_hw_st_rps(run, rps, st_cache); -+ rkvdec_hevc_assemble_hw_lt_rps(run, rps); -+} -+ -+struct vb2_buffer *get_ref_buf(struct rkvdec_ctx *ctx, -+ struct rkvdec_hevc_run *run, -+ unsigned int dpb_idx) - { - struct v4l2_m2m_ctx *m2m_ctx = ctx->fh.m2m_ctx; - const struct v4l2_ctrl_hevc_decode_params *decode_params = run->decode_params; -@@ -140,9 +485,8 @@ get_ref_buf(struct rkvdec_ctx *ctx, struct rkvdec_hevc_run *run, - return buf; - } - --#define RKVDEC_HEVC_MAX_DEPTH_IN_BYTES 2 +-extern const s8 rkvdec_h264_cabac_table[4][464][2]; - --int rkvdec_hevc_adjust_fmt(struct rkvdec_ctx *ctx, struct v4l2_format *f) -+int rkvdec_hevc_adjust_fmt(struct rkvdec_ctx *ctx, -+ struct v4l2_format *f) - { - struct v4l2_pix_format_mplane *fmt = &f->fmt.pix_mp; - -@@ -153,40 +497,19 @@ int rkvdec_hevc_adjust_fmt(struct rkvdec_ctx *ctx, struct v4l2_format *f) - return 0; - } - --enum rkvdec_image_fmt rkvdec_hevc_get_image_fmt(struct rkvdec_ctx *ctx, -- struct v4l2_ctrl *ctrl) --{ -- const struct v4l2_ctrl_hevc_sps *sps = ctrl->p_new.p_hevc_sps; -- -- if (ctrl->id != V4L2_CID_STATELESS_HEVC_SPS) -- return RKVDEC_IMG_FMT_ANY; -- -- if (sps->bit_depth_luma_minus8 == 0) { -- if (sps->chroma_format_idc == 2) -- return RKVDEC_IMG_FMT_422_8BIT; -- else -- return RKVDEC_IMG_FMT_420_8BIT; -- } else if (sps->bit_depth_luma_minus8 == 2) { -- if (sps->chroma_format_idc == 2) -- return RKVDEC_IMG_FMT_422_10BIT; -- else -- return RKVDEC_IMG_FMT_420_10BIT; -- } -- -- return RKVDEC_IMG_FMT_ANY; --} -- --static int rkvdec_hevc_validate_sps(struct rkvdec_ctx *ctx, -+int rkvdec_hevc_validate_sps(struct rkvdec_ctx *ctx, - const struct v4l2_ctrl_hevc_sps *sps) - { -+ /* Only 4:0:0 and 4:2:0 is supported */ - if (sps->chroma_format_idc > 1) -- /* Only 4:0:0 and 4:2:0 are supported */ - return -EINVAL; -+ -+ /* Luma and chroma bit depth mismatch */ - if (sps->bit_depth_luma_minus8 != sps->bit_depth_chroma_minus8) -- /* Luma and chroma bit depth mismatch */ - return -EINVAL; -+ -+ /* Only 8-bit and 10-bit are supported */ - if (sps->bit_depth_luma_minus8 != 0 && sps->bit_depth_luma_minus8 != 2) -- /* Only 8-bit and 10-bit is supported */ - return -EINVAL; - - if (sps->pic_width_in_luma_samples > ctx->coded_fmt.fmt.pix_mp.width || -@@ -197,7 +520,7 @@ static int rkvdec_hevc_validate_sps(struct rkvdec_ctx *ctx, - } - - void rkvdec_hevc_run_preamble(struct rkvdec_ctx *ctx, -- struct rkvdec_hevc_run *run) -+ struct rkvdec_hevc_run *run) - { - struct v4l2_ctrl *ctrl; - -@@ -217,6 +540,12 @@ void rkvdec_hevc_run_preamble(struct rkvdec_ctx *ctx, - ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, - V4L2_CID_STATELESS_HEVC_SCALING_MATRIX); - run->scaling_matrix = ctrl ? ctrl->p_cur.p : NULL; -+ ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, -+ V4L2_CID_STATELESS_HEVC_EXT_SPS_ST_RPS); -+ run->ext_sps_st_rps = ctrl ? ctrl->p_cur.p : NULL; -+ ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, -+ V4L2_CID_STATELESS_HEVC_EXT_SPS_LT_RPS); -+ run->ext_sps_lt_rps = ctrl ? ctrl->p_cur.p : NULL; - - rkvdec_run_preamble(ctx, &run->base); - } -diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc-common.h b/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc-common.h -index bebab62a861e..da58da149566 100644 ---- a/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc-common.h -+++ b/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc-common.h -@@ -15,14 +15,68 @@ - * Jeffy Chen - */ - -+#include -+ -+#include "rkvdec.h" -+ -+struct rkvdec_rps_refs { -+ u16 lt_ref_pic_poc_lsb; -+ u16 used_by_curr_pic_lt_flag : 1; -+ u16 reserved : 15; -+} __packed; -+ -+struct rkvdec_rps_short_term_ref_set { -+ u32 num_negative : 4; -+ u32 num_positive : 4; -+ u32 delta_poc0 : 16; -+ u32 used_flag0 : 1; -+ u32 delta_poc1 : 16; -+ u32 used_flag1 : 1; -+ u32 delta_poc2 : 16; -+ u32 used_flag2 : 1; -+ u32 delta_poc3 : 16; -+ u32 used_flag3 : 1; -+ u32 delta_poc4 : 16; -+ u32 used_flag4 : 1; -+ u32 delta_poc5 : 16; -+ u32 used_flag5 : 1; -+ u32 delta_poc6 : 16; -+ u32 used_flag6 : 1; -+ u32 delta_poc7 : 16; -+ u32 used_flag7 : 1; -+ u32 delta_poc8 : 16; -+ u32 used_flag8 : 1; -+ u32 delta_poc9 : 16; -+ u32 used_flag9 : 1; -+ u32 delta_poc10 : 16; -+ u32 used_flag10 : 1; -+ u32 delta_poc11 : 16; -+ u32 used_flag11 : 1; -+ u32 delta_poc12 : 16; -+ u32 used_flag12 : 1; -+ u32 delta_poc13 : 16; -+ u32 used_flag13 : 1; -+ u32 delta_poc14 : 16; -+ u32 used_flag14 : 1; -+ u32 reserved_bits : 25; -+ u32 reserved[3]; -+} __packed; -+ -+struct rkvdec_rps { -+ struct rkvdec_rps_refs refs[32]; -+ struct rkvdec_rps_short_term_ref_set short_term_ref_sets[64]; -+} __packed; -+ - struct rkvdec_hevc_run { -- struct rkvdec_run base; -- const struct v4l2_ctrl_hevc_slice_params *slices_params; -- const struct v4l2_ctrl_hevc_decode_params *decode_params; -- const struct v4l2_ctrl_hevc_sps *sps; -- const struct v4l2_ctrl_hevc_pps *pps; -- const struct v4l2_ctrl_hevc_scaling_matrix *scaling_matrix; -- int num_slices; -+ struct rkvdec_run base; -+ const struct v4l2_ctrl_hevc_decode_params *decode_params; -+ const struct v4l2_ctrl_hevc_slice_params *slices_params; -+ const struct v4l2_ctrl_hevc_sps *sps; -+ const struct v4l2_ctrl_hevc_pps *pps; -+ const struct v4l2_ctrl_hevc_scaling_matrix *scaling_matrix; -+ const struct v4l2_ctrl_hevc_ext_sps_st_rps *ext_sps_st_rps; -+ const struct v4l2_ctrl_hevc_ext_sps_lt_rps *ext_sps_lt_rps; -+ int num_slices; - }; - - struct scaling_factor { -@@ -32,15 +86,27 @@ struct scaling_factor { - u8 reserved[4]; /*16Bytes align*/ - }; - -+#define RKV_HEVC_CABAC_TABLE_SIZE 27456 -+extern const u8 rkvdec_hevc_cabac_table[RKV_HEVC_CABAC_TABLE_SIZE]; -+ - enum rkvdec_image_fmt rkvdec_hevc_get_image_fmt(struct rkvdec_ctx *ctx, - struct v4l2_ctrl *ctrl); --void rkvdec_hevc_assemble_hw_scaling_list(struct rkvdec_hevc_run *run, -+void compute_tiles_uniform(struct rkvdec_hevc_run *run, u16 log2_min_cb_size, -+ u16 width, u16 height, s32 pic_in_cts_width, -+ s32 pic_in_cts_height, u16 *column_width, u16 *row_height); -+void compute_tiles_non_uniform(struct rkvdec_hevc_run *run, u16 log2_min_cb_size, -+ u16 width, u16 height, s32 pic_in_cts_width, -+ s32 pic_in_cts_height, u16 *column_width, u16 *row_height); -+void rkvdec_hevc_assemble_hw_rps(struct rkvdec_hevc_run *run, struct rkvdec_rps *rps, -+ struct v4l2_ctrl_hevc_ext_sps_st_rps *st_cache); -+void rkvdec_hevc_assemble_hw_scaling_list(struct rkvdec_dev *rkvdec, -+ struct rkvdec_hevc_run *run, - struct scaling_factor *scaling_factor, - struct v4l2_ctrl_hevc_scaling_matrix *cache); - struct vb2_buffer *get_ref_buf(struct rkvdec_ctx *ctx, - struct rkvdec_hevc_run *run, - unsigned int dpb_idx); - int rkvdec_hevc_adjust_fmt(struct rkvdec_ctx *ctx, struct v4l2_format *f); --//int rkvdec_hevc_validate_sps(struct rkvdec_ctx *ctx, const struct v4l2_ctrl_hevc_sps *sps); -+int rkvdec_hevc_validate_sps(struct rkvdec_ctx *ctx, const struct v4l2_ctrl_hevc_sps *sps); - int rkvdec_hevc_try_ctrl(struct rkvdec_ctx *ctx, struct v4l2_ctrl *ctrl); - void rkvdec_hevc_run_preamble(struct rkvdec_ctx *ctx, struct rkvdec_hevc_run *run); -diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc.c b/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc.c -index 887b6c165a7e..b28d54b8bb57 100644 ---- a/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc.c -+++ b/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc.c -@@ -25,9 +25,6 @@ - #define RKV_RPS_SIZE (32 / 4) - #define RKV_RPS_LEN 600 - --#define RKV_HEVC_CABAC_TABLE_SIZE 27456 --extern const u8 rkvdec_hevc_cabac_table[RKV_HEVC_CABAC_TABLE_SIZE]; -- - struct rkvdec_sps_pps_packet { - u32 info[RKV_PPS_SIZE]; - }; -@@ -550,7 +547,7 @@ static int rkvdec_hevc_run(struct rkvdec_ctx *ctx) - - rkvdec_hevc_run_preamble(ctx, &run); - -- rkvdec_hevc_assemble_hw_scaling_list(&run, &tbl->scaling_list, -+ rkvdec_hevc_assemble_hw_scaling_list(rkvdec, &run, &tbl->scaling_list, - &hevc_ctx->scaling_matrix_cache); - assemble_hw_pps(ctx, &run); - assemble_sw_rps(ctx, &run); -diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu381-hevc.c b/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu381-hevc.c + /* Size with u32 units. */ + #define RKV_CABAC_INIT_BUFFER_SIZE (3680 + 128) + #define RKV_ERROR_INFO_SIZE (256 * 144 * 4) +diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu381-h264.c b/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu381-h264.c new file mode 100644 -index 000000000000..96dfa3576a8b +index 000000000000..e65a56bc9c63 --- /dev/null -+++ b/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu381-hevc.c -@@ -0,0 +1,588 @@ ++++ b/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu381-h264.c +@@ -0,0 +1,469 @@ +// SPDX-License-Identifier: GPL-2.0 +/* -+ * Rockchip VDPU381 HEVC backend -+ * -+ * Copyright (C) 2025 Collabora, Ltd. -+ * Detlev Casanova -+ */ -+ -+#include -+ -+#include "rkvdec.h" -+#include "rkvdec-rcb.h" -+#include "rkvdec-hevc-common.h" -+#include "rkvdec-vdpu381-regs.h" -+ -+// SPS -+struct rkvdec_hevc_sps { -+ u16 video_parameters_set_id : 4; -+ u16 seq_parameters_set_id_sps : 4; -+ u16 chroma_format_idc : 2; -+ u16 width : 16; -+ u16 height : 16; -+ u16 bit_depth_luma : 4; -+ u16 bit_depth_chroma : 4; -+ u16 max_pic_order_count_lsb : 5; -+ u16 diff_max_min_luma_coding_block_size : 2; -+ u16 min_luma_coding_block_size : 3; -+ u16 min_transform_block_size : 3; -+ u16 diff_max_min_transform_block_size : 2; -+ u16 max_transform_hierarchy_depth_inter : 3; -+ u16 max_transform_hierarchy_depth_intra : 3; -+ u16 scaling_list_enabled_flag : 1; -+ u16 amp_enabled_flag : 1; -+ u16 sample_adaptive_offset_enabled_flag : 1; -+ u16 pcm_enabled_flag : 1; -+ u16 pcm_sample_bit_depth_luma : 4; -+ u16 pcm_sample_bit_depth_chroma : 4; -+ u16 pcm_loop_filter_disabled_flag : 1; -+ u16 diff_max_min_pcm_luma_coding_block_size : 3; -+ u16 min_pcm_luma_coding_block_size : 3; -+ u16 num_short_term_ref_pic_sets : 7; -+ u16 long_term_ref_pics_present_flag : 1; -+ u16 num_long_term_ref_pics_sps : 6; -+ u16 sps_temporal_mvp_enabled_flag : 1; -+ u16 strong_intra_smoothing_enabled_flag : 1; -+ u16 reserved_0 : 7; -+ u16 sps_max_dec_pic_buffering_minus1 : 4; -+ u16 reserved_0_2 : 3; -+ u16 reserved_f : 8; -+} __packed; -+ -+//PPS -+struct rkvdec_hevc_pps { -+ u16 picture_parameters_set_id : 6; -+ u16 seq_parameters_set_id_pps : 4; -+ u16 dependent_slice_segments_enabled_flag : 1; -+ u16 output_flag_present_flag : 1; -+ u16 num_extra_slice_header_bits : 13; -+ u16 sign_data_hiding_enabled_flag : 1; -+ u16 cabac_init_present_flag : 1; -+ u16 num_ref_idx_l0_default_active : 4; -+ u16 num_ref_idx_l1_default_active : 4; -+ u16 init_qp_minus26 : 7; -+ u16 constrained_intra_pred_flag : 1; -+ u16 transform_skip_enabled_flag : 1; -+ u16 cu_qp_delta_enabled_flag : 1; -+ u16 log2_min_cb_size : 3; -+ u16 pps_cb_qp_offset : 5; -+ u16 pps_cr_qp_offset : 5; -+ u16 pps_slice_chroma_qp_offsets_present_flag : 1; -+ u16 weighted_pred_flag : 1; -+ u16 weighted_bipred_flag : 1; -+ u16 transquant_bypass_enabled_flag : 1; -+ u16 tiles_enabled_flag : 1; -+ u16 entropy_coding_sync_enabled_flag : 1; -+ u16 pps_loop_filter_across_slices_enabled_flag : 1; -+ u16 loop_filter_across_tiles_enabled_flag : 1; -+ u16 deblocking_filter_override_enabled_flag : 1; -+ u16 pps_deblocking_filter_disabled_flag : 1; -+ u16 pps_beta_offset_div2 : 4; -+ u16 pps_tc_offset_div2 : 4; -+ u16 lists_modification_present_flag : 1; -+ u16 log2_parallel_merge_level : 3; -+ u16 slice_segment_header_extension_present_flag : 1; -+ u16 zeroes : 3; -+ u16 num_tile_columns : 5; -+ u16 num_tile_rows : 5; -+ u16 sps_pps_mode : 4; -+ u16 reserved_bits : 14; -+ u16 reserved; -+} __packed; -+ -+struct rkvdec_hevc_tile { -+ u16 value0 : 12; -+ u16 value1 : 12; -+} __packed; -+ -+struct rkvdec_sps_pps_packet { -+ struct rkvdec_hevc_sps sps; -+ struct rkvdec_hevc_pps pps; -+ struct rkvdec_hevc_tile column_width[10]; -+ struct rkvdec_hevc_tile row_height[11]; -+ u32 zeroes[3]; -+ u32 zeroes_bits : 6; -+ u32 padding_bits : 2; -+ u32 padding; -+} __packed; -+ -+struct rkvdec_hevc_priv_tbl { -+ struct rkvdec_sps_pps_packet param_set[64]; -+ struct rkvdec_rps rps; -+ struct scaling_factor scaling_list; -+ u8 cabac_table[27456]; -+}; -+ -+struct rkvdec_hevc_ctx { -+ struct rkvdec_aux_buf priv_tbl; -+ struct v4l2_ctrl_hevc_scaling_matrix scaling_matrix_cache; -+ struct v4l2_ctrl_hevc_ext_sps_st_rps st_cache; -+ struct rkvdec_vdpu381_regs_hevc regs; -+}; -+ -+static void assemble_hw_pps(struct rkvdec_ctx *ctx, -+ struct rkvdec_hevc_run *run) -+{ -+ struct rkvdec_hevc_ctx *h264_ctx = ctx->priv; -+ const struct v4l2_ctrl_hevc_sps *sps = run->sps; -+ const struct v4l2_ctrl_hevc_pps *pps = run->pps; -+ struct rkvdec_hevc_priv_tbl *priv_tbl = h264_ctx->priv_tbl.cpu; -+ struct rkvdec_sps_pps_packet *hw_ps; -+ bool tiles_enabled; -+ s32 max_cu_width; -+ s32 pic_in_cts_width; -+ s32 pic_in_cts_height; -+ u16 log2_min_cb_size, width, height; -+ u16 column_width[20]; -+ u16 row_height[22]; -+ u8 pcm_enabled; -+ u32 i; -+ -+ /* -+ * HW read the SPS/PPS information from PPS packet index by PPS id. -+ * offset from the base can be calculated by PPS_id * 32 (size per PPS -+ * packet unit). so the driver copy SPS/PPS information to the exact PPS -+ * packet unit for HW accessing. -+ */ -+ hw_ps = &priv_tbl->param_set[pps->pic_parameter_set_id]; -+ memset(hw_ps, 0, sizeof(*hw_ps)); -+ -+ /* write sps */ -+ hw_ps->sps.video_parameters_set_id = sps->video_parameter_set_id; -+ hw_ps->sps.seq_parameters_set_id_sps = sps->seq_parameter_set_id; -+ hw_ps->sps.chroma_format_idc = sps->chroma_format_idc; -+ -+ log2_min_cb_size = sps->log2_min_luma_coding_block_size_minus3 + 3; -+ width = sps->pic_width_in_luma_samples; -+ height = sps->pic_height_in_luma_samples; -+ hw_ps->sps.width = width; -+ hw_ps->sps.height = height; -+ hw_ps->sps.bit_depth_luma = sps->bit_depth_luma_minus8 + 8; -+ hw_ps->sps.bit_depth_chroma = sps->bit_depth_chroma_minus8 + 8; -+ hw_ps->sps.max_pic_order_count_lsb = sps->log2_max_pic_order_cnt_lsb_minus4 + 4; -+ hw_ps->sps.diff_max_min_luma_coding_block_size = -+ sps->log2_diff_max_min_luma_coding_block_size; -+ hw_ps->sps.min_luma_coding_block_size = sps->log2_min_luma_coding_block_size_minus3 + 3; -+ hw_ps->sps.min_transform_block_size = sps->log2_min_luma_transform_block_size_minus2 + 2; -+ hw_ps->sps.diff_max_min_transform_block_size = -+ sps->log2_diff_max_min_luma_transform_block_size; -+ hw_ps->sps.max_transform_hierarchy_depth_inter = sps->max_transform_hierarchy_depth_inter; -+ hw_ps->sps.max_transform_hierarchy_depth_intra = sps->max_transform_hierarchy_depth_intra; -+ hw_ps->sps.scaling_list_enabled_flag = -+ !!(sps->flags & V4L2_HEVC_SPS_FLAG_SCALING_LIST_ENABLED); -+ hw_ps->sps.amp_enabled_flag = !!(sps->flags & V4L2_HEVC_SPS_FLAG_AMP_ENABLED); -+ hw_ps->sps.sample_adaptive_offset_enabled_flag = -+ !!(sps->flags & V4L2_HEVC_SPS_FLAG_SAMPLE_ADAPTIVE_OFFSET); -+ -+ pcm_enabled = !!(sps->flags & V4L2_HEVC_SPS_FLAG_PCM_ENABLED); -+ hw_ps->sps.pcm_enabled_flag = pcm_enabled; -+ hw_ps->sps.pcm_sample_bit_depth_luma = -+ pcm_enabled ? sps->pcm_sample_bit_depth_luma_minus1 + 1 : 0; -+ hw_ps->sps.pcm_sample_bit_depth_chroma = -+ pcm_enabled ? sps->pcm_sample_bit_depth_chroma_minus1 + 1 : 0; -+ hw_ps->sps.pcm_loop_filter_disabled_flag = -+ !!(sps->flags & V4L2_HEVC_SPS_FLAG_PCM_LOOP_FILTER_DISABLED); -+ hw_ps->sps.diff_max_min_pcm_luma_coding_block_size = -+ sps->log2_diff_max_min_pcm_luma_coding_block_size; -+ hw_ps->sps.min_pcm_luma_coding_block_size = -+ pcm_enabled ? sps->log2_min_pcm_luma_coding_block_size_minus3 + 3 : 0; -+ hw_ps->sps.num_short_term_ref_pic_sets = sps->num_short_term_ref_pic_sets; -+ hw_ps->sps.long_term_ref_pics_present_flag = -+ !!(sps->flags & V4L2_HEVC_SPS_FLAG_LONG_TERM_REF_PICS_PRESENT); -+ hw_ps->sps.num_long_term_ref_pics_sps = sps->num_long_term_ref_pics_sps; -+ hw_ps->sps.sps_temporal_mvp_enabled_flag = -+ !!(sps->flags & V4L2_HEVC_SPS_FLAG_SPS_TEMPORAL_MVP_ENABLED); -+ hw_ps->sps.strong_intra_smoothing_enabled_flag = -+ !!(sps->flags & V4L2_HEVC_SPS_FLAG_STRONG_INTRA_SMOOTHING_ENABLED); -+ hw_ps->sps.sps_max_dec_pic_buffering_minus1 = sps->sps_max_dec_pic_buffering_minus1; -+ hw_ps->sps.reserved_f = 0xff; -+ -+ /* write pps */ -+ hw_ps->pps.picture_parameters_set_id = pps->pic_parameter_set_id; -+ hw_ps->pps.seq_parameters_set_id_pps = sps->seq_parameter_set_id; -+ hw_ps->pps.dependent_slice_segments_enabled_flag = -+ !!(pps->flags & V4L2_HEVC_PPS_FLAG_DEPENDENT_SLICE_SEGMENT_ENABLED); -+ hw_ps->pps.output_flag_present_flag = -+ !!(pps->flags & V4L2_HEVC_PPS_FLAG_OUTPUT_FLAG_PRESENT); -+ hw_ps->pps.num_extra_slice_header_bits = pps->num_extra_slice_header_bits; -+ hw_ps->pps.sign_data_hiding_enabled_flag = -+ !!(pps->flags & V4L2_HEVC_PPS_FLAG_SIGN_DATA_HIDING_ENABLED); -+ hw_ps->pps.cabac_init_present_flag = -+ !!(pps->flags & V4L2_HEVC_PPS_FLAG_CABAC_INIT_PRESENT); -+ hw_ps->pps.num_ref_idx_l0_default_active = pps->num_ref_idx_l0_default_active_minus1 + 1; -+ hw_ps->pps.num_ref_idx_l1_default_active = pps->num_ref_idx_l1_default_active_minus1 + 1; -+ hw_ps->pps.init_qp_minus26 = pps->init_qp_minus26; -+ hw_ps->pps.constrained_intra_pred_flag = -+ !!(pps->flags & V4L2_HEVC_PPS_FLAG_CONSTRAINED_INTRA_PRED); -+ hw_ps->pps.transform_skip_enabled_flag = -+ !!(pps->flags & V4L2_HEVC_PPS_FLAG_TRANSFORM_SKIP_ENABLED); -+ hw_ps->pps.cu_qp_delta_enabled_flag = -+ !!(pps->flags & V4L2_HEVC_PPS_FLAG_CU_QP_DELTA_ENABLED); -+ hw_ps->pps.log2_min_cb_size = log2_min_cb_size + -+ sps->log2_diff_max_min_luma_coding_block_size - -+ pps->diff_cu_qp_delta_depth; -+ hw_ps->pps.pps_cb_qp_offset = pps->pps_cb_qp_offset; -+ hw_ps->pps.pps_cr_qp_offset = pps->pps_cr_qp_offset; -+ hw_ps->pps.pps_slice_chroma_qp_offsets_present_flag = -+ !!(pps->flags & V4L2_HEVC_PPS_FLAG_PPS_SLICE_CHROMA_QP_OFFSETS_PRESENT); -+ hw_ps->pps.weighted_pred_flag = !!(pps->flags & V4L2_HEVC_PPS_FLAG_WEIGHTED_PRED); -+ hw_ps->pps.weighted_bipred_flag = !!(pps->flags & V4L2_HEVC_PPS_FLAG_WEIGHTED_BIPRED); -+ hw_ps->pps.transquant_bypass_enabled_flag = -+ !!(pps->flags & V4L2_HEVC_PPS_FLAG_TRANSQUANT_BYPASS_ENABLED); -+ -+ tiles_enabled = !!(pps->flags & V4L2_HEVC_PPS_FLAG_TILES_ENABLED); -+ hw_ps->pps.tiles_enabled_flag = tiles_enabled; -+ hw_ps->pps.entropy_coding_sync_enabled_flag = -+ !!(pps->flags & V4L2_HEVC_PPS_FLAG_ENTROPY_CODING_SYNC_ENABLED); -+ hw_ps->pps.pps_loop_filter_across_slices_enabled_flag = -+ !!(pps->flags & V4L2_HEVC_PPS_FLAG_PPS_LOOP_FILTER_ACROSS_SLICES_ENABLED); -+ hw_ps->pps.loop_filter_across_tiles_enabled_flag = -+ !!(pps->flags & V4L2_HEVC_PPS_FLAG_LOOP_FILTER_ACROSS_TILES_ENABLED); -+ hw_ps->pps.deblocking_filter_override_enabled_flag = -+ !!(pps->flags & V4L2_HEVC_PPS_FLAG_DEBLOCKING_FILTER_OVERRIDE_ENABLED); -+ hw_ps->pps.pps_deblocking_filter_disabled_flag = -+ !!(pps->flags & V4L2_HEVC_PPS_FLAG_PPS_DISABLE_DEBLOCKING_FILTER); -+ hw_ps->pps.pps_beta_offset_div2 = pps->pps_beta_offset_div2; -+ hw_ps->pps.pps_tc_offset_div2 = pps->pps_tc_offset_div2; -+ hw_ps->pps.lists_modification_present_flag = -+ !!(pps->flags & V4L2_HEVC_PPS_FLAG_LISTS_MODIFICATION_PRESENT); -+ hw_ps->pps.log2_parallel_merge_level = pps->log2_parallel_merge_level_minus2 + 2; -+ hw_ps->pps.slice_segment_header_extension_present_flag = -+ !!(pps->flags & V4L2_HEVC_PPS_FLAG_SLICE_SEGMENT_HEADER_EXTENSION_PRESENT); -+ hw_ps->pps.num_tile_columns = tiles_enabled ? pps->num_tile_columns_minus1 + 1 : 0; -+ hw_ps->pps.num_tile_rows = tiles_enabled ? pps->num_tile_rows_minus1 + 1 : 0; -+ hw_ps->pps.sps_pps_mode = 0; -+ hw_ps->pps.reserved_bits = 0x3fff; -+ hw_ps->pps.reserved = 0xffff; -+ -+ // Setup tiles information -+ memset(column_width, 0, sizeof(column_width)); -+ memset(row_height, 0, sizeof(row_height)); -+ -+ max_cu_width = 1 << (sps->log2_diff_max_min_luma_coding_block_size + log2_min_cb_size); -+ pic_in_cts_width = (width + max_cu_width - 1) / max_cu_width; -+ pic_in_cts_height = (height + max_cu_width - 1) / max_cu_width; -+ -+ if (pps->flags & V4L2_HEVC_PPS_FLAG_TILES_ENABLED) { -+ if (pps->flags & V4L2_HEVC_PPS_FLAG_UNIFORM_SPACING) { -+ compute_tiles_uniform(run, log2_min_cb_size, width, height, -+ pic_in_cts_width, pic_in_cts_height, -+ column_width, row_height); -+ } else { -+ compute_tiles_non_uniform(run, log2_min_cb_size, width, height, -+ pic_in_cts_width, pic_in_cts_height, -+ column_width, row_height); -+ } -+ } else { -+ column_width[0] = (width + max_cu_width - 1) / max_cu_width; -+ row_height[0] = (height + max_cu_width - 1) / max_cu_width; -+ } -+ -+ for (i = 0; i < 20; i++) { -+ if (column_width[i] > 0) -+ column_width[i]--; -+ -+ if (i & 1) -+ hw_ps->column_width[i / 2].value1 = column_width[i]; -+ else -+ hw_ps->column_width[i / 2].value0 = column_width[i]; -+ } -+ -+ for (i = 0; i < 22; i++) { -+ if (row_height[i] > 0) -+ row_height[i]--; -+ -+ if (i & 1) -+ hw_ps->row_height[i / 2].value1 = row_height[i]; -+ else -+ hw_ps->row_height[i / 2].value0 = row_height[i]; -+ } -+ -+ hw_ps->padding = 0xffffffff; -+ hw_ps->padding_bits = 0x3; -+} -+ -+static void set_ref_valid(struct rkvdec_vdpu381_regs_hevc *regs, int id, u32 valid) -+{ -+ switch (id) { -+ case 0: -+ regs->hevc_param.reg099.hevc_ref_valid_0 = valid; -+ break; -+ case 1: -+ regs->hevc_param.reg099.hevc_ref_valid_1 = valid; -+ break; -+ case 2: -+ regs->hevc_param.reg099.hevc_ref_valid_2 = valid; -+ break; -+ case 3: -+ regs->hevc_param.reg099.hevc_ref_valid_3 = valid; -+ break; -+ case 4: -+ regs->hevc_param.reg099.hevc_ref_valid_4 = valid; -+ break; -+ case 5: -+ regs->hevc_param.reg099.hevc_ref_valid_5 = valid; -+ break; -+ case 6: -+ regs->hevc_param.reg099.hevc_ref_valid_6 = valid; -+ break; -+ case 7: -+ regs->hevc_param.reg099.hevc_ref_valid_7 = valid; -+ break; -+ case 8: -+ regs->hevc_param.reg099.hevc_ref_valid_8 = valid; -+ break; -+ case 9: -+ regs->hevc_param.reg099.hevc_ref_valid_9 = valid; -+ break; -+ case 10: -+ regs->hevc_param.reg099.hevc_ref_valid_10 = valid; -+ break; -+ case 11: -+ regs->hevc_param.reg099.hevc_ref_valid_11 = valid; -+ break; -+ case 12: -+ regs->hevc_param.reg099.hevc_ref_valid_12 = valid; -+ break; -+ case 13: -+ regs->hevc_param.reg099.hevc_ref_valid_13 = valid; -+ break; -+ case 14: -+ regs->hevc_param.reg099.hevc_ref_valid_14 = valid; -+ break; -+ } -+} -+ -+static void rkvdec_write_regs(struct rkvdec_ctx *ctx) -+{ -+ struct rkvdec_dev *rkvdec = ctx->dev; -+ struct rkvdec_hevc_ctx *hevc_ctx = ctx->priv; -+ -+ rkvdec_memcpy_toio(rkvdec->regs + OFFSET_COMMON_REGS, -+ &hevc_ctx->regs.common, -+ sizeof(hevc_ctx->regs.common)); -+ rkvdec_memcpy_toio(rkvdec->regs + OFFSET_CODEC_PARAMS_REGS, -+ &hevc_ctx->regs.hevc_param, -+ sizeof(hevc_ctx->regs.hevc_param)); -+ rkvdec_memcpy_toio(rkvdec->regs + OFFSET_COMMON_ADDR_REGS, -+ &hevc_ctx->regs.common_addr, -+ sizeof(hevc_ctx->regs.common_addr)); -+ rkvdec_memcpy_toio(rkvdec->regs + OFFSET_CODEC_ADDR_REGS, -+ &hevc_ctx->regs.hevc_addr, -+ sizeof(hevc_ctx->regs.hevc_addr)); -+ rkvdec_memcpy_toio(rkvdec->regs + OFFSET_POC_HIGHBIT_REGS, -+ &hevc_ctx->regs.hevc_highpoc, -+ sizeof(hevc_ctx->regs.hevc_highpoc)); -+} -+ -+static void config_registers(struct rkvdec_ctx *ctx, -+ struct rkvdec_hevc_run *run) -+{ -+ const struct v4l2_ctrl_hevc_decode_params *dec_params = run->decode_params; -+ const struct v4l2_hevc_dpb_entry *dpb = dec_params->dpb; -+ struct rkvdec_hevc_ctx *hevc_ctx = ctx->priv; -+ struct rkvdec_vdpu381_regs_hevc *regs = &hevc_ctx->regs; -+ dma_addr_t priv_start_addr = hevc_ctx->priv_tbl.dma; -+ const struct v4l2_pix_format_mplane *dst_fmt; -+ struct vb2_v4l2_buffer *src_buf = run->base.bufs.src; -+ struct vb2_v4l2_buffer *dst_buf = run->base.bufs.dst; -+ const struct v4l2_format *f; -+ dma_addr_t rlc_addr; -+ u32 hor_virstride = 0; -+ u32 ver_virstride = 0; -+ u32 y_virstride = 0; -+ u32 offset; -+ u32 pixels; -+ dma_addr_t dst_addr; -+ u32 i; -+ -+ memset(regs, 0, sizeof(*regs)); -+ -+ /* Set HEVC mode */ -+ regs->common.reg009.dec_mode = VDPU381_MODE_HEVC; -+ -+ /* Set config */ -+ regs->common.reg011.buf_empty_en = 1; -+ regs->common.reg011.dec_clkgate_e = 1; -+ regs->common.reg011.dec_timeout_e = 1; -+ regs->common.reg011.pix_range_detection_e = 1; -+ -+ /* Set IDR flag */ -+ regs->common.reg013.cur_pic_is_idr = -+ !!(dec_params->flags & V4L2_HEVC_DECODE_PARAM_FLAG_IDR_PIC); -+ -+ /* Set input stream length */ -+ regs->common.stream_len = vb2_get_plane_payload(&src_buf->vb2_buf, 0); -+ -+ /* Set max slice number */ -+ regs->common.reg017.slice_num = 1; -+ -+ /* Set strides */ -+ f = &ctx->decoded_fmt; -+ dst_fmt = &f->fmt.pix_mp; -+ hor_virstride = dst_fmt->plane_fmt[0].bytesperline; -+ ver_virstride = dst_fmt->height; -+ y_virstride = hor_virstride * ver_virstride; -+ pixels = dst_fmt->height * dst_fmt->width; -+ -+ regs->common.reg018.y_hor_virstride = hor_virstride / 16; -+ regs->common.reg019.uv_hor_virstride = hor_virstride / 16; -+ regs->common.reg020.y_virstride = y_virstride / 16; -+ -+ /* Activate block gating */ -+ regs->common.reg026.swreg_block_gating_e = 0xfffef; -+ regs->common.reg026.reg_cfg_gating_en = 1; -+ -+ /* Set timeout threshold */ -+ if (pixels < RKVDEC_1080P_PIXELS) -+ regs->common.timeout_threshold = RKVDEC_TIMEOUT_1080p; -+ else if (pixels < RKVDEC_4K_PIXELS) -+ regs->common.timeout_threshold = RKVDEC_TIMEOUT_4K; -+ else if (pixels < RKVDEC_8K_PIXELS) -+ regs->common.timeout_threshold = RKVDEC_TIMEOUT_8K; -+ -+ /* Set POC val */ -+ regs->hevc_param.cur_top_poc = dec_params->pic_order_cnt_val; -+ -+ /* Set ref pic address & poc */ -+ for (i = 0; i < ARRAY_SIZE(dec_params->dpb); i++) { -+ struct vb2_buffer *vb_buf = get_ref_buf(ctx, run, i); -+ dma_addr_t buf_dma = vb2_dma_contig_plane_dma_addr(vb_buf, 0); -+ u32 valid = !!(dec_params->num_active_dpb_entries > i); -+ -+ /* Set reference addresses */ -+ regs->hevc_addr.ref_base[i] = buf_dma; -+ -+ /* Set COLMV addresses */ -+ regs->hevc_addr.colmv_base[i] = buf_dma + ctx->colmv_offset; -+ -+ regs->hevc_param.reg067_082_ref_poc[i] = -+ dpb[i].pic_order_cnt_val; -+ -+ set_ref_valid(regs, i, valid); -+ regs->hevc_param.reg103.ref_pic_layer_same_with_cur |= 1 << i; -+ } -+ -+ /* Set rlc base address (input stream) */ -+ rlc_addr = vb2_dma_contig_plane_dma_addr(&src_buf->vb2_buf, 0); -+ regs->common_addr.rlc_base = rlc_addr; -+ regs->common_addr.rlcwrite_base = rlc_addr; -+ -+ /* Set output base address */ -+ dst_addr = vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0); -+ regs->common_addr.decout_base = dst_addr; -+ regs->common_addr.error_ref_base = dst_addr; -+ -+ /* Set colmv address */ -+ regs->common_addr.colmv_cur_base = dst_addr + ctx->colmv_offset; -+ -+ /* Set RCB addresses */ -+ for (i = 0; i < rkvdec_rcb_buf_count(ctx); i++) -+ regs->common_addr.rcb_base[i] = rkvdec_rcb_buf_dma_addr(ctx, i); -+ -+ /* Set hw pps address */ -+ offset = offsetof(struct rkvdec_hevc_priv_tbl, param_set); -+ regs->hevc_addr.pps_base = priv_start_addr + offset; -+ -+ /* Set hw rps address */ -+ offset = offsetof(struct rkvdec_hevc_priv_tbl, rps); -+ regs->hevc_addr.rps_base = priv_start_addr + offset; -+ -+ /* Set cabac table */ -+ offset = offsetof(struct rkvdec_hevc_priv_tbl, cabac_table); -+ regs->hevc_addr.cabactbl_base = priv_start_addr + offset; -+ -+ /* Set scaling matrix */ -+ offset = offsetof(struct rkvdec_hevc_priv_tbl, scaling_list); -+ regs->hevc_addr.scanlist_addr = priv_start_addr + offset; -+ -+ rkvdec_write_regs(ctx); -+} -+ -+static int rkvdec_hevc_start(struct rkvdec_ctx *ctx) -+{ -+ struct rkvdec_dev *rkvdec = ctx->dev; -+ struct rkvdec_hevc_priv_tbl *priv_tbl; -+ struct rkvdec_hevc_ctx *hevc_ctx; -+ struct v4l2_ctrl *ctrl; -+ int ret; -+ -+ ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, -+ V4L2_CID_STATELESS_HEVC_SPS); -+ if (!ctrl) -+ return -EINVAL; -+ -+ ret = rkvdec_hevc_validate_sps(ctx, ctrl->p_new.p_hevc_sps); -+ if (ret) -+ return ret; -+ -+ hevc_ctx = kzalloc(sizeof(*hevc_ctx), GFP_KERNEL); -+ if (!hevc_ctx) -+ return -ENOMEM; -+ -+ priv_tbl = dma_alloc_coherent(rkvdec->dev, sizeof(*priv_tbl), -+ &hevc_ctx->priv_tbl.dma, GFP_KERNEL); -+ if (!priv_tbl) { -+ ret = -ENOMEM; -+ goto err_free_ctx; -+ } -+ -+ hevc_ctx->priv_tbl.size = sizeof(*priv_tbl); -+ hevc_ctx->priv_tbl.cpu = priv_tbl; -+ memcpy(priv_tbl->cabac_table, rkvdec_hevc_cabac_table, -+ sizeof(rkvdec_hevc_cabac_table)); -+ -+ ctx->priv = hevc_ctx; -+ return 0; -+ -+err_free_ctx: -+ kfree(hevc_ctx); -+ return ret; -+} -+ -+static void rkvdec_hevc_stop(struct rkvdec_ctx *ctx) -+{ -+ struct rkvdec_hevc_ctx *hevc_ctx = ctx->priv; -+ struct rkvdec_dev *rkvdec = ctx->dev; -+ -+ dma_free_coherent(rkvdec->dev, hevc_ctx->priv_tbl.size, -+ hevc_ctx->priv_tbl.cpu, hevc_ctx->priv_tbl.dma); -+ kfree(hevc_ctx); -+} -+ -+static int rkvdec_hevc_run(struct rkvdec_ctx *ctx) -+{ -+ struct rkvdec_dev *rkvdec = ctx->dev; -+ struct rkvdec_hevc_run run; -+ struct rkvdec_hevc_ctx *hevc_ctx = ctx->priv; -+ struct rkvdec_hevc_priv_tbl *tbl = hevc_ctx->priv_tbl.cpu; -+ -+ rkvdec_hevc_run_preamble(ctx, &run); -+ -+ rkvdec_hevc_assemble_hw_scaling_list(rkvdec, -+ &run, -+ &tbl->scaling_list, -+ &hevc_ctx->scaling_matrix_cache); -+ assemble_hw_pps(ctx, &run); -+ rkvdec_hevc_assemble_hw_rps(&run, &tbl->rps, &hevc_ctx->st_cache); -+ -+ config_registers(ctx, &run); -+ -+ rkvdec_run_postamble(ctx, &run.base); -+ -+ schedule_delayed_work(&rkvdec->watchdog_work, msecs_to_jiffies(2000)); -+ -+ /* Start decoding! */ -+ writel(VDPU381_DEC_E_BIT, rkvdec->regs + VDPU381_REG_DEC_E); -+ -+ return 0; -+} -+ -+const struct rkvdec_coded_fmt_ops rkvdec_vdpu381_hevc_fmt_ops = { -+ .adjust_fmt = rkvdec_hevc_adjust_fmt, -+ .start = rkvdec_hevc_start, -+ .stop = rkvdec_hevc_stop, -+ .run = rkvdec_hevc_run, -+ .try_ctrl = rkvdec_hevc_try_ctrl, -+ .get_image_fmt = rkvdec_hevc_get_image_fmt, -+}; -diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu383-h264.c b/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu383-h264.c -new file mode 100644 -index 000000000000..bb2c62d9c3d4 ---- /dev/null -+++ b/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu383-h264.c -@@ -0,0 +1,582 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Rockchip Video Decoder VDPU383 H264 backend ++ * Rockchip VDPU381 Video Decoder H264 backend + * + * Copyright (C) 2024 Collabora, Ltd. + * Detlev Casanova @@ -1299,11 +83,10 @@ index 000000000000..bb2c62d9c3d4 +#include +#include + -+#include -+ ++#include "rkvdec.h" +#include "rkvdec-rcb.h" -+#include "rkvdec-vdpu383-regs.h" +#include "rkvdec-h264-common.h" ++#include "rkvdec-vdpu381-regs.h" + +struct rkvdec_sps { + u16 seq_parameter_set_id: 4; @@ -1318,86 +101,40 @@ index 000000000000..bb2c62d9c3d4 + u16 pic_order_cnt_type: 2; + u16 log2_max_pic_order_cnt_lsb_minus4: 4; + u16 delta_pic_order_always_zero_flag: 1; -+ -+ u16 pic_width_in_mbs: 16; -+ u16 pic_height_in_mbs: 16; -+ ++ u16 pic_width_in_mbs: 12; ++ u16 pic_height_in_mbs: 12; + u16 frame_mbs_only_flag: 1; + u16 mb_adaptive_frame_field_flag: 1; + u16 direct_8x8_inference_flag: 1; + u16 mvc_extension_enable: 1; + u16 num_views: 2; -+ u16 view_id0: 10; -+ u16 view_id1: 10; ++ ++ u16 reserved_bits: 12; ++ u16 reserved[11]; +} __packed; + +struct rkvdec_pps { -+ u32 pic_parameter_set_id: 8; -+ u32 pps_seq_parameter_set_id: 5; -+ u32 entropy_coding_mode_flag: 1; -+ u32 bottom_field_pic_order_in_frame_present_flag: 1; -+ u32 num_ref_idx_l0_default_active_minus1: 5; -+ u32 num_ref_idx_l1_default_active_minus1: 5; -+ u32 weighted_pred_flag: 1; -+ u32 weighted_bipred_idc: 2; -+ u32 pic_init_qp_minus26: 7; -+ u32 pic_init_qs_minus26: 6; -+ u32 chroma_qp_index_offset: 5; -+ u32 deblocking_filter_control_present_flag: 1; -+ u32 constrained_intra_pred_flag: 1; -+ u32 redundant_pic_cnt_present: 1; -+ u32 transform_8x8_mode_flag: 1; -+ u32 second_chroma_qp_index_offset: 5; -+ u32 scaling_list_enable_flag: 1; -+ u32 is_longterm: 16; -+ u32 voidx: 16; ++ u16 pic_parameter_set_id: 8; ++ u16 pps_seq_parameter_set_id: 5; ++ u16 entropy_coding_mode_flag: 1; ++ u16 bottom_field_pic_order_in_frame_present_flag: 1; ++ u16 num_ref_idx_l0_default_active_minus1: 5; ++ u16 num_ref_idx_l1_default_active_minus1: 5; ++ u16 weighted_pred_flag: 1; ++ u16 weighted_bipred_idc: 2; ++ u16 pic_init_qp_minus26: 7; ++ u16 pic_init_qs_minus26: 6; ++ u16 chroma_qp_index_offset: 5; ++ u16 deblocking_filter_control_present_flag: 1; ++ u16 constrained_intra_pred_flag: 1; ++ u16 redundant_pic_cnt_present: 1; ++ u16 transform_8x8_mode_flag: 1; ++ u16 second_chroma_qp_index_offset: 5; ++ u16 scaling_list_enable_flag: 1; ++ u32 scaling_list_address; ++ u16 is_longterm; + -+ // dpb -+ u32 pic_field_flag: 1; -+ u32 pic_associated_flag: 1; -+ u32 cur_top_field: 32; -+ u32 cur_bot_field: 32; -+ -+ u32 top_field_order_cnt0: 32; -+ u32 bot_field_order_cnt0: 32; -+ u32 top_field_order_cnt1: 32; -+ u32 bot_field_order_cnt1: 32; -+ u32 top_field_order_cnt2: 32; -+ u32 bot_field_order_cnt2: 32; -+ u32 top_field_order_cnt3: 32; -+ u32 bot_field_order_cnt3: 32; -+ u32 top_field_order_cnt4: 32; -+ u32 bot_field_order_cnt4: 32; -+ u32 top_field_order_cnt5: 32; -+ u32 bot_field_order_cnt5: 32; -+ u32 top_field_order_cnt6: 32; -+ u32 bot_field_order_cnt6: 32; -+ u32 top_field_order_cnt7: 32; -+ u32 bot_field_order_cnt7: 32; -+ u32 top_field_order_cnt8: 32; -+ u32 bot_field_order_cnt8: 32; -+ u32 top_field_order_cnt9: 32; -+ u32 bot_field_order_cnt9: 32; -+ u32 top_field_order_cnt10: 32; -+ u32 bot_field_order_cnt10: 32; -+ u32 top_field_order_cnt11: 32; -+ u32 bot_field_order_cnt11: 32; -+ u32 top_field_order_cnt12: 32; -+ u32 bot_field_order_cnt12: 32; -+ u32 top_field_order_cnt13: 32; -+ u32 bot_field_order_cnt13: 32; -+ u32 top_field_order_cnt14: 32; -+ u32 bot_field_order_cnt14: 32; -+ u32 top_field_order_cnt15: 32; -+ u32 bot_field_order_cnt15: 32; -+ -+ u32 ref_field_flags: 16; -+ u32 ref_topfield_used: 16; -+ u32 ref_botfield_used: 16; -+ u32 ref_colmv_use_flag: 16; -+ -+ u32 reserved0: 30; -+ u32 reserved[3]; ++ u8 reserved[3]; +} __packed; + +struct rkvdec_sps_pps { @@ -1411,84 +148,14 @@ index 000000000000..bb2c62d9c3d4 + struct rkvdec_h264_scaling_list scaling_list; + struct rkvdec_sps_pps param_set[256]; + struct rkvdec_rps rps; -+} __packed; ++}; + +struct rkvdec_h264_ctx { + struct rkvdec_aux_buf priv_tbl; + struct rkvdec_h264_reflists reflists; -+ struct vdpu383_regs_h26x regs; ++ struct rkvdec_vdpu381_regs_h264 regs; +}; + -+static void set_field_order_cnt(struct rkvdec_sps_pps *hw_ps, int id, u32 top, u32 bottom) -+{ -+ switch (id) { -+ case 0: -+ hw_ps->pps.top_field_order_cnt0 = top; -+ hw_ps->pps.bot_field_order_cnt0 = bottom; -+ break; -+ case 1: -+ hw_ps->pps.top_field_order_cnt1 = top; -+ hw_ps->pps.bot_field_order_cnt1 = bottom; -+ break; -+ case 2: -+ hw_ps->pps.top_field_order_cnt2 = top; -+ hw_ps->pps.bot_field_order_cnt2 = bottom; -+ break; -+ case 3: -+ hw_ps->pps.top_field_order_cnt3 = top; -+ hw_ps->pps.bot_field_order_cnt3 = bottom; -+ break; -+ case 4: -+ hw_ps->pps.top_field_order_cnt4 = top; -+ hw_ps->pps.bot_field_order_cnt4 = bottom; -+ break; -+ case 5: -+ hw_ps->pps.top_field_order_cnt5 = top; -+ hw_ps->pps.bot_field_order_cnt5 = bottom; -+ break; -+ case 6: -+ hw_ps->pps.top_field_order_cnt6 = top; -+ hw_ps->pps.bot_field_order_cnt6 = bottom; -+ break; -+ case 7: -+ hw_ps->pps.top_field_order_cnt7 = top; -+ hw_ps->pps.bot_field_order_cnt7 = bottom; -+ break; -+ case 8: -+ hw_ps->pps.top_field_order_cnt8 = top; -+ hw_ps->pps.bot_field_order_cnt8 = bottom; -+ break; -+ case 9: -+ hw_ps->pps.top_field_order_cnt9 = top; -+ hw_ps->pps.bot_field_order_cnt9 = bottom; -+ break; -+ case 10: -+ hw_ps->pps.top_field_order_cnt10 = top; -+ hw_ps->pps.bot_field_order_cnt10 = bottom; -+ break; -+ case 11: -+ hw_ps->pps.top_field_order_cnt11 = top; -+ hw_ps->pps.bot_field_order_cnt11 = bottom; -+ break; -+ case 12: -+ hw_ps->pps.top_field_order_cnt12 = top; -+ hw_ps->pps.bot_field_order_cnt12 = bottom; -+ break; -+ case 13: -+ hw_ps->pps.top_field_order_cnt13 = top; -+ hw_ps->pps.bot_field_order_cnt13 = bottom; -+ break; -+ case 14: -+ hw_ps->pps.top_field_order_cnt14 = top; -+ hw_ps->pps.bot_field_order_cnt14 = bottom; -+ break; -+ case 15: -+ hw_ps->pps.top_field_order_cnt15 = top; -+ hw_ps->pps.bot_field_order_cnt15 = bottom; -+ break; -+ } -+} -+ +static void assemble_hw_pps(struct rkvdec_ctx *ctx, + struct rkvdec_h264_run *run) +{ @@ -1499,7 +166,8 @@ index 000000000000..bb2c62d9c3d4 + const struct v4l2_h264_dpb_entry *dpb = dec_params->dpb; + struct rkvdec_h264_priv_tbl *priv_tbl = h264_ctx->priv_tbl.cpu; + struct rkvdec_sps_pps *hw_ps; -+ u32 pic_width, pic_height; ++ dma_addr_t scaling_list_address; ++ u32 scaling_distance; + u32 i; + + /* @@ -1527,8 +195,8 @@ index 000000000000..bb2c62d9c3d4 + sps->log2_max_pic_order_cnt_lsb_minus4; + hw_ps->sps.delta_pic_order_always_zero_flag = + !!(sps->flags & V4L2_H264_SPS_FLAG_DELTA_PIC_ORDER_ALWAYS_ZERO); -+ hw_ps->sps.mvc_extension_enable = 0; -+ hw_ps->sps.num_views = 0; ++ hw_ps->sps.mvc_extension_enable = 1; ++ hw_ps->sps.num_views = 1; + + /* + * Use the SPS values since they are already in macroblocks @@ -1537,16 +205,8 @@ index 000000000000..bb2c62d9c3d4 + * decoding smaller images into larger allocation which can be used + * to implementing SVC spatial layer support. + */ -+ pic_width = 16 * (sps->pic_width_in_mbs_minus1 + 1); -+ pic_height = 16 * (sps->pic_height_in_map_units_minus1 + 1); -+ if (!(sps->flags & V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY)) -+ pic_height *= 2; -+ if (!!(dec_params->flags & V4L2_H264_DECODE_PARAM_FLAG_FIELD_PIC)) -+ pic_height /= 2; -+ -+ hw_ps->sps.pic_width_in_mbs = pic_width; -+ hw_ps->sps.pic_height_in_mbs = pic_height; -+ ++ hw_ps->sps.pic_width_in_mbs = sps->pic_width_in_mbs_minus1 + 1; ++ hw_ps->sps.pic_height_in_mbs = sps->pic_height_in_map_units_minus1 + 1; + hw_ps->sps.frame_mbs_only_flag = + !!(sps->flags & V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY); + hw_ps->sps.mb_adaptive_frame_field_flag = @@ -1583,30 +243,17 @@ index 000000000000..bb2c62d9c3d4 + hw_ps->pps.scaling_list_enable_flag = + !!(pps->flags & V4L2_H264_PPS_FLAG_SCALING_MATRIX_PRESENT); + ++ /* ++ * To be on the safe side, program the scaling matrix address ++ */ ++ scaling_distance = offsetof(struct rkvdec_h264_priv_tbl, scaling_list); ++ scaling_list_address = h264_ctx->priv_tbl.dma + scaling_distance; ++ hw_ps->pps.scaling_list_address = scaling_list_address; ++ + for (i = 0; i < ARRAY_SIZE(dec_params->dpb); i++) { + if (dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM) + hw_ps->pps.is_longterm |= (1 << i); -+ -+ set_field_order_cnt(hw_ps, i, dpb[i].top_field_order_cnt, -+ dpb[i].bottom_field_order_cnt); -+ -+ hw_ps->pps.ref_field_flags |= -+ (!!(dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_FIELD)) << i; -+ hw_ps->pps.ref_colmv_use_flag |= -+ (!!(dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_ACTIVE)) << i; -+ hw_ps->pps.ref_topfield_used |= -+ (!!(dpb[i].fields & V4L2_H264_TOP_FIELD_REF)) << i; -+ hw_ps->pps.ref_botfield_used |= -+ (!!(dpb[i].fields & V4L2_H264_BOTTOM_FIELD_REF)) << i; + } -+ -+ hw_ps->pps.pic_field_flag = -+ !!(dec_params->flags & V4L2_H264_DECODE_PARAM_FLAG_FIELD_PIC); -+ hw_ps->pps.pic_associated_flag = -+ !!(dec_params->flags & V4L2_H264_DECODE_PARAM_FLAG_BOTTOM_FIELD); -+ -+ hw_ps->pps.cur_top_field = dec_params->top_field_order_cnt; -+ hw_ps->pps.cur_bot_field = dec_params->bottom_field_order_cnt; +} + +static void rkvdec_write_regs(struct rkvdec_ctx *ctx) @@ -1614,30 +261,34 @@ index 000000000000..bb2c62d9c3d4 + struct rkvdec_dev *rkvdec = ctx->dev; + struct rkvdec_h264_ctx *h264_ctx = ctx->priv; + -+ rkvdec_memcpy_toio(rkvdec->regs + VDPU383_OFFSET_COMMON_REGS, ++ rkvdec_memcpy_toio(rkvdec->regs + OFFSET_COMMON_REGS, + &h264_ctx->regs.common, + sizeof(h264_ctx->regs.common)); -+ rkvdec_memcpy_toio(rkvdec->regs + VDPU383_OFFSET_COMMON_ADDR_REGS, ++ rkvdec_memcpy_toio(rkvdec->regs + OFFSET_CODEC_PARAMS_REGS, ++ &h264_ctx->regs.h264_param, ++ sizeof(h264_ctx->regs.h264_param)); ++ rkvdec_memcpy_toio(rkvdec->regs + OFFSET_COMMON_ADDR_REGS, + &h264_ctx->regs.common_addr, + sizeof(h264_ctx->regs.common_addr)); -+ rkvdec_memcpy_toio(rkvdec->regs + VDPU383_OFFSET_CODEC_PARAMS_REGS, -+ &h264_ctx->regs.h26x_params, -+ sizeof(h264_ctx->regs.h26x_params)); -+ rkvdec_memcpy_toio(rkvdec->regs + VDPU383_OFFSET_CODEC_ADDR_REGS, -+ &h264_ctx->regs.h26x_addr, -+ sizeof(h264_ctx->regs.h26x_addr)); ++ rkvdec_memcpy_toio(rkvdec->regs + OFFSET_CODEC_ADDR_REGS, ++ &h264_ctx->regs.h264_addr, ++ sizeof(h264_ctx->regs.h264_addr)); ++ rkvdec_memcpy_toio(rkvdec->regs + OFFSET_POC_HIGHBIT_REGS, ++ &h264_ctx->regs.h264_highpoc, ++ sizeof(h264_ctx->regs.h264_highpoc)); +} + +static void config_registers(struct rkvdec_ctx *ctx, + struct rkvdec_h264_run *run) +{ + const struct v4l2_ctrl_h264_decode_params *dec_params = run->decode_params; ++ const struct v4l2_h264_dpb_entry *dpb = dec_params->dpb; + struct rkvdec_h264_ctx *h264_ctx = ctx->priv; + dma_addr_t priv_start_addr = h264_ctx->priv_tbl.dma; + const struct v4l2_pix_format_mplane *dst_fmt; + struct vb2_v4l2_buffer *src_buf = run->base.bufs.src; + struct vb2_v4l2_buffer *dst_buf = run->base.bufs.dst; -+ struct vdpu383_regs_h26x *regs = &h264_ctx->regs; ++ struct rkvdec_vdpu381_regs_h264 *regs = &h264_ctx->regs; + const struct v4l2_format *f; + dma_addr_t rlc_addr; + dma_addr_t dst_addr; @@ -1651,10 +302,29 @@ index 000000000000..bb2c62d9c3d4 + memset(regs, 0, sizeof(*regs)); + + /* Set H264 mode */ -+ regs->common.reg008_dec_mode = VDPU383_MODE_H264; ++ regs->common.reg009.dec_mode = VDPU381_MODE_H264; ++ ++ /* Set config */ ++ regs->common.reg011.buf_empty_en = 1; ++ regs->common.reg011.dec_clkgate_e = 1; ++ regs->common.reg011.dec_timeout_e = 1; ++ regs->common.reg011.pix_range_detection_e = 1; ++ ++ /* ++ * Even though the scan list address can be set in RPS, ++ * with some frames, it will try to use the address set in the register. ++ */ ++ regs->common.reg012.scanlist_addr_valid_en = 1; ++ ++ /* Set IDR flag */ ++ regs->common.reg013.cur_pic_is_idr = ++ !!(dec_params->flags & V4L2_H264_DECODE_PARAM_FLAG_IDR_PIC); + + /* Set input stream length */ -+ regs->h26x_params.reg066_stream_len = vb2_get_plane_payload(&src_buf->vb2_buf, 0); ++ regs->common.stream_len = vb2_get_plane_payload(&src_buf->vb2_buf, 0); ++ ++ /* Set max slice number */ ++ regs->common.reg017.slice_num = MAX_SLICE_NUMBER; + + /* Set strides */ + f = &ctx->decoded_fmt; @@ -1665,33 +335,27 @@ index 000000000000..bb2c62d9c3d4 + + pixels = dst_fmt->height * dst_fmt->width; + -+ regs->h26x_params.reg068_hor_virstride = hor_virstride / 16; -+ regs->h26x_params.reg069_raster_uv_hor_virstride = hor_virstride / 16; -+ regs->h26x_params.reg070_y_virstride = y_virstride / 16; ++ regs->common.reg018.y_hor_virstride = hor_virstride / 16; ++ regs->common.reg019.uv_hor_virstride = hor_virstride / 16; ++ regs->common.reg020.y_virstride = y_virstride / 16; + + /* Activate block gating */ -+ regs->common.reg010.strmd_auto_gating_e = 1; -+ regs->common.reg010.inter_auto_gating_e = 1; -+ regs->common.reg010.intra_auto_gating_e = 1; -+ regs->common.reg010.transd_auto_gating_e = 1; -+ regs->common.reg010.recon_auto_gating_e = 1; -+ regs->common.reg010.filterd_auto_gating_e = 1; -+ regs->common.reg010.bus_auto_gating_e = 1; -+ regs->common.reg010.ctrl_auto_gating_e = 1; -+ regs->common.reg010.rcb_auto_gating_e = 1; -+ regs->common.reg010.err_prc_auto_gating_e = 1; ++ regs->common.reg026.swreg_block_gating_e = 0xfffef; ++ regs->common.reg026.reg_cfg_gating_en = 1; + + /* Set timeout threshold */ -+ if (pixels < VDPU383_1080P_PIXELS) -+ regs->common.reg013_core_timeout_threshold = VDPU383_TIMEOUT_1080p; -+ else if (pixels < VDPU383_4K_PIXELS) -+ regs->common.reg013_core_timeout_threshold = VDPU383_TIMEOUT_4K; -+ else if (pixels < VDPU383_8K_PIXELS) -+ regs->common.reg013_core_timeout_threshold = VDPU383_TIMEOUT_8K; ++ if (pixels < RKVDEC_1080P_PIXELS) ++ regs->common.timeout_threshold = RKVDEC_TIMEOUT_1080p; ++ else if (pixels < RKVDEC_4K_PIXELS) ++ regs->common.timeout_threshold = RKVDEC_TIMEOUT_4K; ++ else if (pixels < RKVDEC_8K_PIXELS) ++ regs->common.timeout_threshold = RKVDEC_TIMEOUT_8K; + else -+ regs->common.reg013_core_timeout_threshold = VDPU383_TIMEOUT_MAX; ++ regs->common.timeout_threshold = RKVDEC_TIMEOUT_MAX; + -+ regs->common.reg016.error_proc_disable = 1; ++ /* Set TOP and BOTTOM POCs */ ++ regs->h264_param.cur_top_poc = dec_params->top_field_order_cnt; ++ regs->h264_param.cur_bot_poc = dec_params->bottom_field_order_cnt; + + /* Set ref pic address & poc */ + for (i = 0; i < ARRAY_SIZE(dec_params->dpb); i++) { @@ -1708,48 +372,60 @@ index 000000000000..bb2c62d9c3d4 + buf_dma = vb2_dma_contig_plane_dma_addr(vb_buf, 0); + + /* Set reference addresses */ -+ regs->h26x_addr.reg170_185_ref_base[i] = buf_dma; -+ regs->h26x_addr.reg195_210_payload_st_ref_base[i] = buf_dma; ++ regs->h264_addr.ref_base[i] = buf_dma; + + /* Set COLMV addresses */ -+ regs->h26x_addr.reg217_232_colmv_ref_base[i] = buf_dma + ctx->colmv_offset; ++ regs->h264_addr.colmv_base[i] = buf_dma + ctx->colmv_offset; ++ ++ struct rkvdec_vdpu381_h264_ref_info *ref_info = ++ ®s->h264_param.ref_info_regs[i / 4].ref_info[i % 4]; ++ ++ ref_info->ref_field = ++ !!(dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_FIELD); ++ ref_info->ref_colmv_use_flag = ++ !!(dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_ACTIVE); ++ ref_info->ref_topfield_used = ++ !!(dpb[i].fields & V4L2_H264_TOP_FIELD_REF); ++ ref_info->ref_botfield_used = ++ !!(dpb[i].fields & V4L2_H264_BOTTOM_FIELD_REF); ++ ++ regs->h264_param.ref_pocs[i * 2] = ++ dpb[i].top_field_order_cnt; ++ regs->h264_param.ref_pocs[i * 2 + 1] = ++ dpb[i].bottom_field_order_cnt; + } + + /* Set rlc base address (input stream) */ + rlc_addr = vb2_dma_contig_plane_dma_addr(&src_buf->vb2_buf, 0); -+ regs->common_addr.reg128_strm_base = rlc_addr; ++ regs->common_addr.rlc_base = rlc_addr; ++ regs->common_addr.rlcwrite_base = rlc_addr; + + /* Set output base address */ + dst_addr = vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0); -+ regs->h26x_addr.reg168_decout_base = dst_addr; -+ regs->h26x_addr.reg169_error_ref_base = dst_addr; -+ regs->h26x_addr.reg192_payload_st_cur_base = dst_addr; ++ regs->common_addr.decout_base = dst_addr; ++ regs->common_addr.error_ref_base = dst_addr; + + /* Set colmv address */ -+ regs->h26x_addr.reg216_colmv_cur_base = dst_addr + ctx->colmv_offset; ++ regs->common_addr.colmv_cur_base = dst_addr + ctx->colmv_offset; + + /* Set RCB addresses */ -+ for (i = 0; i < rkvdec_rcb_buf_count(ctx); i++) { -+ regs->common_addr.reg140_162_rcb_info[i].offset = rkvdec_rcb_buf_dma_addr(ctx, i); -+ regs->common_addr.reg140_162_rcb_info[i].size = rkvdec_rcb_buf_size(ctx, i); -+ } ++ for (i = 0; i < rkvdec_rcb_buf_count(ctx); i++) ++ regs->common_addr.rcb_base[i] = rkvdec_rcb_buf_dma_addr(ctx, i); + + /* Set hw pps address */ + offset = offsetof(struct rkvdec_h264_priv_tbl, param_set); -+ regs->common_addr.reg131_gbl_base = priv_start_addr + offset; -+ regs->h26x_params.reg067_global_len = sizeof(struct rkvdec_sps_pps) / 16; ++ regs->h264_addr.pps_base = priv_start_addr + offset; + + /* Set hw rps address */ + offset = offsetof(struct rkvdec_h264_priv_tbl, rps); -+ regs->common_addr.reg129_rps_base = priv_start_addr + offset; ++ regs->h264_addr.rps_base = priv_start_addr + offset; + + /* Set cabac table */ + offset = offsetof(struct rkvdec_h264_priv_tbl, cabac_table); -+ regs->common_addr.reg130_cabactbl_base = priv_start_addr + offset; ++ regs->h264_addr.cabactbl_base = priv_start_addr + offset; + -+ /* Set scaling list address */ + offset = offsetof(struct rkvdec_h264_priv_tbl, scaling_list); -+ regs->common_addr.reg132_scanlist_addr = priv_start_addr + offset; ++ regs->h264_addr.scanlist_addr = priv_start_addr + offset; + + rkvdec_write_regs(ctx); +} @@ -1788,7 +464,6 @@ index 000000000000..bb2c62d9c3d4 + sizeof(rkvdec_h264_cabac_table)); + + ctx->priv = h264_ctx; -+ + return 0; + +err_free_ctx: @@ -1811,11 +486,9 @@ index 000000000000..bb2c62d9c3d4 + struct v4l2_h264_reflist_builder reflist_builder; + struct rkvdec_dev *rkvdec = ctx->dev; + struct rkvdec_h264_ctx *h264_ctx = ctx->priv; -+ struct rkvdec_h264_run run; + struct rkvdec_h264_priv_tbl *tbl = h264_ctx->priv_tbl.cpu; ++ struct rkvdec_h264_run run; + u32 watchdog_time; -+ u64 timeout_threshold; -+ unsigned long axi_rate; + + rkvdec_h264_run_preamble(ctx, &run); + @@ -1836,8 +509,8 @@ index 000000000000..bb2c62d9c3d4 + rkvdec_run_postamble(ctx, &run.base); + + /* Set watchdog at 2 times the hardware timeout threshold */ -+ timeout_threshold = h264_ctx->regs.common.reg013_core_timeout_threshold; -+ axi_rate = clk_get_rate(rkvdec->axi_clk); ++ u64 timeout_threshold = h264_ctx->regs.common.timeout_threshold; ++ unsigned long axi_rate = clk_get_rate(rkvdec->axi_clk); + + if (axi_rate) + watchdog_time = 2 * (1000 * timeout_threshold) / axi_rate; @@ -1847,9 +520,7 @@ index 000000000000..bb2c62d9c3d4 + msecs_to_jiffies(watchdog_time)); + + /* Start decoding! */ -+ writel(timeout_threshold, rkvdec->link + VDPU383_LINK_TIMEOUT_THRESHOLD); -+ writel(0, rkvdec->link + VDPU383_LINK_IP_ENABLE); -+ writel(VDPU383_DEC_E_BIT, rkvdec->link + VDPU383_LINK_DEC_ENABLE); ++ writel(VDPU381_DEC_E_BIT, rkvdec->regs + VDPU381_REG_DEC_E); + + return 0; +} @@ -1862,7 +533,7 @@ index 000000000000..bb2c62d9c3d4 + return 0; +} + -+const struct rkvdec_coded_fmt_ops rkvdec_vdpu383_h264_fmt_ops = { ++const struct rkvdec_coded_fmt_ops rkvdec_vdpu381_h264_fmt_ops = { + .adjust_fmt = rkvdec_h264_adjust_fmt, + .get_image_fmt = rkvdec_h264_get_image_fmt, + .start = rkvdec_h264_start, @@ -1870,465 +541,509 @@ index 000000000000..bb2c62d9c3d4 + .run = rkvdec_h264_run, + .try_ctrl = rkvdec_h264_try_ctrl, +}; -diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu383-regs.h b/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu383-regs.h +diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu381-regs.h b/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu381-regs.h new file mode 100644 -index 000000000000..2b614393a3af +index 000000000000..11b545e9ee7e --- /dev/null -+++ b/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu383-regs.h -@@ -0,0 +1,284 @@ ++++ b/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu381-regs.h +@@ -0,0 +1,427 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* -+ * Rockchip Video Decoder VDPU383 driver registers description ++ * Rockchip VDPU381 Video Decoder driver registers description + * -+ * Copyright (C) 2025 Collabora, Ltd. ++ * Copyright (C) 2024 Collabora, Ltd. + * Detlev Casanova + */ + -+#ifndef _RKVDEC_VDPU838_REGS_H_ -+#define _RKVDEC_VDPU838_REGS_H_ -+ +#include + -+#define VDPU383_OFFSET_COMMON_REGS (8 * sizeof(u32)) -+#define VDPU383_OFFSET_CODEC_PARAMS_REGS (64 * sizeof(u32)) -+#define VDPU383_OFFSET_COMMON_ADDR_REGS (128 * sizeof(u32)) -+#define VDPU383_OFFSET_CODEC_ADDR_REGS (168 * sizeof(u32)) -+#define VDPU383_OFFSET_POC_HIGHBIT_REGS (200 * sizeof(u32)) ++#ifndef _RKVDEC_REGS_H_ ++#define _RKVDEC_REGS_H_ + -+#define VDPU383_MODE_HEVC 0 -+#define VDPU383_MODE_H264 1 ++#define OFFSET_COMMON_REGS (8 * sizeof(u32)) ++#define OFFSET_CODEC_PARAMS_REGS (64 * sizeof(u32)) ++#define OFFSET_COMMON_ADDR_REGS (128 * sizeof(u32)) ++#define OFFSET_CODEC_ADDR_REGS (160 * sizeof(u32)) ++#define OFFSET_POC_HIGHBIT_REGS (200 * sizeof(u32)) + -+#define VDPU383_1080P_PIXELS (1920 * 1080) -+#define VDPU383_4K_PIXELS (4096 * 2304) -+#define VDPU383_8K_PIXELS (7680 * 4320) -+#define VDPU383_TIMEOUT_1080p (0xffffff) -+#define VDPU383_TIMEOUT_4K (0x2cfffff) -+#define VDPU383_TIMEOUT_8K (0x4ffffff) -+#define VDPU383_TIMEOUT_MAX (0xffffffff) ++#define VDPU381_MODE_HEVC 0 ++#define VDPU381_MODE_H264 1 ++#define VDPU381_MODE_VP9 2 ++#define VDPU381_MODE_AVS2 3 + -+#define VDPU383_LINK_TIMEOUT_THRESHOLD 0x54 ++#define MAX_SLICE_NUMBER 0x3fff + -+#define VDPU383_LINK_IP_ENABLE 0x58 -+#define VDPU383_IP_CRU_MODE BIT(24) ++#define RKVDEC_1080P_PIXELS (1920 * 1080) ++#define RKVDEC_4K_PIXELS (4096 * 2304) ++#define RKVDEC_8K_PIXELS (7680 * 4320) ++#define RKVDEC_TIMEOUT_1080p (0xefffff) ++#define RKVDEC_TIMEOUT_4K (0x2cfffff) ++#define RKVDEC_TIMEOUT_8K (0x4ffffff) ++#define RKVDEC_TIMEOUT_MAX (0xffffffff) + -+#define VDPU383_LINK_DEC_ENABLE 0x40 -+#define VDPU383_DEC_E_BIT BIT(0) ++#define VDPU381_REG_DEC_E 0x028 ++#define VDPU381_DEC_E_BIT 1 + -+#define VDPU383_LINK_INT_EN 0x048 -+#define VDPU383_INT_EN_IRQ BIT(0) -+#define VDPU383_INT_EN_LINE_IRQ BIT(1) ++#define VDPU381_REG_IMPORTANT_EN 0x02c ++#define VDPU381_DEC_IRQ_DISABLE BIT(4) + -+#define VDPU383_LINK_STA_INT 0x04c -+#define VDPU383_STA_INT_DEC_RDY_STA BIT(0) -+#define VDPU383_STA_INT_SOFTRESET_RDY (BIT(10) | BIT(11)) -+#define VDPU383_STA_INT_ALL 0x3ff ++#define VDPU381_REG_STA_INT 0x380 ++#define VDPU381_STA_INT_DEC_RDY_STA BIT(2) ++#define VDPU381_STA_INT_ERROR BIT(4) ++#define VDPU381_STA_INT_TIMEOUT BIT(5) ++#define VDPU381_STA_INT_SOFTRESET_RDY BIT(9) + -+struct vdpu383_regs_common { -+ u32 reg008_dec_mode; ++/* base: OFFSET_COMMON_REGS */ ++struct rkvdec_vdpu381_regs_common { ++ struct rkvdec_vdpu381_in_out { ++ u32 in_endian : 1; ++ u32 in_swap32_e : 1; ++ u32 in_swap64_e : 1; ++ u32 str_endian : 1; ++ u32 str_swap32_e : 1; ++ u32 str_swap64_e : 1; ++ u32 out_endian : 1; ++ u32 out_swap32_e : 1; ++ u32 out_cbcr_swap : 1; ++ u32 out_swap64_e : 1; ++ u32 reserved : 22; ++ } reg008; + -+ struct swreg9_important_en { -+ u32 fbc_e : 1; -+ u32 tile_e : 1; -+ u32 reserve0 : 2; -+ u32 buf_empty_en : 1; -+ u32 scale_down_en : 1; -+ u32 reserve1 : 1; -+ u32 pix_range_det_e : 1; -+ u32 av1_fgs_en : 1; -+ u32 reserve2 : 7; -+ u32 line_irq_en : 1; -+ u32 out_cbcr_swap : 1; -+ u32 fbc_force_uncompress : 1; -+ u32 fbc_sparse_mode : 1; -+ u32 reserve3 : 12; ++ struct rkvdec_vdpu381_dec_mode { ++ u32 dec_mode : 10; ++ u32 reserved : 22; + } reg009; + -+ struct swreg010_block_gating_en { -+ u32 strmd_auto_gating_e : 1; -+ u32 inter_auto_gating_e : 1; -+ u32 intra_auto_gating_e : 1; -+ u32 transd_auto_gating_e : 1; -+ u32 recon_auto_gating_e : 1; -+ u32 filterd_auto_gating_e : 1; -+ u32 bus_auto_gating_e : 1; -+ u32 ctrl_auto_gating_e : 1; -+ u32 rcb_auto_gating_e : 1; -+ u32 err_prc_auto_gating_e : 1; -+ u32 reserve0 : 22; ++ struct rkvdec_vdpu381_dec_e { ++ u32 dec_e : 1; ++ u32 reserved : 31; + } reg010; + -+ struct swreg011_cfg_para { -+ u32 reserve0 : 9; -+ u32 dec_timeout_dis : 1; -+ u32 reserve1 : 22; ++ struct rkvdec_vdpu381_important_en { ++ u32 reserved : 1; ++ u32 dec_clkgate_e : 1; ++ u32 dec_e_strmd_clkgate_dis : 1; ++ u32 reserved0 : 1; ++ ++ u32 dec_irq_dis : 1; ++ u32 dec_timeout_e : 1; ++ u32 buf_empty_en : 1; ++ u32 reserved1 : 3; ++ ++ u32 dec_e_rewrite_valid : 1; ++ u32 reserved2 : 9; ++ u32 softrst_en_p : 1; ++ u32 force_softreset_valid : 1; ++ u32 reserved3 : 2; ++ u32 pix_range_detection_e : 1; ++ u32 reserved4 : 7; + } reg011; + -+ struct swreg012_cache_hash_mask { -+ u32 reserve0 : 7; -+ u32 cache_hash_mask : 25; ++ struct rkvdec_vdpu381_sencodary_en { ++ u32 wr_ddr_align_en : 1; ++ u32 colmv_compress_en : 1; ++ u32 fbc_e : 1; ++ u32 reserved0 : 1; ++ ++ u32 buspr_slot_disable : 1; ++ u32 error_info_en : 1; ++ u32 info_collect_en : 1; ++ u32 wait_reset_en : 1; ++ ++ u32 scanlist_addr_valid_en : 1; ++ u32 scale_down_en : 1; ++ u32 error_cfg_wr_disable : 1; ++ u32 reserved1 : 21; + } reg012; + -+ u32 reg013_core_timeout_threshold; ++ struct rkvdec_vdpu381_en_mode_set { ++ u32 timeout_mode : 1; ++ u32 req_timeout_rst_sel : 1; ++ u32 reserved0 : 1; ++ u32 dec_commonirq_mode : 1; ++ u32 reserved1 : 2; ++ u32 stmerror_waitdecfifo_empty : 1; ++ u32 reserved2 : 2; ++ u32 h26x_streamd_error_mode : 1; ++ u32 reserved3 : 2; ++ u32 allow_not_wr_unref_bframe : 1; ++ u32 fbc_output_wr_disable : 1; ++ u32 reserved4 : 1; ++ u32 colmv_error_mode : 1; + -+ struct swreg014_line_irq_ctrl { -+ u32 dec_line_irq_step : 16; -+ u32 dec_line_offset_y_st : 16; ++ u32 reserved5 : 2; ++ u32 h26x_error_mode : 1; ++ u32 reserved6 : 2; ++ u32 ycacherd_prior : 1; ++ u32 reserved7 : 2; ++ u32 cur_pic_is_idr : 1; ++ u32 reserved8 : 1; ++ u32 right_auto_rst_disable : 1; ++ u32 frame_end_err_rst_flag : 1; ++ u32 rd_prior_mode : 1; ++ u32 rd_ctrl_prior_mode : 1; ++ u32 reserved9 : 1; ++ u32 filter_outbuf_mode : 1; ++ } reg013; ++ ++ struct rkvdec_vdpu381_fbc_param_set { ++ u32 fbc_force_uncompress : 1; ++ ++ u32 reserved0 : 2; ++ u32 allow_16x8_cp_flag : 1; ++ u32 reserved1 : 2; ++ ++ u32 fbc_h264_exten_4or8_flag : 1; ++ u32 reserved2 : 25; + } reg014; + -+ struct swreg015_irq_sta { -+ u32 rkvdec_frame_rdy_sta : 1; -+ u32 rkvdec_strm_error_sta : 1; -+ u32 rkvdec_core_timeout_sta : 1; -+ u32 rkvdec_ip_timeout_sta : 1; -+ u32 rkvdec_bus_error_sta : 1; -+ u32 rkvdec_buffer_empty_sta : 1; -+ u32 rkvdec_colmv_ref_error_sta : 1; -+ u32 rkvdec_error_spread_sta : 1; -+ u32 create_core_timeout_sta : 1; -+ u32 wlast_miss_match_sta : 1; -+ u32 rkvdec_core_rst_rdy_sta : 1; -+ u32 rkvdec_ip_rst_rdy_sta : 1; -+ u32 force_busidle_rdy_sta : 1; -+ u32 ltb_pause_rdy_sta : 1; -+ u32 ltb_end_flag : 1; -+ u32 unsupport_decmode_error_sta : 1; -+ u32 wmask_bits : 15; -+ u32 reserve0 : 1; ++ struct rkvdec_vdpu381_stream_param_set { ++ u32 rlc_mode_direct_write : 1; ++ u32 rlc_mode : 1; ++ u32 reserved0 : 3; ++ ++ u32 strm_start_bit : 7; ++ u32 reserved1 : 20; + } reg015; + -+ struct swreg016_error_ctrl_set { -+ u32 error_proc_disable : 1; -+ u32 reserve0 : 7; -+ u32 error_spread_disable : 1; -+ u32 reserve1 : 15; -+ u32 roi_error_ctu_cal_en : 1; -+ u32 reserve2 : 7; -+ } reg016; ++ u32 stream_len; + -+ struct swreg017_err_roi_ctu_offset_start { -+ u32 roi_x_ctu_offset_st : 12; -+ u32 reserve0 : 4; -+ u32 roi_y_ctu_offset_st : 12; -+ u32 reserve1 : 4; ++ struct rkvdec_vdpu381_slice_number { ++ u32 slice_num : 25; ++ u32 reserved : 7; + } reg017; + -+ struct swreg018_err_roi_ctu_offset_end { -+ u32 roi_x_ctu_offset_end : 12; -+ u32 reserve0 : 4; -+ u32 roi_y_ctu_offset_end : 12; -+ u32 reserve1 : 4; ++ struct rkvdec_vdpu381_y_hor_stride { ++ u32 y_hor_virstride : 16; ++ u32 reserved : 16; + } reg018; + -+ struct swreg019_error_ref_info { ++ struct rkvdec_vdpu381_uv_hor_stride { ++ u32 uv_hor_virstride : 16; ++ u32 reserved : 16; ++ } reg019; ++ ++ struct rkvdec_vdpu381_y_stride { ++ u32 y_virstride : 28; ++ u32 reserved : 4; ++ } reg020; ++ ++ struct rkvdec_vdpu381_error_ctrl_set { ++ u32 inter_error_prc_mode : 1; ++ u32 error_intra_mode : 1; ++ u32 error_deb_en : 1; ++ u32 picidx_replace : 5; ++ u32 error_spread_e : 1; ++ u32 reserved0 : 3; ++ u32 error_inter_pred_cross_slice : 1; ++ u32 reserved1 : 11; ++ u32 roi_error_ctu_cal_en : 1; ++ u32 reserved2 : 7; ++ } reg021; ++ ++ struct rkvdec_vdpu381_err_roi_ctu_offset_start { ++ u32 roi_x_ctu_offset_st : 12; ++ u32 reserved0 : 4; ++ u32 roi_y_ctu_offset_st : 12; ++ u32 reserved1 : 4; ++ } reg022; ++ ++ struct rkvdec_vdpu381_err_roi_ctu_offset_end { ++ u32 roi_x_ctu_offset_end : 12; ++ u32 reserved0 : 4; ++ u32 roi_y_ctu_offset_end : 12; ++ u32 reserved1 : 4; ++ } reg023; ++ ++ struct rkvdec_vdpu381_cabac_error_en_lowbits { ++ u32 cabac_err_en_lowbits : 32; ++ } reg024; ++ ++ struct rkvdec_vdpu381_cabac_error_en_highbits { ++ u32 cabac_err_en_highbits : 30; ++ u32 reserved : 2; ++ } reg025; ++ ++ struct rkvdec_vdpu381_block_gating_en { ++ u32 swreg_block_gating_e : 20; ++ u32 reserved : 11; ++ u32 reg_cfg_gating_en : 1; ++ } reg026; ++ ++ struct SW027_CORE_SAFE_PIXELS { ++ u32 core_safe_x_pixels : 16; ++ u32 core_safe_y_pixels : 16; ++ } reg027; ++ ++ struct rkvdec_vdpu381_multiply_core_ctrl { ++ u32 swreg_vp9_wr_prob_idx : 3; ++ u32 reserved0 : 1; ++ u32 swreg_vp9_rd_prob_idx : 3; ++ u32 reserved1 : 1; ++ ++ u32 swreg_ref_req_advance_flag : 1; ++ u32 sw_colmv_req_advance_flag : 1; ++ u32 sw_poc_only_highbit_flag : 1; ++ u32 sw_poc_arb_flag : 1; ++ ++ u32 reserved2 : 4; ++ u32 sw_film_idx : 10; ++ u32 reserved3 : 2; ++ u32 sw_pu_req_mismatch_dis : 1; ++ u32 sw_colmv_req_mismatch_dis : 1; ++ u32 reserved4 : 2; ++ } reg028; ++ ++ struct SW029_SCALE_DOWN_CTRL { ++ u32 scale_down_hor_ratio : 2; ++ u32 reserved0 : 6; ++ u32 scale_down_vrz_ratio : 2; ++ u32 reserved1 : 22; ++ } reg029; ++ ++ struct SW032_Y_SCALE_DOWN_TILE8x8_HOR_STRIDE { ++ u32 y_scale_down_hor_stride : 20; ++ u32 reserved0 : 12; ++ } reg030; ++ ++ struct SW031_UV_SCALE_DOWN_TILE8x8_HOR_STRIDE { ++ u32 uv_scale_down_hor_stride : 20; ++ u32 reserved0 : 12; ++ } reg031; ++ ++ u32 timeout_threshold; ++} __packed; ++ ++/* base: OFFSET_COMMON_ADDR_REGS */ ++struct rkvdec_vdpu381_regs_common_addr { ++ u32 rlc_base; ++ u32 rlcwrite_base; ++ u32 decout_base; ++ u32 colmv_cur_base; ++ u32 error_ref_base; ++ u32 rcb_base[10]; ++} __packed; ++ ++struct rkvdec_vdpu381_h26x_set { ++ u32 h26x_frame_orslice : 1; ++ u32 h26x_rps_mode : 1; ++ u32 h26x_stream_mode : 1; ++ u32 h26x_stream_lastpacket : 1; ++ u32 h264_firstslice_flag : 1; ++ u32 reserved : 27; ++} __packed; ++ ++/* base: OFFSET_CODEC_PARAMS_REGS */ ++struct rkvdec_vdpu381_regs_h264_params { ++ struct rkvdec_vdpu381_h26x_set reg064; ++ ++ u32 cur_top_poc; ++ u32 cur_bot_poc; ++ u32 ref_pocs[32]; ++ ++ struct rkvdec_vdpu381_h264_info { ++ struct rkvdec_vdpu381_h264_ref_info { ++ u32 ref_field : 1; ++ u32 ref_topfield_used : 1; ++ u32 ref_botfield_used : 1; ++ u32 ref_colmv_use_flag : 1; ++ u32 ref_reserved : 4; ++ } __packed ref_info[4]; ++ } __packed ref_info_regs[4]; ++ ++ u32 reserved_103_111[9]; ++ ++ struct rkvdec_vdpu381_error_ref_info { + u32 avs2_ref_error_field : 1; + u32 avs2_ref_error_topfield : 1; + u32 ref_error_topfield_used : 1; + u32 ref_error_botfield_used : 1; -+ u32 reserve0 : 28; -+ } reg019; -+ -+ u32 reg020_cabac_error_en_lowbits; -+ u32 reg021_cabac_error_en_highbits; -+ -+ u32 reg022_reserved; -+ -+ struct swreg023_invalid_pixel_fill { -+ u32 fill_y : 10; -+ u32 fill_u : 10; -+ u32 fill_v : 10; -+ u32 reserve0 : 2; -+ } reg023; -+ -+ u32 reg024_026_reserved[3]; -+ -+ struct swreg027_align_en { -+ u32 reserve0 : 4; -+ u32 ctu_align_wr_en : 1; -+ u32 reserve1 : 27; -+ } reg027; -+ -+ struct swreg028_debug_perf_latency_ctrl0 { -+ u32 axi_perf_work_e : 1; -+ u32 reserve0 : 2; -+ u32 axi_cnt_type : 1; -+ u32 rd_latency_id : 8; -+ u32 reserve1 : 4; -+ u32 rd_latency_thr : 12; -+ u32 reserve2 : 4; -+ } reg028; -+ -+ struct swreg029_debug_perf_latency_ctrl1 { -+ u32 addr_align_type : 2; -+ u32 ar_cnt_id_type : 1; -+ u32 aw_cnt_id_type : 1; -+ u32 ar_count_id : 8; -+ u32 reserve0 : 4; -+ u32 aw_count_id : 8; -+ u32 rd_band_width_mode : 1; -+ u32 reserve1 : 7; -+ } reg029; -+ -+ struct swreg030_qos_ctrl { -+ u32 axi_wr_qos_level : 4; -+ u32 reserve0 : 4; -+ u32 axi_wr_qos : 4; -+ u32 reserve1 : 4; -+ u32 axi_rd_qos_level : 4; -+ u32 reserve2 : 4; -+ u32 axi_rd_qos : 4; -+ u32 reserve3 : 4; -+ } reg030; -+}; -+ -+struct vdpu383_regs_common_addr { -+ u32 reg128_strm_base; -+ u32 reg129_rps_base; -+ u32 reg130_cabactbl_base; -+ u32 reg131_gbl_base; -+ u32 reg132_scanlist_addr; -+ u32 reg133_scale_down_base; -+ u32 reg134_fgs_base; -+ u32 reg135_139_reserved[5]; -+ -+ struct rcb_info { -+ u32 offset; -+ u32 size; -+ } reg140_162_rcb_info[11]; -+}; -+ -+struct vdpu383_regs_h26x_addr { -+ u32 reg168_decout_base; -+ u32 reg169_error_ref_base; -+ u32 reg170_185_ref_base[16]; -+ u32 reg186_191_reserved[6]; -+ u32 reg192_payload_st_cur_base; -+ u32 reg193_fbc_payload_offset; -+ u32 reg194_payload_st_error_ref_base; -+ u32 reg195_210_payload_st_ref_base[16]; -+ u32 reg211_215_reserved[5]; -+ u32 reg216_colmv_cur_base; -+ u32 reg217_232_colmv_ref_base[16]; -+}; -+ -+struct vdpu383_regs_h26x_params { -+ u32 reg064_start_decoder; -+ u32 reg065_strm_start_bit; -+ u32 reg066_stream_len; -+ u32 reg067_global_len; -+ u32 reg068_hor_virstride; -+ u32 reg069_raster_uv_hor_virstride; -+ u32 reg070_y_virstride; -+ u32 reg071_scl_ref_hor_virstride; -+ u32 reg072_scl_ref_raster_uv_hor_virstride; -+ u32 reg073_scl_ref_virstride; -+ u32 reg074_fgs_ref_hor_virstride; -+ u32 reg075_079_reserved[5]; -+ u32 reg080_error_ref_hor_virstride; -+ u32 reg081_error_ref_raster_uv_hor_virstride; -+ u32 reg082_error_ref_virstride; -+ u32 reg083_ref0_hor_virstride; -+ u32 reg084_ref0_raster_uv_hor_virstride; -+ u32 reg085_ref0_virstride; -+ u32 reg086_ref1_hor_virstride; -+ u32 reg087_ref1_raster_uv_hor_virstride; -+ u32 reg088_ref1_virstride; -+ u32 reg089_ref2_hor_virstride; -+ u32 reg090_ref2_raster_uv_hor_virstride; -+ u32 reg091_ref2_virstride; -+ u32 reg092_ref3_hor_virstride; -+ u32 reg093_ref3_raster_uv_hor_virstride; -+ u32 reg094_ref3_virstride; -+ u32 reg095_ref4_hor_virstride; -+ u32 reg096_ref4_raster_uv_hor_virstride; -+ u32 reg097_ref4_virstride; -+ u32 reg098_ref5_hor_virstride; -+ u32 reg099_ref5_raster_uv_hor_virstride; -+ u32 reg100_ref5_virstride; -+ u32 reg101_ref6_hor_virstride; -+ u32 reg102_ref6_raster_uv_hor_virstride; -+ u32 reg103_ref6_virstride; -+ u32 reg104_ref7_hor_virstride; -+ u32 reg105_ref7_raster_uv_hor_virstride; -+ u32 reg106_ref7_virstride; -+}; -+ -+struct vdpu383_regs_h26x { -+ struct vdpu383_regs_common common; /* 8-30 */ -+ struct vdpu383_regs_h26x_params h26x_params; /* 64-74, 80-106 */ -+ struct vdpu383_regs_common_addr common_addr; /* 128-134, 140-161 */ -+ struct vdpu383_regs_h26x_addr h26x_addr; /* 168-185, 192-210, 216-232 */ ++ u32 reserved : 28; ++ } reg112; +} __packed; + -+#endif /* __RKVDEC_VDPU838_REGS_H__ */ ++struct rkvdec_vdpu381_regs_hevc_params { ++ struct rkvdec_vdpu381_h26x_set reg064; ++ ++ u32 cur_top_poc; ++ u32 cur_bot_poc; ++ ++ u32 reg067_082_ref_poc[16]; ++ ++ u32 reserved_083_098[16]; ++ ++ struct rkvdec_vdpu381_hevc_ref_valid { ++ u32 hevc_ref_valid_0 : 1; ++ u32 hevc_ref_valid_1 : 1; ++ u32 hevc_ref_valid_2 : 1; ++ u32 hevc_ref_valid_3 : 1; ++ u32 reserve0 : 4; ++ u32 hevc_ref_valid_4 : 1; ++ u32 hevc_ref_valid_5 : 1; ++ u32 hevc_ref_valid_6 : 1; ++ u32 hevc_ref_valid_7 : 1; ++ u32 reserve1 : 4; ++ u32 hevc_ref_valid_8 : 1; ++ u32 hevc_ref_valid_9 : 1; ++ u32 hevc_ref_valid_10 : 1; ++ u32 hevc_ref_valid_11 : 1; ++ u32 reserve2 : 4; ++ u32 hevc_ref_valid_12 : 1; ++ u32 hevc_ref_valid_13 : 1; ++ u32 hevc_ref_valid_14 : 1; ++ u32 reserve3 : 5; ++ } reg099; ++ ++ u32 reserved_100_102[3]; ++ ++ struct rkvdec_vdpu381_hevc_mvc0 { ++ u32 ref_pic_layer_same_with_cur : 16; ++ u32 reserve : 16; ++ } reg103; ++ ++ struct rkvdec_vdpu381_hevc_mvc1 { ++ u32 poc_lsb_not_present_flag : 1; ++ u32 num_direct_ref_layers : 6; ++ u32 reserve0 : 1; ++ ++ u32 num_reflayer_pics : 6; ++ u32 default_ref_layers_active_flag : 1; ++ u32 max_one_active_ref_layer_flag : 1; ++ ++ u32 poc_reset_info_present_flag : 1; ++ u32 vps_poc_lsb_aligned_flag : 1; ++ u32 mvc_poc15_valid_flag : 1; ++ u32 reserve1 : 13; ++ } reg104; ++ ++ u32 reserved_105_111[7]; ++ ++ struct rkvdec_vdpu381_hevc_ref_info { ++ u32 avs2_ref_error_field : 1; ++ u32 avs2_ref_error_topfield : 1; ++ u32 ref_error_topfield_used : 1; ++ u32 ref_error_botfield_used : 1; ++ u32 reserve : 28; ++ } reg112; ++ ++} __packed; ++ ++/* base: OFFSET_CODEC_ADDR_REGS */ ++struct rkvdec_vdpu381_regs_h26x_addr { ++ u32 reserved_160; ++ u32 pps_base; ++ u32 reserved_162; ++ u32 rps_base; ++ u32 ref_base[16]; ++ u32 scanlist_addr; ++ u32 colmv_base[16]; ++ u32 cabactbl_base; ++} __packed; ++ ++struct rkvdec_vdpu381_regs_h26x_highpoc { ++ struct rkvdec_vdpu381_ref_poc_highbit { ++ u32 ref0_poc_highbit : 4; ++ u32 ref1_poc_highbit : 4; ++ u32 ref2_poc_highbit : 4; ++ u32 ref3_poc_highbit : 4; ++ u32 ref4_poc_highbit : 4; ++ u32 ref5_poc_highbit : 4; ++ u32 ref6_poc_highbit : 4; ++ u32 ref7_poc_highbit : 4; ++ } reg200[4]; ++ struct rkvdec_vdpu381_cur_poc_highbit { ++ u32 cur_poc_highbit : 4; ++ u32 reserved : 28; ++ } reg204; ++} __packed; ++ ++struct rkvdec_vdpu381_regs_h264 { ++ struct rkvdec_vdpu381_regs_common common; ++ struct rkvdec_vdpu381_regs_h264_params h264_param; ++ struct rkvdec_vdpu381_regs_common_addr common_addr; ++ struct rkvdec_vdpu381_regs_h26x_addr h264_addr; ++ struct rkvdec_vdpu381_regs_h26x_highpoc h264_highpoc; ++} __packed; ++ ++struct rkvdec_vdpu381_regs_hevc { ++ struct rkvdec_vdpu381_regs_common common; ++ struct rkvdec_vdpu381_regs_hevc_params hevc_param; ++ struct rkvdec_vdpu381_regs_common_addr common_addr; ++ struct rkvdec_vdpu381_regs_h26x_addr hevc_addr; ++ struct rkvdec_vdpu381_regs_h26x_highpoc hevc_highpoc; ++} __packed; ++ ++#endif /* __RKVDEC_REGS_H__ */ diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec.c b/drivers/media/platform/rockchip/rkvdec/rkvdec.c -index b8efee7af74c..ad8ab9d37add 100644 +index 3f9f2e8857f4..b8efee7af74c 100644 --- a/drivers/media/platform/rockchip/rkvdec/rkvdec.c +++ b/drivers/media/platform/rockchip/rkvdec/rkvdec.c -@@ -9,6 +9,7 @@ - * Copyright (C) 2011 Samsung Electronics Co., Ltd. - */ +@@ -29,6 +29,7 @@ -+#include - #include - #include - #include -@@ -30,6 +31,7 @@ #include "rkvdec.h" #include "rkvdec-regs.h" - #include "rkvdec-vdpu381-regs.h" -+#include "rkvdec-vdpu383-regs.h" ++#include "rkvdec-vdpu381-regs.h" #include "rkvdec-rcb.h" static bool rkvdec_image_fmt_match(enum rkvdec_image_fmt fmt1, -@@ -121,6 +123,16 @@ static int vdpu38x_fill_pixfmt_mp(struct v4l2_pix_format_mplane *pix_mp, u32 pix - return 0; +@@ -85,11 +86,50 @@ static bool rkvdec_is_valid_fmt(struct rkvdec_ctx *ctx, u32 fourcc, + return false; } -+static u32 rkvdec_colmv_size(u16 width, u16 height) -+{ -+ return 128 * DIV_ROUND_UP(width, 16) * DIV_ROUND_UP(height, 16); -+} ++#define VDPU38X_STRIDE_ALIGN 16 + -+static u32 rkvdec_vdpu383_colmv_size(u16 width, u16 height) ++/** ++ * The default v4l2_fill_pixfmt_mp() function doesn't allow for specific alignment values. ++ * As the VDPU381 and VDPU383 need lines to be aligned on 16, use our own implementation here. ++ */ ++static int vdpu38x_fill_pixfmt_mp(struct v4l2_pix_format_mplane *pix_mp, u32 pixelformat, ++ u32 width, u32 height) +{ -+ return ALIGN(width, 64) * ALIGN(height, 16); ++ const struct v4l2_format_info *info = v4l2_format_info(pix_mp->pixelformat); ++ struct v4l2_plane_pix_format *plane = &pix_mp->plane_fmt[0]; ++ ++ if (!info) ++ return -EINVAL; ++ ++ pix_mp->num_planes = 1; ++ ++ memset(plane, 0, sizeof(*plane)); ++ ++ plane->bytesperline = pix_mp->width * info->bpp[0] / info->bpp_div[0]; ++ plane->bytesperline = ALIGN(plane->bytesperline, VDPU38X_STRIDE_ALIGN); ++ ++ for (int i = 0; i < info->comp_planes; i++) { ++ unsigned int vdiv = i ? info->vdiv : 1; ++ unsigned int hdiv = i ? info->hdiv : 1; ++ unsigned int stride = DIV_ROUND_UP(pix_mp->width, hdiv) ++ * info->bpp[i] / info->bpp_div[i]; ++ unsigned int height = DIV_ROUND_UP(pix_mp->height, vdiv); ++ ++ plane->sizeimage += ALIGN(stride, VDPU38X_STRIDE_ALIGN) * height; ++ } ++ ++ return 0; +} + static void rkvdec_fill_decoded_pixfmt(struct rkvdec_ctx *ctx, struct v4l2_pix_format_mplane *pix_mp) { -@@ -130,9 +142,7 @@ static void rkvdec_fill_decoded_pixfmt(struct rkvdec_ctx *ctx, - - ctx->colmv_offset = pix_mp->plane_fmt[0].sizeimage; - -- pix_mp->plane_fmt[0].sizeimage += 128 * -- DIV_ROUND_UP(pix_mp->width, 16) * -- DIV_ROUND_UP(pix_mp->height, 16); -+ pix_mp->plane_fmt[0].sizeimage += cfg->colmv_size(pix_mp->width, pix_mp->height); - } - - static void rkvdec_reset_fmt(struct rkvdec_ctx *ctx, struct v4l2_format *f, -@@ -251,17 +261,6 @@ static const struct rkvdec_ctrls rkvdec_hevc_ctrls = { - .num_ctrls = ARRAY_SIZE(rkvdec_hevc_ctrl_descs), +- v4l2_fill_pixfmt_mp(pix_mp, pix_mp->pixelformat, +- pix_mp->width, pix_mp->height); ++ const struct rkvdec_config *cfg = ctx->dev->config; ++ ++ cfg->fill_pixfmt_mp(pix_mp, pix_mp->pixelformat, pix_mp->width, pix_mp->height); ++ ++ ctx->colmv_offset = pix_mp->plane_fmt[0].sizeimage; ++ + pix_mp->plane_fmt[0].sizeimage += 128 * + DIV_ROUND_UP(pix_mp->width, 16) * + DIV_ROUND_UP(pix_mp->height, 16); +@@ -367,6 +407,26 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = { + } }; --static const struct rkvdec_decoded_fmt_desc rkvdec_hevc_decoded_fmts[] = { -- { -- .fourcc = V4L2_PIX_FMT_NV12, -- .image_fmt = RKVDEC_IMG_FMT_420_8BIT, -- }, -- { -- .fourcc = V4L2_PIX_FMT_NV15, -- .image_fmt = RKVDEC_IMG_FMT_420_10BIT, -- }, --}; -- - static const struct rkvdec_ctrl_desc rkvdec_h264_ctrl_descs[] = { - { - .cfg.id = V4L2_CID_STATELESS_H264_DECODE_PARAMS, -@@ -309,6 +308,60 @@ static const struct rkvdec_ctrls rkvdec_h264_ctrls = { - .num_ctrls = ARRAY_SIZE(rkvdec_h264_ctrl_descs), - }; - -+static const struct rkvdec_ctrl_desc vdpu38x_hevc_ctrl_descs[] = { -+ { -+ .cfg.id = V4L2_CID_STATELESS_HEVC_DECODE_PARAMS, -+ }, -+ { -+ .cfg.id = V4L2_CID_STATELESS_HEVC_SPS, -+ .cfg.ops = &rkvdec_ctrl_ops, -+ }, -+ { -+ .cfg.id = V4L2_CID_STATELESS_HEVC_PPS, -+ }, -+ { -+ .cfg.id = V4L2_CID_STATELESS_HEVC_SCALING_MATRIX, -+ }, -+ { -+ .cfg.id = V4L2_CID_STATELESS_HEVC_DECODE_MODE, -+ .cfg.min = V4L2_STATELESS_HEVC_DECODE_MODE_FRAME_BASED, -+ .cfg.max = V4L2_STATELESS_HEVC_DECODE_MODE_FRAME_BASED, -+ .cfg.def = V4L2_STATELESS_HEVC_DECODE_MODE_FRAME_BASED, -+ }, -+ { -+ .cfg.id = V4L2_CID_STATELESS_HEVC_START_CODE, -+ .cfg.min = V4L2_STATELESS_HEVC_START_CODE_ANNEX_B, -+ .cfg.def = V4L2_STATELESS_HEVC_START_CODE_ANNEX_B, -+ .cfg.max = V4L2_STATELESS_HEVC_START_CODE_ANNEX_B, -+ }, -+ { -+ .cfg.id = V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, -+ .cfg.min = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, -+ .cfg.max = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10, -+ .cfg.menu_skip_mask = -+ BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE), -+ .cfg.def = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, -+ }, -+ { -+ .cfg.id = V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, -+ .cfg.min = V4L2_MPEG_VIDEO_HEVC_LEVEL_1, -+ .cfg.max = V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1, -+ }, -+ { -+ .cfg.id = V4L2_CID_STATELESS_HEVC_EXT_SPS_ST_RPS, -+ .cfg.dims = { 65 }, -+ }, -+ { -+ .cfg.id = V4L2_CID_STATELESS_HEVC_EXT_SPS_LT_RPS, -+ .cfg.dims = { 65 }, -+ }, -+}; -+ -+static const struct rkvdec_ctrls vdpu38x_hevc_ctrls = { -+ .ctrls = vdpu38x_hevc_ctrl_descs, -+ .num_ctrls = ARRAY_SIZE(vdpu38x_hevc_ctrl_descs), -+}; -+ - static const struct rkvdec_decoded_fmt_desc rkvdec_h264_decoded_fmts[] = { - { - .fourcc = V4L2_PIX_FMT_NV12, -@@ -328,6 +381,17 @@ static const struct rkvdec_decoded_fmt_desc rkvdec_h264_decoded_fmts[] = { - }, - }; - -+static const struct rkvdec_decoded_fmt_desc rkvdec_hevc_decoded_fmts[] = { -+ { -+ .fourcc = V4L2_PIX_FMT_NV12, -+ .image_fmt = RKVDEC_IMG_FMT_420_8BIT, -+ }, -+ { -+ .fourcc = V4L2_PIX_FMT_NV15, -+ .image_fmt = RKVDEC_IMG_FMT_420_10BIT, -+ }, -+}; -+ - static const struct rkvdec_ctrl_desc rkvdec_vp9_ctrl_descs[] = { - { - .cfg.id = V4L2_CID_STATELESS_VP9_FRAME, -@@ -425,6 +489,43 @@ static const struct rkvdec_coded_fmt_desc vdpu381_coded_fmts[] = { - .subsystem_flags = VB2_V4L2_FL_SUPPORTS_M2M_HOLD_CAPTURE_BUF, - .capability = RKVDEC_CAPABILITY_H264, - }, -+ { -+ .fourcc = V4L2_PIX_FMT_HEVC_SLICE, -+ .frmsize = { -+ .min_width = 16, -+ .max_width = 65472, -+ .step_width = 16, -+ .min_height = 16, -+ .max_height = 65472, -+ .step_height = 16, -+ }, -+ .ctrls = &vdpu38x_hevc_ctrls, -+ .ops = &rkvdec_vdpu381_hevc_fmt_ops, -+ .num_decoded_fmts = ARRAY_SIZE(rkvdec_hevc_decoded_fmts), -+ .decoded_fmts = rkvdec_hevc_decoded_fmts, -+ .subsystem_flags = VB2_V4L2_FL_SUPPORTS_M2M_HOLD_CAPTURE_BUF, -+ .capability = RKVDEC_CAPABILITY_HEVC, -+ }, -+}; -+ -+static const struct rkvdec_coded_fmt_desc vdpu383_coded_fmts[] = { ++static const struct rkvdec_coded_fmt_desc vdpu381_coded_fmts[] = { + { + .fourcc = V4L2_PIX_FMT_H264_SLICE, + .frmsize = { @@ -2340,37 +1055,39 @@ index b8efee7af74c..ad8ab9d37add 100644 + .step_height = 16, + }, + .ctrls = &rkvdec_h264_ctrls, -+ .ops = &rkvdec_vdpu383_h264_fmt_ops, ++ .ops = &rkvdec_vdpu381_h264_fmt_ops, + .num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_decoded_fmts), + .decoded_fmts = rkvdec_h264_decoded_fmts, + .subsystem_flags = VB2_V4L2_FL_SUPPORTS_M2M_HOLD_CAPTURE_BUF, + .capability = RKVDEC_CAPABILITY_H264, + }, - }; - ++}; ++ static bool rkvdec_is_capable(struct rkvdec_ctx *ctx, unsigned int capability) -@@ -1330,6 +1431,35 @@ static irqreturn_t vdpu381_irq_handler(struct rkvdec_ctx *ctx) + { + return (ctx->dev->variant->capabilities & capability) == capability; +@@ -1241,6 +1301,35 @@ static irqreturn_t rk3399_irq_handler(struct rkvdec_ctx *ctx) return IRQ_HANDLED; } -+static irqreturn_t vdpu383_irq_handler(struct rkvdec_ctx *ctx) ++static irqreturn_t vdpu381_irq_handler(struct rkvdec_ctx *ctx) +{ + struct rkvdec_dev *rkvdec = ctx->dev; + enum vb2_buffer_state state; + bool need_reset = 0; + u32 status; + -+ status = readl(rkvdec->link + VDPU383_LINK_STA_INT); -+ writel(FIELD_PREP_WM16(VDPU383_STA_INT_ALL, 0), rkvdec->link + VDPU383_LINK_STA_INT); -+ /* On vdpu383, the interrupts must be disabled */ -+ writel(FIELD_PREP_WM16(VDPU383_INT_EN_IRQ | VDPU383_INT_EN_LINE_IRQ, 0), -+ rkvdec->link + VDPU383_LINK_INT_EN); ++ status = readl(rkvdec->regs + VDPU381_REG_STA_INT); ++ writel(0, rkvdec->regs + VDPU381_REG_STA_INT); + -+ if (status & VDPU383_STA_INT_DEC_RDY_STA) { ++ if (status & VDPU381_STA_INT_DEC_RDY_STA) { + state = VB2_BUF_STATE_DONE; + } else { + state = VB2_BUF_STATE_ERROR; -+ rkvdec_iommu_restore(rkvdec); ++ if (status & (VDPU381_STA_INT_SOFTRESET_RDY | ++ VDPU381_STA_INT_TIMEOUT | ++ VDPU381_STA_INT_ERROR)) ++ rkvdec_iommu_restore(rkvdec); + } + + if (need_reset) @@ -2385,135 +1102,158 @@ index b8efee7af74c..ad8ab9d37add 100644 static irqreturn_t rkvdec_irq_handler(int irq, void *priv) { struct rkvdec_dev *rkvdec = priv; -@@ -1402,6 +1532,7 @@ static const struct rkvdec_config config_rkvdec = { +@@ -1265,10 +1354,76 @@ static void rkvdec_watchdog_func(struct work_struct *work) + } + } + ++/* ++ * Some SoCs, like RK3588 have multiple identical VDPU cores, but the ++ * kernel is currently missing support for multi-core handling. Exposing ++ * separate devices for each core to userspace is bad, since that does ++ * not allow scheduling tasks properly (and creates ABI). With this workaround ++ * the driver will only probe for the first core and early exit for the other ++ * cores. Once the driver gains multi-core support, the same technique ++ * for detecting the first core can be used to cluster all cores together. ++ */ ++static int rkvdec_disable_multicore(struct rkvdec_dev *rkvdec) ++{ ++ struct device_node *node = NULL; ++ const char *compatible; ++ bool is_first_core; ++ int ret; ++ ++ /* Intentionally ignores the fallback strings */ ++ ret = of_property_read_string(rkvdec->dev->of_node, "compatible", &compatible); ++ if (ret) ++ return ret; ++ ++ /* The first compatible and available node found is considered the main core */ ++ do { ++ node = of_find_compatible_node(node, NULL, compatible); ++ if (of_device_is_available(node)) ++ break; ++ } while (node); ++ ++ if (!node) ++ return -EINVAL; ++ ++ is_first_core = (rkvdec->dev->of_node == node); ++ ++ of_node_put(node); ++ ++ if (!is_first_core) { ++ dev_info(rkvdec->dev, "missing multi-core support, ignoring this instance\n"); ++ return -ENODEV; ++ } ++ ++ return 0; ++} ++ + static const struct rkvdec_config config_rkvdec = { + .coded_fmts = (struct rkvdec_coded_fmt_desc *)rkvdec_coded_fmts, .coded_fmts_num = ARRAY_SIZE(rkvdec_coded_fmts), .irq_handler = rk3399_irq_handler, - .fill_pixfmt_mp = v4l2_fill_pixfmt_mp, -+ .colmv_size = rkvdec_colmv_size, - }; - - static struct rcb_size_info vdpu381_rcb_sizes[] = { -@@ -1424,6 +1555,33 @@ static const struct rkvdec_config config_vdpu381 = { - .rcb_num = ARRAY_SIZE(vdpu381_rcb_sizes), - .irq_handler = vdpu381_irq_handler, - .fill_pixfmt_mp = vdpu38x_fill_pixfmt_mp, -+ .colmv_size = rkvdec_colmv_size, -+ .named_regs = true, ++ .fill_pixfmt_mp = v4l2_fill_pixfmt_mp, +}; + -+static struct rcb_size_info vdpu383_rcb_sizes[] = { -+ {6, PIC_WIDTH}, // streamd -+ {6, PIC_WIDTH}, // streamd_tile -+ {12, PIC_WIDTH}, // inter -+ {12, PIC_WIDTH}, // inter_tile -+ {16, PIC_WIDTH}, // intra -+ {10, PIC_WIDTH}, // intra_tile -+ {120, PIC_WIDTH}, // filterd -+ {120, PIC_WIDTH}, // filterd_protect -+ {120, PIC_WIDTH}, // filterd_tile_row -+ {180, PIC_HEIGHT}, // filterd_tile_col ++static struct rcb_size_info vdpu381_rcb_sizes[] = { ++ {6, PIC_WIDTH}, // intrar ++ {1, PIC_WIDTH}, // transdr (Is actually 0.4*pic_width) ++ {1, PIC_HEIGHT}, // transdc (Is actually 0.1*pic_height) ++ {3, PIC_WIDTH}, // streamdr ++ {6, PIC_WIDTH}, // interr ++ {3, PIC_HEIGHT}, // interc ++ {22, PIC_WIDTH}, // dblkr ++ {6, PIC_WIDTH}, // saor ++ {11, PIC_WIDTH}, // fbcr ++ {67, PIC_HEIGHT}, // filtc col +}; + -+const struct rkvdec_config config_vdpu383 = { -+ .coded_fmts = (struct rkvdec_coded_fmt_desc *)vdpu383_coded_fmts, -+ .coded_fmts_num = ARRAY_SIZE(vdpu383_coded_fmts), -+ .rcb_size_info = vdpu383_rcb_sizes, -+ .rcb_num = ARRAY_SIZE(vdpu383_rcb_sizes), -+ .irq_handler = vdpu383_irq_handler, ++static const struct rkvdec_config config_vdpu381 = { ++ .coded_fmts = (struct rkvdec_coded_fmt_desc *)vdpu381_coded_fmts, ++ .coded_fmts_num = ARRAY_SIZE(vdpu381_coded_fmts), ++ .rcb_size_info = vdpu381_rcb_sizes, ++ .rcb_num = ARRAY_SIZE(vdpu381_rcb_sizes), ++ .irq_handler = vdpu381_irq_handler, + .fill_pixfmt_mp = vdpu38x_fill_pixfmt_mp, -+ .colmv_size = rkvdec_vdpu383_colmv_size, -+ .fill_pixfmt_mp = vdpu38x_fill_pixfmt_mp, -+ .named_regs = true, }; static const struct rkvdec_variant rk3288_rkvdec_variant = { -@@ -1451,6 +1609,12 @@ static const struct rkvdec_variant rk3399_rkvdec_variant = { - - static const struct rkvdec_variant rk3588_vdpu381_variant = { - .config = &config_vdpu381, -+ .capabilities = RKVDEC_CAPABILITY_H264 | -+ RKVDEC_CAPABILITY_HEVC, -+}; -+ -+static const struct rkvdec_variant rk3576_vdpu383_variant = { -+ .config = &config_vdpu383, - .capabilities = RKVDEC_CAPABILITY_H264, +@@ -1294,6 +1449,11 @@ static const struct rkvdec_variant rk3399_rkvdec_variant = { + RKVDEC_CAPABILITY_VP9, }; -@@ -1471,6 +1635,10 @@ static const struct of_device_id of_rkvdec_match[] = { - .compatible = "rockchip,rk3588-vdec", - .data = &rk3588_vdpu381_variant, ++static const struct rkvdec_variant rk3588_vdpu381_variant = { ++ .config = &config_vdpu381, ++ .capabilities = RKVDEC_CAPABILITY_H264, ++}; ++ + static const struct of_device_id of_rkvdec_match[] = { + { + .compatible = "rockchip,rk3288-vdec", +@@ -1307,6 +1467,10 @@ static const struct of_device_id of_rkvdec_match[] = { + .compatible = "rockchip,rk3399-vdec", + .data = &rk3399_rkvdec_variant, }, + { -+ .compatible = "rockchip,rk3576-vdec", -+ .data = &rk3576_vdpu383_variant ++ .compatible = "rockchip,rk3588-vdec", ++ .data = &rk3588_vdpu381_variant, + }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, of_rkvdec_match); -@@ -1509,9 +1677,19 @@ static int rkvdec_probe(struct platform_device *pdev) - rkvdec->clk_count = ret; - rkvdec->axi_clk = devm_clk_get(&pdev->dev, "axi"); +@@ -1334,11 +1498,16 @@ static int rkvdec_probe(struct platform_device *pdev) + mutex_init(&rkvdec->vdev_lock); + INIT_DELAYED_WORK(&rkvdec->watchdog_work, rkvdec_watchdog_func); -- rkvdec->regs = devm_platform_ioremap_resource(pdev, 0); -- if (IS_ERR(rkvdec->regs)) -- return PTR_ERR(rkvdec->regs); -+ if (rkvdec->config->named_regs) { -+ rkvdec->regs = devm_platform_ioremap_resource_byname(pdev, "function"); -+ if (IS_ERR(rkvdec->regs)) -+ return PTR_ERR(rkvdec->regs); ++ ret = rkvdec_disable_multicore(rkvdec); ++ if (ret) ++ return ret; + -+ rkvdec->link = devm_platform_ioremap_resource_byname(pdev, "link"); -+ if (IS_ERR(rkvdec->link)) -+ return PTR_ERR(rkvdec->link); -+ } else { -+ rkvdec->regs = devm_platform_ioremap_resource(pdev, 0); -+ if (IS_ERR(rkvdec->regs)) -+ return PTR_ERR(rkvdec->regs); -+ } + ret = devm_clk_bulk_get_all_enabled(&pdev->dev, &rkvdec->clocks); + if (ret < 0) + return ret; - ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); - if (ret) { + rkvdec->clk_count = ret; ++ rkvdec->axi_clk = devm_clk_get(&pdev->dev, "axi"); + + rkvdec->regs = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(rkvdec->regs)) diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec.h b/drivers/media/platform/rockchip/rkvdec/rkvdec.h -index 23c5237de5f7..33cd3406b5ea 100644 +index 5c238e443d7d..23c5237de5f7 100644 --- a/drivers/media/platform/rockchip/rkvdec/rkvdec.h +++ b/drivers/media/platform/rockchip/rkvdec/rkvdec.h -@@ -124,6 +124,8 @@ struct rkvdec_config { +@@ -122,6 +122,8 @@ struct rkvdec_config { + struct rcb_size_info *rcb_size_info; + size_t rcb_num; irqreturn_t (*irq_handler)(struct rkvdec_ctx *ctx); - int (*fill_pixfmt_mp)(struct v4l2_pix_format_mplane *pix_mp, u32 pixelformat, - u32 width, u32 height); -+ u32 (*colmv_size)(u16 width, u16 height); -+ bool named_regs; ++ int (*fill_pixfmt_mp)(struct v4l2_pix_format_mplane *pix_mp, u32 pixelformat, ++ u32 width, u32 height); }; struct rkvdec_dev { -@@ -136,6 +138,7 @@ struct rkvdec_dev { +@@ -132,6 +134,7 @@ struct rkvdec_dev { + struct device *dev; + struct clk_bulk_data *clocks; unsigned int clk_count; - struct clk *axi_clk; ++ struct clk *axi_clk; void __iomem *regs; -+ void __iomem *link; struct mutex vdev_lock; /* serializes ioctls */ struct delayed_work watchdog_work; - struct gen_pool *sram_pool; -@@ -180,13 +183,18 @@ struct rkvdec_aux_buf { - void rkvdec_run_preamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run); - void rkvdec_run_postamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run); - void rkvdec_memcpy_toio(void __iomem *dst, void *src, size_t len); -- - void rkvdec_quirks_disable_qos(struct rkvdec_ctx *ctx); +@@ -153,6 +156,7 @@ struct rkvdec_ctx { + struct rkvdec_dev *dev; + enum rkvdec_image_fmt image_fmt; + struct rkvdec_rcb_config *rcb_config; ++ u32 colmv_offset; + void *priv; + }; -+/* RKVDEC ops */ - extern const struct rkvdec_coded_fmt_ops rkvdec_h264_fmt_ops; +@@ -183,4 +187,6 @@ extern const struct rkvdec_coded_fmt_ops rkvdec_h264_fmt_ops; extern const struct rkvdec_coded_fmt_ops rkvdec_hevc_fmt_ops; extern const struct rkvdec_coded_fmt_ops rkvdec_vp9_fmt_ops; -+/* VDPU381 ops */ - extern const struct rkvdec_coded_fmt_ops rkvdec_vdpu381_h264_fmt_ops; -+extern const struct rkvdec_coded_fmt_ops rkvdec_vdpu381_hevc_fmt_ops; ++extern const struct rkvdec_coded_fmt_ops rkvdec_vdpu381_h264_fmt_ops; + -+/* VDPU383 ops */ -+extern const struct rkvdec_coded_fmt_ops rkvdec_vdpu383_h264_fmt_ops; - #endif /* RKVDEC_H_ */ -- 2.34.1 diff --git a/packages/linux/patches/rockchip/rockchip-0078-DETLEV-v3-media-rkvdec-Add-H264-support-for-the-VDPU.patch b/packages/linux/patches/rockchip/rockchip-0078-DETLEV-v3-media-rkvdec-Add-H264-support-for-the-VDPU.patch new file mode 100644 index 0000000000..128dc54af6 --- /dev/null +++ b/packages/linux/patches/rockchip/rockchip-0078-DETLEV-v3-media-rkvdec-Add-H264-support-for-the-VDPU.patch @@ -0,0 +1,2520 @@ +From 6153f93f69103c6f2633dacb36fc29fb1311bd85 Mon Sep 17 00:00:00 2001 +From: Detlev Casanova +Date: Tue, 10 Jun 2025 17:45:17 -0400 +Subject: [PATCH 078/113] DETLEV(v3): media: rkvdec: Add H264 support for the + VDPU383 variant + +This variant is used on the RK3576 SoC. + +The moving vectors size requirements are slightly different so support +for a colmv_size function per variant is added. + +Also, the link registers are used to start the decoder and read IRQ status. +Per variant support for named register sections is added. + +The fluster score is 128/135 for JVT-AVC_V1. +The other test suites are not supported yet. + +Signed-off-by: Detlev Casanova +--- + .../media/platform/rockchip/rkvdec/Kconfig | 1 + + .../media/platform/rockchip/rkvdec/Makefile | 3 + + .../rockchip/rkvdec/rkvdec-hevc-common.c | 413 ++++++++++-- + .../rockchip/rkvdec/rkvdec-hevc-common.h | 84 ++- + .../platform/rockchip/rkvdec/rkvdec-hevc.c | 5 +- + .../rockchip/rkvdec/rkvdec-vdpu381-hevc.c | 588 ++++++++++++++++++ + .../rockchip/rkvdec/rkvdec-vdpu383-h264.c | 582 +++++++++++++++++ + .../rockchip/rkvdec/rkvdec-vdpu383-regs.h | 284 +++++++++ + .../media/platform/rockchip/rkvdec/rkvdec.c | 212 ++++++- + .../media/platform/rockchip/rkvdec/rkvdec.h | 10 +- + 10 files changed, 2109 insertions(+), 73 deletions(-) + create mode 100644 drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu381-hevc.c + create mode 100644 drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu383-h264.c + create mode 100644 drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu383-regs.h + +diff --git a/drivers/media/platform/rockchip/rkvdec/Kconfig b/drivers/media/platform/rockchip/rkvdec/Kconfig +index 5f3bdd848a2c..3303b0ce3280 100644 +--- a/drivers/media/platform/rockchip/rkvdec/Kconfig ++++ b/drivers/media/platform/rockchip/rkvdec/Kconfig +@@ -8,6 +8,7 @@ config VIDEO_ROCKCHIP_VDEC + select VIDEOBUF2_VMALLOC + select V4L2_MEM2MEM_DEV + select V4L2_H264 ++ select V4L2_HEVC + select V4L2_VP9 + help + Support for the Rockchip Video Decoder IP present on Rockchip SoCs, +diff --git a/drivers/media/platform/rockchip/rkvdec/Makefile b/drivers/media/platform/rockchip/rkvdec/Makefile +index c4167eb6fc79..e30fdd7d51c3 100644 +--- a/drivers/media/platform/rockchip/rkvdec/Makefile ++++ b/drivers/media/platform/rockchip/rkvdec/Makefile +@@ -6,6 +6,9 @@ rockchip-vdec-y += \ + rkvdec-h264.o \ + rkvdec-h264-common.o \ + rkvdec-hevc.o \ ++ rkvdec-hevc-common.o \ + rkvdec-rcb.o \ + rkvdec-vdpu381-h264.o \ ++ rkvdec-vdpu381-hevc.o \ ++ rkvdec-vdpu383-h264.o \ + rkvdec-vp9.o +diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc-common.c b/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc-common.c +index 6fd3b703ac11..3646b3ce4ea0 100644 +--- a/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc-common.c ++++ b/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc-common.c +@@ -18,6 +18,143 @@ + #include "rkvdec.h" + #include "rkvdec-hevc-common.h" + ++#define RKVDEC_HEVC_MAX_DEPTH_IN_BYTES 2 ++ ++/* Store the Short term ref pic set calculated values */ ++struct calculated_rps_st_set { ++ u8 num_delta_pocs; ++ u8 num_negative_pics; ++ u8 num_positive_pics; ++ u8 used_by_curr_pic_s0[16]; ++ u8 used_by_curr_pic_s1[16]; ++ s32 delta_poc_s0[16]; ++ s32 delta_poc_s1[16]; ++}; ++ ++enum rkvdec_image_fmt rkvdec_hevc_get_image_fmt(struct rkvdec_ctx *ctx, ++ struct v4l2_ctrl *ctrl) ++{ ++ const struct v4l2_ctrl_hevc_sps *sps = ctrl->p_new.p_hevc_sps; ++ ++ if (ctrl->id != V4L2_CID_STATELESS_HEVC_SPS) ++ return RKVDEC_IMG_FMT_ANY; ++ ++ if (sps->bit_depth_luma_minus8 == 0) ++ return RKVDEC_IMG_FMT_420_8BIT; ++ else if (sps->bit_depth_luma_minus8 == 2) ++ return RKVDEC_IMG_FMT_420_10BIT; ++ ++ return RKVDEC_IMG_FMT_ANY; ++} ++ ++void compute_tiles_uniform(struct rkvdec_hevc_run *run, u16 log2_min_cb_size, ++ u16 width, u16 height, s32 pic_in_cts_width, ++ s32 pic_in_cts_height, u16 *column_width, u16 *row_height) ++{ ++ const struct v4l2_ctrl_hevc_pps *pps = run->pps; ++ int i; ++ ++ for (i = 0; i < pps->num_tile_columns_minus1 + 1; i++) ++ column_width[i] = ((i + 1) * pic_in_cts_width) / ++ (pps->num_tile_columns_minus1 + 1) - ++ (i * pic_in_cts_width) / ++ (pps->num_tile_columns_minus1 + 1); ++ ++ for (i = 0; i < pps->num_tile_rows_minus1 + 1; i++) ++ row_height[i] = ((i + 1) * pic_in_cts_height) / ++ (pps->num_tile_rows_minus1 + 1) - ++ (i * pic_in_cts_height) / ++ (pps->num_tile_rows_minus1 + 1); ++} ++ ++void compute_tiles_non_uniform(struct rkvdec_hevc_run *run, u16 log2_min_cb_size, ++ u16 width, u16 height, s32 pic_in_cts_width, ++ s32 pic_in_cts_height, u16 *column_width, u16 *row_height) ++{ ++ const struct v4l2_ctrl_hevc_pps *pps = run->pps; ++ s32 sum = 0; ++ int i; ++ ++ for (i = 0; i < pps->num_tile_columns_minus1; i++) { ++ column_width[i] = pps->column_width_minus1[i] + 1; ++ sum += column_width[i]; ++ } ++ column_width[i] = pic_in_cts_width - sum; ++ ++ sum = 0; ++ for (i = 0; i < pps->num_tile_rows_minus1; i++) { ++ row_height[i] = pps->row_height_minus1[i] + 1; ++ sum += row_height[i]; ++ } ++ row_height[i] = pic_in_cts_height - sum; ++} ++ ++static void set_ref_poc(struct rkvdec_rps_short_term_ref_set *set, int poc, int value, int flag) ++{ ++ switch (poc) { ++ case 0: ++ set->delta_poc0 = value; ++ set->used_flag0 = flag; ++ break; ++ case 1: ++ set->delta_poc1 = value; ++ set->used_flag1 = flag; ++ break; ++ case 2: ++ set->delta_poc2 = value; ++ set->used_flag2 = flag; ++ break; ++ case 3: ++ set->delta_poc3 = value; ++ set->used_flag3 = flag; ++ break; ++ case 4: ++ set->delta_poc4 = value; ++ set->used_flag4 = flag; ++ break; ++ case 5: ++ set->delta_poc5 = value; ++ set->used_flag5 = flag; ++ break; ++ case 6: ++ set->delta_poc6 = value; ++ set->used_flag6 = flag; ++ break; ++ case 7: ++ set->delta_poc7 = value; ++ set->used_flag7 = flag; ++ break; ++ case 8: ++ set->delta_poc8 = value; ++ set->used_flag8 = flag; ++ break; ++ case 9: ++ set->delta_poc9 = value; ++ set->used_flag9 = flag; ++ break; ++ case 10: ++ set->delta_poc10 = value; ++ set->used_flag10 = flag; ++ break; ++ case 11: ++ set->delta_poc11 = value; ++ set->used_flag11 = flag; ++ break; ++ case 12: ++ set->delta_poc12 = value; ++ set->used_flag12 = flag; ++ break; ++ case 13: ++ set->delta_poc13 = value; ++ set->used_flag13 = flag; ++ break; ++ case 14: ++ set->delta_poc14 = value; ++ set->used_flag14 = flag; ++ break; ++ } ++} ++ + /* + * Flip one or more matrices along their main diagonal and flatten them + * before writing it to the memory. +@@ -50,13 +187,15 @@ static void transpose_and_flatten_matrices(u8 *output, const u8 *input, + } + } + +-static void assemble_scalingfactor0(u8 *output, const struct v4l2_ctrl_hevc_scaling_matrix *input) ++static void assemble_scalingfactor0(struct rkvdec_dev *rkvdec, u8 *output, ++ const struct v4l2_ctrl_hevc_scaling_matrix *input) + { + int offset = 0; + + transpose_and_flatten_matrices(output, (const u8 *)input->scaling_list_4x4, 6, 4); + offset = 6 * 16 * sizeof(u8); +- transpose_and_flatten_matrices(output + offset, (const u8 *)input->scaling_list_8x8, 6, 8); ++ transpose_and_flatten_matrices(output + offset, ++ (const u8 *)input->scaling_list_8x8, 6, 8); + offset += 6 * 64 * sizeof(u8); + transpose_and_flatten_matrices(output + offset, + (const u8 *)input->scaling_list_16x16, 6, 8); +@@ -92,18 +231,19 @@ static void assemble_scalingdc(u8 *output, const struct v4l2_ctrl_hevc_scaling_m + memcpy(output + 6 * sizeof(u8), list_32x32, 6 * sizeof(u8)); + } + +-static void translate_scaling_list(struct scaling_factor *output, ++static void translate_scaling_list(struct rkvdec_dev *rkvdec, struct scaling_factor *output, + const struct v4l2_ctrl_hevc_scaling_matrix *input) + { +- assemble_scalingfactor0(output->scalingfactor0, input); ++ assemble_scalingfactor0(rkvdec, output->scalingfactor0, input); + memcpy(output->scalingfactor1, (const u8 *)input->scaling_list_4x4, 96); + assemble_scalingdc(output->scalingdc, input); + memset(output->reserved, 0, 4 * sizeof(u8)); + } + +-void assemble_hw_scaling_list(struct rkvdec_hevc_run *run, +- struct scaling_factor *scaling_factor, +- struct v4l2_ctrl_hevc_scaling_matrix *cache) ++void rkvdec_hevc_assemble_hw_scaling_list(struct rkvdec_dev *rkvdec, ++ struct rkvdec_hevc_run *run, ++ struct scaling_factor *scaling_list, ++ struct v4l2_ctrl_hevc_scaling_matrix *cache) + { + const struct v4l2_ctrl_hevc_scaling_matrix *scaling = run->scaling_matrix; + +@@ -111,15 +251,220 @@ void assemble_hw_scaling_list(struct rkvdec_hevc_run *run, + sizeof(struct v4l2_ctrl_hevc_scaling_matrix))) + return; + +- translate_scaling_list(scaling_factor, scaling); ++ translate_scaling_list(rkvdec, scaling_list, scaling); + + memcpy(cache, scaling, + sizeof(struct v4l2_ctrl_hevc_scaling_matrix)); + } + +-struct vb2_buffer * +-get_ref_buf(struct rkvdec_ctx *ctx, struct rkvdec_hevc_run *run, +- unsigned int dpb_idx) ++static void rkvdec_hevc_assemble_hw_lt_rps(struct rkvdec_hevc_run *run, struct rkvdec_rps *rps) ++{ ++ const struct v4l2_ctrl_hevc_sps *sps = run->sps; ++ ++ if (!run->ext_sps_lt_rps) ++ return; ++ ++ for (int i = 0; i < sps->num_long_term_ref_pics_sps; i++) { ++ rps->refs[i].lt_ref_pic_poc_lsb = ++ run->ext_sps_lt_rps[i].lt_ref_pic_poc_lsb_sps; ++ rps->refs[i].used_by_curr_pic_lt_flag = ++ !!(run->ext_sps_lt_rps[i].flags & V4L2_HEVC_EXT_SPS_LT_RPS_FLAG_USED_LT); ++ } ++} ++ ++static void rkvdec_hevc_assemble_hw_st_rps(struct rkvdec_hevc_run *run, struct rkvdec_rps *rps, ++ struct calculated_rps_st_set *calculated_rps_st_sets) ++{ ++ const struct v4l2_ctrl_hevc_sps *sps = run->sps; ++ ++ for (int i = 0; i < sps->num_short_term_ref_pic_sets; i++) { ++ int poc = 0; ++ int j = 0; ++ const struct calculated_rps_st_set *set = &calculated_rps_st_sets[i]; ++ ++ rps->short_term_ref_sets[i].num_negative = set->num_negative_pics; ++ rps->short_term_ref_sets[i].num_positive = set->num_positive_pics; ++ ++ for (; j < set->num_negative_pics; j++) { ++ set_ref_poc(&rps->short_term_ref_sets[i], j, ++ set->delta_poc_s0[j], set->used_by_curr_pic_s0[j]); ++ } ++ poc = j; ++ ++ for (j = 0; j < set->num_positive_pics; j++) { ++ set_ref_poc(&rps->short_term_ref_sets[i], poc + j, ++ set->delta_poc_s1[j], set->used_by_curr_pic_s1[j]); ++ } ++ } ++} ++ ++/* ++ * Compute the short term ref pic set parameters based on its reference short term ref pic ++ */ ++static void st_ref_pic_set_prediction(struct rkvdec_hevc_run *run, int idx, ++ struct calculated_rps_st_set *calculated_rps_st_sets) ++{ ++ const struct v4l2_ctrl_hevc_ext_sps_st_rps *rps_data = &run->ext_sps_st_rps[idx]; ++ struct calculated_rps_st_set *st_rps = &calculated_rps_st_sets[idx]; ++ struct calculated_rps_st_set *ref_rps; ++ u8 st_rps_idx = idx; ++ u8 ref_rps_idx = 0; ++ s16 delta_rps = 0; ++ u8 use_delta_flag[16] = { 0 }; ++ u8 used_by_curr_pic_flag[16] = { 0 }; ++ int i, j; ++ int dPoc; ++ ++ ref_rps_idx = st_rps_idx - (rps_data->delta_idx_minus1 + 1); /* 7-59 */ ++ delta_rps = (1 - 2 * rps_data->delta_rps_sign) * ++ (rps_data->abs_delta_rps_minus1 + 1); /* 7-60 */ ++ ++ ref_rps = &calculated_rps_st_sets[ref_rps_idx]; ++ ++ for (j = 0; j <= ref_rps->num_delta_pocs; j++) { ++ used_by_curr_pic_flag[j] = !!(rps_data->used_by_curr_pic & (1 << j)); ++ use_delta_flag[j] = !!(rps_data->use_delta_flag & (1 << j)); ++ } ++ ++ /* 7-61: calculate num_negative_pics, delta_poc_s0 and used_by_curr_pic_s0 */ ++ i = 0; ++ for (j = (ref_rps->num_positive_pics - 1); j >= 0; j--) { ++ dPoc = ref_rps->delta_poc_s1[j] + delta_rps; ++ if (dPoc < 0 && use_delta_flag[ref_rps->num_negative_pics + j]) { ++ st_rps->delta_poc_s0[i] = dPoc; ++ st_rps->used_by_curr_pic_s0[i++] = ++ used_by_curr_pic_flag[ref_rps->num_negative_pics + j]; ++ } ++ } ++ if (delta_rps < 0 && use_delta_flag[ref_rps->num_delta_pocs]) { ++ st_rps->delta_poc_s0[i] = delta_rps; ++ st_rps->used_by_curr_pic_s0[i++] = used_by_curr_pic_flag[ref_rps->num_delta_pocs]; ++ } ++ for (j = 0; j < ref_rps->num_negative_pics; j++) { ++ dPoc = ref_rps->delta_poc_s0[j] + delta_rps; ++ if (dPoc < 0 && use_delta_flag[j]) { ++ st_rps->delta_poc_s0[i] = dPoc; ++ st_rps->used_by_curr_pic_s0[i++] = used_by_curr_pic_flag[j]; ++ } ++ } ++ st_rps->num_negative_pics = i; ++ ++ /* 7-62: calculate num_positive_pics, delta_poc_s1 and used_by_curr_pic_s1 */ ++ i = 0; ++ for (j = (ref_rps->num_negative_pics - 1); j >= 0; j--) { ++ dPoc = ref_rps->delta_poc_s0[j] + delta_rps; ++ if (dPoc > 0 && use_delta_flag[j]) { ++ st_rps->delta_poc_s1[i] = dPoc; ++ st_rps->used_by_curr_pic_s1[i++] = used_by_curr_pic_flag[j]; ++ } ++ } ++ if (delta_rps > 0 && use_delta_flag[ref_rps->num_delta_pocs]) { ++ st_rps->delta_poc_s1[i] = delta_rps; ++ st_rps->used_by_curr_pic_s1[i++] = used_by_curr_pic_flag[ref_rps->num_delta_pocs]; ++ } ++ for (j = 0; j < ref_rps->num_positive_pics; j++) { ++ dPoc = ref_rps->delta_poc_s1[j] + delta_rps; ++ if (dPoc > 0 && use_delta_flag[ref_rps->num_negative_pics + j]) { ++ st_rps->delta_poc_s1[i] = dPoc; ++ st_rps->used_by_curr_pic_s1[i++] = ++ used_by_curr_pic_flag[ref_rps->num_negative_pics + j]; ++ } ++ } ++ st_rps->num_positive_pics = i; ++ ++ st_rps->num_delta_pocs = st_rps->num_positive_pics + st_rps->num_negative_pics; ++} ++ ++/* ++ * Compute the short term ref pic set parameters based on the control's data. ++ */ ++static void st_ref_pic_set_calculate(struct rkvdec_hevc_run *run, int idx, ++ struct calculated_rps_st_set *calculated_rps_st_sets) ++{ ++ const struct v4l2_ctrl_hevc_ext_sps_st_rps *rps_data = &run->ext_sps_st_rps[idx]; ++ struct calculated_rps_st_set *st_rps = &calculated_rps_st_sets[idx]; ++ int j, i = 0; ++ ++ /* 7-63 */ ++ st_rps->num_negative_pics = rps_data->num_negative_pics; ++ /* 7-64 */ ++ st_rps->num_positive_pics = rps_data->num_positive_pics; ++ ++ for (i = 0; i < st_rps->num_negative_pics; i++) { ++ /* 7-65 */ ++ st_rps->used_by_curr_pic_s0[i] = !!(rps_data->used_by_curr_pic & (1 << i)); ++ ++ if (i == 0) { ++ /* 7-67 */ ++ st_rps->delta_poc_s0[i] = -(rps_data->delta_poc_s0_minus1[i] + 1); ++ } else { ++ /* 7-69 */ ++ st_rps->delta_poc_s0[i] = ++ st_rps->delta_poc_s0[i - 1] - ++ (rps_data->delta_poc_s0_minus1[i] + 1); ++ } ++ } ++ ++ for (j = 0; j < st_rps->num_positive_pics; j++) { ++ /* 7-66 */ ++ st_rps->used_by_curr_pic_s1[j] = !!(rps_data->used_by_curr_pic & (1 << (i + j))); ++ ++ if (j == 0) { ++ /* 7-68 */ ++ st_rps->delta_poc_s1[j] = rps_data->delta_poc_s1_minus1[j] + 1; ++ } else { ++ /* 7-70 */ ++ st_rps->delta_poc_s1[j] = ++ st_rps->delta_poc_s1[j - 1] + ++ (rps_data->delta_poc_s1_minus1[j] + 1); ++ } ++ } ++ ++ /* 7-71 */ ++ st_rps->num_delta_pocs = st_rps->num_positive_pics + st_rps->num_negative_pics; ++} ++ ++static void rkvdec_hevc_prepare_hw_st_rps(struct rkvdec_hevc_run *run, struct rkvdec_rps *rps, ++ struct v4l2_ctrl_hevc_ext_sps_st_rps *cache) ++{ ++ int idx; ++ ++ if (!run->ext_sps_st_rps) ++ return; ++ ++ if (!memcmp(cache, run->ext_sps_st_rps, sizeof(struct v4l2_ctrl_hevc_ext_sps_st_rps))) ++ return; ++ ++ struct calculated_rps_st_set *calculated_rps_st_sets = ++ kzalloc(sizeof(struct calculated_rps_st_set) * ++ run->sps->num_short_term_ref_pic_sets, GFP_KERNEL); ++ ++ for (idx = 0; idx < run->sps->num_short_term_ref_pic_sets; idx++) { ++ const struct v4l2_ctrl_hevc_ext_sps_st_rps *rps_data = &run->ext_sps_st_rps[idx]; ++ ++ if (rps_data->flags & V4L2_HEVC_EXT_SPS_ST_RPS_FLAG_INTER_REF_PIC_SET_PRED) ++ st_ref_pic_set_prediction(run, idx, calculated_rps_st_sets); ++ else ++ st_ref_pic_set_calculate(run, idx, calculated_rps_st_sets); ++ } ++ ++ rkvdec_hevc_assemble_hw_st_rps(run, rps, calculated_rps_st_sets); ++ ++ kfree(calculated_rps_st_sets); ++ ++ memcpy(cache, run->ext_sps_st_rps, sizeof(struct v4l2_ctrl_hevc_ext_sps_st_rps)); ++} ++ ++void rkvdec_hevc_assemble_hw_rps(struct rkvdec_hevc_run *run, struct rkvdec_rps *rps, ++ struct v4l2_ctrl_hevc_ext_sps_st_rps *st_cache) ++{ ++ rkvdec_hevc_prepare_hw_st_rps(run, rps, st_cache); ++ rkvdec_hevc_assemble_hw_lt_rps(run, rps); ++} ++ ++struct vb2_buffer *get_ref_buf(struct rkvdec_ctx *ctx, ++ struct rkvdec_hevc_run *run, ++ unsigned int dpb_idx) + { + struct v4l2_m2m_ctx *m2m_ctx = ctx->fh.m2m_ctx; + const struct v4l2_ctrl_hevc_decode_params *decode_params = run->decode_params; +@@ -140,9 +485,8 @@ get_ref_buf(struct rkvdec_ctx *ctx, struct rkvdec_hevc_run *run, + return buf; + } + +-#define RKVDEC_HEVC_MAX_DEPTH_IN_BYTES 2 +- +-int rkvdec_hevc_adjust_fmt(struct rkvdec_ctx *ctx, struct v4l2_format *f) ++int rkvdec_hevc_adjust_fmt(struct rkvdec_ctx *ctx, ++ struct v4l2_format *f) + { + struct v4l2_pix_format_mplane *fmt = &f->fmt.pix_mp; + +@@ -153,40 +497,19 @@ int rkvdec_hevc_adjust_fmt(struct rkvdec_ctx *ctx, struct v4l2_format *f) + return 0; + } + +-enum rkvdec_image_fmt rkvdec_hevc_get_image_fmt(struct rkvdec_ctx *ctx, +- struct v4l2_ctrl *ctrl) +-{ +- const struct v4l2_ctrl_hevc_sps *sps = ctrl->p_new.p_hevc_sps; +- +- if (ctrl->id != V4L2_CID_STATELESS_HEVC_SPS) +- return RKVDEC_IMG_FMT_ANY; +- +- if (sps->bit_depth_luma_minus8 == 0) { +- if (sps->chroma_format_idc == 2) +- return RKVDEC_IMG_FMT_422_8BIT; +- else +- return RKVDEC_IMG_FMT_420_8BIT; +- } else if (sps->bit_depth_luma_minus8 == 2) { +- if (sps->chroma_format_idc == 2) +- return RKVDEC_IMG_FMT_422_10BIT; +- else +- return RKVDEC_IMG_FMT_420_10BIT; +- } +- +- return RKVDEC_IMG_FMT_ANY; +-} +- +-static int rkvdec_hevc_validate_sps(struct rkvdec_ctx *ctx, ++int rkvdec_hevc_validate_sps(struct rkvdec_ctx *ctx, + const struct v4l2_ctrl_hevc_sps *sps) + { ++ /* Only 4:0:0 and 4:2:0 is supported */ + if (sps->chroma_format_idc > 1) +- /* Only 4:0:0 and 4:2:0 are supported */ + return -EINVAL; ++ ++ /* Luma and chroma bit depth mismatch */ + if (sps->bit_depth_luma_minus8 != sps->bit_depth_chroma_minus8) +- /* Luma and chroma bit depth mismatch */ + return -EINVAL; ++ ++ /* Only 8-bit and 10-bit are supported */ + if (sps->bit_depth_luma_minus8 != 0 && sps->bit_depth_luma_minus8 != 2) +- /* Only 8-bit and 10-bit is supported */ + return -EINVAL; + + if (sps->pic_width_in_luma_samples > ctx->coded_fmt.fmt.pix_mp.width || +@@ -197,7 +520,7 @@ static int rkvdec_hevc_validate_sps(struct rkvdec_ctx *ctx, + } + + void rkvdec_hevc_run_preamble(struct rkvdec_ctx *ctx, +- struct rkvdec_hevc_run *run) ++ struct rkvdec_hevc_run *run) + { + struct v4l2_ctrl *ctrl; + +@@ -217,6 +540,12 @@ void rkvdec_hevc_run_preamble(struct rkvdec_ctx *ctx, + ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, + V4L2_CID_STATELESS_HEVC_SCALING_MATRIX); + run->scaling_matrix = ctrl ? ctrl->p_cur.p : NULL; ++ ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, ++ V4L2_CID_STATELESS_HEVC_EXT_SPS_ST_RPS); ++ run->ext_sps_st_rps = ctrl ? ctrl->p_cur.p : NULL; ++ ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, ++ V4L2_CID_STATELESS_HEVC_EXT_SPS_LT_RPS); ++ run->ext_sps_lt_rps = ctrl ? ctrl->p_cur.p : NULL; + + rkvdec_run_preamble(ctx, &run->base); + } +diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc-common.h b/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc-common.h +index bebab62a861e..da58da149566 100644 +--- a/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc-common.h ++++ b/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc-common.h +@@ -15,14 +15,68 @@ + * Jeffy Chen + */ + ++#include ++ ++#include "rkvdec.h" ++ ++struct rkvdec_rps_refs { ++ u16 lt_ref_pic_poc_lsb; ++ u16 used_by_curr_pic_lt_flag : 1; ++ u16 reserved : 15; ++} __packed; ++ ++struct rkvdec_rps_short_term_ref_set { ++ u32 num_negative : 4; ++ u32 num_positive : 4; ++ u32 delta_poc0 : 16; ++ u32 used_flag0 : 1; ++ u32 delta_poc1 : 16; ++ u32 used_flag1 : 1; ++ u32 delta_poc2 : 16; ++ u32 used_flag2 : 1; ++ u32 delta_poc3 : 16; ++ u32 used_flag3 : 1; ++ u32 delta_poc4 : 16; ++ u32 used_flag4 : 1; ++ u32 delta_poc5 : 16; ++ u32 used_flag5 : 1; ++ u32 delta_poc6 : 16; ++ u32 used_flag6 : 1; ++ u32 delta_poc7 : 16; ++ u32 used_flag7 : 1; ++ u32 delta_poc8 : 16; ++ u32 used_flag8 : 1; ++ u32 delta_poc9 : 16; ++ u32 used_flag9 : 1; ++ u32 delta_poc10 : 16; ++ u32 used_flag10 : 1; ++ u32 delta_poc11 : 16; ++ u32 used_flag11 : 1; ++ u32 delta_poc12 : 16; ++ u32 used_flag12 : 1; ++ u32 delta_poc13 : 16; ++ u32 used_flag13 : 1; ++ u32 delta_poc14 : 16; ++ u32 used_flag14 : 1; ++ u32 reserved_bits : 25; ++ u32 reserved[3]; ++} __packed; ++ ++struct rkvdec_rps { ++ struct rkvdec_rps_refs refs[32]; ++ struct rkvdec_rps_short_term_ref_set short_term_ref_sets[64]; ++} __packed; ++ + struct rkvdec_hevc_run { +- struct rkvdec_run base; +- const struct v4l2_ctrl_hevc_slice_params *slices_params; +- const struct v4l2_ctrl_hevc_decode_params *decode_params; +- const struct v4l2_ctrl_hevc_sps *sps; +- const struct v4l2_ctrl_hevc_pps *pps; +- const struct v4l2_ctrl_hevc_scaling_matrix *scaling_matrix; +- int num_slices; ++ struct rkvdec_run base; ++ const struct v4l2_ctrl_hevc_decode_params *decode_params; ++ const struct v4l2_ctrl_hevc_slice_params *slices_params; ++ const struct v4l2_ctrl_hevc_sps *sps; ++ const struct v4l2_ctrl_hevc_pps *pps; ++ const struct v4l2_ctrl_hevc_scaling_matrix *scaling_matrix; ++ const struct v4l2_ctrl_hevc_ext_sps_st_rps *ext_sps_st_rps; ++ const struct v4l2_ctrl_hevc_ext_sps_lt_rps *ext_sps_lt_rps; ++ int num_slices; + }; + + struct scaling_factor { +@@ -32,15 +86,27 @@ struct scaling_factor { + u8 reserved[4]; /*16Bytes align*/ + }; + ++#define RKV_HEVC_CABAC_TABLE_SIZE 27456 ++extern const u8 rkvdec_hevc_cabac_table[RKV_HEVC_CABAC_TABLE_SIZE]; ++ + enum rkvdec_image_fmt rkvdec_hevc_get_image_fmt(struct rkvdec_ctx *ctx, + struct v4l2_ctrl *ctrl); +-void rkvdec_hevc_assemble_hw_scaling_list(struct rkvdec_hevc_run *run, ++void compute_tiles_uniform(struct rkvdec_hevc_run *run, u16 log2_min_cb_size, ++ u16 width, u16 height, s32 pic_in_cts_width, ++ s32 pic_in_cts_height, u16 *column_width, u16 *row_height); ++void compute_tiles_non_uniform(struct rkvdec_hevc_run *run, u16 log2_min_cb_size, ++ u16 width, u16 height, s32 pic_in_cts_width, ++ s32 pic_in_cts_height, u16 *column_width, u16 *row_height); ++void rkvdec_hevc_assemble_hw_rps(struct rkvdec_hevc_run *run, struct rkvdec_rps *rps, ++ struct v4l2_ctrl_hevc_ext_sps_st_rps *st_cache); ++void rkvdec_hevc_assemble_hw_scaling_list(struct rkvdec_dev *rkvdec, ++ struct rkvdec_hevc_run *run, + struct scaling_factor *scaling_factor, + struct v4l2_ctrl_hevc_scaling_matrix *cache); + struct vb2_buffer *get_ref_buf(struct rkvdec_ctx *ctx, + struct rkvdec_hevc_run *run, + unsigned int dpb_idx); + int rkvdec_hevc_adjust_fmt(struct rkvdec_ctx *ctx, struct v4l2_format *f); +-//int rkvdec_hevc_validate_sps(struct rkvdec_ctx *ctx, const struct v4l2_ctrl_hevc_sps *sps); ++int rkvdec_hevc_validate_sps(struct rkvdec_ctx *ctx, const struct v4l2_ctrl_hevc_sps *sps); + int rkvdec_hevc_try_ctrl(struct rkvdec_ctx *ctx, struct v4l2_ctrl *ctrl); + void rkvdec_hevc_run_preamble(struct rkvdec_ctx *ctx, struct rkvdec_hevc_run *run); +diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc.c b/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc.c +index 887b6c165a7e..b28d54b8bb57 100644 +--- a/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc.c ++++ b/drivers/media/platform/rockchip/rkvdec/rkvdec-hevc.c +@@ -25,9 +25,6 @@ + #define RKV_RPS_SIZE (32 / 4) + #define RKV_RPS_LEN 600 + +-#define RKV_HEVC_CABAC_TABLE_SIZE 27456 +-extern const u8 rkvdec_hevc_cabac_table[RKV_HEVC_CABAC_TABLE_SIZE]; +- + struct rkvdec_sps_pps_packet { + u32 info[RKV_PPS_SIZE]; + }; +@@ -550,7 +547,7 @@ static int rkvdec_hevc_run(struct rkvdec_ctx *ctx) + + rkvdec_hevc_run_preamble(ctx, &run); + +- rkvdec_hevc_assemble_hw_scaling_list(&run, &tbl->scaling_list, ++ rkvdec_hevc_assemble_hw_scaling_list(rkvdec, &run, &tbl->scaling_list, + &hevc_ctx->scaling_matrix_cache); + assemble_hw_pps(ctx, &run); + assemble_sw_rps(ctx, &run); +diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu381-hevc.c b/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu381-hevc.c +new file mode 100644 +index 000000000000..96dfa3576a8b +--- /dev/null ++++ b/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu381-hevc.c +@@ -0,0 +1,588 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Rockchip VDPU381 HEVC backend ++ * ++ * Copyright (C) 2025 Collabora, Ltd. ++ * Detlev Casanova ++ */ ++ ++#include ++ ++#include "rkvdec.h" ++#include "rkvdec-rcb.h" ++#include "rkvdec-hevc-common.h" ++#include "rkvdec-vdpu381-regs.h" ++ ++// SPS ++struct rkvdec_hevc_sps { ++ u16 video_parameters_set_id : 4; ++ u16 seq_parameters_set_id_sps : 4; ++ u16 chroma_format_idc : 2; ++ u16 width : 16; ++ u16 height : 16; ++ u16 bit_depth_luma : 4; ++ u16 bit_depth_chroma : 4; ++ u16 max_pic_order_count_lsb : 5; ++ u16 diff_max_min_luma_coding_block_size : 2; ++ u16 min_luma_coding_block_size : 3; ++ u16 min_transform_block_size : 3; ++ u16 diff_max_min_transform_block_size : 2; ++ u16 max_transform_hierarchy_depth_inter : 3; ++ u16 max_transform_hierarchy_depth_intra : 3; ++ u16 scaling_list_enabled_flag : 1; ++ u16 amp_enabled_flag : 1; ++ u16 sample_adaptive_offset_enabled_flag : 1; ++ u16 pcm_enabled_flag : 1; ++ u16 pcm_sample_bit_depth_luma : 4; ++ u16 pcm_sample_bit_depth_chroma : 4; ++ u16 pcm_loop_filter_disabled_flag : 1; ++ u16 diff_max_min_pcm_luma_coding_block_size : 3; ++ u16 min_pcm_luma_coding_block_size : 3; ++ u16 num_short_term_ref_pic_sets : 7; ++ u16 long_term_ref_pics_present_flag : 1; ++ u16 num_long_term_ref_pics_sps : 6; ++ u16 sps_temporal_mvp_enabled_flag : 1; ++ u16 strong_intra_smoothing_enabled_flag : 1; ++ u16 reserved_0 : 7; ++ u16 sps_max_dec_pic_buffering_minus1 : 4; ++ u16 reserved_0_2 : 3; ++ u16 reserved_f : 8; ++} __packed; ++ ++//PPS ++struct rkvdec_hevc_pps { ++ u16 picture_parameters_set_id : 6; ++ u16 seq_parameters_set_id_pps : 4; ++ u16 dependent_slice_segments_enabled_flag : 1; ++ u16 output_flag_present_flag : 1; ++ u16 num_extra_slice_header_bits : 13; ++ u16 sign_data_hiding_enabled_flag : 1; ++ u16 cabac_init_present_flag : 1; ++ u16 num_ref_idx_l0_default_active : 4; ++ u16 num_ref_idx_l1_default_active : 4; ++ u16 init_qp_minus26 : 7; ++ u16 constrained_intra_pred_flag : 1; ++ u16 transform_skip_enabled_flag : 1; ++ u16 cu_qp_delta_enabled_flag : 1; ++ u16 log2_min_cb_size : 3; ++ u16 pps_cb_qp_offset : 5; ++ u16 pps_cr_qp_offset : 5; ++ u16 pps_slice_chroma_qp_offsets_present_flag : 1; ++ u16 weighted_pred_flag : 1; ++ u16 weighted_bipred_flag : 1; ++ u16 transquant_bypass_enabled_flag : 1; ++ u16 tiles_enabled_flag : 1; ++ u16 entropy_coding_sync_enabled_flag : 1; ++ u16 pps_loop_filter_across_slices_enabled_flag : 1; ++ u16 loop_filter_across_tiles_enabled_flag : 1; ++ u16 deblocking_filter_override_enabled_flag : 1; ++ u16 pps_deblocking_filter_disabled_flag : 1; ++ u16 pps_beta_offset_div2 : 4; ++ u16 pps_tc_offset_div2 : 4; ++ u16 lists_modification_present_flag : 1; ++ u16 log2_parallel_merge_level : 3; ++ u16 slice_segment_header_extension_present_flag : 1; ++ u16 zeroes : 3; ++ u16 num_tile_columns : 5; ++ u16 num_tile_rows : 5; ++ u16 sps_pps_mode : 4; ++ u16 reserved_bits : 14; ++ u16 reserved; ++} __packed; ++ ++struct rkvdec_hevc_tile { ++ u16 value0 : 12; ++ u16 value1 : 12; ++} __packed; ++ ++struct rkvdec_sps_pps_packet { ++ struct rkvdec_hevc_sps sps; ++ struct rkvdec_hevc_pps pps; ++ struct rkvdec_hevc_tile column_width[10]; ++ struct rkvdec_hevc_tile row_height[11]; ++ u32 zeroes[3]; ++ u32 zeroes_bits : 6; ++ u32 padding_bits : 2; ++ u32 padding; ++} __packed; ++ ++struct rkvdec_hevc_priv_tbl { ++ struct rkvdec_sps_pps_packet param_set[64]; ++ struct rkvdec_rps rps; ++ struct scaling_factor scaling_list; ++ u8 cabac_table[27456]; ++}; ++ ++struct rkvdec_hevc_ctx { ++ struct rkvdec_aux_buf priv_tbl; ++ struct v4l2_ctrl_hevc_scaling_matrix scaling_matrix_cache; ++ struct v4l2_ctrl_hevc_ext_sps_st_rps st_cache; ++ struct rkvdec_vdpu381_regs_hevc regs; ++}; ++ ++static void assemble_hw_pps(struct rkvdec_ctx *ctx, ++ struct rkvdec_hevc_run *run) ++{ ++ struct rkvdec_hevc_ctx *h264_ctx = ctx->priv; ++ const struct v4l2_ctrl_hevc_sps *sps = run->sps; ++ const struct v4l2_ctrl_hevc_pps *pps = run->pps; ++ struct rkvdec_hevc_priv_tbl *priv_tbl = h264_ctx->priv_tbl.cpu; ++ struct rkvdec_sps_pps_packet *hw_ps; ++ bool tiles_enabled; ++ s32 max_cu_width; ++ s32 pic_in_cts_width; ++ s32 pic_in_cts_height; ++ u16 log2_min_cb_size, width, height; ++ u16 column_width[20]; ++ u16 row_height[22]; ++ u8 pcm_enabled; ++ u32 i; ++ ++ /* ++ * HW read the SPS/PPS information from PPS packet index by PPS id. ++ * offset from the base can be calculated by PPS_id * 32 (size per PPS ++ * packet unit). so the driver copy SPS/PPS information to the exact PPS ++ * packet unit for HW accessing. ++ */ ++ hw_ps = &priv_tbl->param_set[pps->pic_parameter_set_id]; ++ memset(hw_ps, 0, sizeof(*hw_ps)); ++ ++ /* write sps */ ++ hw_ps->sps.video_parameters_set_id = sps->video_parameter_set_id; ++ hw_ps->sps.seq_parameters_set_id_sps = sps->seq_parameter_set_id; ++ hw_ps->sps.chroma_format_idc = sps->chroma_format_idc; ++ ++ log2_min_cb_size = sps->log2_min_luma_coding_block_size_minus3 + 3; ++ width = sps->pic_width_in_luma_samples; ++ height = sps->pic_height_in_luma_samples; ++ hw_ps->sps.width = width; ++ hw_ps->sps.height = height; ++ hw_ps->sps.bit_depth_luma = sps->bit_depth_luma_minus8 + 8; ++ hw_ps->sps.bit_depth_chroma = sps->bit_depth_chroma_minus8 + 8; ++ hw_ps->sps.max_pic_order_count_lsb = sps->log2_max_pic_order_cnt_lsb_minus4 + 4; ++ hw_ps->sps.diff_max_min_luma_coding_block_size = ++ sps->log2_diff_max_min_luma_coding_block_size; ++ hw_ps->sps.min_luma_coding_block_size = sps->log2_min_luma_coding_block_size_minus3 + 3; ++ hw_ps->sps.min_transform_block_size = sps->log2_min_luma_transform_block_size_minus2 + 2; ++ hw_ps->sps.diff_max_min_transform_block_size = ++ sps->log2_diff_max_min_luma_transform_block_size; ++ hw_ps->sps.max_transform_hierarchy_depth_inter = sps->max_transform_hierarchy_depth_inter; ++ hw_ps->sps.max_transform_hierarchy_depth_intra = sps->max_transform_hierarchy_depth_intra; ++ hw_ps->sps.scaling_list_enabled_flag = ++ !!(sps->flags & V4L2_HEVC_SPS_FLAG_SCALING_LIST_ENABLED); ++ hw_ps->sps.amp_enabled_flag = !!(sps->flags & V4L2_HEVC_SPS_FLAG_AMP_ENABLED); ++ hw_ps->sps.sample_adaptive_offset_enabled_flag = ++ !!(sps->flags & V4L2_HEVC_SPS_FLAG_SAMPLE_ADAPTIVE_OFFSET); ++ ++ pcm_enabled = !!(sps->flags & V4L2_HEVC_SPS_FLAG_PCM_ENABLED); ++ hw_ps->sps.pcm_enabled_flag = pcm_enabled; ++ hw_ps->sps.pcm_sample_bit_depth_luma = ++ pcm_enabled ? sps->pcm_sample_bit_depth_luma_minus1 + 1 : 0; ++ hw_ps->sps.pcm_sample_bit_depth_chroma = ++ pcm_enabled ? sps->pcm_sample_bit_depth_chroma_minus1 + 1 : 0; ++ hw_ps->sps.pcm_loop_filter_disabled_flag = ++ !!(sps->flags & V4L2_HEVC_SPS_FLAG_PCM_LOOP_FILTER_DISABLED); ++ hw_ps->sps.diff_max_min_pcm_luma_coding_block_size = ++ sps->log2_diff_max_min_pcm_luma_coding_block_size; ++ hw_ps->sps.min_pcm_luma_coding_block_size = ++ pcm_enabled ? sps->log2_min_pcm_luma_coding_block_size_minus3 + 3 : 0; ++ hw_ps->sps.num_short_term_ref_pic_sets = sps->num_short_term_ref_pic_sets; ++ hw_ps->sps.long_term_ref_pics_present_flag = ++ !!(sps->flags & V4L2_HEVC_SPS_FLAG_LONG_TERM_REF_PICS_PRESENT); ++ hw_ps->sps.num_long_term_ref_pics_sps = sps->num_long_term_ref_pics_sps; ++ hw_ps->sps.sps_temporal_mvp_enabled_flag = ++ !!(sps->flags & V4L2_HEVC_SPS_FLAG_SPS_TEMPORAL_MVP_ENABLED); ++ hw_ps->sps.strong_intra_smoothing_enabled_flag = ++ !!(sps->flags & V4L2_HEVC_SPS_FLAG_STRONG_INTRA_SMOOTHING_ENABLED); ++ hw_ps->sps.sps_max_dec_pic_buffering_minus1 = sps->sps_max_dec_pic_buffering_minus1; ++ hw_ps->sps.reserved_f = 0xff; ++ ++ /* write pps */ ++ hw_ps->pps.picture_parameters_set_id = pps->pic_parameter_set_id; ++ hw_ps->pps.seq_parameters_set_id_pps = sps->seq_parameter_set_id; ++ hw_ps->pps.dependent_slice_segments_enabled_flag = ++ !!(pps->flags & V4L2_HEVC_PPS_FLAG_DEPENDENT_SLICE_SEGMENT_ENABLED); ++ hw_ps->pps.output_flag_present_flag = ++ !!(pps->flags & V4L2_HEVC_PPS_FLAG_OUTPUT_FLAG_PRESENT); ++ hw_ps->pps.num_extra_slice_header_bits = pps->num_extra_slice_header_bits; ++ hw_ps->pps.sign_data_hiding_enabled_flag = ++ !!(pps->flags & V4L2_HEVC_PPS_FLAG_SIGN_DATA_HIDING_ENABLED); ++ hw_ps->pps.cabac_init_present_flag = ++ !!(pps->flags & V4L2_HEVC_PPS_FLAG_CABAC_INIT_PRESENT); ++ hw_ps->pps.num_ref_idx_l0_default_active = pps->num_ref_idx_l0_default_active_minus1 + 1; ++ hw_ps->pps.num_ref_idx_l1_default_active = pps->num_ref_idx_l1_default_active_minus1 + 1; ++ hw_ps->pps.init_qp_minus26 = pps->init_qp_minus26; ++ hw_ps->pps.constrained_intra_pred_flag = ++ !!(pps->flags & V4L2_HEVC_PPS_FLAG_CONSTRAINED_INTRA_PRED); ++ hw_ps->pps.transform_skip_enabled_flag = ++ !!(pps->flags & V4L2_HEVC_PPS_FLAG_TRANSFORM_SKIP_ENABLED); ++ hw_ps->pps.cu_qp_delta_enabled_flag = ++ !!(pps->flags & V4L2_HEVC_PPS_FLAG_CU_QP_DELTA_ENABLED); ++ hw_ps->pps.log2_min_cb_size = log2_min_cb_size + ++ sps->log2_diff_max_min_luma_coding_block_size - ++ pps->diff_cu_qp_delta_depth; ++ hw_ps->pps.pps_cb_qp_offset = pps->pps_cb_qp_offset; ++ hw_ps->pps.pps_cr_qp_offset = pps->pps_cr_qp_offset; ++ hw_ps->pps.pps_slice_chroma_qp_offsets_present_flag = ++ !!(pps->flags & V4L2_HEVC_PPS_FLAG_PPS_SLICE_CHROMA_QP_OFFSETS_PRESENT); ++ hw_ps->pps.weighted_pred_flag = !!(pps->flags & V4L2_HEVC_PPS_FLAG_WEIGHTED_PRED); ++ hw_ps->pps.weighted_bipred_flag = !!(pps->flags & V4L2_HEVC_PPS_FLAG_WEIGHTED_BIPRED); ++ hw_ps->pps.transquant_bypass_enabled_flag = ++ !!(pps->flags & V4L2_HEVC_PPS_FLAG_TRANSQUANT_BYPASS_ENABLED); ++ ++ tiles_enabled = !!(pps->flags & V4L2_HEVC_PPS_FLAG_TILES_ENABLED); ++ hw_ps->pps.tiles_enabled_flag = tiles_enabled; ++ hw_ps->pps.entropy_coding_sync_enabled_flag = ++ !!(pps->flags & V4L2_HEVC_PPS_FLAG_ENTROPY_CODING_SYNC_ENABLED); ++ hw_ps->pps.pps_loop_filter_across_slices_enabled_flag = ++ !!(pps->flags & V4L2_HEVC_PPS_FLAG_PPS_LOOP_FILTER_ACROSS_SLICES_ENABLED); ++ hw_ps->pps.loop_filter_across_tiles_enabled_flag = ++ !!(pps->flags & V4L2_HEVC_PPS_FLAG_LOOP_FILTER_ACROSS_TILES_ENABLED); ++ hw_ps->pps.deblocking_filter_override_enabled_flag = ++ !!(pps->flags & V4L2_HEVC_PPS_FLAG_DEBLOCKING_FILTER_OVERRIDE_ENABLED); ++ hw_ps->pps.pps_deblocking_filter_disabled_flag = ++ !!(pps->flags & V4L2_HEVC_PPS_FLAG_PPS_DISABLE_DEBLOCKING_FILTER); ++ hw_ps->pps.pps_beta_offset_div2 = pps->pps_beta_offset_div2; ++ hw_ps->pps.pps_tc_offset_div2 = pps->pps_tc_offset_div2; ++ hw_ps->pps.lists_modification_present_flag = ++ !!(pps->flags & V4L2_HEVC_PPS_FLAG_LISTS_MODIFICATION_PRESENT); ++ hw_ps->pps.log2_parallel_merge_level = pps->log2_parallel_merge_level_minus2 + 2; ++ hw_ps->pps.slice_segment_header_extension_present_flag = ++ !!(pps->flags & V4L2_HEVC_PPS_FLAG_SLICE_SEGMENT_HEADER_EXTENSION_PRESENT); ++ hw_ps->pps.num_tile_columns = tiles_enabled ? pps->num_tile_columns_minus1 + 1 : 0; ++ hw_ps->pps.num_tile_rows = tiles_enabled ? pps->num_tile_rows_minus1 + 1 : 0; ++ hw_ps->pps.sps_pps_mode = 0; ++ hw_ps->pps.reserved_bits = 0x3fff; ++ hw_ps->pps.reserved = 0xffff; ++ ++ // Setup tiles information ++ memset(column_width, 0, sizeof(column_width)); ++ memset(row_height, 0, sizeof(row_height)); ++ ++ max_cu_width = 1 << (sps->log2_diff_max_min_luma_coding_block_size + log2_min_cb_size); ++ pic_in_cts_width = (width + max_cu_width - 1) / max_cu_width; ++ pic_in_cts_height = (height + max_cu_width - 1) / max_cu_width; ++ ++ if (pps->flags & V4L2_HEVC_PPS_FLAG_TILES_ENABLED) { ++ if (pps->flags & V4L2_HEVC_PPS_FLAG_UNIFORM_SPACING) { ++ compute_tiles_uniform(run, log2_min_cb_size, width, height, ++ pic_in_cts_width, pic_in_cts_height, ++ column_width, row_height); ++ } else { ++ compute_tiles_non_uniform(run, log2_min_cb_size, width, height, ++ pic_in_cts_width, pic_in_cts_height, ++ column_width, row_height); ++ } ++ } else { ++ column_width[0] = (width + max_cu_width - 1) / max_cu_width; ++ row_height[0] = (height + max_cu_width - 1) / max_cu_width; ++ } ++ ++ for (i = 0; i < 20; i++) { ++ if (column_width[i] > 0) ++ column_width[i]--; ++ ++ if (i & 1) ++ hw_ps->column_width[i / 2].value1 = column_width[i]; ++ else ++ hw_ps->column_width[i / 2].value0 = column_width[i]; ++ } ++ ++ for (i = 0; i < 22; i++) { ++ if (row_height[i] > 0) ++ row_height[i]--; ++ ++ if (i & 1) ++ hw_ps->row_height[i / 2].value1 = row_height[i]; ++ else ++ hw_ps->row_height[i / 2].value0 = row_height[i]; ++ } ++ ++ hw_ps->padding = 0xffffffff; ++ hw_ps->padding_bits = 0x3; ++} ++ ++static void set_ref_valid(struct rkvdec_vdpu381_regs_hevc *regs, int id, u32 valid) ++{ ++ switch (id) { ++ case 0: ++ regs->hevc_param.reg099.hevc_ref_valid_0 = valid; ++ break; ++ case 1: ++ regs->hevc_param.reg099.hevc_ref_valid_1 = valid; ++ break; ++ case 2: ++ regs->hevc_param.reg099.hevc_ref_valid_2 = valid; ++ break; ++ case 3: ++ regs->hevc_param.reg099.hevc_ref_valid_3 = valid; ++ break; ++ case 4: ++ regs->hevc_param.reg099.hevc_ref_valid_4 = valid; ++ break; ++ case 5: ++ regs->hevc_param.reg099.hevc_ref_valid_5 = valid; ++ break; ++ case 6: ++ regs->hevc_param.reg099.hevc_ref_valid_6 = valid; ++ break; ++ case 7: ++ regs->hevc_param.reg099.hevc_ref_valid_7 = valid; ++ break; ++ case 8: ++ regs->hevc_param.reg099.hevc_ref_valid_8 = valid; ++ break; ++ case 9: ++ regs->hevc_param.reg099.hevc_ref_valid_9 = valid; ++ break; ++ case 10: ++ regs->hevc_param.reg099.hevc_ref_valid_10 = valid; ++ break; ++ case 11: ++ regs->hevc_param.reg099.hevc_ref_valid_11 = valid; ++ break; ++ case 12: ++ regs->hevc_param.reg099.hevc_ref_valid_12 = valid; ++ break; ++ case 13: ++ regs->hevc_param.reg099.hevc_ref_valid_13 = valid; ++ break; ++ case 14: ++ regs->hevc_param.reg099.hevc_ref_valid_14 = valid; ++ break; ++ } ++} ++ ++static void rkvdec_write_regs(struct rkvdec_ctx *ctx) ++{ ++ struct rkvdec_dev *rkvdec = ctx->dev; ++ struct rkvdec_hevc_ctx *hevc_ctx = ctx->priv; ++ ++ rkvdec_memcpy_toio(rkvdec->regs + OFFSET_COMMON_REGS, ++ &hevc_ctx->regs.common, ++ sizeof(hevc_ctx->regs.common)); ++ rkvdec_memcpy_toio(rkvdec->regs + OFFSET_CODEC_PARAMS_REGS, ++ &hevc_ctx->regs.hevc_param, ++ sizeof(hevc_ctx->regs.hevc_param)); ++ rkvdec_memcpy_toio(rkvdec->regs + OFFSET_COMMON_ADDR_REGS, ++ &hevc_ctx->regs.common_addr, ++ sizeof(hevc_ctx->regs.common_addr)); ++ rkvdec_memcpy_toio(rkvdec->regs + OFFSET_CODEC_ADDR_REGS, ++ &hevc_ctx->regs.hevc_addr, ++ sizeof(hevc_ctx->regs.hevc_addr)); ++ rkvdec_memcpy_toio(rkvdec->regs + OFFSET_POC_HIGHBIT_REGS, ++ &hevc_ctx->regs.hevc_highpoc, ++ sizeof(hevc_ctx->regs.hevc_highpoc)); ++} ++ ++static void config_registers(struct rkvdec_ctx *ctx, ++ struct rkvdec_hevc_run *run) ++{ ++ const struct v4l2_ctrl_hevc_decode_params *dec_params = run->decode_params; ++ const struct v4l2_hevc_dpb_entry *dpb = dec_params->dpb; ++ struct rkvdec_hevc_ctx *hevc_ctx = ctx->priv; ++ struct rkvdec_vdpu381_regs_hevc *regs = &hevc_ctx->regs; ++ dma_addr_t priv_start_addr = hevc_ctx->priv_tbl.dma; ++ const struct v4l2_pix_format_mplane *dst_fmt; ++ struct vb2_v4l2_buffer *src_buf = run->base.bufs.src; ++ struct vb2_v4l2_buffer *dst_buf = run->base.bufs.dst; ++ const struct v4l2_format *f; ++ dma_addr_t rlc_addr; ++ u32 hor_virstride = 0; ++ u32 ver_virstride = 0; ++ u32 y_virstride = 0; ++ u32 offset; ++ u32 pixels; ++ dma_addr_t dst_addr; ++ u32 i; ++ ++ memset(regs, 0, sizeof(*regs)); ++ ++ /* Set HEVC mode */ ++ regs->common.reg009.dec_mode = VDPU381_MODE_HEVC; ++ ++ /* Set config */ ++ regs->common.reg011.buf_empty_en = 1; ++ regs->common.reg011.dec_clkgate_e = 1; ++ regs->common.reg011.dec_timeout_e = 1; ++ regs->common.reg011.pix_range_detection_e = 1; ++ ++ /* Set IDR flag */ ++ regs->common.reg013.cur_pic_is_idr = ++ !!(dec_params->flags & V4L2_HEVC_DECODE_PARAM_FLAG_IDR_PIC); ++ ++ /* Set input stream length */ ++ regs->common.stream_len = vb2_get_plane_payload(&src_buf->vb2_buf, 0); ++ ++ /* Set max slice number */ ++ regs->common.reg017.slice_num = 1; ++ ++ /* Set strides */ ++ f = &ctx->decoded_fmt; ++ dst_fmt = &f->fmt.pix_mp; ++ hor_virstride = dst_fmt->plane_fmt[0].bytesperline; ++ ver_virstride = dst_fmt->height; ++ y_virstride = hor_virstride * ver_virstride; ++ pixels = dst_fmt->height * dst_fmt->width; ++ ++ regs->common.reg018.y_hor_virstride = hor_virstride / 16; ++ regs->common.reg019.uv_hor_virstride = hor_virstride / 16; ++ regs->common.reg020.y_virstride = y_virstride / 16; ++ ++ /* Activate block gating */ ++ regs->common.reg026.swreg_block_gating_e = 0xfffef; ++ regs->common.reg026.reg_cfg_gating_en = 1; ++ ++ /* Set timeout threshold */ ++ if (pixels < RKVDEC_1080P_PIXELS) ++ regs->common.timeout_threshold = RKVDEC_TIMEOUT_1080p; ++ else if (pixels < RKVDEC_4K_PIXELS) ++ regs->common.timeout_threshold = RKVDEC_TIMEOUT_4K; ++ else if (pixels < RKVDEC_8K_PIXELS) ++ regs->common.timeout_threshold = RKVDEC_TIMEOUT_8K; ++ ++ /* Set POC val */ ++ regs->hevc_param.cur_top_poc = dec_params->pic_order_cnt_val; ++ ++ /* Set ref pic address & poc */ ++ for (i = 0; i < ARRAY_SIZE(dec_params->dpb); i++) { ++ struct vb2_buffer *vb_buf = get_ref_buf(ctx, run, i); ++ dma_addr_t buf_dma = vb2_dma_contig_plane_dma_addr(vb_buf, 0); ++ u32 valid = !!(dec_params->num_active_dpb_entries > i); ++ ++ /* Set reference addresses */ ++ regs->hevc_addr.ref_base[i] = buf_dma; ++ ++ /* Set COLMV addresses */ ++ regs->hevc_addr.colmv_base[i] = buf_dma + ctx->colmv_offset; ++ ++ regs->hevc_param.reg067_082_ref_poc[i] = ++ dpb[i].pic_order_cnt_val; ++ ++ set_ref_valid(regs, i, valid); ++ regs->hevc_param.reg103.ref_pic_layer_same_with_cur |= 1 << i; ++ } ++ ++ /* Set rlc base address (input stream) */ ++ rlc_addr = vb2_dma_contig_plane_dma_addr(&src_buf->vb2_buf, 0); ++ regs->common_addr.rlc_base = rlc_addr; ++ regs->common_addr.rlcwrite_base = rlc_addr; ++ ++ /* Set output base address */ ++ dst_addr = vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0); ++ regs->common_addr.decout_base = dst_addr; ++ regs->common_addr.error_ref_base = dst_addr; ++ ++ /* Set colmv address */ ++ regs->common_addr.colmv_cur_base = dst_addr + ctx->colmv_offset; ++ ++ /* Set RCB addresses */ ++ for (i = 0; i < rkvdec_rcb_buf_count(ctx); i++) ++ regs->common_addr.rcb_base[i] = rkvdec_rcb_buf_dma_addr(ctx, i); ++ ++ /* Set hw pps address */ ++ offset = offsetof(struct rkvdec_hevc_priv_tbl, param_set); ++ regs->hevc_addr.pps_base = priv_start_addr + offset; ++ ++ /* Set hw rps address */ ++ offset = offsetof(struct rkvdec_hevc_priv_tbl, rps); ++ regs->hevc_addr.rps_base = priv_start_addr + offset; ++ ++ /* Set cabac table */ ++ offset = offsetof(struct rkvdec_hevc_priv_tbl, cabac_table); ++ regs->hevc_addr.cabactbl_base = priv_start_addr + offset; ++ ++ /* Set scaling matrix */ ++ offset = offsetof(struct rkvdec_hevc_priv_tbl, scaling_list); ++ regs->hevc_addr.scanlist_addr = priv_start_addr + offset; ++ ++ rkvdec_write_regs(ctx); ++} ++ ++static int rkvdec_hevc_start(struct rkvdec_ctx *ctx) ++{ ++ struct rkvdec_dev *rkvdec = ctx->dev; ++ struct rkvdec_hevc_priv_tbl *priv_tbl; ++ struct rkvdec_hevc_ctx *hevc_ctx; ++ struct v4l2_ctrl *ctrl; ++ int ret; ++ ++ ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, ++ V4L2_CID_STATELESS_HEVC_SPS); ++ if (!ctrl) ++ return -EINVAL; ++ ++ ret = rkvdec_hevc_validate_sps(ctx, ctrl->p_new.p_hevc_sps); ++ if (ret) ++ return ret; ++ ++ hevc_ctx = kzalloc(sizeof(*hevc_ctx), GFP_KERNEL); ++ if (!hevc_ctx) ++ return -ENOMEM; ++ ++ priv_tbl = dma_alloc_coherent(rkvdec->dev, sizeof(*priv_tbl), ++ &hevc_ctx->priv_tbl.dma, GFP_KERNEL); ++ if (!priv_tbl) { ++ ret = -ENOMEM; ++ goto err_free_ctx; ++ } ++ ++ hevc_ctx->priv_tbl.size = sizeof(*priv_tbl); ++ hevc_ctx->priv_tbl.cpu = priv_tbl; ++ memcpy(priv_tbl->cabac_table, rkvdec_hevc_cabac_table, ++ sizeof(rkvdec_hevc_cabac_table)); ++ ++ ctx->priv = hevc_ctx; ++ return 0; ++ ++err_free_ctx: ++ kfree(hevc_ctx); ++ return ret; ++} ++ ++static void rkvdec_hevc_stop(struct rkvdec_ctx *ctx) ++{ ++ struct rkvdec_hevc_ctx *hevc_ctx = ctx->priv; ++ struct rkvdec_dev *rkvdec = ctx->dev; ++ ++ dma_free_coherent(rkvdec->dev, hevc_ctx->priv_tbl.size, ++ hevc_ctx->priv_tbl.cpu, hevc_ctx->priv_tbl.dma); ++ kfree(hevc_ctx); ++} ++ ++static int rkvdec_hevc_run(struct rkvdec_ctx *ctx) ++{ ++ struct rkvdec_dev *rkvdec = ctx->dev; ++ struct rkvdec_hevc_run run; ++ struct rkvdec_hevc_ctx *hevc_ctx = ctx->priv; ++ struct rkvdec_hevc_priv_tbl *tbl = hevc_ctx->priv_tbl.cpu; ++ ++ rkvdec_hevc_run_preamble(ctx, &run); ++ ++ rkvdec_hevc_assemble_hw_scaling_list(rkvdec, ++ &run, ++ &tbl->scaling_list, ++ &hevc_ctx->scaling_matrix_cache); ++ assemble_hw_pps(ctx, &run); ++ rkvdec_hevc_assemble_hw_rps(&run, &tbl->rps, &hevc_ctx->st_cache); ++ ++ config_registers(ctx, &run); ++ ++ rkvdec_run_postamble(ctx, &run.base); ++ ++ schedule_delayed_work(&rkvdec->watchdog_work, msecs_to_jiffies(2000)); ++ ++ /* Start decoding! */ ++ writel(VDPU381_DEC_E_BIT, rkvdec->regs + VDPU381_REG_DEC_E); ++ ++ return 0; ++} ++ ++const struct rkvdec_coded_fmt_ops rkvdec_vdpu381_hevc_fmt_ops = { ++ .adjust_fmt = rkvdec_hevc_adjust_fmt, ++ .start = rkvdec_hevc_start, ++ .stop = rkvdec_hevc_stop, ++ .run = rkvdec_hevc_run, ++ .try_ctrl = rkvdec_hevc_try_ctrl, ++ .get_image_fmt = rkvdec_hevc_get_image_fmt, ++}; +diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu383-h264.c b/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu383-h264.c +new file mode 100644 +index 000000000000..bb2c62d9c3d4 +--- /dev/null ++++ b/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu383-h264.c +@@ -0,0 +1,582 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Rockchip Video Decoder VDPU383 H264 backend ++ * ++ * Copyright (C) 2024 Collabora, Ltd. ++ * Detlev Casanova ++ */ ++ ++#include ++#include ++ ++#include ++ ++#include "rkvdec-rcb.h" ++#include "rkvdec-vdpu383-regs.h" ++#include "rkvdec-h264-common.h" ++ ++struct rkvdec_sps { ++ u16 seq_parameter_set_id: 4; ++ u16 profile_idc: 8; ++ u16 constraint_set3_flag: 1; ++ u16 chroma_format_idc: 2; ++ u16 bit_depth_luma: 3; ++ u16 bit_depth_chroma: 3; ++ u16 qpprime_y_zero_transform_bypass_flag: 1; ++ u16 log2_max_frame_num_minus4: 4; ++ u16 max_num_ref_frames: 5; ++ u16 pic_order_cnt_type: 2; ++ u16 log2_max_pic_order_cnt_lsb_minus4: 4; ++ u16 delta_pic_order_always_zero_flag: 1; ++ ++ u16 pic_width_in_mbs: 16; ++ u16 pic_height_in_mbs: 16; ++ ++ u16 frame_mbs_only_flag: 1; ++ u16 mb_adaptive_frame_field_flag: 1; ++ u16 direct_8x8_inference_flag: 1; ++ u16 mvc_extension_enable: 1; ++ u16 num_views: 2; ++ u16 view_id0: 10; ++ u16 view_id1: 10; ++} __packed; ++ ++struct rkvdec_pps { ++ u32 pic_parameter_set_id: 8; ++ u32 pps_seq_parameter_set_id: 5; ++ u32 entropy_coding_mode_flag: 1; ++ u32 bottom_field_pic_order_in_frame_present_flag: 1; ++ u32 num_ref_idx_l0_default_active_minus1: 5; ++ u32 num_ref_idx_l1_default_active_minus1: 5; ++ u32 weighted_pred_flag: 1; ++ u32 weighted_bipred_idc: 2; ++ u32 pic_init_qp_minus26: 7; ++ u32 pic_init_qs_minus26: 6; ++ u32 chroma_qp_index_offset: 5; ++ u32 deblocking_filter_control_present_flag: 1; ++ u32 constrained_intra_pred_flag: 1; ++ u32 redundant_pic_cnt_present: 1; ++ u32 transform_8x8_mode_flag: 1; ++ u32 second_chroma_qp_index_offset: 5; ++ u32 scaling_list_enable_flag: 1; ++ u32 is_longterm: 16; ++ u32 voidx: 16; ++ ++ // dpb ++ u32 pic_field_flag: 1; ++ u32 pic_associated_flag: 1; ++ u32 cur_top_field: 32; ++ u32 cur_bot_field: 32; ++ ++ u32 top_field_order_cnt0: 32; ++ u32 bot_field_order_cnt0: 32; ++ u32 top_field_order_cnt1: 32; ++ u32 bot_field_order_cnt1: 32; ++ u32 top_field_order_cnt2: 32; ++ u32 bot_field_order_cnt2: 32; ++ u32 top_field_order_cnt3: 32; ++ u32 bot_field_order_cnt3: 32; ++ u32 top_field_order_cnt4: 32; ++ u32 bot_field_order_cnt4: 32; ++ u32 top_field_order_cnt5: 32; ++ u32 bot_field_order_cnt5: 32; ++ u32 top_field_order_cnt6: 32; ++ u32 bot_field_order_cnt6: 32; ++ u32 top_field_order_cnt7: 32; ++ u32 bot_field_order_cnt7: 32; ++ u32 top_field_order_cnt8: 32; ++ u32 bot_field_order_cnt8: 32; ++ u32 top_field_order_cnt9: 32; ++ u32 bot_field_order_cnt9: 32; ++ u32 top_field_order_cnt10: 32; ++ u32 bot_field_order_cnt10: 32; ++ u32 top_field_order_cnt11: 32; ++ u32 bot_field_order_cnt11: 32; ++ u32 top_field_order_cnt12: 32; ++ u32 bot_field_order_cnt12: 32; ++ u32 top_field_order_cnt13: 32; ++ u32 bot_field_order_cnt13: 32; ++ u32 top_field_order_cnt14: 32; ++ u32 bot_field_order_cnt14: 32; ++ u32 top_field_order_cnt15: 32; ++ u32 bot_field_order_cnt15: 32; ++ ++ u32 ref_field_flags: 16; ++ u32 ref_topfield_used: 16; ++ u32 ref_botfield_used: 16; ++ u32 ref_colmv_use_flag: 16; ++ ++ u32 reserved0: 30; ++ u32 reserved[3]; ++} __packed; ++ ++struct rkvdec_sps_pps { ++ struct rkvdec_sps sps; ++ struct rkvdec_pps pps; ++} __packed; ++ ++/* Data structure describing auxiliary buffer format. */ ++struct rkvdec_h264_priv_tbl { ++ s8 cabac_table[4][464][2]; ++ struct rkvdec_h264_scaling_list scaling_list; ++ struct rkvdec_sps_pps param_set[256]; ++ struct rkvdec_rps rps; ++} __packed; ++ ++struct rkvdec_h264_ctx { ++ struct rkvdec_aux_buf priv_tbl; ++ struct rkvdec_h264_reflists reflists; ++ struct vdpu383_regs_h26x regs; ++}; ++ ++static void set_field_order_cnt(struct rkvdec_sps_pps *hw_ps, int id, u32 top, u32 bottom) ++{ ++ switch (id) { ++ case 0: ++ hw_ps->pps.top_field_order_cnt0 = top; ++ hw_ps->pps.bot_field_order_cnt0 = bottom; ++ break; ++ case 1: ++ hw_ps->pps.top_field_order_cnt1 = top; ++ hw_ps->pps.bot_field_order_cnt1 = bottom; ++ break; ++ case 2: ++ hw_ps->pps.top_field_order_cnt2 = top; ++ hw_ps->pps.bot_field_order_cnt2 = bottom; ++ break; ++ case 3: ++ hw_ps->pps.top_field_order_cnt3 = top; ++ hw_ps->pps.bot_field_order_cnt3 = bottom; ++ break; ++ case 4: ++ hw_ps->pps.top_field_order_cnt4 = top; ++ hw_ps->pps.bot_field_order_cnt4 = bottom; ++ break; ++ case 5: ++ hw_ps->pps.top_field_order_cnt5 = top; ++ hw_ps->pps.bot_field_order_cnt5 = bottom; ++ break; ++ case 6: ++ hw_ps->pps.top_field_order_cnt6 = top; ++ hw_ps->pps.bot_field_order_cnt6 = bottom; ++ break; ++ case 7: ++ hw_ps->pps.top_field_order_cnt7 = top; ++ hw_ps->pps.bot_field_order_cnt7 = bottom; ++ break; ++ case 8: ++ hw_ps->pps.top_field_order_cnt8 = top; ++ hw_ps->pps.bot_field_order_cnt8 = bottom; ++ break; ++ case 9: ++ hw_ps->pps.top_field_order_cnt9 = top; ++ hw_ps->pps.bot_field_order_cnt9 = bottom; ++ break; ++ case 10: ++ hw_ps->pps.top_field_order_cnt10 = top; ++ hw_ps->pps.bot_field_order_cnt10 = bottom; ++ break; ++ case 11: ++ hw_ps->pps.top_field_order_cnt11 = top; ++ hw_ps->pps.bot_field_order_cnt11 = bottom; ++ break; ++ case 12: ++ hw_ps->pps.top_field_order_cnt12 = top; ++ hw_ps->pps.bot_field_order_cnt12 = bottom; ++ break; ++ case 13: ++ hw_ps->pps.top_field_order_cnt13 = top; ++ hw_ps->pps.bot_field_order_cnt13 = bottom; ++ break; ++ case 14: ++ hw_ps->pps.top_field_order_cnt14 = top; ++ hw_ps->pps.bot_field_order_cnt14 = bottom; ++ break; ++ case 15: ++ hw_ps->pps.top_field_order_cnt15 = top; ++ hw_ps->pps.bot_field_order_cnt15 = bottom; ++ break; ++ } ++} ++ ++static void assemble_hw_pps(struct rkvdec_ctx *ctx, ++ struct rkvdec_h264_run *run) ++{ ++ struct rkvdec_h264_ctx *h264_ctx = ctx->priv; ++ const struct v4l2_ctrl_h264_sps *sps = run->sps; ++ const struct v4l2_ctrl_h264_pps *pps = run->pps; ++ const struct v4l2_ctrl_h264_decode_params *dec_params = run->decode_params; ++ const struct v4l2_h264_dpb_entry *dpb = dec_params->dpb; ++ struct rkvdec_h264_priv_tbl *priv_tbl = h264_ctx->priv_tbl.cpu; ++ struct rkvdec_sps_pps *hw_ps; ++ u32 pic_width, pic_height; ++ u32 i; ++ ++ /* ++ * HW read the SPS/PPS information from PPS packet index by PPS id. ++ * offset from the base can be calculated by PPS_id * 32 (size per PPS ++ * packet unit). so the driver copy SPS/PPS information to the exact PPS ++ * packet unit for HW accessing. ++ */ ++ hw_ps = &priv_tbl->param_set[pps->pic_parameter_set_id]; ++ memset(hw_ps, 0, sizeof(*hw_ps)); ++ ++ /* write sps */ ++ hw_ps->sps.seq_parameter_set_id = sps->seq_parameter_set_id; ++ hw_ps->sps.profile_idc = sps->profile_idc; ++ hw_ps->sps.constraint_set3_flag = !!(sps->constraint_set_flags & (1 << 3)); ++ hw_ps->sps.chroma_format_idc = sps->chroma_format_idc; ++ hw_ps->sps.bit_depth_luma = sps->bit_depth_luma_minus8; ++ hw_ps->sps.bit_depth_chroma = sps->bit_depth_chroma_minus8; ++ hw_ps->sps.qpprime_y_zero_transform_bypass_flag = ++ !!(sps->flags & V4L2_H264_SPS_FLAG_QPPRIME_Y_ZERO_TRANSFORM_BYPASS); ++ hw_ps->sps.log2_max_frame_num_minus4 = sps->log2_max_frame_num_minus4; ++ hw_ps->sps.max_num_ref_frames = sps->max_num_ref_frames; ++ hw_ps->sps.pic_order_cnt_type = sps->pic_order_cnt_type; ++ hw_ps->sps.log2_max_pic_order_cnt_lsb_minus4 = ++ sps->log2_max_pic_order_cnt_lsb_minus4; ++ hw_ps->sps.delta_pic_order_always_zero_flag = ++ !!(sps->flags & V4L2_H264_SPS_FLAG_DELTA_PIC_ORDER_ALWAYS_ZERO); ++ hw_ps->sps.mvc_extension_enable = 0; ++ hw_ps->sps.num_views = 0; ++ ++ /* ++ * Use the SPS values since they are already in macroblocks ++ * dimensions, height can be field height (halved) if ++ * V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY is not set and also it allows ++ * decoding smaller images into larger allocation which can be used ++ * to implementing SVC spatial layer support. ++ */ ++ pic_width = 16 * (sps->pic_width_in_mbs_minus1 + 1); ++ pic_height = 16 * (sps->pic_height_in_map_units_minus1 + 1); ++ if (!(sps->flags & V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY)) ++ pic_height *= 2; ++ if (!!(dec_params->flags & V4L2_H264_DECODE_PARAM_FLAG_FIELD_PIC)) ++ pic_height /= 2; ++ ++ hw_ps->sps.pic_width_in_mbs = pic_width; ++ hw_ps->sps.pic_height_in_mbs = pic_height; ++ ++ hw_ps->sps.frame_mbs_only_flag = ++ !!(sps->flags & V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY); ++ hw_ps->sps.mb_adaptive_frame_field_flag = ++ !!(sps->flags & V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD); ++ hw_ps->sps.direct_8x8_inference_flag = ++ !!(sps->flags & V4L2_H264_SPS_FLAG_DIRECT_8X8_INFERENCE); ++ ++ /* write pps */ ++ hw_ps->pps.pic_parameter_set_id = pps->pic_parameter_set_id; ++ hw_ps->pps.pps_seq_parameter_set_id = pps->seq_parameter_set_id; ++ hw_ps->pps.entropy_coding_mode_flag = ++ !!(pps->flags & V4L2_H264_PPS_FLAG_ENTROPY_CODING_MODE); ++ hw_ps->pps.bottom_field_pic_order_in_frame_present_flag = ++ !!(pps->flags & V4L2_H264_PPS_FLAG_BOTTOM_FIELD_PIC_ORDER_IN_FRAME_PRESENT); ++ hw_ps->pps.num_ref_idx_l0_default_active_minus1 = ++ pps->num_ref_idx_l0_default_active_minus1; ++ hw_ps->pps.num_ref_idx_l1_default_active_minus1 = ++ pps->num_ref_idx_l1_default_active_minus1; ++ hw_ps->pps.weighted_pred_flag = ++ !!(pps->flags & V4L2_H264_PPS_FLAG_WEIGHTED_PRED); ++ hw_ps->pps.weighted_bipred_idc = pps->weighted_bipred_idc; ++ hw_ps->pps.pic_init_qp_minus26 = pps->pic_init_qp_minus26; ++ hw_ps->pps.pic_init_qs_minus26 = pps->pic_init_qs_minus26; ++ hw_ps->pps.chroma_qp_index_offset = pps->chroma_qp_index_offset; ++ hw_ps->pps.deblocking_filter_control_present_flag = ++ !!(pps->flags & V4L2_H264_PPS_FLAG_DEBLOCKING_FILTER_CONTROL_PRESENT); ++ hw_ps->pps.constrained_intra_pred_flag = ++ !!(pps->flags & V4L2_H264_PPS_FLAG_CONSTRAINED_INTRA_PRED); ++ hw_ps->pps.redundant_pic_cnt_present = ++ !!(pps->flags & V4L2_H264_PPS_FLAG_REDUNDANT_PIC_CNT_PRESENT); ++ hw_ps->pps.transform_8x8_mode_flag = ++ !!(pps->flags & V4L2_H264_PPS_FLAG_TRANSFORM_8X8_MODE); ++ hw_ps->pps.second_chroma_qp_index_offset = pps->second_chroma_qp_index_offset; ++ hw_ps->pps.scaling_list_enable_flag = ++ !!(pps->flags & V4L2_H264_PPS_FLAG_SCALING_MATRIX_PRESENT); ++ ++ for (i = 0; i < ARRAY_SIZE(dec_params->dpb); i++) { ++ if (dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM) ++ hw_ps->pps.is_longterm |= (1 << i); ++ ++ set_field_order_cnt(hw_ps, i, dpb[i].top_field_order_cnt, ++ dpb[i].bottom_field_order_cnt); ++ ++ hw_ps->pps.ref_field_flags |= ++ (!!(dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_FIELD)) << i; ++ hw_ps->pps.ref_colmv_use_flag |= ++ (!!(dpb[i].flags & V4L2_H264_DPB_ENTRY_FLAG_ACTIVE)) << i; ++ hw_ps->pps.ref_topfield_used |= ++ (!!(dpb[i].fields & V4L2_H264_TOP_FIELD_REF)) << i; ++ hw_ps->pps.ref_botfield_used |= ++ (!!(dpb[i].fields & V4L2_H264_BOTTOM_FIELD_REF)) << i; ++ } ++ ++ hw_ps->pps.pic_field_flag = ++ !!(dec_params->flags & V4L2_H264_DECODE_PARAM_FLAG_FIELD_PIC); ++ hw_ps->pps.pic_associated_flag = ++ !!(dec_params->flags & V4L2_H264_DECODE_PARAM_FLAG_BOTTOM_FIELD); ++ ++ hw_ps->pps.cur_top_field = dec_params->top_field_order_cnt; ++ hw_ps->pps.cur_bot_field = dec_params->bottom_field_order_cnt; ++} ++ ++static void rkvdec_write_regs(struct rkvdec_ctx *ctx) ++{ ++ struct rkvdec_dev *rkvdec = ctx->dev; ++ struct rkvdec_h264_ctx *h264_ctx = ctx->priv; ++ ++ rkvdec_memcpy_toio(rkvdec->regs + VDPU383_OFFSET_COMMON_REGS, ++ &h264_ctx->regs.common, ++ sizeof(h264_ctx->regs.common)); ++ rkvdec_memcpy_toio(rkvdec->regs + VDPU383_OFFSET_COMMON_ADDR_REGS, ++ &h264_ctx->regs.common_addr, ++ sizeof(h264_ctx->regs.common_addr)); ++ rkvdec_memcpy_toio(rkvdec->regs + VDPU383_OFFSET_CODEC_PARAMS_REGS, ++ &h264_ctx->regs.h26x_params, ++ sizeof(h264_ctx->regs.h26x_params)); ++ rkvdec_memcpy_toio(rkvdec->regs + VDPU383_OFFSET_CODEC_ADDR_REGS, ++ &h264_ctx->regs.h26x_addr, ++ sizeof(h264_ctx->regs.h26x_addr)); ++} ++ ++static void config_registers(struct rkvdec_ctx *ctx, ++ struct rkvdec_h264_run *run) ++{ ++ const struct v4l2_ctrl_h264_decode_params *dec_params = run->decode_params; ++ struct rkvdec_h264_ctx *h264_ctx = ctx->priv; ++ dma_addr_t priv_start_addr = h264_ctx->priv_tbl.dma; ++ const struct v4l2_pix_format_mplane *dst_fmt; ++ struct vb2_v4l2_buffer *src_buf = run->base.bufs.src; ++ struct vb2_v4l2_buffer *dst_buf = run->base.bufs.dst; ++ struct vdpu383_regs_h26x *regs = &h264_ctx->regs; ++ const struct v4l2_format *f; ++ dma_addr_t rlc_addr; ++ dma_addr_t dst_addr; ++ u32 hor_virstride; ++ u32 ver_virstride; ++ u32 y_virstride; ++ u32 offset; ++ u32 pixels; ++ u32 i; ++ ++ memset(regs, 0, sizeof(*regs)); ++ ++ /* Set H264 mode */ ++ regs->common.reg008_dec_mode = VDPU383_MODE_H264; ++ ++ /* Set input stream length */ ++ regs->h26x_params.reg066_stream_len = vb2_get_plane_payload(&src_buf->vb2_buf, 0); ++ ++ /* Set strides */ ++ f = &ctx->decoded_fmt; ++ dst_fmt = &f->fmt.pix_mp; ++ hor_virstride = dst_fmt->plane_fmt[0].bytesperline; ++ ver_virstride = dst_fmt->height; ++ y_virstride = hor_virstride * ver_virstride; ++ ++ pixels = dst_fmt->height * dst_fmt->width; ++ ++ regs->h26x_params.reg068_hor_virstride = hor_virstride / 16; ++ regs->h26x_params.reg069_raster_uv_hor_virstride = hor_virstride / 16; ++ regs->h26x_params.reg070_y_virstride = y_virstride / 16; ++ ++ /* Activate block gating */ ++ regs->common.reg010.strmd_auto_gating_e = 1; ++ regs->common.reg010.inter_auto_gating_e = 1; ++ regs->common.reg010.intra_auto_gating_e = 1; ++ regs->common.reg010.transd_auto_gating_e = 1; ++ regs->common.reg010.recon_auto_gating_e = 1; ++ regs->common.reg010.filterd_auto_gating_e = 1; ++ regs->common.reg010.bus_auto_gating_e = 1; ++ regs->common.reg010.ctrl_auto_gating_e = 1; ++ regs->common.reg010.rcb_auto_gating_e = 1; ++ regs->common.reg010.err_prc_auto_gating_e = 1; ++ ++ /* Set timeout threshold */ ++ if (pixels < VDPU383_1080P_PIXELS) ++ regs->common.reg013_core_timeout_threshold = VDPU383_TIMEOUT_1080p; ++ else if (pixels < VDPU383_4K_PIXELS) ++ regs->common.reg013_core_timeout_threshold = VDPU383_TIMEOUT_4K; ++ else if (pixels < VDPU383_8K_PIXELS) ++ regs->common.reg013_core_timeout_threshold = VDPU383_TIMEOUT_8K; ++ else ++ regs->common.reg013_core_timeout_threshold = VDPU383_TIMEOUT_MAX; ++ ++ regs->common.reg016.error_proc_disable = 1; ++ ++ /* Set ref pic address & poc */ ++ for (i = 0; i < ARRAY_SIZE(dec_params->dpb); i++) { ++ struct vb2_buffer *vb_buf = run->ref_buf[i]; ++ dma_addr_t buf_dma; ++ ++ /* ++ * If a DPB entry is unused or invalid, address of current destination ++ * buffer is returned. ++ */ ++ if (!vb_buf) ++ vb_buf = &dst_buf->vb2_buf; ++ ++ buf_dma = vb2_dma_contig_plane_dma_addr(vb_buf, 0); ++ ++ /* Set reference addresses */ ++ regs->h26x_addr.reg170_185_ref_base[i] = buf_dma; ++ regs->h26x_addr.reg195_210_payload_st_ref_base[i] = buf_dma; ++ ++ /* Set COLMV addresses */ ++ regs->h26x_addr.reg217_232_colmv_ref_base[i] = buf_dma + ctx->colmv_offset; ++ } ++ ++ /* Set rlc base address (input stream) */ ++ rlc_addr = vb2_dma_contig_plane_dma_addr(&src_buf->vb2_buf, 0); ++ regs->common_addr.reg128_strm_base = rlc_addr; ++ ++ /* Set output base address */ ++ dst_addr = vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0); ++ regs->h26x_addr.reg168_decout_base = dst_addr; ++ regs->h26x_addr.reg169_error_ref_base = dst_addr; ++ regs->h26x_addr.reg192_payload_st_cur_base = dst_addr; ++ ++ /* Set colmv address */ ++ regs->h26x_addr.reg216_colmv_cur_base = dst_addr + ctx->colmv_offset; ++ ++ /* Set RCB addresses */ ++ for (i = 0; i < rkvdec_rcb_buf_count(ctx); i++) { ++ regs->common_addr.reg140_162_rcb_info[i].offset = rkvdec_rcb_buf_dma_addr(ctx, i); ++ regs->common_addr.reg140_162_rcb_info[i].size = rkvdec_rcb_buf_size(ctx, i); ++ } ++ ++ /* Set hw pps address */ ++ offset = offsetof(struct rkvdec_h264_priv_tbl, param_set); ++ regs->common_addr.reg131_gbl_base = priv_start_addr + offset; ++ regs->h26x_params.reg067_global_len = sizeof(struct rkvdec_sps_pps) / 16; ++ ++ /* Set hw rps address */ ++ offset = offsetof(struct rkvdec_h264_priv_tbl, rps); ++ regs->common_addr.reg129_rps_base = priv_start_addr + offset; ++ ++ /* Set cabac table */ ++ offset = offsetof(struct rkvdec_h264_priv_tbl, cabac_table); ++ regs->common_addr.reg130_cabactbl_base = priv_start_addr + offset; ++ ++ /* Set scaling list address */ ++ offset = offsetof(struct rkvdec_h264_priv_tbl, scaling_list); ++ regs->common_addr.reg132_scanlist_addr = priv_start_addr + offset; ++ ++ rkvdec_write_regs(ctx); ++} ++ ++static int rkvdec_h264_start(struct rkvdec_ctx *ctx) ++{ ++ struct rkvdec_dev *rkvdec = ctx->dev; ++ struct rkvdec_h264_priv_tbl *priv_tbl; ++ struct rkvdec_h264_ctx *h264_ctx; ++ struct v4l2_ctrl *ctrl; ++ int ret; ++ ++ ctrl = v4l2_ctrl_find(&ctx->ctrl_hdl, ++ V4L2_CID_STATELESS_H264_SPS); ++ if (!ctrl) ++ return -EINVAL; ++ ++ ret = rkvdec_h264_validate_sps(ctx, ctrl->p_new.p_h264_sps); ++ if (ret) ++ return ret; ++ ++ h264_ctx = kzalloc(sizeof(*h264_ctx), GFP_KERNEL); ++ if (!h264_ctx) ++ return -ENOMEM; ++ ++ priv_tbl = dma_alloc_coherent(rkvdec->dev, sizeof(*priv_tbl), ++ &h264_ctx->priv_tbl.dma, GFP_KERNEL); ++ if (!priv_tbl) { ++ ret = -ENOMEM; ++ goto err_free_ctx; ++ } ++ ++ h264_ctx->priv_tbl.size = sizeof(*priv_tbl); ++ h264_ctx->priv_tbl.cpu = priv_tbl; ++ memcpy(priv_tbl->cabac_table, rkvdec_h264_cabac_table, ++ sizeof(rkvdec_h264_cabac_table)); ++ ++ ctx->priv = h264_ctx; ++ ++ return 0; ++ ++err_free_ctx: ++ kfree(h264_ctx); ++ return ret; ++} ++ ++static void rkvdec_h264_stop(struct rkvdec_ctx *ctx) ++{ ++ struct rkvdec_h264_ctx *h264_ctx = ctx->priv; ++ struct rkvdec_dev *rkvdec = ctx->dev; ++ ++ dma_free_coherent(rkvdec->dev, h264_ctx->priv_tbl.size, ++ h264_ctx->priv_tbl.cpu, h264_ctx->priv_tbl.dma); ++ kfree(h264_ctx); ++} ++ ++static int rkvdec_h264_run(struct rkvdec_ctx *ctx) ++{ ++ struct v4l2_h264_reflist_builder reflist_builder; ++ struct rkvdec_dev *rkvdec = ctx->dev; ++ struct rkvdec_h264_ctx *h264_ctx = ctx->priv; ++ struct rkvdec_h264_run run; ++ struct rkvdec_h264_priv_tbl *tbl = h264_ctx->priv_tbl.cpu; ++ u32 watchdog_time; ++ u64 timeout_threshold; ++ unsigned long axi_rate; ++ ++ rkvdec_h264_run_preamble(ctx, &run); ++ ++ /* Build the P/B{0,1} ref lists. */ ++ v4l2_h264_init_reflist_builder(&reflist_builder, run.decode_params, ++ run.sps, run.decode_params->dpb); ++ v4l2_h264_build_p_ref_list(&reflist_builder, h264_ctx->reflists.p); ++ v4l2_h264_build_b_ref_lists(&reflist_builder, h264_ctx->reflists.b0, ++ h264_ctx->reflists.b1); ++ ++ assemble_hw_scaling_list(&run, &tbl->scaling_list); ++ assemble_hw_pps(ctx, &run); ++ lookup_ref_buf_idx(ctx, &run); ++ assemble_hw_rps(&reflist_builder, &run, &h264_ctx->reflists, &tbl->rps); ++ ++ config_registers(ctx, &run); ++ ++ rkvdec_run_postamble(ctx, &run.base); ++ ++ /* Set watchdog at 2 times the hardware timeout threshold */ ++ timeout_threshold = h264_ctx->regs.common.reg013_core_timeout_threshold; ++ axi_rate = clk_get_rate(rkvdec->axi_clk); ++ ++ if (axi_rate) ++ watchdog_time = 2 * (1000 * timeout_threshold) / axi_rate; ++ else ++ watchdog_time = 2000; ++ schedule_delayed_work(&rkvdec->watchdog_work, ++ msecs_to_jiffies(watchdog_time)); ++ ++ /* Start decoding! */ ++ writel(timeout_threshold, rkvdec->link + VDPU383_LINK_TIMEOUT_THRESHOLD); ++ writel(0, rkvdec->link + VDPU383_LINK_IP_ENABLE); ++ writel(VDPU383_DEC_E_BIT, rkvdec->link + VDPU383_LINK_DEC_ENABLE); ++ ++ return 0; ++} ++ ++static int rkvdec_h264_try_ctrl(struct rkvdec_ctx *ctx, struct v4l2_ctrl *ctrl) ++{ ++ if (ctrl->id == V4L2_CID_STATELESS_H264_SPS) ++ return rkvdec_h264_validate_sps(ctx, ctrl->p_new.p_h264_sps); ++ ++ return 0; ++} ++ ++const struct rkvdec_coded_fmt_ops rkvdec_vdpu383_h264_fmt_ops = { ++ .adjust_fmt = rkvdec_h264_adjust_fmt, ++ .get_image_fmt = rkvdec_h264_get_image_fmt, ++ .start = rkvdec_h264_start, ++ .stop = rkvdec_h264_stop, ++ .run = rkvdec_h264_run, ++ .try_ctrl = rkvdec_h264_try_ctrl, ++}; +diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu383-regs.h b/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu383-regs.h +new file mode 100644 +index 000000000000..2b614393a3af +--- /dev/null ++++ b/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu383-regs.h +@@ -0,0 +1,284 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * Rockchip Video Decoder VDPU383 driver registers description ++ * ++ * Copyright (C) 2025 Collabora, Ltd. ++ * Detlev Casanova ++ */ ++ ++#ifndef _RKVDEC_VDPU838_REGS_H_ ++#define _RKVDEC_VDPU838_REGS_H_ ++ ++#include ++ ++#define VDPU383_OFFSET_COMMON_REGS (8 * sizeof(u32)) ++#define VDPU383_OFFSET_CODEC_PARAMS_REGS (64 * sizeof(u32)) ++#define VDPU383_OFFSET_COMMON_ADDR_REGS (128 * sizeof(u32)) ++#define VDPU383_OFFSET_CODEC_ADDR_REGS (168 * sizeof(u32)) ++#define VDPU383_OFFSET_POC_HIGHBIT_REGS (200 * sizeof(u32)) ++ ++#define VDPU383_MODE_HEVC 0 ++#define VDPU383_MODE_H264 1 ++ ++#define VDPU383_1080P_PIXELS (1920 * 1080) ++#define VDPU383_4K_PIXELS (4096 * 2304) ++#define VDPU383_8K_PIXELS (7680 * 4320) ++#define VDPU383_TIMEOUT_1080p (0xffffff) ++#define VDPU383_TIMEOUT_4K (0x2cfffff) ++#define VDPU383_TIMEOUT_8K (0x4ffffff) ++#define VDPU383_TIMEOUT_MAX (0xffffffff) ++ ++#define VDPU383_LINK_TIMEOUT_THRESHOLD 0x54 ++ ++#define VDPU383_LINK_IP_ENABLE 0x58 ++#define VDPU383_IP_CRU_MODE BIT(24) ++ ++#define VDPU383_LINK_DEC_ENABLE 0x40 ++#define VDPU383_DEC_E_BIT BIT(0) ++ ++#define VDPU383_LINK_INT_EN 0x048 ++#define VDPU383_INT_EN_IRQ BIT(0) ++#define VDPU383_INT_EN_LINE_IRQ BIT(1) ++ ++#define VDPU383_LINK_STA_INT 0x04c ++#define VDPU383_STA_INT_DEC_RDY_STA BIT(0) ++#define VDPU383_STA_INT_SOFTRESET_RDY (BIT(10) | BIT(11)) ++#define VDPU383_STA_INT_ALL 0x3ff ++ ++struct vdpu383_regs_common { ++ u32 reg008_dec_mode; ++ ++ struct swreg9_important_en { ++ u32 fbc_e : 1; ++ u32 tile_e : 1; ++ u32 reserve0 : 2; ++ u32 buf_empty_en : 1; ++ u32 scale_down_en : 1; ++ u32 reserve1 : 1; ++ u32 pix_range_det_e : 1; ++ u32 av1_fgs_en : 1; ++ u32 reserve2 : 7; ++ u32 line_irq_en : 1; ++ u32 out_cbcr_swap : 1; ++ u32 fbc_force_uncompress : 1; ++ u32 fbc_sparse_mode : 1; ++ u32 reserve3 : 12; ++ } reg009; ++ ++ struct swreg010_block_gating_en { ++ u32 strmd_auto_gating_e : 1; ++ u32 inter_auto_gating_e : 1; ++ u32 intra_auto_gating_e : 1; ++ u32 transd_auto_gating_e : 1; ++ u32 recon_auto_gating_e : 1; ++ u32 filterd_auto_gating_e : 1; ++ u32 bus_auto_gating_e : 1; ++ u32 ctrl_auto_gating_e : 1; ++ u32 rcb_auto_gating_e : 1; ++ u32 err_prc_auto_gating_e : 1; ++ u32 reserve0 : 22; ++ } reg010; ++ ++ struct swreg011_cfg_para { ++ u32 reserve0 : 9; ++ u32 dec_timeout_dis : 1; ++ u32 reserve1 : 22; ++ } reg011; ++ ++ struct swreg012_cache_hash_mask { ++ u32 reserve0 : 7; ++ u32 cache_hash_mask : 25; ++ } reg012; ++ ++ u32 reg013_core_timeout_threshold; ++ ++ struct swreg014_line_irq_ctrl { ++ u32 dec_line_irq_step : 16; ++ u32 dec_line_offset_y_st : 16; ++ } reg014; ++ ++ struct swreg015_irq_sta { ++ u32 rkvdec_frame_rdy_sta : 1; ++ u32 rkvdec_strm_error_sta : 1; ++ u32 rkvdec_core_timeout_sta : 1; ++ u32 rkvdec_ip_timeout_sta : 1; ++ u32 rkvdec_bus_error_sta : 1; ++ u32 rkvdec_buffer_empty_sta : 1; ++ u32 rkvdec_colmv_ref_error_sta : 1; ++ u32 rkvdec_error_spread_sta : 1; ++ u32 create_core_timeout_sta : 1; ++ u32 wlast_miss_match_sta : 1; ++ u32 rkvdec_core_rst_rdy_sta : 1; ++ u32 rkvdec_ip_rst_rdy_sta : 1; ++ u32 force_busidle_rdy_sta : 1; ++ u32 ltb_pause_rdy_sta : 1; ++ u32 ltb_end_flag : 1; ++ u32 unsupport_decmode_error_sta : 1; ++ u32 wmask_bits : 15; ++ u32 reserve0 : 1; ++ } reg015; ++ ++ struct swreg016_error_ctrl_set { ++ u32 error_proc_disable : 1; ++ u32 reserve0 : 7; ++ u32 error_spread_disable : 1; ++ u32 reserve1 : 15; ++ u32 roi_error_ctu_cal_en : 1; ++ u32 reserve2 : 7; ++ } reg016; ++ ++ struct swreg017_err_roi_ctu_offset_start { ++ u32 roi_x_ctu_offset_st : 12; ++ u32 reserve0 : 4; ++ u32 roi_y_ctu_offset_st : 12; ++ u32 reserve1 : 4; ++ } reg017; ++ ++ struct swreg018_err_roi_ctu_offset_end { ++ u32 roi_x_ctu_offset_end : 12; ++ u32 reserve0 : 4; ++ u32 roi_y_ctu_offset_end : 12; ++ u32 reserve1 : 4; ++ } reg018; ++ ++ struct swreg019_error_ref_info { ++ u32 avs2_ref_error_field : 1; ++ u32 avs2_ref_error_topfield : 1; ++ u32 ref_error_topfield_used : 1; ++ u32 ref_error_botfield_used : 1; ++ u32 reserve0 : 28; ++ } reg019; ++ ++ u32 reg020_cabac_error_en_lowbits; ++ u32 reg021_cabac_error_en_highbits; ++ ++ u32 reg022_reserved; ++ ++ struct swreg023_invalid_pixel_fill { ++ u32 fill_y : 10; ++ u32 fill_u : 10; ++ u32 fill_v : 10; ++ u32 reserve0 : 2; ++ } reg023; ++ ++ u32 reg024_026_reserved[3]; ++ ++ struct swreg027_align_en { ++ u32 reserve0 : 4; ++ u32 ctu_align_wr_en : 1; ++ u32 reserve1 : 27; ++ } reg027; ++ ++ struct swreg028_debug_perf_latency_ctrl0 { ++ u32 axi_perf_work_e : 1; ++ u32 reserve0 : 2; ++ u32 axi_cnt_type : 1; ++ u32 rd_latency_id : 8; ++ u32 reserve1 : 4; ++ u32 rd_latency_thr : 12; ++ u32 reserve2 : 4; ++ } reg028; ++ ++ struct swreg029_debug_perf_latency_ctrl1 { ++ u32 addr_align_type : 2; ++ u32 ar_cnt_id_type : 1; ++ u32 aw_cnt_id_type : 1; ++ u32 ar_count_id : 8; ++ u32 reserve0 : 4; ++ u32 aw_count_id : 8; ++ u32 rd_band_width_mode : 1; ++ u32 reserve1 : 7; ++ } reg029; ++ ++ struct swreg030_qos_ctrl { ++ u32 axi_wr_qos_level : 4; ++ u32 reserve0 : 4; ++ u32 axi_wr_qos : 4; ++ u32 reserve1 : 4; ++ u32 axi_rd_qos_level : 4; ++ u32 reserve2 : 4; ++ u32 axi_rd_qos : 4; ++ u32 reserve3 : 4; ++ } reg030; ++}; ++ ++struct vdpu383_regs_common_addr { ++ u32 reg128_strm_base; ++ u32 reg129_rps_base; ++ u32 reg130_cabactbl_base; ++ u32 reg131_gbl_base; ++ u32 reg132_scanlist_addr; ++ u32 reg133_scale_down_base; ++ u32 reg134_fgs_base; ++ u32 reg135_139_reserved[5]; ++ ++ struct rcb_info { ++ u32 offset; ++ u32 size; ++ } reg140_162_rcb_info[11]; ++}; ++ ++struct vdpu383_regs_h26x_addr { ++ u32 reg168_decout_base; ++ u32 reg169_error_ref_base; ++ u32 reg170_185_ref_base[16]; ++ u32 reg186_191_reserved[6]; ++ u32 reg192_payload_st_cur_base; ++ u32 reg193_fbc_payload_offset; ++ u32 reg194_payload_st_error_ref_base; ++ u32 reg195_210_payload_st_ref_base[16]; ++ u32 reg211_215_reserved[5]; ++ u32 reg216_colmv_cur_base; ++ u32 reg217_232_colmv_ref_base[16]; ++}; ++ ++struct vdpu383_regs_h26x_params { ++ u32 reg064_start_decoder; ++ u32 reg065_strm_start_bit; ++ u32 reg066_stream_len; ++ u32 reg067_global_len; ++ u32 reg068_hor_virstride; ++ u32 reg069_raster_uv_hor_virstride; ++ u32 reg070_y_virstride; ++ u32 reg071_scl_ref_hor_virstride; ++ u32 reg072_scl_ref_raster_uv_hor_virstride; ++ u32 reg073_scl_ref_virstride; ++ u32 reg074_fgs_ref_hor_virstride; ++ u32 reg075_079_reserved[5]; ++ u32 reg080_error_ref_hor_virstride; ++ u32 reg081_error_ref_raster_uv_hor_virstride; ++ u32 reg082_error_ref_virstride; ++ u32 reg083_ref0_hor_virstride; ++ u32 reg084_ref0_raster_uv_hor_virstride; ++ u32 reg085_ref0_virstride; ++ u32 reg086_ref1_hor_virstride; ++ u32 reg087_ref1_raster_uv_hor_virstride; ++ u32 reg088_ref1_virstride; ++ u32 reg089_ref2_hor_virstride; ++ u32 reg090_ref2_raster_uv_hor_virstride; ++ u32 reg091_ref2_virstride; ++ u32 reg092_ref3_hor_virstride; ++ u32 reg093_ref3_raster_uv_hor_virstride; ++ u32 reg094_ref3_virstride; ++ u32 reg095_ref4_hor_virstride; ++ u32 reg096_ref4_raster_uv_hor_virstride; ++ u32 reg097_ref4_virstride; ++ u32 reg098_ref5_hor_virstride; ++ u32 reg099_ref5_raster_uv_hor_virstride; ++ u32 reg100_ref5_virstride; ++ u32 reg101_ref6_hor_virstride; ++ u32 reg102_ref6_raster_uv_hor_virstride; ++ u32 reg103_ref6_virstride; ++ u32 reg104_ref7_hor_virstride; ++ u32 reg105_ref7_raster_uv_hor_virstride; ++ u32 reg106_ref7_virstride; ++}; ++ ++struct vdpu383_regs_h26x { ++ struct vdpu383_regs_common common; /* 8-30 */ ++ struct vdpu383_regs_h26x_params h26x_params; /* 64-74, 80-106 */ ++ struct vdpu383_regs_common_addr common_addr; /* 128-134, 140-161 */ ++ struct vdpu383_regs_h26x_addr h26x_addr; /* 168-185, 192-210, 216-232 */ ++} __packed; ++ ++#endif /* __RKVDEC_VDPU838_REGS_H__ */ +diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec.c b/drivers/media/platform/rockchip/rkvdec/rkvdec.c +index b8efee7af74c..ad8ab9d37add 100644 +--- a/drivers/media/platform/rockchip/rkvdec/rkvdec.c ++++ b/drivers/media/platform/rockchip/rkvdec/rkvdec.c +@@ -9,6 +9,7 @@ + * Copyright (C) 2011 Samsung Electronics Co., Ltd. + */ + ++#include + #include + #include + #include +@@ -30,6 +31,7 @@ + #include "rkvdec.h" + #include "rkvdec-regs.h" + #include "rkvdec-vdpu381-regs.h" ++#include "rkvdec-vdpu383-regs.h" + #include "rkvdec-rcb.h" + + static bool rkvdec_image_fmt_match(enum rkvdec_image_fmt fmt1, +@@ -121,6 +123,16 @@ static int vdpu38x_fill_pixfmt_mp(struct v4l2_pix_format_mplane *pix_mp, u32 pix + return 0; + } + ++static u32 rkvdec_colmv_size(u16 width, u16 height) ++{ ++ return 128 * DIV_ROUND_UP(width, 16) * DIV_ROUND_UP(height, 16); ++} ++ ++static u32 rkvdec_vdpu383_colmv_size(u16 width, u16 height) ++{ ++ return ALIGN(width, 64) * ALIGN(height, 16); ++} ++ + static void rkvdec_fill_decoded_pixfmt(struct rkvdec_ctx *ctx, + struct v4l2_pix_format_mplane *pix_mp) + { +@@ -130,9 +142,7 @@ static void rkvdec_fill_decoded_pixfmt(struct rkvdec_ctx *ctx, + + ctx->colmv_offset = pix_mp->plane_fmt[0].sizeimage; + +- pix_mp->plane_fmt[0].sizeimage += 128 * +- DIV_ROUND_UP(pix_mp->width, 16) * +- DIV_ROUND_UP(pix_mp->height, 16); ++ pix_mp->plane_fmt[0].sizeimage += cfg->colmv_size(pix_mp->width, pix_mp->height); + } + + static void rkvdec_reset_fmt(struct rkvdec_ctx *ctx, struct v4l2_format *f, +@@ -251,17 +261,6 @@ static const struct rkvdec_ctrls rkvdec_hevc_ctrls = { + .num_ctrls = ARRAY_SIZE(rkvdec_hevc_ctrl_descs), + }; + +-static const struct rkvdec_decoded_fmt_desc rkvdec_hevc_decoded_fmts[] = { +- { +- .fourcc = V4L2_PIX_FMT_NV12, +- .image_fmt = RKVDEC_IMG_FMT_420_8BIT, +- }, +- { +- .fourcc = V4L2_PIX_FMT_NV15, +- .image_fmt = RKVDEC_IMG_FMT_420_10BIT, +- }, +-}; +- + static const struct rkvdec_ctrl_desc rkvdec_h264_ctrl_descs[] = { + { + .cfg.id = V4L2_CID_STATELESS_H264_DECODE_PARAMS, +@@ -309,6 +308,60 @@ static const struct rkvdec_ctrls rkvdec_h264_ctrls = { + .num_ctrls = ARRAY_SIZE(rkvdec_h264_ctrl_descs), + }; + ++static const struct rkvdec_ctrl_desc vdpu38x_hevc_ctrl_descs[] = { ++ { ++ .cfg.id = V4L2_CID_STATELESS_HEVC_DECODE_PARAMS, ++ }, ++ { ++ .cfg.id = V4L2_CID_STATELESS_HEVC_SPS, ++ .cfg.ops = &rkvdec_ctrl_ops, ++ }, ++ { ++ .cfg.id = V4L2_CID_STATELESS_HEVC_PPS, ++ }, ++ { ++ .cfg.id = V4L2_CID_STATELESS_HEVC_SCALING_MATRIX, ++ }, ++ { ++ .cfg.id = V4L2_CID_STATELESS_HEVC_DECODE_MODE, ++ .cfg.min = V4L2_STATELESS_HEVC_DECODE_MODE_FRAME_BASED, ++ .cfg.max = V4L2_STATELESS_HEVC_DECODE_MODE_FRAME_BASED, ++ .cfg.def = V4L2_STATELESS_HEVC_DECODE_MODE_FRAME_BASED, ++ }, ++ { ++ .cfg.id = V4L2_CID_STATELESS_HEVC_START_CODE, ++ .cfg.min = V4L2_STATELESS_HEVC_START_CODE_ANNEX_B, ++ .cfg.def = V4L2_STATELESS_HEVC_START_CODE_ANNEX_B, ++ .cfg.max = V4L2_STATELESS_HEVC_START_CODE_ANNEX_B, ++ }, ++ { ++ .cfg.id = V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, ++ .cfg.min = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, ++ .cfg.max = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10, ++ .cfg.menu_skip_mask = ++ BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE), ++ .cfg.def = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, ++ }, ++ { ++ .cfg.id = V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, ++ .cfg.min = V4L2_MPEG_VIDEO_HEVC_LEVEL_1, ++ .cfg.max = V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1, ++ }, ++ { ++ .cfg.id = V4L2_CID_STATELESS_HEVC_EXT_SPS_ST_RPS, ++ .cfg.dims = { 65 }, ++ }, ++ { ++ .cfg.id = V4L2_CID_STATELESS_HEVC_EXT_SPS_LT_RPS, ++ .cfg.dims = { 65 }, ++ }, ++}; ++ ++static const struct rkvdec_ctrls vdpu38x_hevc_ctrls = { ++ .ctrls = vdpu38x_hevc_ctrl_descs, ++ .num_ctrls = ARRAY_SIZE(vdpu38x_hevc_ctrl_descs), ++}; ++ + static const struct rkvdec_decoded_fmt_desc rkvdec_h264_decoded_fmts[] = { + { + .fourcc = V4L2_PIX_FMT_NV12, +@@ -328,6 +381,17 @@ static const struct rkvdec_decoded_fmt_desc rkvdec_h264_decoded_fmts[] = { + }, + }; + ++static const struct rkvdec_decoded_fmt_desc rkvdec_hevc_decoded_fmts[] = { ++ { ++ .fourcc = V4L2_PIX_FMT_NV12, ++ .image_fmt = RKVDEC_IMG_FMT_420_8BIT, ++ }, ++ { ++ .fourcc = V4L2_PIX_FMT_NV15, ++ .image_fmt = RKVDEC_IMG_FMT_420_10BIT, ++ }, ++}; ++ + static const struct rkvdec_ctrl_desc rkvdec_vp9_ctrl_descs[] = { + { + .cfg.id = V4L2_CID_STATELESS_VP9_FRAME, +@@ -425,6 +489,43 @@ static const struct rkvdec_coded_fmt_desc vdpu381_coded_fmts[] = { + .subsystem_flags = VB2_V4L2_FL_SUPPORTS_M2M_HOLD_CAPTURE_BUF, + .capability = RKVDEC_CAPABILITY_H264, + }, ++ { ++ .fourcc = V4L2_PIX_FMT_HEVC_SLICE, ++ .frmsize = { ++ .min_width = 16, ++ .max_width = 65472, ++ .step_width = 16, ++ .min_height = 16, ++ .max_height = 65472, ++ .step_height = 16, ++ }, ++ .ctrls = &vdpu38x_hevc_ctrls, ++ .ops = &rkvdec_vdpu381_hevc_fmt_ops, ++ .num_decoded_fmts = ARRAY_SIZE(rkvdec_hevc_decoded_fmts), ++ .decoded_fmts = rkvdec_hevc_decoded_fmts, ++ .subsystem_flags = VB2_V4L2_FL_SUPPORTS_M2M_HOLD_CAPTURE_BUF, ++ .capability = RKVDEC_CAPABILITY_HEVC, ++ }, ++}; ++ ++static const struct rkvdec_coded_fmt_desc vdpu383_coded_fmts[] = { ++ { ++ .fourcc = V4L2_PIX_FMT_H264_SLICE, ++ .frmsize = { ++ .min_width = 64, ++ .max_width = 65520, ++ .step_width = 64, ++ .min_height = 16, ++ .max_height = 65520, ++ .step_height = 16, ++ }, ++ .ctrls = &rkvdec_h264_ctrls, ++ .ops = &rkvdec_vdpu383_h264_fmt_ops, ++ .num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_decoded_fmts), ++ .decoded_fmts = rkvdec_h264_decoded_fmts, ++ .subsystem_flags = VB2_V4L2_FL_SUPPORTS_M2M_HOLD_CAPTURE_BUF, ++ .capability = RKVDEC_CAPABILITY_H264, ++ }, + }; + + static bool rkvdec_is_capable(struct rkvdec_ctx *ctx, unsigned int capability) +@@ -1330,6 +1431,35 @@ static irqreturn_t vdpu381_irq_handler(struct rkvdec_ctx *ctx) + return IRQ_HANDLED; + } + ++static irqreturn_t vdpu383_irq_handler(struct rkvdec_ctx *ctx) ++{ ++ struct rkvdec_dev *rkvdec = ctx->dev; ++ enum vb2_buffer_state state; ++ bool need_reset = 0; ++ u32 status; ++ ++ status = readl(rkvdec->link + VDPU383_LINK_STA_INT); ++ writel(FIELD_PREP_WM16(VDPU383_STA_INT_ALL, 0), rkvdec->link + VDPU383_LINK_STA_INT); ++ /* On vdpu383, the interrupts must be disabled */ ++ writel(FIELD_PREP_WM16(VDPU383_INT_EN_IRQ | VDPU383_INT_EN_LINE_IRQ, 0), ++ rkvdec->link + VDPU383_LINK_INT_EN); ++ ++ if (status & VDPU383_STA_INT_DEC_RDY_STA) { ++ state = VB2_BUF_STATE_DONE; ++ } else { ++ state = VB2_BUF_STATE_ERROR; ++ rkvdec_iommu_restore(rkvdec); ++ } ++ ++ if (need_reset) ++ rkvdec_iommu_restore(rkvdec); ++ ++ if (cancel_delayed_work(&rkvdec->watchdog_work)) ++ rkvdec_job_finish(ctx, state); ++ ++ return IRQ_HANDLED; ++} ++ + static irqreturn_t rkvdec_irq_handler(int irq, void *priv) + { + struct rkvdec_dev *rkvdec = priv; +@@ -1402,6 +1532,7 @@ static const struct rkvdec_config config_rkvdec = { + .coded_fmts_num = ARRAY_SIZE(rkvdec_coded_fmts), + .irq_handler = rk3399_irq_handler, + .fill_pixfmt_mp = v4l2_fill_pixfmt_mp, ++ .colmv_size = rkvdec_colmv_size, + }; + + static struct rcb_size_info vdpu381_rcb_sizes[] = { +@@ -1424,6 +1555,33 @@ static const struct rkvdec_config config_vdpu381 = { + .rcb_num = ARRAY_SIZE(vdpu381_rcb_sizes), + .irq_handler = vdpu381_irq_handler, + .fill_pixfmt_mp = vdpu38x_fill_pixfmt_mp, ++ .colmv_size = rkvdec_colmv_size, ++ .named_regs = true, ++}; ++ ++static struct rcb_size_info vdpu383_rcb_sizes[] = { ++ {6, PIC_WIDTH}, // streamd ++ {6, PIC_WIDTH}, // streamd_tile ++ {12, PIC_WIDTH}, // inter ++ {12, PIC_WIDTH}, // inter_tile ++ {16, PIC_WIDTH}, // intra ++ {10, PIC_WIDTH}, // intra_tile ++ {120, PIC_WIDTH}, // filterd ++ {120, PIC_WIDTH}, // filterd_protect ++ {120, PIC_WIDTH}, // filterd_tile_row ++ {180, PIC_HEIGHT}, // filterd_tile_col ++}; ++ ++const struct rkvdec_config config_vdpu383 = { ++ .coded_fmts = (struct rkvdec_coded_fmt_desc *)vdpu383_coded_fmts, ++ .coded_fmts_num = ARRAY_SIZE(vdpu383_coded_fmts), ++ .rcb_size_info = vdpu383_rcb_sizes, ++ .rcb_num = ARRAY_SIZE(vdpu383_rcb_sizes), ++ .irq_handler = vdpu383_irq_handler, ++ .fill_pixfmt_mp = vdpu38x_fill_pixfmt_mp, ++ .colmv_size = rkvdec_vdpu383_colmv_size, ++ .fill_pixfmt_mp = vdpu38x_fill_pixfmt_mp, ++ .named_regs = true, + }; + + static const struct rkvdec_variant rk3288_rkvdec_variant = { +@@ -1451,6 +1609,12 @@ static const struct rkvdec_variant rk3399_rkvdec_variant = { + + static const struct rkvdec_variant rk3588_vdpu381_variant = { + .config = &config_vdpu381, ++ .capabilities = RKVDEC_CAPABILITY_H264 | ++ RKVDEC_CAPABILITY_HEVC, ++}; ++ ++static const struct rkvdec_variant rk3576_vdpu383_variant = { ++ .config = &config_vdpu383, + .capabilities = RKVDEC_CAPABILITY_H264, + }; + +@@ -1471,6 +1635,10 @@ static const struct of_device_id of_rkvdec_match[] = { + .compatible = "rockchip,rk3588-vdec", + .data = &rk3588_vdpu381_variant, + }, ++ { ++ .compatible = "rockchip,rk3576-vdec", ++ .data = &rk3576_vdpu383_variant ++ }, + { /* sentinel */ } + }; + MODULE_DEVICE_TABLE(of, of_rkvdec_match); +@@ -1509,9 +1677,19 @@ static int rkvdec_probe(struct platform_device *pdev) + rkvdec->clk_count = ret; + rkvdec->axi_clk = devm_clk_get(&pdev->dev, "axi"); + +- rkvdec->regs = devm_platform_ioremap_resource(pdev, 0); +- if (IS_ERR(rkvdec->regs)) +- return PTR_ERR(rkvdec->regs); ++ if (rkvdec->config->named_regs) { ++ rkvdec->regs = devm_platform_ioremap_resource_byname(pdev, "function"); ++ if (IS_ERR(rkvdec->regs)) ++ return PTR_ERR(rkvdec->regs); ++ ++ rkvdec->link = devm_platform_ioremap_resource_byname(pdev, "link"); ++ if (IS_ERR(rkvdec->link)) ++ return PTR_ERR(rkvdec->link); ++ } else { ++ rkvdec->regs = devm_platform_ioremap_resource(pdev, 0); ++ if (IS_ERR(rkvdec->regs)) ++ return PTR_ERR(rkvdec->regs); ++ } + + ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); + if (ret) { +diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec.h b/drivers/media/platform/rockchip/rkvdec/rkvdec.h +index 23c5237de5f7..33cd3406b5ea 100644 +--- a/drivers/media/platform/rockchip/rkvdec/rkvdec.h ++++ b/drivers/media/platform/rockchip/rkvdec/rkvdec.h +@@ -124,6 +124,8 @@ struct rkvdec_config { + irqreturn_t (*irq_handler)(struct rkvdec_ctx *ctx); + int (*fill_pixfmt_mp)(struct v4l2_pix_format_mplane *pix_mp, u32 pixelformat, + u32 width, u32 height); ++ u32 (*colmv_size)(u16 width, u16 height); ++ bool named_regs; + }; + + struct rkvdec_dev { +@@ -136,6 +138,7 @@ struct rkvdec_dev { + unsigned int clk_count; + struct clk *axi_clk; + void __iomem *regs; ++ void __iomem *link; + struct mutex vdev_lock; /* serializes ioctls */ + struct delayed_work watchdog_work; + struct gen_pool *sram_pool; +@@ -180,13 +183,18 @@ struct rkvdec_aux_buf { + void rkvdec_run_preamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run); + void rkvdec_run_postamble(struct rkvdec_ctx *ctx, struct rkvdec_run *run); + void rkvdec_memcpy_toio(void __iomem *dst, void *src, size_t len); +- + void rkvdec_quirks_disable_qos(struct rkvdec_ctx *ctx); + ++/* RKVDEC ops */ + extern const struct rkvdec_coded_fmt_ops rkvdec_h264_fmt_ops; + extern const struct rkvdec_coded_fmt_ops rkvdec_hevc_fmt_ops; + extern const struct rkvdec_coded_fmt_ops rkvdec_vp9_fmt_ops; + ++/* VDPU381 ops */ + extern const struct rkvdec_coded_fmt_ops rkvdec_vdpu381_h264_fmt_ops; ++extern const struct rkvdec_coded_fmt_ops rkvdec_vdpu381_hevc_fmt_ops; ++ ++/* VDPU383 ops */ ++extern const struct rkvdec_coded_fmt_ops rkvdec_vdpu383_h264_fmt_ops; + + #endif /* RKVDEC_H_ */ +-- +2.34.1 + diff --git a/packages/linux/patches/rockchip/rockchip-0078-DETLEV-v3-media-rkvdec-Add-HEVC-support-for-the-VDPU.patch b/packages/linux/patches/rockchip/rockchip-0079-DETLEV-v3-media-rkvdec-Add-HEVC-support-for-the-VDPU.patch similarity index 99% rename from packages/linux/patches/rockchip/rockchip-0078-DETLEV-v3-media-rkvdec-Add-HEVC-support-for-the-VDPU.patch rename to packages/linux/patches/rockchip/rockchip-0079-DETLEV-v3-media-rkvdec-Add-HEVC-support-for-the-VDPU.patch index eec80a3816..40a89880ee 100644 --- a/packages/linux/patches/rockchip/rockchip-0078-DETLEV-v3-media-rkvdec-Add-HEVC-support-for-the-VDPU.patch +++ b/packages/linux/patches/rockchip/rockchip-0079-DETLEV-v3-media-rkvdec-Add-HEVC-support-for-the-VDPU.patch @@ -1,7 +1,7 @@ -From af045fc82a6d6ae0bcf8a0539317771a044644d1 Mon Sep 17 00:00:00 2001 +From 056194f77cd326c5db064daf90df3720b006f920 Mon Sep 17 00:00:00 2001 From: Detlev Casanova Date: Wed, 11 Jun 2025 17:04:28 -0400 -Subject: [PATCH 078/110] DETLEV(v3): media: rkvdec: Add HEVC support for the +Subject: [PATCH 079/113] DETLEV(v3): media: rkvdec: Add HEVC support for the VDPU383 variant The VDPU383 decoder is used on the RK3576 SoC and has support for HEVC. diff --git a/packages/linux/patches/rockchip/rockchip-0079-FROMLIST-v1-phy-rockchip-samsung-hdptx-Fix-reported-.patch b/packages/linux/patches/rockchip/rockchip-0080-FROMLIST-v1-phy-rockchip-samsung-hdptx-Fix-reported-.patch similarity index 95% rename from packages/linux/patches/rockchip/rockchip-0079-FROMLIST-v1-phy-rockchip-samsung-hdptx-Fix-reported-.patch rename to packages/linux/patches/rockchip/rockchip-0080-FROMLIST-v1-phy-rockchip-samsung-hdptx-Fix-reported-.patch index 9b83feb346..35f5d1ef8e 100644 --- a/packages/linux/patches/rockchip/rockchip-0079-FROMLIST-v1-phy-rockchip-samsung-hdptx-Fix-reported-.patch +++ b/packages/linux/patches/rockchip/rockchip-0080-FROMLIST-v1-phy-rockchip-samsung-hdptx-Fix-reported-.patch @@ -1,7 +1,7 @@ -From 2836f0010a51847c8f2a42f241d758f699190930 Mon Sep 17 00:00:00 2001 +From 41e5fedc7c85557b5530b346db9f90b73658be20 Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Mon, 28 Jul 2025 22:52:42 +0300 -Subject: [PATCH 079/110] FROMLIST(v1): phy: rockchip: samsung-hdptx: Fix +Subject: [PATCH 080/113] FROMLIST(v1): phy: rockchip: samsung-hdptx: Fix reported clock rate in high bpc mode When making use of the clock provider functionality, the output clock diff --git a/packages/linux/patches/rockchip/rockchip-0080-FROMLIST-v1-phy-rockchip-samsung-hdptx-Reduce-ROPLL-.patch b/packages/linux/patches/rockchip/rockchip-0081-FROMLIST-v1-phy-rockchip-samsung-hdptx-Reduce-ROPLL-.patch similarity index 93% rename from packages/linux/patches/rockchip/rockchip-0080-FROMLIST-v1-phy-rockchip-samsung-hdptx-Reduce-ROPLL-.patch rename to packages/linux/patches/rockchip/rockchip-0081-FROMLIST-v1-phy-rockchip-samsung-hdptx-Reduce-ROPLL-.patch index d61dd52048..0234f05681 100644 --- a/packages/linux/patches/rockchip/rockchip-0080-FROMLIST-v1-phy-rockchip-samsung-hdptx-Reduce-ROPLL-.patch +++ b/packages/linux/patches/rockchip/rockchip-0081-FROMLIST-v1-phy-rockchip-samsung-hdptx-Reduce-ROPLL-.patch @@ -1,7 +1,7 @@ -From 167c040d12d9b3dc16fa4ebf28e68a887b759527 Mon Sep 17 00:00:00 2001 +From 05cceaa47b83ac21458e296311c6d024418363ea Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Thu, 5 Jun 2025 20:09:27 +0300 -Subject: [PATCH 080/110] FROMLIST(v1): phy: rockchip: samsung-hdptx: Reduce +Subject: [PATCH 081/113] FROMLIST(v1): phy: rockchip: samsung-hdptx: Reduce ROPLL loop bandwidth Due to its relatively low frequency, a noise stemming from the 24MHz PLL diff --git a/packages/linux/patches/rockchip/rockchip-0081-FROMLIST-v1-phy-rockchip-samsung-hdptx-Prevent-Inter.patch b/packages/linux/patches/rockchip/rockchip-0082-FROMLIST-v1-phy-rockchip-samsung-hdptx-Prevent-Inter.patch similarity index 93% rename from packages/linux/patches/rockchip/rockchip-0081-FROMLIST-v1-phy-rockchip-samsung-hdptx-Prevent-Inter.patch rename to packages/linux/patches/rockchip/rockchip-0082-FROMLIST-v1-phy-rockchip-samsung-hdptx-Prevent-Inter.patch index 15b933e8d3..4d3f25fbe3 100644 --- a/packages/linux/patches/rockchip/rockchip-0081-FROMLIST-v1-phy-rockchip-samsung-hdptx-Prevent-Inter.patch +++ b/packages/linux/patches/rockchip/rockchip-0082-FROMLIST-v1-phy-rockchip-samsung-hdptx-Prevent-Inter.patch @@ -1,7 +1,7 @@ -From 9c31071f0029afa91b2b377886797e4d6c199c17 Mon Sep 17 00:00:00 2001 +From e7c818d4e5eef9dea9a7ec5697438f7cec9ecaec Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Thu, 5 Jun 2025 22:33:29 +0300 -Subject: [PATCH 081/110] FROMLIST(v1): phy: rockchip: samsung-hdptx: Prevent +Subject: [PATCH 082/113] FROMLIST(v1): phy: rockchip: samsung-hdptx: Prevent Inter-Pair Skew from exceeding the limits Fixup PHY deskew FIFO to prevent the phase of D2 lane going ahead of diff --git a/packages/linux/patches/rockchip/rockchip-0082-FROMLIST-v4-phy-hdmi-Add-HDMI-2.1-FRL-configuration-.patch b/packages/linux/patches/rockchip/rockchip-0083-FROMLIST-v4-phy-hdmi-Add-HDMI-2.1-FRL-configuration-.patch similarity index 93% rename from packages/linux/patches/rockchip/rockchip-0082-FROMLIST-v4-phy-hdmi-Add-HDMI-2.1-FRL-configuration-.patch rename to packages/linux/patches/rockchip/rockchip-0083-FROMLIST-v4-phy-hdmi-Add-HDMI-2.1-FRL-configuration-.patch index 86f8b5c2f1..f9f47e9ee5 100644 --- a/packages/linux/patches/rockchip/rockchip-0082-FROMLIST-v4-phy-hdmi-Add-HDMI-2.1-FRL-configuration-.patch +++ b/packages/linux/patches/rockchip/rockchip-0083-FROMLIST-v4-phy-hdmi-Add-HDMI-2.1-FRL-configuration-.patch @@ -1,7 +1,7 @@ -From 7c459a4883b48c84f732104b5db49fa06b712bd4 Mon Sep 17 00:00:00 2001 +From 92669460ec6eb825092e949ddcdbaa73ba5774c7 Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Fri, 30 May 2025 00:56:48 +0300 -Subject: [PATCH 082/110] FROMLIST(v4): phy: hdmi: Add HDMI 2.1 FRL +Subject: [PATCH 083/113] FROMLIST(v4): phy: hdmi: Add HDMI 2.1 FRL configuration options The HDMI 2.1 specification introduced the Fixed Rate Link (FRL) mode, diff --git a/packages/linux/patches/rockchip/rockchip-0083-FROMLIST-v4-phy-rockchip-samsung-hdptx-Use-usleep_ra.patch b/packages/linux/patches/rockchip/rockchip-0084-FROMLIST-v4-phy-rockchip-samsung-hdptx-Use-usleep_ra.patch similarity index 89% rename from packages/linux/patches/rockchip/rockchip-0083-FROMLIST-v4-phy-rockchip-samsung-hdptx-Use-usleep_ra.patch rename to packages/linux/patches/rockchip/rockchip-0084-FROMLIST-v4-phy-rockchip-samsung-hdptx-Use-usleep_ra.patch index 8d612428bb..739f4a8c13 100644 --- a/packages/linux/patches/rockchip/rockchip-0083-FROMLIST-v4-phy-rockchip-samsung-hdptx-Use-usleep_ra.patch +++ b/packages/linux/patches/rockchip/rockchip-0084-FROMLIST-v4-phy-rockchip-samsung-hdptx-Use-usleep_ra.patch @@ -1,7 +1,7 @@ -From fd6314b174f0fccd6854f7147768daced7b1a407 Mon Sep 17 00:00:00 2001 +From dc52428feeb98a29d91e3ae652040ccc1f41c29e Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Wed, 28 May 2025 13:21:49 +0300 -Subject: [PATCH 083/110] FROMLIST(v4): phy: rockchip: samsung-hdptx: Use +Subject: [PATCH 084/113] FROMLIST(v4): phy: rockchip: samsung-hdptx: Use usleep_range() instead of udelay() rk_hdptx_dp_reset() is allowed to sleep, hence replace the busy waiting diff --git a/packages/linux/patches/rockchip/rockchip-0084-FROMLIST-v4-phy-rockchip-samsung-hdptx-Fix-coding-st.patch b/packages/linux/patches/rockchip/rockchip-0085-FROMLIST-v4-phy-rockchip-samsung-hdptx-Fix-coding-st.patch similarity index 95% rename from packages/linux/patches/rockchip/rockchip-0084-FROMLIST-v4-phy-rockchip-samsung-hdptx-Fix-coding-st.patch rename to packages/linux/patches/rockchip/rockchip-0085-FROMLIST-v4-phy-rockchip-samsung-hdptx-Fix-coding-st.patch index 3b7105af41..b6f73c6a5c 100644 --- a/packages/linux/patches/rockchip/rockchip-0084-FROMLIST-v4-phy-rockchip-samsung-hdptx-Fix-coding-st.patch +++ b/packages/linux/patches/rockchip/rockchip-0085-FROMLIST-v4-phy-rockchip-samsung-hdptx-Fix-coding-st.patch @@ -1,7 +1,7 @@ -From 4a16f714180e2b7a63eda6e4bf0a8a9418f4d081 Mon Sep 17 00:00:00 2001 +From ef3ff806713c94874e7d5c0e20de2c6ef4cdedc9 Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Wed, 28 May 2025 13:35:01 +0300 -Subject: [PATCH 084/110] FROMLIST(v4): phy: rockchip: samsung-hdptx: Fix +Subject: [PATCH 085/113] FROMLIST(v4): phy: rockchip: samsung-hdptx: Fix coding style alignment Handle a bunch of reported checkpatch.pl complaints: diff --git a/packages/linux/patches/rockchip/rockchip-0085-FROMLIST-v4-phy-rockchip-samsung-hdptx-Consistently-.patch b/packages/linux/patches/rockchip/rockchip-0086-FROMLIST-v4-phy-rockchip-samsung-hdptx-Consistently-.patch similarity index 98% rename from packages/linux/patches/rockchip/rockchip-0085-FROMLIST-v4-phy-rockchip-samsung-hdptx-Consistently-.patch rename to packages/linux/patches/rockchip/rockchip-0086-FROMLIST-v4-phy-rockchip-samsung-hdptx-Consistently-.patch index 2b3bcb14ee..aa98d830c2 100644 --- a/packages/linux/patches/rockchip/rockchip-0085-FROMLIST-v4-phy-rockchip-samsung-hdptx-Consistently-.patch +++ b/packages/linux/patches/rockchip/rockchip-0086-FROMLIST-v4-phy-rockchip-samsung-hdptx-Consistently-.patch @@ -1,7 +1,7 @@ -From 6dfe0d91db0a5c01afb03ccd6222fb3905083bb6 Mon Sep 17 00:00:00 2001 +From adb8f2dd3193eca7a152c06bbc7cbef02fd8ae2a Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Wed, 4 Jun 2025 12:03:11 +0300 -Subject: [PATCH 085/110] FROMLIST(v4): phy: rockchip: samsung-hdptx: +Subject: [PATCH 086/113] FROMLIST(v4): phy: rockchip: samsung-hdptx: Consistently use [rk_]hdptx_[tmds_] prefixes Fix the naming inconsistencies for some of the functions and global diff --git a/packages/linux/patches/rockchip/rockchip-0086-FROMLIST-v4-phy-rockchip-samsung-hdptx-Enable-lane-o.patch b/packages/linux/patches/rockchip/rockchip-0087-FROMLIST-v4-phy-rockchip-samsung-hdptx-Enable-lane-o.patch similarity index 93% rename from packages/linux/patches/rockchip/rockchip-0086-FROMLIST-v4-phy-rockchip-samsung-hdptx-Enable-lane-o.patch rename to packages/linux/patches/rockchip/rockchip-0087-FROMLIST-v4-phy-rockchip-samsung-hdptx-Enable-lane-o.patch index b78fcfd34c..21415ba6db 100644 --- a/packages/linux/patches/rockchip/rockchip-0086-FROMLIST-v4-phy-rockchip-samsung-hdptx-Enable-lane-o.patch +++ b/packages/linux/patches/rockchip/rockchip-0087-FROMLIST-v4-phy-rockchip-samsung-hdptx-Enable-lane-o.patch @@ -1,7 +1,7 @@ -From 502427f80bfe0b3fa3536f6dea7904e84a45e3e9 Mon Sep 17 00:00:00 2001 +From 85693440805f264d814dc576ed31d75d3584fcfd Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Wed, 4 Jun 2025 10:25:49 +0300 -Subject: [PATCH 086/110] FROMLIST(v4): phy: rockchip: samsung-hdptx: Enable +Subject: [PATCH 087/113] FROMLIST(v4): phy: rockchip: samsung-hdptx: Enable lane output in common helper In preparation to support FRL mode, move the PHY lane output enablement diff --git a/packages/linux/patches/rockchip/rockchip-0087-FROMLIST-v4-phy-rockchip-samsung-hdptx-Cleanup-_cmn_.patch b/packages/linux/patches/rockchip/rockchip-0088-FROMLIST-v4-phy-rockchip-samsung-hdptx-Cleanup-_cmn_.patch similarity index 97% rename from packages/linux/patches/rockchip/rockchip-0087-FROMLIST-v4-phy-rockchip-samsung-hdptx-Cleanup-_cmn_.patch rename to packages/linux/patches/rockchip/rockchip-0088-FROMLIST-v4-phy-rockchip-samsung-hdptx-Cleanup-_cmn_.patch index 925f19f222..a806c35cc1 100644 --- a/packages/linux/patches/rockchip/rockchip-0087-FROMLIST-v4-phy-rockchip-samsung-hdptx-Cleanup-_cmn_.patch +++ b/packages/linux/patches/rockchip/rockchip-0088-FROMLIST-v4-phy-rockchip-samsung-hdptx-Cleanup-_cmn_.patch @@ -1,7 +1,7 @@ -From 3c7ebf52a0cb4d6ede81b96553e3e7320c91ed4b Mon Sep 17 00:00:00 2001 +From 95ff74ec584df183a1b584f93e45e91419fec0e9 Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Thu, 5 Jun 2025 21:31:22 +0300 -Subject: [PATCH 087/110] FROMLIST(v4): phy: rockchip: samsung-hdptx: Cleanup +Subject: [PATCH 088/113] FROMLIST(v4): phy: rockchip: samsung-hdptx: Cleanup *_cmn_init_seq lists Drop redundant reg_sequence entries from rk_hdptx_common_cmn_init_seq[], diff --git a/packages/linux/patches/rockchip/rockchip-0088-FROMLIST-v4-phy-rockchip-samsung-hdptx-Compute-clk-r.patch b/packages/linux/patches/rockchip/rockchip-0089-FROMLIST-v4-phy-rockchip-samsung-hdptx-Compute-clk-r.patch similarity index 96% rename from packages/linux/patches/rockchip/rockchip-0088-FROMLIST-v4-phy-rockchip-samsung-hdptx-Compute-clk-r.patch rename to packages/linux/patches/rockchip/rockchip-0089-FROMLIST-v4-phy-rockchip-samsung-hdptx-Compute-clk-r.patch index 11b982a409..7a15b8f047 100644 --- a/packages/linux/patches/rockchip/rockchip-0088-FROMLIST-v4-phy-rockchip-samsung-hdptx-Compute-clk-r.patch +++ b/packages/linux/patches/rockchip/rockchip-0089-FROMLIST-v4-phy-rockchip-samsung-hdptx-Compute-clk-r.patch @@ -1,7 +1,7 @@ -From 01dae1b307c3e0455e9dc3b0c0ec1259c9f356a4 Mon Sep 17 00:00:00 2001 +From 3fee78120b2fe4e55bad621f5adc520fe37e3519 Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Fri, 6 Jun 2025 18:18:23 +0300 -Subject: [PATCH 088/110] FROMLIST(v4): phy: rockchip: samsung-hdptx: Compute +Subject: [PATCH 089/113] FROMLIST(v4): phy: rockchip: samsung-hdptx: Compute clk rate from PLL config Improve ->recalc_rate() callback of hdptx_phy_clk_ops to calculate the diff --git a/packages/linux/patches/rockchip/rockchip-0089-FROMLIST-v4-phy-rockchip-samsung-hdptx-Drop-hw_rate-.patch b/packages/linux/patches/rockchip/rockchip-0090-FROMLIST-v4-phy-rockchip-samsung-hdptx-Drop-hw_rate-.patch similarity index 94% rename from packages/linux/patches/rockchip/rockchip-0089-FROMLIST-v4-phy-rockchip-samsung-hdptx-Drop-hw_rate-.patch rename to packages/linux/patches/rockchip/rockchip-0090-FROMLIST-v4-phy-rockchip-samsung-hdptx-Drop-hw_rate-.patch index 5b3340e982..5bc9a06f1c 100644 --- a/packages/linux/patches/rockchip/rockchip-0089-FROMLIST-v4-phy-rockchip-samsung-hdptx-Drop-hw_rate-.patch +++ b/packages/linux/patches/rockchip/rockchip-0090-FROMLIST-v4-phy-rockchip-samsung-hdptx-Drop-hw_rate-.patch @@ -1,7 +1,7 @@ -From 9e6184b5dc7bc77e29d3e0e51f1630dd2e96920e Mon Sep 17 00:00:00 2001 +From 809dafc9a1ec60907dd77324a8193fb06c5218b7 Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Fri, 1 Aug 2025 17:10:15 +0300 -Subject: [PATCH 089/110] FROMLIST(v4): phy: rockchip: samsung-hdptx: Drop +Subject: [PATCH 090/113] FROMLIST(v4): phy: rockchip: samsung-hdptx: Drop hw_rate driver data The ->hw_rate member of struct rk_hdptx_phy was mainly used to keep diff --git a/packages/linux/patches/rockchip/rockchip-0090-FROMLIST-v4-phy-rockchip-samsung-hdptx-Switch-to-dri.patch b/packages/linux/patches/rockchip/rockchip-0091-FROMLIST-v4-phy-rockchip-samsung-hdptx-Switch-to-dri.patch similarity index 98% rename from packages/linux/patches/rockchip/rockchip-0090-FROMLIST-v4-phy-rockchip-samsung-hdptx-Switch-to-dri.patch rename to packages/linux/patches/rockchip/rockchip-0091-FROMLIST-v4-phy-rockchip-samsung-hdptx-Switch-to-dri.patch index 238d69611f..40bbd979fc 100644 --- a/packages/linux/patches/rockchip/rockchip-0090-FROMLIST-v4-phy-rockchip-samsung-hdptx-Switch-to-dri.patch +++ b/packages/linux/patches/rockchip/rockchip-0091-FROMLIST-v4-phy-rockchip-samsung-hdptx-Switch-to-dri.patch @@ -1,7 +1,7 @@ -From 89aae983a503f4dde06d94d17ca403197e743957 Mon Sep 17 00:00:00 2001 +From 6b6748ccc444c2128195fda4430846c885c6c5e8 Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Mon, 7 Jul 2025 23:23:52 +0300 -Subject: [PATCH 090/110] FROMLIST(v4): phy: rockchip: samsung-hdptx: Switch to +Subject: [PATCH 091/113] FROMLIST(v4): phy: rockchip: samsung-hdptx: Switch to driver specific HDMI config In preparation to support the FRL operation mode which gets configured diff --git a/packages/linux/patches/rockchip/rockchip-0091-FROMLIST-v4-phy-rockchip-samsung-hdptx-Extend-rk_hdp.patch b/packages/linux/patches/rockchip/rockchip-0092-FROMLIST-v4-phy-rockchip-samsung-hdptx-Extend-rk_hdp.patch similarity index 96% rename from packages/linux/patches/rockchip/rockchip-0091-FROMLIST-v4-phy-rockchip-samsung-hdptx-Extend-rk_hdp.patch rename to packages/linux/patches/rockchip/rockchip-0092-FROMLIST-v4-phy-rockchip-samsung-hdptx-Extend-rk_hdp.patch index dfa442991d..9ecfe8f241 100644 --- a/packages/linux/patches/rockchip/rockchip-0091-FROMLIST-v4-phy-rockchip-samsung-hdptx-Extend-rk_hdp.patch +++ b/packages/linux/patches/rockchip/rockchip-0092-FROMLIST-v4-phy-rockchip-samsung-hdptx-Extend-rk_hdp.patch @@ -1,7 +1,7 @@ -From 4a4b1ac4f34a8f7d8002b1945b1e12d519db58d1 Mon Sep 17 00:00:00 2001 +From 4f220bddc64a5c8688d0a0d3cd89e45794cd82c2 Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Tue, 8 Jul 2025 12:19:37 +0300 -Subject: [PATCH 091/110] FROMLIST(v4): phy: rockchip: samsung-hdptx: Extend +Subject: [PATCH 092/113] FROMLIST(v4): phy: rockchip: samsung-hdptx: Extend rk_hdptx_phy_verify_hdmi_config() helper In order to facilitate introduction of HDMI 2.1 FRL support and to avoid diff --git a/packages/linux/patches/rockchip/rockchip-0092-FROMLIST-v4-phy-rockchip-samsung-hdptx-Add-HDMI-2.1-.patch b/packages/linux/patches/rockchip/rockchip-0093-FROMLIST-v4-phy-rockchip-samsung-hdptx-Add-HDMI-2.1-.patch similarity index 99% rename from packages/linux/patches/rockchip/rockchip-0092-FROMLIST-v4-phy-rockchip-samsung-hdptx-Add-HDMI-2.1-.patch rename to packages/linux/patches/rockchip/rockchip-0093-FROMLIST-v4-phy-rockchip-samsung-hdptx-Add-HDMI-2.1-.patch index 6ad6a4eb6d..d7c90f1dff 100644 --- a/packages/linux/patches/rockchip/rockchip-0092-FROMLIST-v4-phy-rockchip-samsung-hdptx-Add-HDMI-2.1-.patch +++ b/packages/linux/patches/rockchip/rockchip-0093-FROMLIST-v4-phy-rockchip-samsung-hdptx-Add-HDMI-2.1-.patch @@ -1,7 +1,7 @@ -From bbf4744749da5b7ba3a5182ccc32ae0f20950e22 Mon Sep 17 00:00:00 2001 +From beb48fd61bed98e7b90110e9065ca4de2e68feec Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Fri, 30 May 2025 00:58:26 +0300 -Subject: [PATCH 092/110] FROMLIST(v4): phy: rockchip: samsung-hdptx: Add HDMI +Subject: [PATCH 093/113] FROMLIST(v4): phy: rockchip: samsung-hdptx: Add HDMI 2.1 FRL support The PHY is capable of handling four HDMI 2.1 Fixed Rate Link (FRL) diff --git a/packages/linux/patches/rockchip/rockchip-0093-FROMLIST-v1-drm-Add-CRTC-background-color-property.patch b/packages/linux/patches/rockchip/rockchip-0094-FROMLIST-v1-drm-Add-CRTC-background-color-property.patch similarity index 98% rename from packages/linux/patches/rockchip/rockchip-0093-FROMLIST-v1-drm-Add-CRTC-background-color-property.patch rename to packages/linux/patches/rockchip/rockchip-0094-FROMLIST-v1-drm-Add-CRTC-background-color-property.patch index 331750704b..be605481ce 100644 --- a/packages/linux/patches/rockchip/rockchip-0093-FROMLIST-v1-drm-Add-CRTC-background-color-property.patch +++ b/packages/linux/patches/rockchip/rockchip-0094-FROMLIST-v1-drm-Add-CRTC-background-color-property.patch @@ -1,7 +1,7 @@ -From 4803a5d929496998d767e787e3c5c8ff3128fd77 Mon Sep 17 00:00:00 2001 +From 8dae522a64e50919fd704ded94b3f3a900e47fc3 Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Tue, 19 Aug 2025 11:21:35 +0300 -Subject: [PATCH 093/110] FROMLIST(v1): drm: Add CRTC background color property +Subject: [PATCH 094/113] FROMLIST(v1): drm: Add CRTC background color property Some display controllers can be hardware programmed to show non-black colors for pixels that are either not covered by any plane or are diff --git a/packages/linux/patches/rockchip/rockchip-0094-FROMLIST-v1-drm-rockchip-vop2-Support-setting-custom.patch b/packages/linux/patches/rockchip/rockchip-0095-FROMLIST-v1-drm-rockchip-vop2-Support-setting-custom.patch similarity index 96% rename from packages/linux/patches/rockchip/rockchip-0094-FROMLIST-v1-drm-rockchip-vop2-Support-setting-custom.patch rename to packages/linux/patches/rockchip/rockchip-0095-FROMLIST-v1-drm-rockchip-vop2-Support-setting-custom.patch index d5f156822b..00af34b2ee 100644 --- a/packages/linux/patches/rockchip/rockchip-0094-FROMLIST-v1-drm-rockchip-vop2-Support-setting-custom.patch +++ b/packages/linux/patches/rockchip/rockchip-0095-FROMLIST-v1-drm-rockchip-vop2-Support-setting-custom.patch @@ -1,7 +1,7 @@ -From b24b214903acb48e05f31a9575a56bad09457de0 Mon Sep 17 00:00:00 2001 +From 09711bc397f384d8e0c1b400e86b24acd3136dc3 Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Fri, 15 Aug 2025 18:36:54 +0300 -Subject: [PATCH 094/110] FROMLIST(v1): drm/rockchip: vop2: Support setting +Subject: [PATCH 095/113] FROMLIST(v1): drm/rockchip: vop2: Support setting custom background color VOP2 allows configuring the background color of each video output port. diff --git a/packages/linux/patches/rockchip/rockchip-0095-WIP-SCRAMB-drm-bridge-Add-detect_ctx-hook.patch b/packages/linux/patches/rockchip/rockchip-0096-WIP-SCRAMB-drm-bridge-Add-detect_ctx-hook.patch similarity index 93% rename from packages/linux/patches/rockchip/rockchip-0095-WIP-SCRAMB-drm-bridge-Add-detect_ctx-hook.patch rename to packages/linux/patches/rockchip/rockchip-0096-WIP-SCRAMB-drm-bridge-Add-detect_ctx-hook.patch index f97654992f..64462e4313 100644 --- a/packages/linux/patches/rockchip/rockchip-0095-WIP-SCRAMB-drm-bridge-Add-detect_ctx-hook.patch +++ b/packages/linux/patches/rockchip/rockchip-0096-WIP-SCRAMB-drm-bridge-Add-detect_ctx-hook.patch @@ -1,7 +1,7 @@ -From 192f8d276cb81bc3508ccc104a0466c45c7cedd5 Mon Sep 17 00:00:00 2001 +From f9b0dceb3122ab09d22300b8e8374466f4f16b84 Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Fri, 10 Jan 2025 22:48:01 +0200 -Subject: [PATCH 095/110] [WIP-SCRAMB] drm/bridge: Add ->detect_ctx() hook +Subject: [PATCH 096/113] [WIP-SCRAMB] drm/bridge: Add ->detect_ctx() hook Add a ->detect() variant that also provides a drm_modeset_acquire_ctx reference for greater flexibility in operation, e.g. to support adding diff --git a/packages/linux/patches/rockchip/rockchip-0096-WIP-SCRAMB-drm-bridge-connector-Switch-from-detect-t.patch b/packages/linux/patches/rockchip/rockchip-0097-WIP-SCRAMB-drm-bridge-connector-Switch-from-detect-t.patch similarity index 97% rename from packages/linux/patches/rockchip/rockchip-0096-WIP-SCRAMB-drm-bridge-connector-Switch-from-detect-t.patch rename to packages/linux/patches/rockchip/rockchip-0097-WIP-SCRAMB-drm-bridge-connector-Switch-from-detect-t.patch index dfddb02522..f6df24630b 100644 --- a/packages/linux/patches/rockchip/rockchip-0096-WIP-SCRAMB-drm-bridge-connector-Switch-from-detect-t.patch +++ b/packages/linux/patches/rockchip/rockchip-0097-WIP-SCRAMB-drm-bridge-connector-Switch-from-detect-t.patch @@ -1,7 +1,7 @@ -From 7fecf1e0658b22b43f8914169f11b68fdd20cc22 Mon Sep 17 00:00:00 2001 +From 8922aec0a2eb1a7e9705199d0154cca92f413f74 Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Fri, 10 Jan 2025 23:04:23 +0200 -Subject: [PATCH 096/110] [WIP-SCRAMB] drm/bridge-connector: Switch from +Subject: [PATCH 097/113] [WIP-SCRAMB] drm/bridge-connector: Switch from ->detect() to ->detect_ctx() In preparation to provide scrambling support to the HDMI Connector diff --git a/packages/linux/patches/rockchip/rockchip-0097-WIP-SCRAMB-drm-bridge-dw-hdmi-qp-Add-high-TMDS-clock.patch b/packages/linux/patches/rockchip/rockchip-0098-WIP-SCRAMB-drm-bridge-dw-hdmi-qp-Add-high-TMDS-clock.patch similarity index 98% rename from packages/linux/patches/rockchip/rockchip-0097-WIP-SCRAMB-drm-bridge-dw-hdmi-qp-Add-high-TMDS-clock.patch rename to packages/linux/patches/rockchip/rockchip-0098-WIP-SCRAMB-drm-bridge-dw-hdmi-qp-Add-high-TMDS-clock.patch index c15c4bf85d..6cf65de205 100644 --- a/packages/linux/patches/rockchip/rockchip-0097-WIP-SCRAMB-drm-bridge-dw-hdmi-qp-Add-high-TMDS-clock.patch +++ b/packages/linux/patches/rockchip/rockchip-0098-WIP-SCRAMB-drm-bridge-dw-hdmi-qp-Add-high-TMDS-clock.patch @@ -1,7 +1,7 @@ -From b1b2d3346cc84581f57a77c7f4d28bda6aa88c46 Mon Sep 17 00:00:00 2001 +From 202d8dd729e43aaec71e87f1be3067cbb604c996 Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Fri, 13 Sep 2024 17:30:35 +0300 -Subject: [PATCH 097/110] [WIP-SCRAMB] drm/bridge: dw-hdmi-qp: Add high TMDS +Subject: [PATCH 098/113] [WIP-SCRAMB] drm/bridge: dw-hdmi-qp: Add high TMDS clock ratio and scrambling support Enable use of HDMI 2.0 display modes, e.g. 4K@60Hz, by permitting TMDS diff --git a/packages/linux/patches/rockchip/rockchip-0098-WIP-YUV420-drm-rockchip-vop2-Add-YUV420-output-forma.patch b/packages/linux/patches/rockchip/rockchip-0099-WIP-YUV420-drm-rockchip-vop2-Add-YUV420-output-forma.patch similarity index 97% rename from packages/linux/patches/rockchip/rockchip-0098-WIP-YUV420-drm-rockchip-vop2-Add-YUV420-output-forma.patch rename to packages/linux/patches/rockchip/rockchip-0099-WIP-YUV420-drm-rockchip-vop2-Add-YUV420-output-forma.patch index b6c6bd2f6a..0480be322f 100644 --- a/packages/linux/patches/rockchip/rockchip-0098-WIP-YUV420-drm-rockchip-vop2-Add-YUV420-output-forma.patch +++ b/packages/linux/patches/rockchip/rockchip-0099-WIP-YUV420-drm-rockchip-vop2-Add-YUV420-output-forma.patch @@ -1,7 +1,7 @@ -From 4332d296d67c677338b00a9ff0e100839a492560 Mon Sep 17 00:00:00 2001 +From b7672656e24c7b5f5c4c1ed3373b51c002238ebc Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Wed, 4 Dec 2024 13:26:13 +0200 -Subject: [PATCH 098/110] [WIP-YUV420] drm/rockchip: vop2: Add YUV420 output +Subject: [PATCH 099/113] [WIP-YUV420] drm/rockchip: vop2: Add YUV420 output format support TODO: proper colorspace conversion handling diff --git a/packages/linux/patches/rockchip/rockchip-0099-WIP-YUV420-drm-rockchip-dw_hdmi_qp-Add-YUV420-output.patch b/packages/linux/patches/rockchip/rockchip-0100-WIP-YUV420-drm-rockchip-dw_hdmi_qp-Add-YUV420-output.patch similarity index 96% rename from packages/linux/patches/rockchip/rockchip-0099-WIP-YUV420-drm-rockchip-dw_hdmi_qp-Add-YUV420-output.patch rename to packages/linux/patches/rockchip/rockchip-0100-WIP-YUV420-drm-rockchip-dw_hdmi_qp-Add-YUV420-output.patch index b7dacc5c5f..47537a9cea 100644 --- a/packages/linux/patches/rockchip/rockchip-0099-WIP-YUV420-drm-rockchip-dw_hdmi_qp-Add-YUV420-output.patch +++ b/packages/linux/patches/rockchip/rockchip-0100-WIP-YUV420-drm-rockchip-dw_hdmi_qp-Add-YUV420-output.patch @@ -1,7 +1,7 @@ -From a2b9f241bbd383ee4157f7b4e3ec993f7b66f325 Mon Sep 17 00:00:00 2001 +From 1367bde13d9991bf81d1c57c2211f4cb4f3a5670 Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Wed, 4 Dec 2024 14:09:35 +0200 -Subject: [PATCH 099/110] [WIP-YUV420] drm/rockchip: dw_hdmi_qp: Add YUV420 +Subject: [PATCH 100/113] [WIP-YUV420] drm/rockchip: dw_hdmi_qp: Add YUV420 output format support Program the necessary bridge registers to allow using the YUV420 color diff --git a/packages/linux/patches/rockchip/rockchip-0100-WIP-FRL-dt-bindings-display-rockchip-Add-tmds-enable.patch b/packages/linux/patches/rockchip/rockchip-0101-WIP-FRL-dt-bindings-display-rockchip-Add-tmds-enable.patch similarity index 94% rename from packages/linux/patches/rockchip/rockchip-0100-WIP-FRL-dt-bindings-display-rockchip-Add-tmds-enable.patch rename to packages/linux/patches/rockchip/rockchip-0101-WIP-FRL-dt-bindings-display-rockchip-Add-tmds-enable.patch index 3a5f4431b8..39fd459865 100644 --- a/packages/linux/patches/rockchip/rockchip-0100-WIP-FRL-dt-bindings-display-rockchip-Add-tmds-enable.patch +++ b/packages/linux/patches/rockchip/rockchip-0101-WIP-FRL-dt-bindings-display-rockchip-Add-tmds-enable.patch @@ -1,7 +1,7 @@ -From de5052e47e9e727fe4c7dc7e55a346d1e5265f90 Mon Sep 17 00:00:00 2001 +From cabd9ad7e12b820cd75002c63d4d944c0e656bae Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Thu, 29 May 2025 19:15:40 +0300 -Subject: [PATCH 100/110] [WIP-FRL] dt-bindings: display: rockchip: Add +Subject: [PATCH 101/113] [WIP-FRL] dt-bindings: display: rockchip: Add tmds-enable-gpios property to rk3588-dw-hdmi-qp Add an optional property to RK3588 HDMI TX Controller binding describing diff --git a/packages/linux/patches/rockchip/rockchip-0101-WIP-FRL-drm-rockchip-dw_hdmi_qp-Fixup-usage-of-enabl.patch b/packages/linux/patches/rockchip/rockchip-0102-WIP-FRL-drm-rockchip-dw_hdmi_qp-Fixup-usage-of-enabl.patch similarity index 95% rename from packages/linux/patches/rockchip/rockchip-0101-WIP-FRL-drm-rockchip-dw_hdmi_qp-Fixup-usage-of-enabl.patch rename to packages/linux/patches/rockchip/rockchip-0102-WIP-FRL-drm-rockchip-dw_hdmi_qp-Fixup-usage-of-enabl.patch index 7883f7acb1..f221bc3594 100644 --- a/packages/linux/patches/rockchip/rockchip-0101-WIP-FRL-drm-rockchip-dw_hdmi_qp-Fixup-usage-of-enabl.patch +++ b/packages/linux/patches/rockchip/rockchip-0102-WIP-FRL-drm-rockchip-dw_hdmi_qp-Fixup-usage-of-enabl.patch @@ -1,7 +1,7 @@ -From 9c8e2ebcd3c861e744af01cf35e4dd45fde33b70 Mon Sep 17 00:00:00 2001 +From aa43ee3ca7f62a8ef4130c9bea2e90cde1410ee6 Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Thu, 29 May 2025 19:50:25 +0300 -Subject: [PATCH 101/110] [WIP-FRL] drm/rockchip: dw_hdmi_qp: Fixup usage of +Subject: [PATCH 102/113] [WIP-FRL] drm/rockchip: dw_hdmi_qp: Fixup usage of enable_gpio member in main struct The name of the enable_gpio member in struct rockchip_hdmi_qp is too diff --git a/packages/linux/patches/rockchip/rockchip-0102-WIP-FRL-arm64-dts-rockchip-Add-tmds-enable-gpios-to-.patch b/packages/linux/patches/rockchip/rockchip-0103-WIP-FRL-arm64-dts-rockchip-Add-tmds-enable-gpios-to-.patch similarity index 90% rename from packages/linux/patches/rockchip/rockchip-0102-WIP-FRL-arm64-dts-rockchip-Add-tmds-enable-gpios-to-.patch rename to packages/linux/patches/rockchip/rockchip-0103-WIP-FRL-arm64-dts-rockchip-Add-tmds-enable-gpios-to-.patch index 09b771da14..7aeead27b8 100644 --- a/packages/linux/patches/rockchip/rockchip-0102-WIP-FRL-arm64-dts-rockchip-Add-tmds-enable-gpios-to-.patch +++ b/packages/linux/patches/rockchip/rockchip-0103-WIP-FRL-arm64-dts-rockchip-Add-tmds-enable-gpios-to-.patch @@ -1,7 +1,7 @@ -From e3cdadc325004c66359204de4b7309cd8b65beb9 Mon Sep 17 00:00:00 2001 +From bd32540799a4373bb55f2a37c4bd8758f7424d0b Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Thu, 29 May 2025 19:31:51 +0300 -Subject: [PATCH 102/110] [WIP-FRL] arm64: dts: rockchip: Add tmds-enable-gpios +Subject: [PATCH 103/113] [WIP-FRL] arm64: dts: rockchip: Add tmds-enable-gpios to rk3588-rock-5b In preparation to support HDMI 2.1 FRL operating mode, make use of the diff --git a/packages/linux/patches/rockchip/rockchip-0103-WIP-FRL-arm64-dts-rockchip-Assign-ACLK_VOP-to-750-MH.patch b/packages/linux/patches/rockchip/rockchip-0104-WIP-FRL-arm64-dts-rockchip-Assign-ACLK_VOP-to-750-MH.patch similarity index 91% rename from packages/linux/patches/rockchip/rockchip-0103-WIP-FRL-arm64-dts-rockchip-Assign-ACLK_VOP-to-750-MH.patch rename to packages/linux/patches/rockchip/rockchip-0104-WIP-FRL-arm64-dts-rockchip-Assign-ACLK_VOP-to-750-MH.patch index d45d04c5ef..55901f4623 100644 --- a/packages/linux/patches/rockchip/rockchip-0103-WIP-FRL-arm64-dts-rockchip-Assign-ACLK_VOP-to-750-MH.patch +++ b/packages/linux/patches/rockchip/rockchip-0104-WIP-FRL-arm64-dts-rockchip-Assign-ACLK_VOP-to-750-MH.patch @@ -1,7 +1,7 @@ -From 14b4f30929d8d88f850e012e2abfe07c7b11ff33 Mon Sep 17 00:00:00 2001 +From 18ce72e0da99917cc427e30ac058794ffcfbda1d Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Tue, 8 Jul 2025 20:12:00 +0300 -Subject: [PATCH 103/110] [WIP-FRL] arm64: dts: rockchip: Assign ACLK_VOP to +Subject: [PATCH 104/113] [WIP-FRL] arm64: dts: rockchip: Assign ACLK_VOP to 750 MHz on rk3588 In preparation to support HDMI 2.1 display modes on RK3588, e.g. diff --git a/packages/linux/patches/rockchip/rockchip-0104-WIP-FRL-drm-connector-hdmi-Handle-FRL-in-hdmi_clock_.patch b/packages/linux/patches/rockchip/rockchip-0105-WIP-FRL-drm-connector-hdmi-Handle-FRL-in-hdmi_clock_.patch similarity index 90% rename from packages/linux/patches/rockchip/rockchip-0104-WIP-FRL-drm-connector-hdmi-Handle-FRL-in-hdmi_clock_.patch rename to packages/linux/patches/rockchip/rockchip-0105-WIP-FRL-drm-connector-hdmi-Handle-FRL-in-hdmi_clock_.patch index 95f044c0b9..837639d0b7 100644 --- a/packages/linux/patches/rockchip/rockchip-0104-WIP-FRL-drm-connector-hdmi-Handle-FRL-in-hdmi_clock_.patch +++ b/packages/linux/patches/rockchip/rockchip-0105-WIP-FRL-drm-connector-hdmi-Handle-FRL-in-hdmi_clock_.patch @@ -1,7 +1,7 @@ -From 86a0c8b96b0b7a48c1b09ffcfac7fdaf512c390a Mon Sep 17 00:00:00 2001 +From 9c2a238cd27f1ae1e55d05f00ce9437992702866 Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Thu, 3 Jul 2025 12:47:17 +0300 -Subject: [PATCH 104/110] [WIP-FRL] drm/connector: hdmi: Handle FRL in +Subject: [PATCH 105/113] [WIP-FRL] drm/connector: hdmi: Handle FRL in hdmi_clock_valid() Do not limit clock validation to max_tmds_clock if the sink advertises diff --git a/packages/linux/patches/rockchip/rockchip-0105-WIP-FRL-drm-bridge-dw-hdmi-qp-Add-HDMI-2.1-FRL-suppo.patch b/packages/linux/patches/rockchip/rockchip-0106-WIP-FRL-drm-bridge-dw-hdmi-qp-Add-HDMI-2.1-FRL-suppo.patch similarity index 99% rename from packages/linux/patches/rockchip/rockchip-0105-WIP-FRL-drm-bridge-dw-hdmi-qp-Add-HDMI-2.1-FRL-suppo.patch rename to packages/linux/patches/rockchip/rockchip-0106-WIP-FRL-drm-bridge-dw-hdmi-qp-Add-HDMI-2.1-FRL-suppo.patch index 57be5ce06e..e5a1d25d4b 100644 --- a/packages/linux/patches/rockchip/rockchip-0105-WIP-FRL-drm-bridge-dw-hdmi-qp-Add-HDMI-2.1-FRL-suppo.patch +++ b/packages/linux/patches/rockchip/rockchip-0106-WIP-FRL-drm-bridge-dw-hdmi-qp-Add-HDMI-2.1-FRL-suppo.patch @@ -1,7 +1,7 @@ -From eb8cd72f25d04baf60554da56b82afe07ba12dd9 Mon Sep 17 00:00:00 2001 +From 7e7345dc22e8084fb7deb057470a530338b90d0f Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Thu, 3 Jul 2025 12:42:38 +0300 -Subject: [PATCH 105/110] [WIP-FRL] drm/bridge: dw-hdmi-qp: Add HDMI 2.1 FRL +Subject: [PATCH 106/113] [WIP-FRL] drm/bridge: dw-hdmi-qp: Add HDMI 2.1 FRL support Implement the link training state machine required to support HDMI 2.1 diff --git a/packages/linux/patches/rockchip/rockchip-0106-WIP-FRL-drm-rockchip-dw_hdmi_qp-Add-HDMI-2.1-FRL-sup.patch b/packages/linux/patches/rockchip/rockchip-0107-WIP-FRL-drm-rockchip-dw_hdmi_qp-Add-HDMI-2.1-FRL-sup.patch similarity index 98% rename from packages/linux/patches/rockchip/rockchip-0106-WIP-FRL-drm-rockchip-dw_hdmi_qp-Add-HDMI-2.1-FRL-sup.patch rename to packages/linux/patches/rockchip/rockchip-0107-WIP-FRL-drm-rockchip-dw_hdmi_qp-Add-HDMI-2.1-FRL-sup.patch index b09b796100..672b9ab28c 100644 --- a/packages/linux/patches/rockchip/rockchip-0106-WIP-FRL-drm-rockchip-dw_hdmi_qp-Add-HDMI-2.1-FRL-sup.patch +++ b/packages/linux/patches/rockchip/rockchip-0107-WIP-FRL-drm-rockchip-dw_hdmi_qp-Add-HDMI-2.1-FRL-sup.patch @@ -1,7 +1,7 @@ -From fd0b25ea4aa5b8e6f4dac412beb261a83a994104 Mon Sep 17 00:00:00 2001 +From a1adfb713e0a8611f0f8dceedc9220f1fd1f08c1 Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Thu, 3 Jul 2025 12:44:04 +0300 -Subject: [PATCH 106/110] [WIP-FRL] drm/rockchip: dw_hdmi_qp: Add HDMI 2.1 FRL +Subject: [PATCH 107/113] [WIP-FRL] drm/rockchip: dw_hdmi_qp: Add HDMI 2.1 FRL support Extend ->enc_init() hooks of {rk3576,rk3588}_hdmi_ctrl_ops to enable diff --git a/packages/linux/patches/rockchip/rockchip-0107-WIP-FRL-drm-rockchip-vop2-Add-HDMI-2.1-FRL-support.patch b/packages/linux/patches/rockchip/rockchip-0108-WIP-FRL-drm-rockchip-vop2-Add-HDMI-2.1-FRL-support.patch similarity index 85% rename from packages/linux/patches/rockchip/rockchip-0107-WIP-FRL-drm-rockchip-vop2-Add-HDMI-2.1-FRL-support.patch rename to packages/linux/patches/rockchip/rockchip-0108-WIP-FRL-drm-rockchip-vop2-Add-HDMI-2.1-FRL-support.patch index e2c810c064..51cfa96e4f 100644 --- a/packages/linux/patches/rockchip/rockchip-0107-WIP-FRL-drm-rockchip-vop2-Add-HDMI-2.1-FRL-support.patch +++ b/packages/linux/patches/rockchip/rockchip-0108-WIP-FRL-drm-rockchip-vop2-Add-HDMI-2.1-FRL-support.patch @@ -1,7 +1,7 @@ -From 5a07c74da913e93c53bc40da14334323ca98c2d4 Mon Sep 17 00:00:00 2001 +From 4d3e3186bac977ddc76598bc55066179c4d46665 Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Thu, 19 Jun 2025 23:57:01 +0300 -Subject: [PATCH 107/110] [WIP-FRL] drm/rockchip: vop2: Add HDMI 2.1 FRL +Subject: [PATCH 108/113] [WIP-FRL] drm/rockchip: vop2: Add HDMI 2.1 FRL support TODO: this has been "borrowed" from downstream code, although it might @@ -13,7 +13,7 @@ Signed-off-by: Cristian Ciocaltea 1 file changed, 9 insertions(+) diff --git a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c -index 5a3d8c834ca9..74b6275da45d 100644 +index f18ddf3240ab..609c430421f1 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c @@ -1578,6 +1578,15 @@ static unsigned long rk3588_calc_cru_cfg(struct vop2_video_port *vp, int id, diff --git a/packages/linux/patches/rockchip/rockchip-0109-FROMLIST-v1-pmdomain-core-Restore-behaviour-for-disa.patch b/packages/linux/patches/rockchip/rockchip-0109-FROMLIST-v1-pmdomain-core-Restore-behaviour-for-disa.patch deleted file mode 100644 index 6b52d89691..0000000000 --- a/packages/linux/patches/rockchip/rockchip-0109-FROMLIST-v1-pmdomain-core-Restore-behaviour-for-disa.patch +++ /dev/null @@ -1,127 +0,0 @@ -From b799e395272bdbdc60c2864afe55c569fd728d9b Mon Sep 17 00:00:00 2001 -From: Ulf Hansson -Date: Tue, 9 Sep 2025 13:11:20 +0200 -Subject: [PATCH 109/110] FROMLIST(v1): pmdomain: core: Restore behaviour for - disabling unused PM domains - -Recent changes to genpd prevents those PM domains being powered-on during -initialization from being powered-off during the boot sequence. Based upon -whether CONFIG_PM_CONFIG_PM_GENERIC_DOMAINS_OF is set of not, genpd relies -on the sync_state mechanism or the genpd_power_off_unused() (which is a -late_initcall_sync), to understand when it's okay to allow these PM domains -to be powered-off. - -This new behaviour in genpd has lead to problems on different platforms. -Let's therefore restore the behavior of genpd_power_off_unused(). -Moreover, let's introduce GENPD_FLAG_NO_STAY_ON, to allow genpd OF -providers to opt-out from the new behaviour. - -Link: https://lore.kernel.org/all/20250701114733.636510-1-ulf.hansson@linaro.org/ -Reported-by: Geert Uytterhoeven -Link: https://lore.kernel.org/all/20250902-rk3576-lockup-regression-v1-1-c4a0c9daeb00@collabora.com/ -Reported-by: Nicolas Frattaroli -Fixes: 0e789b491ba0 ("pmdomain: core: Leave powered-on genpds on until sync_state") -Fixes: 13a4b7fb6260 ("pmdomain: core: Leave powered-on genpds on until late_initcall_sync") -Signed-off-by: Ulf Hansson -Tested-by: Heiko Stuebner -Reviewed-by: Geert Uytterhoeven -Tested-by: Geert Uytterhoeven ---- - drivers/pmdomain/core.c | 20 ++++++++++++++------ - include/linux/pm_domain.h | 7 +++++++ - 2 files changed, 21 insertions(+), 6 deletions(-) - -diff --git a/drivers/pmdomain/core.c b/drivers/pmdomain/core.c -index 0006ab3d0789..61c2277c9ce3 100644 ---- a/drivers/pmdomain/core.c -+++ b/drivers/pmdomain/core.c -@@ -187,6 +187,7 @@ static const struct genpd_lock_ops genpd_raw_spin_ops = { - #define genpd_is_opp_table_fw(genpd) (genpd->flags & GENPD_FLAG_OPP_TABLE_FW) - #define genpd_is_dev_name_fw(genpd) (genpd->flags & GENPD_FLAG_DEV_NAME_FW) - #define genpd_is_no_sync_state(genpd) (genpd->flags & GENPD_FLAG_NO_SYNC_STATE) -+#define genpd_is_no_stay_on(genpd) (genpd->flags & GENPD_FLAG_NO_STAY_ON) - - static inline bool irq_safe_dev_in_sleep_domain(struct device *dev, - const struct generic_pm_domain *genpd) -@@ -1357,7 +1358,6 @@ static int genpd_runtime_resume(struct device *dev) - return ret; - } - --#ifndef CONFIG_PM_GENERIC_DOMAINS_OF - static bool pd_ignore_unused; - static int __init pd_ignore_unused_setup(char *__unused) - { -@@ -1382,9 +1382,6 @@ static int __init genpd_power_off_unused(void) - mutex_lock(&gpd_list_lock); - - list_for_each_entry(genpd, &gpd_list, gpd_list_node) { -- genpd_lock(genpd); -- genpd->stay_on = false; -- genpd_unlock(genpd); - genpd_queue_power_off_work(genpd); - } - -@@ -1393,7 +1390,6 @@ static int __init genpd_power_off_unused(void) - return 0; - } - late_initcall_sync(genpd_power_off_unused); --#endif - - #ifdef CONFIG_PM_SLEEP - -@@ -2367,6 +2363,18 @@ static void genpd_lock_init(struct generic_pm_domain *genpd) - } - } - -+#ifdef CONFIG_PM_GENERIC_DOMAINS_OF -+static void genpd_set_stay_on(struct generic_pm_domain *genpd, bool is_off) -+{ -+ genpd->stay_on = !genpd_is_no_stay_on(genpd) && !is_off; -+} -+#else -+static void genpd_set_stay_on(struct generic_pm_domain *genpd, bool is_off) -+{ -+ genpd->stay_on = false; -+} -+#endif -+ - /** - * pm_genpd_init - Initialize a generic I/O PM domain object. - * @genpd: PM domain object to initialize. -@@ -2392,7 +2400,7 @@ int pm_genpd_init(struct generic_pm_domain *genpd, - INIT_WORK(&genpd->power_off_work, genpd_power_off_work_fn); - atomic_set(&genpd->sd_count, 0); - genpd->status = is_off ? GENPD_STATE_OFF : GENPD_STATE_ON; -- genpd->stay_on = !is_off; -+ genpd_set_stay_on(genpd, is_off); - genpd->sync_state = GENPD_SYNC_STATE_OFF; - genpd->device_count = 0; - genpd->provider = NULL; -diff --git a/include/linux/pm_domain.h b/include/linux/pm_domain.h -index c84edf217819..f67a2cb7d781 100644 ---- a/include/linux/pm_domain.h -+++ b/include/linux/pm_domain.h -@@ -115,6 +115,12 @@ struct dev_pm_domain_list { - * genpd provider specific way, likely through a - * parent device node. This flag makes genpd to - * skip its internal support for this. -+ * -+ * GENPD_FLAG_NO_STAY_ON: For genpd OF providers a powered-on PM domain at -+ * initialization is prevented from being -+ * powered-off until the ->sync_state() callback is -+ * invoked. This flag informs genpd to allow a -+ * power-off without waiting for ->sync_state(). - */ - #define GENPD_FLAG_PM_CLK (1U << 0) - #define GENPD_FLAG_IRQ_SAFE (1U << 1) -@@ -126,6 +132,7 @@ struct dev_pm_domain_list { - #define GENPD_FLAG_OPP_TABLE_FW (1U << 7) - #define GENPD_FLAG_DEV_NAME_FW (1U << 8) - #define GENPD_FLAG_NO_SYNC_STATE (1U << 9) -+#define GENPD_FLAG_NO_STAY_ON (1U << 10) - - enum gpd_status { - GENPD_STATE_ON = 0, /* PM domain is on */ --- -2.34.1 - diff --git a/packages/linux/patches/rockchip/rockchip-0108-WIP-arm64-dts-rockchip-add-pcie-wifi-support-to-Oran.patch b/packages/linux/patches/rockchip/rockchip-0109-WIP-arm64-dts-rockchip-add-pcie-wifi-support-to-Oran.patch similarity index 92% rename from packages/linux/patches/rockchip/rockchip-0108-WIP-arm64-dts-rockchip-add-pcie-wifi-support-to-Oran.patch rename to packages/linux/patches/rockchip/rockchip-0109-WIP-arm64-dts-rockchip-add-pcie-wifi-support-to-Oran.patch index 96416c8410..8e276baad3 100644 --- a/packages/linux/patches/rockchip/rockchip-0108-WIP-arm64-dts-rockchip-add-pcie-wifi-support-to-Oran.patch +++ b/packages/linux/patches/rockchip/rockchip-0109-WIP-arm64-dts-rockchip-add-pcie-wifi-support-to-Oran.patch @@ -1,7 +1,7 @@ -From b027f8f50ad5a2f75b473afaa51cfe504278016d Mon Sep 17 00:00:00 2001 +From 685694983903db3cf328692b9cce26a07d727e00 Mon Sep 17 00:00:00 2001 From: Muhammed Efe Cetin Date: Tue, 10 Dec 2024 21:56:10 +0300 -Subject: [PATCH 108/110] WIP: arm64: dts: rockchip: add pcie wifi support to +Subject: [PATCH 109/113] WIP: arm64: dts: rockchip: add pcie wifi support to OrangePi-5b Add the PCIe nodes to OrangePi-5b to allow the OrangePi diff --git a/packages/linux/patches/rockchip/rockchip-0110-FROMLIST-v1-pmdomain-rockchip-Fix-regulator-dependen.patch b/packages/linux/patches/rockchip/rockchip-0110-FROMLIST-v1-pmdomain-rockchip-Fix-regulator-dependen.patch deleted file mode 100644 index 8a33b69878..0000000000 --- a/packages/linux/patches/rockchip/rockchip-0110-FROMLIST-v1-pmdomain-rockchip-Fix-regulator-dependen.patch +++ /dev/null @@ -1,52 +0,0 @@ -From 22b83d6b31a2744d0db96ec247fad39515409d00 Mon Sep 17 00:00:00 2001 -From: Ulf Hansson -Date: Tue, 9 Sep 2025 13:11:21 +0200 -Subject: [PATCH 110/110] FROMLIST(v1): pmdomain: rockchip: Fix regulator - dependency with GENPD_FLAG_NO_STAY_ON - -The deferred regulator retrieval for Rockchip PM domains are causing some -weird dependencies. More precisely, if the power-domain is powered-on from -the HW perspective, its corresponding regulator must not be powered-off via -regulator_init_complete(), which is a late_initcall_sync. - -Even on platforms that don't have the domain-supply regulator specified for -the power-domain provider, may suffer from these problems. - -More precisely, things just happen to work before, because -genpd_power_off_unused() (also a late_initcall_sync) managed to power-off -the PM domain before regulator_init_complete() powered-off the regulator. - -Ideally this fragile dependency must be fixed properly for the Rockchip PM -domains, but until then, let's fallback to the previous behaviour by using -the GENPD_FLAG_NO_STAY_ON flag. - -Link: https://lore.kernel.org/all/20250902-rk3576-lockup-regression-v1-1-c4a0c9daeb00@collabora.com/ -Reported-by: Nicolas Frattaroli -Cc: Heiko Stuebner -Cc: Sebastian Reichel -Fixes: 0e789b491ba0 ("pmdomain: core: Leave powered-on genpds on until sync_state") -Fixes: 13a4b7fb6260 ("pmdomain: core: Leave powered-on genpds on until late_initcall_sync") -Signed-off-by: Ulf Hansson -Tested-by: Heiko Stuebner -Acked-by: Heiko Stuebner -Tested-by: Nicolas Frattaroli ---- - drivers/pmdomain/rockchip/pm-domains.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/pmdomain/rockchip/pm-domains.c b/drivers/pmdomain/rockchip/pm-domains.c -index 242570c505fb..1955c6d453e4 100644 ---- a/drivers/pmdomain/rockchip/pm-domains.c -+++ b/drivers/pmdomain/rockchip/pm-domains.c -@@ -865,7 +865,7 @@ static int rockchip_pm_add_one_domain(struct rockchip_pmu *pmu, - pd->genpd.power_on = rockchip_pd_power_on; - pd->genpd.attach_dev = rockchip_pd_attach_dev; - pd->genpd.detach_dev = rockchip_pd_detach_dev; -- pd->genpd.flags = GENPD_FLAG_PM_CLK; -+ pd->genpd.flags = GENPD_FLAG_PM_CLK | GENPD_FLAG_NO_STAY_ON; - if (pd_info->active_wakeup) - pd->genpd.flags |= GENPD_FLAG_ACTIVE_WAKEUP; - pm_genpd_init(&pd->genpd, NULL, --- -2.34.1 - diff --git a/packages/linux/patches/rockchip/rockchip-0110-WIP-media-dt-bindings-rockchip-Add-RK3568-Video-Deco.patch b/packages/linux/patches/rockchip/rockchip-0110-WIP-media-dt-bindings-rockchip-Add-RK3568-Video-Deco.patch new file mode 100644 index 0000000000..3d75953067 --- /dev/null +++ b/packages/linux/patches/rockchip/rockchip-0110-WIP-media-dt-bindings-rockchip-Add-RK3568-Video-Deco.patch @@ -0,0 +1,38 @@ +From 6f63401b7fd30ca028242ef9dfe97ff948148d55 Mon Sep 17 00:00:00 2001 +From: Christian Hewitt +Date: Fri, 19 Sep 2025 14:28:48 +0000 +Subject: [PATCH 110/113] WIP: media: dt-bindings: rockchip: Add RK3568 Video + Decoder bindings + +The video decoder in RK356X (vdpu346) is described in the same way as +the one in RK3588 (vdpu381). A new compatible is added as the decoder +capabilities are a subset of the vdpu381 capabilities. + +Signed-off-by: Christian Hewitt +--- + Documentation/devicetree/bindings/media/rockchip,vdec.yaml | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/Documentation/devicetree/bindings/media/rockchip,vdec.yaml b/Documentation/devicetree/bindings/media/rockchip,vdec.yaml +index 809fda45b3bd..656ceb1f116e 100644 +--- a/Documentation/devicetree/bindings/media/rockchip,vdec.yaml ++++ b/Documentation/devicetree/bindings/media/rockchip,vdec.yaml +@@ -18,6 +18,7 @@ properties: + oneOf: + - const: rockchip,rk3288-vdec + - const: rockchip,rk3399-vdec ++ - const: rockchip,rk3568-vdec + - const: rockchip,rk3576-vdec + - const: rockchip,rk3588-vdec + - items: +@@ -107,6 +108,7 @@ allOf: + compatible: + contains: + enum: ++ - rockchip,rk3568-vdec + - rockchip,rk3576-vdec + - rockchip,rk3588-vdec + then: +-- +2.34.1 + diff --git a/packages/linux/patches/rockchip/rockchip-0111-WIP-media-rkvdec-Add-support-for-the-VDPU346-variant.patch b/packages/linux/patches/rockchip/rockchip-0111-WIP-media-rkvdec-Add-support-for-the-VDPU346-variant.patch new file mode 100644 index 0000000000..89523db2c7 --- /dev/null +++ b/packages/linux/patches/rockchip/rockchip-0111-WIP-media-rkvdec-Add-support-for-the-VDPU346-variant.patch @@ -0,0 +1,182 @@ +From 2cfd18fa6a7527132b808c3dd18ddcaddf270bec Mon Sep 17 00:00:00 2001 +From: Christian Hewitt +Date: Fri, 19 Sep 2025 14:19:53 +0000 +Subject: [PATCH 111/113] WIP: media: rkvdec: Add support for the VDPU346 + variant + +VDPU346 is derived from VDPU381 but with a single core and limited +to 4K60 media. It also omits AV1 and AVS2 capabilities. It is used +with RK3566 and RK3568. + +Signed-off-by: Christian Hewitt +--- + .../media/platform/rockchip/rkvdec/rkvdec.c | 118 +++++++++++++++++- + 1 file changed, 116 insertions(+), 2 deletions(-) + +diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec.c b/drivers/media/platform/rockchip/rkvdec/rkvdec.c +index 1e263f6d73b8..042a5b544903 100644 +--- a/drivers/media/platform/rockchip/rkvdec/rkvdec.c ++++ b/drivers/media/platform/rockchip/rkvdec/rkvdec.c +@@ -91,8 +91,9 @@ static bool rkvdec_is_valid_fmt(struct rkvdec_ctx *ctx, u32 fourcc, + #define VDPU38X_STRIDE_ALIGN 16 + + /** +- * The default v4l2_fill_pixfmt_mp() function doesn't allow for specific alignment values. +- * As the VDPU381 and VDPU383 need lines to be aligned on 16, use our own implementation here. ++ * The default v4l2_fill_pixfmt_mp() function doesn't allow for specific alignment ++ * values. As the VDPU346, VDPU381, and VDPU383 need lines to be aligned on 16, use ++ * our own implementation here. + */ + static int vdpu38x_fill_pixfmt_mp(struct v4l2_pix_format_mplane *pix_mp, u32 pixelformat, + u32 width, u32 height) +@@ -308,6 +309,60 @@ static const struct rkvdec_ctrls rkvdec_h264_ctrls = { + .num_ctrls = ARRAY_SIZE(rkvdec_h264_ctrl_descs), + }; + ++static const struct rkvdec_ctrl_desc vdpu346_hevc_ctrl_descs[] = { ++ { ++ .cfg.id = V4L2_CID_STATELESS_HEVC_DECODE_PARAMS, ++ }, ++ { ++ .cfg.id = V4L2_CID_STATELESS_HEVC_SPS, ++ .cfg.ops = &rkvdec_ctrl_ops, ++ }, ++ { ++ .cfg.id = V4L2_CID_STATELESS_HEVC_PPS, ++ }, ++ { ++ .cfg.id = V4L2_CID_STATELESS_HEVC_SCALING_MATRIX, ++ }, ++ { ++ .cfg.id = V4L2_CID_STATELESS_HEVC_DECODE_MODE, ++ .cfg.min = V4L2_STATELESS_HEVC_DECODE_MODE_FRAME_BASED, ++ .cfg.max = V4L2_STATELESS_HEVC_DECODE_MODE_FRAME_BASED, ++ .cfg.def = V4L2_STATELESS_HEVC_DECODE_MODE_FRAME_BASED, ++ }, ++ { ++ .cfg.id = V4L2_CID_STATELESS_HEVC_START_CODE, ++ .cfg.min = V4L2_STATELESS_HEVC_START_CODE_ANNEX_B, ++ .cfg.def = V4L2_STATELESS_HEVC_START_CODE_ANNEX_B, ++ .cfg.max = V4L2_STATELESS_HEVC_START_CODE_ANNEX_B, ++ }, ++ { ++ .cfg.id = V4L2_CID_MPEG_VIDEO_HEVC_PROFILE, ++ .cfg.min = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, ++ .cfg.max = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10, ++ .cfg.menu_skip_mask = ++ BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE), ++ .cfg.def = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, ++ }, ++ { ++ .cfg.id = V4L2_CID_MPEG_VIDEO_HEVC_LEVEL, ++ .cfg.min = V4L2_MPEG_VIDEO_HEVC_LEVEL_1, ++ .cfg.max = V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1, ++ }, ++ { ++ .cfg.id = V4L2_CID_STATELESS_HEVC_EXT_SPS_ST_RPS, ++ .cfg.dims = { 65 }, ++ }, ++ { ++ .cfg.id = V4L2_CID_STATELESS_HEVC_EXT_SPS_LT_RPS, ++ .cfg.dims = { 65 }, ++ }, ++}; ++ ++static const struct rkvdec_ctrls vdpu346_hevc_ctrls = { ++ .ctrls = vdpu346_hevc_ctrl_descs, ++ .num_ctrls = ARRAY_SIZE(vdpu346_hevc_ctrl_descs), ++}; ++ + static const struct rkvdec_ctrl_desc vdpu38x_hevc_ctrl_descs[] = { + { + .cfg.id = V4L2_CID_STATELESS_HEVC_DECODE_PARAMS, +@@ -471,6 +526,43 @@ static const struct rkvdec_coded_fmt_desc rkvdec_coded_fmts[] = { + } + }; + ++static const struct rkvdec_coded_fmt_desc vdpu346_coded_fmts[] = { ++ { ++ .fourcc = V4L2_PIX_FMT_H264_SLICE, ++ .frmsize = { ++ .min_width = 64, ++ .max_width = 65520, ++ .step_width = 64, ++ .min_height = 64, ++ .max_height = 65520, ++ .step_height = 16, ++ }, ++ .ctrls = &rkvdec_h264_ctrls, ++ .ops = &rkvdec_vdpu381_h264_fmt_ops, ++ .num_decoded_fmts = ARRAY_SIZE(rkvdec_h264_decoded_fmts), ++ .decoded_fmts = rkvdec_h264_decoded_fmts, ++ .subsystem_flags = VB2_V4L2_FL_SUPPORTS_M2M_HOLD_CAPTURE_BUF, ++ .capability = RKVDEC_CAPABILITY_H264, ++ }, ++ { ++ .fourcc = V4L2_PIX_FMT_HEVC_SLICE, ++ .frmsize = { ++ .min_width = 64, ++ .max_width = 65472, ++ .step_width = 64, ++ .min_height = 64, ++ .max_height = 65472, ++ .step_height = 16, ++ }, ++ .ctrls = &vdpu346_hevc_ctrls, ++ .ops = &rkvdec_vdpu381_hevc_fmt_ops, ++ .num_decoded_fmts = ARRAY_SIZE(rkvdec_hevc_decoded_fmts), ++ .decoded_fmts = rkvdec_hevc_decoded_fmts, ++ .subsystem_flags = VB2_V4L2_FL_SUPPORTS_M2M_HOLD_CAPTURE_BUF, ++ .capability = RKVDEC_CAPABILITY_HEVC, ++ }, ++}; ++ + static const struct rkvdec_coded_fmt_desc vdpu381_coded_fmts[] = { + { + .fourcc = V4L2_PIX_FMT_H264_SLICE, +@@ -1637,6 +1729,18 @@ static struct rcb_size_info vdpu381_rcb_sizes[] = { + {67, PIC_HEIGHT}, // filtc col + }; + ++static const struct rkvdec_config config_vdpu346 = { ++ .coded_fmts = (struct rkvdec_coded_fmt_desc *)vdpu346_coded_fmts, ++ .coded_fmts_num = ARRAY_SIZE(vdpu346_coded_fmts), ++ .rcb_size_info = vdpu381_rcb_sizes, ++ .rcb_num = ARRAY_SIZE(vdpu381_rcb_sizes), ++ .irq_handler = vdpu381_irq_handler, ++ .fill_pixfmt_mp = vdpu38x_fill_pixfmt_mp, ++ .colmv_size = rkvdec_colmv_size, ++ .flatten_matrices = transpose_and_flatten_matrices, ++ .named_regs = true, ++}; ++ + static const struct rkvdec_config config_vdpu381 = { + .coded_fmts = (struct rkvdec_coded_fmt_desc *)vdpu381_coded_fmts, + .coded_fmts_num = ARRAY_SIZE(vdpu381_coded_fmts), +@@ -1698,6 +1802,12 @@ static const struct rkvdec_variant rk3399_rkvdec_variant = { + RKVDEC_CAPABILITY_VP9, + }; + ++static const struct rkvdec_variant rk3568_vdpu346_variant = { ++ .config = &config_vdpu346, ++ .capabilities = RKVDEC_CAPABILITY_H264 | ++ RKVDEC_CAPABILITY_HEVC, ++}; ++ + static const struct rkvdec_variant rk3588_vdpu381_variant = { + .config = &config_vdpu381, + .capabilities = RKVDEC_CAPABILITY_H264 | +@@ -1723,6 +1833,10 @@ static const struct of_device_id of_rkvdec_match[] = { + .compatible = "rockchip,rk3399-vdec", + .data = &rk3399_rkvdec_variant, + }, ++ { ++ .compatible = "rockchip,rk3568-vdec", ++ .data = &rk3568_vdpu346_variant, ++ }, + { + .compatible = "rockchip,rk3588-vdec", + .data = &rk3588_vdpu381_variant, +-- +2.34.1 + diff --git a/packages/linux/patches/rockchip/rockchip-0112-WIP-arm64-dts-rockchip-Add-the-vdpu346-Video-Decoder.patch b/packages/linux/patches/rockchip/rockchip-0112-WIP-arm64-dts-rockchip-Add-the-vdpu346-Video-Decoder.patch new file mode 100644 index 0000000000..fe7c655532 --- /dev/null +++ b/packages/linux/patches/rockchip/rockchip-0112-WIP-arm64-dts-rockchip-Add-the-vdpu346-Video-Decoder.patch @@ -0,0 +1,87 @@ +From a56092cd59fc86c94bfda34c7c1f1f0596e2b092 Mon Sep 17 00:00:00 2001 +From: Christian Hewitt +Date: Wed, 17 Sep 2025 13:34:30 +0000 +Subject: [PATCH 112/113] WIP: arm64: dts: rockchip: Add the vdpu346 Video + Decoders on RK356X + +Add the vdpu346 Video Decoders to the rk356x-base devicetree to +enable support on RK3566 and RK3568 boards. Also add the needed +sram and vdec_mmu nodes. + +Suggested-by: Diederik de Haas +Suggested-by: Piotr Oniszczuk +Signed-off-by: Christian Hewitt +--- + arch/arm64/boot/dts/rockchip/rk356x-base.dtsi | 49 +++++++++++++++++++ + 1 file changed, 49 insertions(+) + +diff --git a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi +index fd2214b6fad4..4257ffbf5320 100644 +--- a/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk356x-base.dtsi +@@ -380,6 +380,19 @@ usb2phy1_grf: syscon@fdca8000 { + reg = <0x0 0xfdca8000 0x0 0x8000>; + }; + ++ sram@fdcc0000 { ++ compatible = "mmio-sram"; ++ reg = <0x0 0xfdcc0000 0x0 0xb000>; ++ ranges = <0x0 0x0 0xfdcc0000 0xb000>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ vdec_sram: rkvdec-sram@0 { ++ reg = <0x0 0xb000>; ++ pool; ++ }; ++ }; ++ + pmucru: clock-controller@fdd00000 { + compatible = "rockchip,rk3568-pmucru"; + reg = <0x0 0xfdd00000 0x0 0x1000>; +@@ -616,6 +629,42 @@ vepu_mmu: iommu@fdee0800 { + #iommu-cells = <0>; + }; + ++ vdec: video-codec@fdf80100 { ++ compatible = "rockchip,rk3568-vdec"; ++ reg = <0x0 0xfdf80200 0x0 0x500>, ++ <0x0 0xfdf80100 0x0 0x100>, ++ <0x0 0xfdf80700 0x0 0x100>; ++ reg-names = "function", "link", "cache"; ++ interrupts = ; ++ clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>, ++ <&cru CLK_RKVDEC_CA>, <&cru CLK_RKVDEC_CORE>, ++ <&cru CLK_RKVDEC_HEVC_CA>; ++ clock-names = "axi", "ahb", "cabac", "core", "hevc_cabac"; ++ assigned-clocks = <&cru ACLK_RKVDEC>, ++ <&cru CLK_RKVDEC_CORE>, ++ <&cru CLK_RKVDEC_CA>, ++ <&cru CLK_RKVDEC_HEVC_CA>; ++ assigned-clock-rates = <297000000>, <297000000>, ++ <297000000>, <600000000>; ++ iommus = <&vdec_mmu>; ++ power-domains = <&power RK3568_PD_RKVDEC>; ++ resets = <&cru SRST_A_RKVDEC>, <&cru SRST_H_RKVDEC>, ++ <&cru SRST_RKVDEC_CA>, <&cru SRST_RKVDEC_CORE>, ++ <&cru SRST_RKVDEC_HEVC_CA>; ++ reset-names = "axi", "ahb", "cabac", "core", "hevc_cabac"; ++ sram = <&vdec_sram>; ++ }; ++ ++ vdec_mmu: iommu@fdf80800 { ++ compatible = "rockchip,rk3568-iommu"; ++ reg = <0x0 0xfdf80800 0x0 0x40>, <0x0 0xfdf80840 0x0 0x40>; ++ interrupts = ; ++ clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>; ++ clock-names = "aclk", "iface"; ++ power-domains = <&power RK3568_PD_RKVDEC>; ++ #iommu-cells = <0>; ++ }; ++ + sdmmc2: mmc@fe000000 { + compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc"; + reg = <0x0 0xfe000000 0x0 0x4000>; +-- +2.34.1 + diff --git a/packages/linux/patches/rockchip/rockchip-0113-media-rkvdec-minor-fixes-for-current-DETLEV-patches.patch b/packages/linux/patches/rockchip/rockchip-0113-media-rkvdec-minor-fixes-for-current-DETLEV-patches.patch new file mode 100644 index 0000000000..ffaad19d50 --- /dev/null +++ b/packages/linux/patches/rockchip/rockchip-0113-media-rkvdec-minor-fixes-for-current-DETLEV-patches.patch @@ -0,0 +1,57 @@ +From 490b38167b1a6d1121338d639f828125b6691446 Mon Sep 17 00:00:00 2001 +From: Christian Hewitt +Date: Fri, 19 Sep 2025 14:53:29 +0000 +Subject: [PATCH 113/113] media: rkvdec: minor fixes for current DETLEV patches + +One typo in vdpu-381-regs and some H264 > H265 corrections in +the vdpu-383-hevc file. + +Signed-off-by: Christian Hewitt +--- + .../media/platform/rockchip/rkvdec/rkvdec-vdpu381-regs.h | 2 +- + .../media/platform/rockchip/rkvdec/rkvdec-vdpu383-hevc.c | 6 +++--- + 2 files changed, 4 insertions(+), 4 deletions(-) + +diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu381-regs.h b/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu381-regs.h +index 11b545e9ee7e..41020604d0ea 100644 +--- a/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu381-regs.h ++++ b/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu381-regs.h +@@ -90,7 +90,7 @@ struct rkvdec_vdpu381_regs_common { + u32 reserved4 : 7; + } reg011; + +- struct rkvdec_vdpu381_sencodary_en { ++ struct rkvdec_vdpu381_secondary_en { + u32 wr_ddr_align_en : 1; + u32 colmv_compress_en : 1; + u32 fbc_e : 1; +diff --git a/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu383-hevc.c b/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu383-hevc.c +index 7d53c28e954e..f454da3920dd 100644 +--- a/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu383-hevc.c ++++ b/drivers/media/platform/rockchip/rkvdec/rkvdec-vdpu383-hevc.c +@@ -275,11 +275,11 @@ static void set_pps_ref_pic_poc(struct rkvdec_hevc_sps_pps *hw_ps, u32 poc, int + static void assemble_hw_pps(struct rkvdec_ctx *ctx, + struct rkvdec_hevc_run *run) + { +- struct rkvdec_hevc_ctx *h264_ctx = ctx->priv; ++ struct rkvdec_hevc_ctx *h265_ctx = ctx->priv; + const struct v4l2_ctrl_hevc_sps *sps = run->sps; + const struct v4l2_ctrl_hevc_pps *pps = run->pps; + const struct v4l2_ctrl_hevc_decode_params *dec_params = run->decode_params; +- struct rkvdec_hevc_priv_tbl *priv_tbl = h264_ctx->priv_tbl.cpu; ++ struct rkvdec_hevc_priv_tbl *priv_tbl = h265_ctx->priv_tbl.cpu; + struct rkvdec_hevc_sps_pps *hw_ps; + bool tiles_enabled; + s32 max_cu_width; +@@ -479,7 +479,7 @@ static void config_registers(struct rkvdec_ctx *ctx, + + memset(regs, 0, sizeof(*regs)); + +- /* Set H264 mode */ ++ /* Set HEVC mode */ + regs->common.reg008_dec_mode = VDPU383_MODE_HEVC; + + /* Set input stream length */ +-- +2.34.1 + diff --git a/projects/Rockchip/linux/linux.aarch64.conf b/projects/Rockchip/linux/linux.aarch64.conf index f34ddf73c0..7e4c7f5655 100644 --- a/projects/Rockchip/linux/linux.aarch64.conf +++ b/projects/Rockchip/linux/linux.aarch64.conf @@ -1,6 +1,6 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm64 6.17.0-rc3 Kernel Configuration +# Linux/arm64 6.17.0-rc6 Kernel Configuration # CONFIG_CC_VERSION_TEXT="aarch64-libreelec-linux-gnu-gcc-15.2.0 (GCC) 15.2.0" CONFIG_CC_IS_GCC=y @@ -603,7 +603,7 @@ CONFIG_CPU_FREQ_STAT=y # CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL=y CONFIG_CPU_FREQ_GOV_PERFORMANCE=y @@ -2653,6 +2653,7 @@ CONFIG_RTW88_LEDS=y CONFIG_RTW89=m CONFIG_RTW89_CORE=m CONFIG_RTW89_PCI=m +CONFIG_RTW89_USB=m CONFIG_RTW89_8851B=m CONFIG_RTW89_8852A=m CONFIG_RTW89_8852B_COMMON=m @@ -3132,8 +3133,8 @@ CONFIG_PINCTRL_ROCKCHIP=y # # end of Renesas pinctrl drivers -CONFIG_GPIOLIB=y CONFIG_GPIOLIB_LEGACY=y +CONFIG_GPIOLIB=y CONFIG_GPIOLIB_FASTPATH_LIMIT=512 CONFIG_OF_GPIO=y CONFIG_GPIOLIB_IRQCHIP=y @@ -5877,6 +5878,8 @@ CONFIG_SCSI_UFSHCD_PCI=y CONFIG_SCSI_UFS_DWC_TC_PCI=y CONFIG_SCSI_UFSHCD_PLATFORM=y CONFIG_SCSI_UFS_CDNS_PLATFORM=y +# CONFIG_SCSI_UFS_DWC_TC_PLATFORM is not set +CONFIG_SCSI_UFS_ROCKCHIP=y # CONFIG_MEMSTICK is not set CONFIG_NEW_LEDS=y CONFIG_LEDS_CLASS=y @@ -7213,6 +7216,17 @@ CONFIG_NVMEM_U_BOOT_ENV=m # CONFIG_FPGA is not set # CONFIG_FSI is not set # CONFIG_TEE is not set +CONFIG_MULTIPLEXER=y + +# +# Multiplexer drivers +# +# CONFIG_MUX_ADG792A is not set +# CONFIG_MUX_ADGS1408 is not set +# CONFIG_MUX_GPIO is not set +# CONFIG_MUX_MMIO is not set +# end of Multiplexer drivers + CONFIG_PM_OPP=y # CONFIG_SIOX is not set # CONFIG_SLIMBUS is not set