From 16718487d729416d1f6c371c1cb524f817f2d019 Mon Sep 17 00:00:00 2001
From: OtherCrashOverride <OtherCrashOverride@users.noreply.github.com>
Date: Sun, 9 Apr 2017 17:31:25 +0000
Subject: [PATCH 10/21] MEMEKA: drm/exynos/mixer: never blend the base layer

On Exynos there is a solid color plane that is logically below all the other display planes.
This causes display artifacts due to alpha. The patch disables blending the base plane with
the solid color plane (no alpha).

Reviewed-by: memeka <mihailescu2m@gmail.com>
Signed-off-by: memeka <mihailescu2m@gmail.com>
---
 drivers/gpu/drm/exynos/exynos_mixer.c | 33 +++++++++++++++------------
 1 file changed, 18 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c
index e5204be86093..430622e0d8d4 100644
--- a/drivers/gpu/drm/exynos/exynos_mixer.c
+++ b/drivers/gpu/drm/exynos/exynos_mixer.c
@@ -315,23 +315,26 @@ static void mixer_cfg_gfx_blend(struct mixer_context *ctx, unsigned int win,
 	u32 val;
 
 	val  = MXR_GRP_CFG_COLOR_KEY_DISABLE; /* no blank key */
-	switch (pixel_alpha) {
-	case DRM_MODE_BLEND_PIXEL_NONE:
-		break;
-	case DRM_MODE_BLEND_COVERAGE:
-		val |= MXR_GRP_CFG_PIXEL_BLEND_EN;
-		break;
-	case DRM_MODE_BLEND_PREMULTI:
-	default:
-		val |= MXR_GRP_CFG_BLEND_PRE_MUL;
-		val |= MXR_GRP_CFG_PIXEL_BLEND_EN;
-		break;
-	}
+	if (win) {
+		switch (pixel_alpha) {
+		case DRM_MODE_BLEND_PIXEL_NONE:
+			break;
+		case DRM_MODE_BLEND_COVERAGE:
+			val |= MXR_GRP_CFG_PIXEL_BLEND_EN;
+			break;
+		case DRM_MODE_BLEND_PREMULTI:
+		default:
+			val |= MXR_GRP_CFG_BLEND_PRE_MUL;
+			val |= MXR_GRP_CFG_PIXEL_BLEND_EN;
+			break;
+		}
 
-	if (alpha != DRM_BLEND_ALPHA_OPAQUE) {
-		val |= MXR_GRP_CFG_WIN_BLEND_EN;
-		val |= win_alpha;
+		if (alpha != DRM_BLEND_ALPHA_OPAQUE) {
+			val |= MXR_GRP_CFG_WIN_BLEND_EN;
+			val |= win_alpha;
+		}
 	}
+
 	mixer_reg_writemask(ctx, MXR_GRAPHIC_CFG(win),
 			    val, MXR_GRP_CFG_MISC_MASK);
 }
-- 
2.17.1

