From afbe8e0ae318f407d64bbc48b784d93c782b6564 Mon Sep 17 00:00:00 2001
From: Laurentiu Palcu <laurentiu.palcu@nxp.com>
Date: Thu, 5 Sep 2019 13:07:22 +0300
Subject: [PATCH 29/49] clk: imx8mq: add 27MHz PHY ref clock

This clock is a high precision clock on imx8mq-evk board that will be used by
HDMI phy.

Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
---
 drivers/clk/imx/clk-imx8mq.c             | 3 ++-
 include/dt-bindings/clock/imx8mq-clock.h | 4 +++-
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c
index 06292d4a98ff..6bd2fe0ae71d 100644
--- a/drivers/clk/imx/clk-imx8mq.c
+++ b/drivers/clk/imx/clk-imx8mq.c
@@ -304,6 +304,7 @@ static int imx8mq_clocks_probe(struct platform_device *pdev)
 	hws[IMX8MQ_CLK_EXT2] = imx_get_clk_hw_by_name(np, "clk_ext2");
 	hws[IMX8MQ_CLK_EXT3] = imx_get_clk_hw_by_name(np, "clk_ext3");
 	hws[IMX8MQ_CLK_EXT4] = imx_get_clk_hw_by_name(np, "clk_ext4");
+	hws[IMX8MQ_CLK_PHY_27MHZ] = imx_get_clk_hw_by_name(np, "hdmi_phy_27m");
 
 	np = of_find_compatible_node(NULL, NULL, "fsl,imx8mq-anatop");
 	base = of_iomap(np, 0);
diff --git a/include/dt-bindings/clock/imx8mq-clock.h b/include/dt-bindings/clock/imx8mq-clock.h
index 9b8045d75b8b..2a81f96b7c74 100644
--- a/include/dt-bindings/clock/imx8mq-clock.h
+++ b/include/dt-bindings/clock/imx8mq-clock.h
@@ -431,6 +431,7 @@
 #define IMX8MQ_CLK_MON_SEL			301
 #define IMX8MQ_CLK_MON_CLK2_OUT		302
+#define IMX8MQ_CLK_PHY_27MHZ			303
 
-#define IMX8MQ_CLK_END				303
+#define IMX8MQ_CLK_END				304
 
 #endif /* __DT_BINDINGS_CLOCK_IMX8MQ_H */
-- 
2.29.2

